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Commit | Line | Data |
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57844a8f TG |
1 | /* |
2 | * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de> | |
3 | * | |
4 | * For licencing details see kernel-base/COPYING | |
5 | */ | |
6 | #include <linux/init.h> | |
9325a28c | 7 | #include <linux/ioport.h> |
72550b3a | 8 | #include <linux/module.h> |
294ee6f8 | 9 | #include <linux/pci.h> |
57844a8f | 10 | |
816c25e7 | 11 | #include <asm/bios_ebda.h> |
6f30c1ac | 12 | #include <asm/paravirt.h> |
b72d0db9 | 13 | #include <asm/pci_x86.h> |
fd6c6661 | 14 | #include <asm/mpspec.h> |
8fee697d | 15 | #include <asm/setup.h> |
736decac | 16 | #include <asm/apic.h> |
6b18ae3e | 17 | #include <asm/e820.h> |
845b3944 | 18 | #include <asm/time.h> |
d9112f43 | 19 | #include <asm/irq.h> |
4a8e2a31 | 20 | #include <asm/io_apic.h> |
71054d88 | 21 | #include <asm/hpet.h> |
fd12a0d6 | 22 | #include <asm/pat.h> |
2d826404 | 23 | #include <asm/tsc.h> |
338bac52 | 24 | #include <asm/iommu.h> |
064a59b6 | 25 | #include <asm/mach_traps.h> |
57844a8f | 26 | |
148f9bb8 | 27 | void x86_init_noop(void) { } |
f4848472 | 28 | void __init x86_init_uint_noop(unsigned int unused) { } |
d07c1be0 | 29 | int __init iommu_init_noop(void) { return 0; } |
62ad33f6 | 30 | void iommu_shutdown_noop(void) { } |
57844a8f TG |
31 | |
32 | /* | |
33 | * The platform setup functions are preset with the default functions | |
34 | * for standard PC hardware. | |
35 | */ | |
54e2603f | 36 | struct x86_init_ops x86_init __initdata = { |
f7cf5a5b TG |
37 | |
38 | .resources = { | |
5d94e81f | 39 | .probe_roms = probe_roms, |
8fee697d | 40 | .reserve_resources = reserve_standard_io_resources, |
6b18ae3e | 41 | .memory_setup = default_machine_specific_memory_setup, |
f7cf5a5b | 42 | }, |
f4848472 TG |
43 | |
44 | .mpparse = { | |
45 | .mpc_record = x86_init_uint_noop, | |
de934103 | 46 | .setup_ioapic_ids = x86_init_noop, |
fd6c6661 | 47 | .mpc_apic_id = default_mpc_apic_id, |
72302142 | 48 | .smp_read_mpc_oem = default_smp_read_mpc_oem, |
90e1c696 | 49 | .mpc_oem_bus_info = default_mpc_oem_bus_info, |
b3f1b617 TG |
50 | .find_smp_config = default_find_smp_config, |
51 | .get_smp_config = default_get_smp_config, | |
f4848472 | 52 | }, |
d9112f43 TG |
53 | |
54 | .irqs = { | |
55 | .pre_vector_init = init_ISA_irqs, | |
66bcaf0b | 56 | .intr_init = native_init_IRQ, |
428cf902 | 57 | .trap_init = x86_init_noop, |
d9112f43 | 58 | }, |
42bbdb43 TG |
59 | |
60 | .oem = { | |
61 | .arch_setup = x86_init_noop, | |
6f30c1ac | 62 | .banner = default_banner, |
42bbdb43 | 63 | }, |
030cb6c0 TG |
64 | |
65 | .paging = { | |
7737b215 | 66 | .pagetable_init = native_pagetable_init, |
030cb6c0 | 67 | }, |
736decac TG |
68 | |
69 | .timers = { | |
70 | .setup_percpu_clockev = setup_boot_APIC_clock, | |
845b3944 TG |
71 | .tsc_pre_init = x86_init_noop, |
72 | .timer_init = hpet_time_init, | |
6b617e22 | 73 | .wallclock_init = x86_init_noop, |
736decac | 74 | }, |
d07c1be0 FT |
75 | |
76 | .iommu = { | |
77 | .iommu_init = iommu_init_noop, | |
78 | }, | |
b72d0db9 TG |
79 | |
80 | .pci = { | |
81 | .init = x86_default_pci_init, | |
ab3b3793 | 82 | .init_irq = x86_default_pci_init_irq, |
9325a28c | 83 | .fixup_irqs = x86_default_pci_fixup_irqs, |
b72d0db9 | 84 | }, |
736decac TG |
85 | }; |
86 | ||
148f9bb8 | 87 | struct x86_cpuinit_ops x86_cpuinit = { |
df156f90 | 88 | .early_percpu_clock_init = x86_init_noop, |
736decac | 89 | .setup_percpu_clockev = setup_secondary_APIC_clock, |
57844a8f | 90 | }; |
2d826404 | 91 | |
78c06176 | 92 | static void default_nmi_init(void) { }; |
c516ac58 | 93 | static int default_i8042_detect(void) { return 1; }; |
78c06176 | 94 | |
2d826404 TG |
95 | struct x86_platform_ops x86_platform = { |
96 | .calibrate_tsc = native_calibrate_tsc, | |
7bd867df FT |
97 | .get_wallclock = mach_get_cmos_time, |
98 | .set_wallclock = mach_set_rtc_mmss, | |
338bac52 | 99 | .iommu_shutdown = iommu_shutdown_noop, |
eb41c8be | 100 | .is_untracked_pat_range = is_ISA_range, |
c516ac58 | 101 | .nmi_init = default_nmi_init, |
064a59b6 | 102 | .get_nmi_reason = default_get_nmi_reason, |
b74f05d6 MT |
103 | .i8042_detect = default_i8042_detect, |
104 | .save_sched_clock_state = tsc_save_sched_clock_state, | |
105 | .restore_sched_clock_state = tsc_restore_sched_clock_state, | |
2d826404 | 106 | }; |
72550b3a PA |
107 | |
108 | EXPORT_SYMBOL_GPL(x86_platform); | |
4287d824 TP |
109 | |
110 | #if defined(CONFIG_PCI_MSI) | |
294ee6f8 | 111 | struct x86_msi_ops x86_msi = { |
71054d88 JR |
112 | .setup_msi_irqs = native_setup_msi_irqs, |
113 | .teardown_msi_irq = native_teardown_msi_irq, | |
114 | .teardown_msi_irqs = default_teardown_msi_irqs, | |
115 | .restore_msi_irqs = default_restore_msi_irqs, | |
294ee6f8 | 116 | }; |
4a8e2a31 | 117 | |
4287d824 TP |
118 | /* MSI arch specific hooks */ |
119 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |
120 | { | |
121 | return x86_msi.setup_msi_irqs(dev, nvec, type); | |
122 | } | |
123 | ||
124 | void arch_teardown_msi_irqs(struct pci_dev *dev) | |
125 | { | |
126 | x86_msi.teardown_msi_irqs(dev); | |
127 | } | |
128 | ||
129 | void arch_teardown_msi_irq(unsigned int irq) | |
130 | { | |
131 | x86_msi.teardown_msi_irq(irq); | |
132 | } | |
133 | ||
ac8344c4 | 134 | void arch_restore_msi_irqs(struct pci_dev *dev) |
4287d824 | 135 | { |
ac8344c4 | 136 | x86_msi.restore_msi_irqs(dev); |
4287d824 TP |
137 | } |
138 | #endif | |
139 | ||
4a8e2a31 | 140 | struct x86_io_apic_ops x86_io_apic_ops = { |
1c4248ca | 141 | .read = native_io_apic_read, |
1c4248ca | 142 | .disable = native_disable_io_apic, |
4a8e2a31 | 143 | }; |