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Commit | Line | Data |
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e83d5887 AS |
1 | /* |
2 | * KVM Microsoft Hyper-V emulation | |
3 | * | |
4 | * derived from arch/x86/kvm/x86.c | |
5 | * | |
6 | * Copyright (C) 2006 Qumranet, Inc. | |
7 | * Copyright (C) 2008 Qumranet, Inc. | |
8 | * Copyright IBM Corporation, 2008 | |
9 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. | |
10 | * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com> | |
11 | * | |
12 | * Authors: | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * Yaniv Kamay <yaniv@qumranet.com> | |
15 | * Amit Shah <amit.shah@qumranet.com> | |
16 | * Ben-Ami Yassour <benami@il.ibm.com> | |
17 | * Andrey Smetanin <asmetanin@virtuozzo.com> | |
18 | * | |
19 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
20 | * the COPYING file in the top-level directory. | |
21 | * | |
22 | */ | |
23 | ||
24 | #include "x86.h" | |
25 | #include "lapic.h" | |
5c919412 | 26 | #include "ioapic.h" |
e83d5887 AS |
27 | #include "hyperv.h" |
28 | ||
29 | #include <linux/kvm_host.h> | |
765eaa0f | 30 | #include <linux/highmem.h> |
32ef5517 IM |
31 | #include <linux/sched/cputime.h> |
32 | ||
5c919412 | 33 | #include <asm/apicdef.h> |
e83d5887 AS |
34 | #include <trace/events/kvm.h> |
35 | ||
36 | #include "trace.h" | |
37 | ||
5c919412 AS |
38 | static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint) |
39 | { | |
40 | return atomic64_read(&synic->sint[sint]); | |
41 | } | |
42 | ||
43 | static inline int synic_get_sint_vector(u64 sint_value) | |
44 | { | |
45 | if (sint_value & HV_SYNIC_SINT_MASKED) | |
46 | return -1; | |
47 | return sint_value & HV_SYNIC_SINT_VECTOR_MASK; | |
48 | } | |
49 | ||
50 | static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic, | |
51 | int vector) | |
52 | { | |
53 | int i; | |
54 | ||
55 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
56 | if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector) | |
57 | return true; | |
58 | } | |
59 | return false; | |
60 | } | |
61 | ||
62 | static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic, | |
63 | int vector) | |
64 | { | |
65 | int i; | |
66 | u64 sint_value; | |
67 | ||
68 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
69 | sint_value = synic_read_sint(synic, i); | |
70 | if (synic_get_sint_vector(sint_value) == vector && | |
71 | sint_value & HV_SYNIC_SINT_AUTO_EOI) | |
72 | return true; | |
73 | } | |
74 | return false; | |
75 | } | |
76 | ||
7be58a64 AS |
77 | static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint, |
78 | u64 data, bool host) | |
5c919412 AS |
79 | { |
80 | int vector; | |
81 | ||
82 | vector = data & HV_SYNIC_SINT_VECTOR_MASK; | |
7be58a64 | 83 | if (vector < 16 && !host) |
5c919412 AS |
84 | return 1; |
85 | /* | |
86 | * Guest may configure multiple SINTs to use the same vector, so | |
87 | * we maintain a bitmap of vectors handled by synic, and a | |
88 | * bitmap of vectors with auto-eoi behavior. The bitmaps are | |
89 | * updated here, and atomically queried on fast paths. | |
90 | */ | |
91 | ||
92 | atomic64_set(&synic->sint[sint], data); | |
93 | ||
94 | if (synic_has_vector_connected(synic, vector)) | |
95 | __set_bit(vector, synic->vec_bitmap); | |
96 | else | |
97 | __clear_bit(vector, synic->vec_bitmap); | |
98 | ||
99 | if (synic_has_vector_auto_eoi(synic, vector)) | |
100 | __set_bit(vector, synic->auto_eoi_bitmap); | |
101 | else | |
102 | __clear_bit(vector, synic->auto_eoi_bitmap); | |
103 | ||
104 | /* Load SynIC vectors into EOI exit bitmap */ | |
105 | kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic)); | |
106 | return 0; | |
107 | } | |
108 | ||
d3457c87 RK |
109 | static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx) |
110 | { | |
111 | struct kvm_vcpu *vcpu = NULL; | |
112 | int i; | |
113 | ||
114 | if (vpidx < KVM_MAX_VCPUS) | |
115 | vcpu = kvm_get_vcpu(kvm, vpidx); | |
116 | if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx) | |
117 | return vcpu; | |
118 | kvm_for_each_vcpu(i, vcpu, kvm) | |
119 | if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx) | |
120 | return vcpu; | |
121 | return NULL; | |
122 | } | |
123 | ||
124 | static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx) | |
5c919412 AS |
125 | { |
126 | struct kvm_vcpu *vcpu; | |
127 | struct kvm_vcpu_hv_synic *synic; | |
128 | ||
d3457c87 | 129 | vcpu = get_vcpu_by_vpidx(kvm, vpidx); |
5c919412 AS |
130 | if (!vcpu) |
131 | return NULL; | |
132 | synic = vcpu_to_synic(vcpu); | |
133 | return (synic->active) ? synic : NULL; | |
134 | } | |
135 | ||
765eaa0f AS |
136 | static void synic_clear_sint_msg_pending(struct kvm_vcpu_hv_synic *synic, |
137 | u32 sint) | |
138 | { | |
139 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
140 | struct page *page; | |
141 | gpa_t gpa; | |
142 | struct hv_message *msg; | |
143 | struct hv_message_page *msg_page; | |
144 | ||
145 | gpa = synic->msg_page & PAGE_MASK; | |
146 | page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT); | |
147 | if (is_error_page(page)) { | |
148 | vcpu_err(vcpu, "Hyper-V SynIC can't get msg page, gpa 0x%llx\n", | |
149 | gpa); | |
150 | return; | |
151 | } | |
152 | msg_page = kmap_atomic(page); | |
153 | ||
154 | msg = &msg_page->sint_message[sint]; | |
155 | msg->header.message_flags.msg_pending = 0; | |
156 | ||
157 | kunmap_atomic(msg_page); | |
158 | kvm_release_page_dirty(page); | |
159 | kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT); | |
160 | } | |
161 | ||
5c919412 AS |
162 | static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint) |
163 | { | |
164 | struct kvm *kvm = vcpu->kvm; | |
765eaa0f | 165 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); |
1f4b34f8 AS |
166 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); |
167 | struct kvm_vcpu_hv_stimer *stimer; | |
168 | int gsi, idx, stimers_pending; | |
5c919412 | 169 | |
18659a9c | 170 | trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint); |
5c919412 | 171 | |
765eaa0f AS |
172 | if (synic->msg_page & HV_SYNIC_SIMP_ENABLE) |
173 | synic_clear_sint_msg_pending(synic, sint); | |
174 | ||
1f4b34f8 AS |
175 | /* Try to deliver pending Hyper-V SynIC timers messages */ |
176 | stimers_pending = 0; | |
177 | for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) { | |
178 | stimer = &hv_vcpu->stimer[idx]; | |
179 | if (stimer->msg_pending && | |
180 | (stimer->config & HV_STIMER_ENABLE) && | |
181 | HV_STIMER_SINT(stimer->config) == sint) { | |
182 | set_bit(stimer->index, | |
183 | hv_vcpu->stimer_pending_bitmap); | |
184 | stimers_pending++; | |
185 | } | |
186 | } | |
187 | if (stimers_pending) | |
188 | kvm_make_request(KVM_REQ_HV_STIMER, vcpu); | |
189 | ||
5c919412 | 190 | idx = srcu_read_lock(&kvm->irq_srcu); |
1f4b34f8 | 191 | gsi = atomic_read(&synic->sint_to_gsi[sint]); |
5c919412 AS |
192 | if (gsi != -1) |
193 | kvm_notify_acked_gsi(kvm, gsi); | |
194 | srcu_read_unlock(&kvm->irq_srcu, idx); | |
195 | } | |
196 | ||
db397571 AS |
197 | static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr) |
198 | { | |
199 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
200 | struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv; | |
201 | ||
202 | hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC; | |
203 | hv_vcpu->exit.u.synic.msr = msr; | |
204 | hv_vcpu->exit.u.synic.control = synic->control; | |
205 | hv_vcpu->exit.u.synic.evt_page = synic->evt_page; | |
206 | hv_vcpu->exit.u.synic.msg_page = synic->msg_page; | |
207 | ||
208 | kvm_make_request(KVM_REQ_HV_EXIT, vcpu); | |
209 | } | |
210 | ||
5c919412 AS |
211 | static int synic_set_msr(struct kvm_vcpu_hv_synic *synic, |
212 | u32 msr, u64 data, bool host) | |
213 | { | |
214 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
215 | int ret; | |
216 | ||
217 | if (!synic->active) | |
218 | return 1; | |
219 | ||
18659a9c AS |
220 | trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host); |
221 | ||
5c919412 AS |
222 | ret = 0; |
223 | switch (msr) { | |
224 | case HV_X64_MSR_SCONTROL: | |
225 | synic->control = data; | |
db397571 AS |
226 | if (!host) |
227 | synic_exit(synic, msr); | |
5c919412 AS |
228 | break; |
229 | case HV_X64_MSR_SVERSION: | |
230 | if (!host) { | |
231 | ret = 1; | |
232 | break; | |
233 | } | |
234 | synic->version = data; | |
235 | break; | |
236 | case HV_X64_MSR_SIEFP: | |
efc479e6 RK |
237 | if ((data & HV_SYNIC_SIEFP_ENABLE) && !host && |
238 | !synic->dont_zero_synic_pages) | |
5c919412 AS |
239 | if (kvm_clear_guest(vcpu->kvm, |
240 | data & PAGE_MASK, PAGE_SIZE)) { | |
241 | ret = 1; | |
242 | break; | |
243 | } | |
244 | synic->evt_page = data; | |
db397571 AS |
245 | if (!host) |
246 | synic_exit(synic, msr); | |
5c919412 AS |
247 | break; |
248 | case HV_X64_MSR_SIMP: | |
efc479e6 RK |
249 | if ((data & HV_SYNIC_SIMP_ENABLE) && !host && |
250 | !synic->dont_zero_synic_pages) | |
5c919412 AS |
251 | if (kvm_clear_guest(vcpu->kvm, |
252 | data & PAGE_MASK, PAGE_SIZE)) { | |
253 | ret = 1; | |
254 | break; | |
255 | } | |
256 | synic->msg_page = data; | |
db397571 AS |
257 | if (!host) |
258 | synic_exit(synic, msr); | |
5c919412 AS |
259 | break; |
260 | case HV_X64_MSR_EOM: { | |
261 | int i; | |
262 | ||
263 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) | |
264 | kvm_hv_notify_acked_sint(vcpu, i); | |
265 | break; | |
266 | } | |
267 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
7be58a64 | 268 | ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host); |
5c919412 AS |
269 | break; |
270 | default: | |
271 | ret = 1; | |
272 | break; | |
273 | } | |
274 | return ret; | |
275 | } | |
276 | ||
277 | static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata) | |
278 | { | |
279 | int ret; | |
280 | ||
281 | if (!synic->active) | |
282 | return 1; | |
283 | ||
284 | ret = 0; | |
285 | switch (msr) { | |
286 | case HV_X64_MSR_SCONTROL: | |
287 | *pdata = synic->control; | |
288 | break; | |
289 | case HV_X64_MSR_SVERSION: | |
290 | *pdata = synic->version; | |
291 | break; | |
292 | case HV_X64_MSR_SIEFP: | |
293 | *pdata = synic->evt_page; | |
294 | break; | |
295 | case HV_X64_MSR_SIMP: | |
296 | *pdata = synic->msg_page; | |
297 | break; | |
298 | case HV_X64_MSR_EOM: | |
299 | *pdata = 0; | |
300 | break; | |
301 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
302 | *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]); | |
303 | break; | |
304 | default: | |
305 | ret = 1; | |
306 | break; | |
307 | } | |
308 | return ret; | |
309 | } | |
310 | ||
ecd8a8c2 | 311 | static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint) |
5c919412 AS |
312 | { |
313 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
314 | struct kvm_lapic_irq irq; | |
315 | int ret, vector; | |
316 | ||
317 | if (sint >= ARRAY_SIZE(synic->sint)) | |
318 | return -EINVAL; | |
319 | ||
320 | vector = synic_get_sint_vector(synic_read_sint(synic, sint)); | |
321 | if (vector < 0) | |
322 | return -ENOENT; | |
323 | ||
324 | memset(&irq, 0, sizeof(irq)); | |
f98a3efb | 325 | irq.shorthand = APIC_DEST_SELF; |
5c919412 AS |
326 | irq.dest_mode = APIC_DEST_PHYSICAL; |
327 | irq.delivery_mode = APIC_DM_FIXED; | |
328 | irq.vector = vector; | |
329 | irq.level = 1; | |
330 | ||
f98a3efb | 331 | ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL); |
18659a9c | 332 | trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret); |
5c919412 AS |
333 | return ret; |
334 | } | |
335 | ||
d3457c87 | 336 | int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint) |
5c919412 AS |
337 | { |
338 | struct kvm_vcpu_hv_synic *synic; | |
339 | ||
d3457c87 | 340 | synic = synic_get(kvm, vpidx); |
5c919412 AS |
341 | if (!synic) |
342 | return -EINVAL; | |
343 | ||
344 | return synic_set_irq(synic, sint); | |
345 | } | |
346 | ||
347 | void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector) | |
348 | { | |
349 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); | |
350 | int i; | |
351 | ||
18659a9c | 352 | trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector); |
5c919412 AS |
353 | |
354 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) | |
355 | if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector) | |
356 | kvm_hv_notify_acked_sint(vcpu, i); | |
357 | } | |
358 | ||
d3457c87 | 359 | static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi) |
5c919412 AS |
360 | { |
361 | struct kvm_vcpu_hv_synic *synic; | |
362 | ||
d3457c87 | 363 | synic = synic_get(kvm, vpidx); |
5c919412 AS |
364 | if (!synic) |
365 | return -EINVAL; | |
366 | ||
367 | if (sint >= ARRAY_SIZE(synic->sint_to_gsi)) | |
368 | return -EINVAL; | |
369 | ||
370 | atomic_set(&synic->sint_to_gsi[sint], gsi); | |
371 | return 0; | |
372 | } | |
373 | ||
374 | void kvm_hv_irq_routing_update(struct kvm *kvm) | |
375 | { | |
376 | struct kvm_irq_routing_table *irq_rt; | |
377 | struct kvm_kernel_irq_routing_entry *e; | |
378 | u32 gsi; | |
379 | ||
380 | irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu, | |
381 | lockdep_is_held(&kvm->irq_lock)); | |
382 | ||
383 | for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) { | |
384 | hlist_for_each_entry(e, &irq_rt->map[gsi], link) { | |
385 | if (e->type == KVM_IRQ_ROUTING_HV_SINT) | |
386 | kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu, | |
387 | e->hv_sint.sint, gsi); | |
388 | } | |
389 | } | |
390 | } | |
391 | ||
392 | static void synic_init(struct kvm_vcpu_hv_synic *synic) | |
393 | { | |
394 | int i; | |
395 | ||
396 | memset(synic, 0, sizeof(*synic)); | |
397 | synic->version = HV_SYNIC_VERSION_1; | |
398 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
399 | atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED); | |
400 | atomic_set(&synic->sint_to_gsi[i], -1); | |
401 | } | |
402 | } | |
403 | ||
93bf4172 AS |
404 | static u64 get_time_ref_counter(struct kvm *kvm) |
405 | { | |
095cf55d PB |
406 | struct kvm_hv *hv = &kvm->arch.hyperv; |
407 | struct kvm_vcpu *vcpu; | |
408 | u64 tsc; | |
409 | ||
410 | /* | |
411 | * The guest has not set up the TSC page or the clock isn't | |
412 | * stable, fall back to get_kvmclock_ns. | |
413 | */ | |
414 | if (!hv->tsc_ref.tsc_sequence) | |
415 | return div_u64(get_kvmclock_ns(kvm), 100); | |
416 | ||
417 | vcpu = kvm_get_vcpu(kvm, 0); | |
418 | tsc = kvm_read_l1_tsc(vcpu, rdtsc()); | |
419 | return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64) | |
420 | + hv->tsc_ref.tsc_offset; | |
93bf4172 AS |
421 | } |
422 | ||
f3b138c5 | 423 | static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer, |
1f4b34f8 AS |
424 | bool vcpu_kick) |
425 | { | |
426 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
427 | ||
428 | set_bit(stimer->index, | |
429 | vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap); | |
430 | kvm_make_request(KVM_REQ_HV_STIMER, vcpu); | |
431 | if (vcpu_kick) | |
432 | kvm_vcpu_kick(vcpu); | |
433 | } | |
434 | ||
1f4b34f8 AS |
435 | static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer) |
436 | { | |
437 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
438 | ||
ac3e5fca AS |
439 | trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id, |
440 | stimer->index); | |
441 | ||
019b9781 | 442 | hrtimer_cancel(&stimer->timer); |
1f4b34f8 AS |
443 | clear_bit(stimer->index, |
444 | vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap); | |
445 | stimer->msg_pending = false; | |
f808495d | 446 | stimer->exp_time = 0; |
1f4b34f8 AS |
447 | } |
448 | ||
449 | static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer) | |
450 | { | |
451 | struct kvm_vcpu_hv_stimer *stimer; | |
452 | ||
453 | stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer); | |
ac3e5fca AS |
454 | trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id, |
455 | stimer->index); | |
f3b138c5 | 456 | stimer_mark_pending(stimer, true); |
1f4b34f8 AS |
457 | |
458 | return HRTIMER_NORESTART; | |
459 | } | |
460 | ||
f808495d AS |
461 | /* |
462 | * stimer_start() assumptions: | |
463 | * a) stimer->count is not equal to 0 | |
464 | * b) stimer->config has HV_STIMER_ENABLE flag | |
465 | */ | |
1f4b34f8 AS |
466 | static int stimer_start(struct kvm_vcpu_hv_stimer *stimer) |
467 | { | |
468 | u64 time_now; | |
469 | ktime_t ktime_now; | |
470 | ||
471 | time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm); | |
472 | ktime_now = ktime_get(); | |
473 | ||
474 | if (stimer->config & HV_STIMER_PERIODIC) { | |
f808495d AS |
475 | if (stimer->exp_time) { |
476 | if (time_now >= stimer->exp_time) { | |
477 | u64 remainder; | |
478 | ||
479 | div64_u64_rem(time_now - stimer->exp_time, | |
480 | stimer->count, &remainder); | |
481 | stimer->exp_time = | |
482 | time_now + (stimer->count - remainder); | |
483 | } | |
484 | } else | |
485 | stimer->exp_time = time_now + stimer->count; | |
1f4b34f8 | 486 | |
ac3e5fca AS |
487 | trace_kvm_hv_stimer_start_periodic( |
488 | stimer_to_vcpu(stimer)->vcpu_id, | |
489 | stimer->index, | |
490 | time_now, stimer->exp_time); | |
491 | ||
1f4b34f8 | 492 | hrtimer_start(&stimer->timer, |
f808495d AS |
493 | ktime_add_ns(ktime_now, |
494 | 100 * (stimer->exp_time - time_now)), | |
1f4b34f8 AS |
495 | HRTIMER_MODE_ABS); |
496 | return 0; | |
497 | } | |
498 | stimer->exp_time = stimer->count; | |
499 | if (time_now >= stimer->count) { | |
500 | /* | |
501 | * Expire timer according to Hypervisor Top-Level Functional | |
502 | * specification v4(15.3.1): | |
503 | * "If a one shot is enabled and the specified count is in | |
504 | * the past, it will expire immediately." | |
505 | */ | |
f3b138c5 | 506 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
507 | return 0; |
508 | } | |
509 | ||
ac3e5fca AS |
510 | trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id, |
511 | stimer->index, | |
512 | time_now, stimer->count); | |
513 | ||
1f4b34f8 AS |
514 | hrtimer_start(&stimer->timer, |
515 | ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)), | |
516 | HRTIMER_MODE_ABS); | |
517 | return 0; | |
518 | } | |
519 | ||
520 | static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config, | |
521 | bool host) | |
522 | { | |
ac3e5fca AS |
523 | trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id, |
524 | stimer->index, config, host); | |
525 | ||
f3b138c5 | 526 | stimer_cleanup(stimer); |
23a3b201 | 527 | if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0) |
1f4b34f8 AS |
528 | config &= ~HV_STIMER_ENABLE; |
529 | stimer->config = config; | |
f3b138c5 | 530 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
531 | return 0; |
532 | } | |
533 | ||
534 | static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count, | |
535 | bool host) | |
536 | { | |
ac3e5fca AS |
537 | trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id, |
538 | stimer->index, count, host); | |
539 | ||
1f4b34f8 | 540 | stimer_cleanup(stimer); |
f3b138c5 | 541 | stimer->count = count; |
1f4b34f8 AS |
542 | if (stimer->count == 0) |
543 | stimer->config &= ~HV_STIMER_ENABLE; | |
f3b138c5 | 544 | else if (stimer->config & HV_STIMER_AUTOENABLE) |
1f4b34f8 | 545 | stimer->config |= HV_STIMER_ENABLE; |
f3b138c5 | 546 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
547 | return 0; |
548 | } | |
549 | ||
550 | static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig) | |
551 | { | |
552 | *pconfig = stimer->config; | |
553 | return 0; | |
554 | } | |
555 | ||
556 | static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount) | |
557 | { | |
558 | *pcount = stimer->count; | |
559 | return 0; | |
560 | } | |
561 | ||
562 | static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint, | |
563 | struct hv_message *src_msg) | |
564 | { | |
565 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
566 | struct page *page; | |
567 | gpa_t gpa; | |
568 | struct hv_message *dst_msg; | |
569 | int r; | |
570 | struct hv_message_page *msg_page; | |
571 | ||
572 | if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE)) | |
573 | return -ENOENT; | |
574 | ||
575 | gpa = synic->msg_page & PAGE_MASK; | |
576 | page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT); | |
577 | if (is_error_page(page)) | |
578 | return -EFAULT; | |
579 | ||
580 | msg_page = kmap_atomic(page); | |
581 | dst_msg = &msg_page->sint_message[sint]; | |
582 | if (sync_cmpxchg(&dst_msg->header.message_type, HVMSG_NONE, | |
583 | src_msg->header.message_type) != HVMSG_NONE) { | |
584 | dst_msg->header.message_flags.msg_pending = 1; | |
585 | r = -EAGAIN; | |
586 | } else { | |
587 | memcpy(&dst_msg->u.payload, &src_msg->u.payload, | |
588 | src_msg->header.payload_size); | |
589 | dst_msg->header.message_type = src_msg->header.message_type; | |
590 | dst_msg->header.payload_size = src_msg->header.payload_size; | |
591 | r = synic_set_irq(synic, sint); | |
592 | if (r >= 1) | |
593 | r = 0; | |
594 | else if (r == 0) | |
595 | r = -EFAULT; | |
596 | } | |
597 | kunmap_atomic(msg_page); | |
598 | kvm_release_page_dirty(page); | |
599 | kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT); | |
600 | return r; | |
601 | } | |
602 | ||
0cdeabb1 | 603 | static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer) |
1f4b34f8 AS |
604 | { |
605 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
606 | struct hv_message *msg = &stimer->msg; | |
607 | struct hv_timer_message_payload *payload = | |
608 | (struct hv_timer_message_payload *)&msg->u.payload; | |
1f4b34f8 | 609 | |
1f4b34f8 AS |
610 | payload->expiration_time = stimer->exp_time; |
611 | payload->delivery_time = get_time_ref_counter(vcpu->kvm); | |
0cdeabb1 AS |
612 | return synic_deliver_msg(vcpu_to_synic(vcpu), |
613 | HV_STIMER_SINT(stimer->config), msg); | |
1f4b34f8 AS |
614 | } |
615 | ||
616 | static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer) | |
617 | { | |
ac3e5fca AS |
618 | int r; |
619 | ||
0cdeabb1 | 620 | stimer->msg_pending = true; |
ac3e5fca AS |
621 | r = stimer_send_msg(stimer); |
622 | trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id, | |
623 | stimer->index, r); | |
624 | if (!r) { | |
0cdeabb1 AS |
625 | stimer->msg_pending = false; |
626 | if (!(stimer->config & HV_STIMER_PERIODIC)) | |
627 | stimer->config &= ~HV_STIMER_ENABLE; | |
628 | } | |
1f4b34f8 AS |
629 | } |
630 | ||
631 | void kvm_hv_process_stimers(struct kvm_vcpu *vcpu) | |
632 | { | |
633 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
634 | struct kvm_vcpu_hv_stimer *stimer; | |
f3b138c5 | 635 | u64 time_now, exp_time; |
1f4b34f8 AS |
636 | int i; |
637 | ||
638 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
639 | if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) { | |
640 | stimer = &hv_vcpu->stimer[i]; | |
1f4b34f8 | 641 | if (stimer->config & HV_STIMER_ENABLE) { |
f3b138c5 AS |
642 | exp_time = stimer->exp_time; |
643 | ||
644 | if (exp_time) { | |
645 | time_now = | |
646 | get_time_ref_counter(vcpu->kvm); | |
647 | if (time_now >= exp_time) | |
648 | stimer_expiration(stimer); | |
649 | } | |
0cdeabb1 | 650 | |
f3b138c5 AS |
651 | if ((stimer->config & HV_STIMER_ENABLE) && |
652 | stimer->count) | |
0cdeabb1 AS |
653 | stimer_start(stimer); |
654 | else | |
655 | stimer_cleanup(stimer); | |
1f4b34f8 AS |
656 | } |
657 | } | |
658 | } | |
659 | ||
660 | void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu) | |
661 | { | |
662 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
663 | int i; | |
664 | ||
665 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
666 | stimer_cleanup(&hv_vcpu->stimer[i]); | |
667 | } | |
668 | ||
669 | static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer) | |
670 | { | |
671 | struct hv_message *msg = &stimer->msg; | |
672 | struct hv_timer_message_payload *payload = | |
673 | (struct hv_timer_message_payload *)&msg->u.payload; | |
674 | ||
675 | memset(&msg->header, 0, sizeof(msg->header)); | |
676 | msg->header.message_type = HVMSG_TIMER_EXPIRED; | |
677 | msg->header.payload_size = sizeof(*payload); | |
678 | ||
679 | payload->timer_index = stimer->index; | |
680 | payload->expiration_time = 0; | |
681 | payload->delivery_time = 0; | |
682 | } | |
683 | ||
684 | static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index) | |
685 | { | |
686 | memset(stimer, 0, sizeof(*stimer)); | |
687 | stimer->index = timer_index; | |
688 | hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
689 | stimer->timer.function = stimer_timer_callback; | |
690 | stimer_prepare_msg(stimer); | |
691 | } | |
692 | ||
5c919412 AS |
693 | void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu) |
694 | { | |
1f4b34f8 AS |
695 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); |
696 | int i; | |
697 | ||
698 | synic_init(&hv_vcpu->synic); | |
699 | ||
700 | bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); | |
701 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
702 | stimer_init(&hv_vcpu->stimer[i], i); | |
5c919412 AS |
703 | } |
704 | ||
d3457c87 RK |
705 | void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu) |
706 | { | |
707 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
708 | ||
709 | hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu); | |
710 | } | |
711 | ||
efc479e6 | 712 | int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages) |
5c919412 | 713 | { |
efc479e6 RK |
714 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); |
715 | ||
5c919412 AS |
716 | /* |
717 | * Hyper-V SynIC auto EOI SINT's are | |
718 | * not compatible with APICV, so deactivate APICV | |
719 | */ | |
720 | kvm_vcpu_deactivate_apicv(vcpu); | |
efc479e6 RK |
721 | synic->active = true; |
722 | synic->dont_zero_synic_pages = dont_zero_synic_pages; | |
5c919412 AS |
723 | return 0; |
724 | } | |
725 | ||
e83d5887 AS |
726 | static bool kvm_hv_msr_partition_wide(u32 msr) |
727 | { | |
728 | bool r = false; | |
729 | ||
730 | switch (msr) { | |
731 | case HV_X64_MSR_GUEST_OS_ID: | |
732 | case HV_X64_MSR_HYPERCALL: | |
733 | case HV_X64_MSR_REFERENCE_TSC: | |
734 | case HV_X64_MSR_TIME_REF_COUNT: | |
e7d9513b AS |
735 | case HV_X64_MSR_CRASH_CTL: |
736 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: | |
e516cebb | 737 | case HV_X64_MSR_RESET: |
e83d5887 AS |
738 | r = true; |
739 | break; | |
740 | } | |
741 | ||
742 | return r; | |
743 | } | |
744 | ||
e7d9513b AS |
745 | static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu, |
746 | u32 index, u64 *pdata) | |
747 | { | |
748 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
749 | ||
750 | if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param))) | |
751 | return -EINVAL; | |
752 | ||
753 | *pdata = hv->hv_crash_param[index]; | |
754 | return 0; | |
755 | } | |
756 | ||
757 | static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata) | |
758 | { | |
759 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
760 | ||
761 | *pdata = hv->hv_crash_ctl; | |
762 | return 0; | |
763 | } | |
764 | ||
765 | static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host) | |
766 | { | |
767 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
768 | ||
769 | if (host) | |
770 | hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY; | |
771 | ||
772 | if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) { | |
773 | ||
774 | vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n", | |
775 | hv->hv_crash_param[0], | |
776 | hv->hv_crash_param[1], | |
777 | hv->hv_crash_param[2], | |
778 | hv->hv_crash_param[3], | |
779 | hv->hv_crash_param[4]); | |
780 | ||
781 | /* Send notification about crash to user space */ | |
782 | kvm_make_request(KVM_REQ_HV_CRASH, vcpu); | |
783 | } | |
784 | ||
785 | return 0; | |
786 | } | |
787 | ||
788 | static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu, | |
789 | u32 index, u64 data) | |
790 | { | |
791 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
792 | ||
793 | if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param))) | |
794 | return -EINVAL; | |
795 | ||
796 | hv->hv_crash_param[index] = data; | |
797 | return 0; | |
798 | } | |
799 | ||
095cf55d PB |
800 | /* |
801 | * The kvmclock and Hyper-V TSC page use similar formulas, and converting | |
802 | * between them is possible: | |
803 | * | |
804 | * kvmclock formula: | |
805 | * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32) | |
806 | * + system_time | |
807 | * | |
808 | * Hyper-V formula: | |
809 | * nsec/100 = ticks * scale / 2^64 + offset | |
810 | * | |
811 | * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula. | |
812 | * By dividing the kvmclock formula by 100 and equating what's left we get: | |
813 | * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
814 | * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
815 | * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100 | |
816 | * | |
817 | * Now expand the kvmclock formula and divide by 100: | |
818 | * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32) | |
819 | * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) | |
820 | * + system_time | |
821 | * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
822 | * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
823 | * + system_time / 100 | |
824 | * | |
825 | * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64: | |
826 | * nsec/100 = ticks * scale / 2^64 | |
827 | * - tsc_timestamp * scale / 2^64 | |
828 | * + system_time / 100 | |
829 | * | |
830 | * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out: | |
831 | * offset = system_time / 100 - tsc_timestamp * scale / 2^64 | |
832 | * | |
833 | * These two equivalencies are implemented in this function. | |
834 | */ | |
835 | static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock, | |
836 | HV_REFERENCE_TSC_PAGE *tsc_ref) | |
837 | { | |
838 | u64 max_mul; | |
839 | ||
840 | if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT)) | |
841 | return false; | |
842 | ||
843 | /* | |
844 | * check if scale would overflow, if so we use the time ref counter | |
845 | * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64 | |
846 | * tsc_to_system_mul / 100 >= 2^(32-tsc_shift) | |
847 | * tsc_to_system_mul >= 100 * 2^(32-tsc_shift) | |
848 | */ | |
849 | max_mul = 100ull << (32 - hv_clock->tsc_shift); | |
850 | if (hv_clock->tsc_to_system_mul >= max_mul) | |
851 | return false; | |
852 | ||
853 | /* | |
854 | * Otherwise compute the scale and offset according to the formulas | |
855 | * derived above. | |
856 | */ | |
857 | tsc_ref->tsc_scale = | |
858 | mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift), | |
859 | hv_clock->tsc_to_system_mul, | |
860 | 100); | |
861 | ||
862 | tsc_ref->tsc_offset = hv_clock->system_time; | |
863 | do_div(tsc_ref->tsc_offset, 100); | |
864 | tsc_ref->tsc_offset -= | |
865 | mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64); | |
866 | return true; | |
867 | } | |
868 | ||
869 | void kvm_hv_setup_tsc_page(struct kvm *kvm, | |
870 | struct pvclock_vcpu_time_info *hv_clock) | |
871 | { | |
872 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
873 | u32 tsc_seq; | |
874 | u64 gfn; | |
875 | ||
876 | BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence)); | |
877 | BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0); | |
878 | ||
879 | if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) | |
880 | return; | |
881 | ||
3f5ad8be PB |
882 | mutex_lock(&kvm->arch.hyperv.hv_lock); |
883 | if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) | |
884 | goto out_unlock; | |
885 | ||
095cf55d PB |
886 | gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT; |
887 | /* | |
888 | * Because the TSC parameters only vary when there is a | |
889 | * change in the master clock, do not bother with caching. | |
890 | */ | |
891 | if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn), | |
892 | &tsc_seq, sizeof(tsc_seq)))) | |
3f5ad8be | 893 | goto out_unlock; |
095cf55d PB |
894 | |
895 | /* | |
896 | * While we're computing and writing the parameters, force the | |
897 | * guest to use the time reference count MSR. | |
898 | */ | |
899 | hv->tsc_ref.tsc_sequence = 0; | |
900 | if (kvm_write_guest(kvm, gfn_to_gpa(gfn), | |
901 | &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence))) | |
3f5ad8be | 902 | goto out_unlock; |
095cf55d PB |
903 | |
904 | if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref)) | |
3f5ad8be | 905 | goto out_unlock; |
095cf55d PB |
906 | |
907 | /* Ensure sequence is zero before writing the rest of the struct. */ | |
908 | smp_wmb(); | |
909 | if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref))) | |
3f5ad8be | 910 | goto out_unlock; |
095cf55d PB |
911 | |
912 | /* | |
913 | * Now switch to the TSC page mechanism by writing the sequence. | |
914 | */ | |
915 | tsc_seq++; | |
916 | if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0) | |
917 | tsc_seq = 1; | |
918 | ||
919 | /* Write the struct entirely before the non-zero sequence. */ | |
920 | smp_wmb(); | |
921 | ||
922 | hv->tsc_ref.tsc_sequence = tsc_seq; | |
923 | kvm_write_guest(kvm, gfn_to_gpa(gfn), | |
924 | &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)); | |
3f5ad8be PB |
925 | out_unlock: |
926 | mutex_unlock(&kvm->arch.hyperv.hv_lock); | |
095cf55d PB |
927 | } |
928 | ||
e7d9513b AS |
929 | static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data, |
930 | bool host) | |
e83d5887 AS |
931 | { |
932 | struct kvm *kvm = vcpu->kvm; | |
933 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
934 | ||
935 | switch (msr) { | |
936 | case HV_X64_MSR_GUEST_OS_ID: | |
937 | hv->hv_guest_os_id = data; | |
938 | /* setting guest os id to zero disables hypercall page */ | |
939 | if (!hv->hv_guest_os_id) | |
940 | hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE; | |
941 | break; | |
942 | case HV_X64_MSR_HYPERCALL: { | |
943 | u64 gfn; | |
944 | unsigned long addr; | |
945 | u8 instructions[4]; | |
946 | ||
947 | /* if guest os id is not set hypercall should remain disabled */ | |
948 | if (!hv->hv_guest_os_id) | |
949 | break; | |
950 | if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) { | |
951 | hv->hv_hypercall = data; | |
952 | break; | |
953 | } | |
954 | gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT; | |
955 | addr = gfn_to_hva(kvm, gfn); | |
956 | if (kvm_is_error_hva(addr)) | |
957 | return 1; | |
958 | kvm_x86_ops->patch_hypercall(vcpu, instructions); | |
959 | ((unsigned char *)instructions)[3] = 0xc3; /* ret */ | |
960 | if (__copy_to_user((void __user *)addr, instructions, 4)) | |
961 | return 1; | |
962 | hv->hv_hypercall = data; | |
963 | mark_page_dirty(kvm, gfn); | |
964 | break; | |
965 | } | |
095cf55d | 966 | case HV_X64_MSR_REFERENCE_TSC: |
e83d5887 | 967 | hv->hv_tsc_page = data; |
095cf55d PB |
968 | if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE) |
969 | kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu); | |
e83d5887 | 970 | break; |
e7d9513b AS |
971 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: |
972 | return kvm_hv_msr_set_crash_data(vcpu, | |
973 | msr - HV_X64_MSR_CRASH_P0, | |
974 | data); | |
975 | case HV_X64_MSR_CRASH_CTL: | |
976 | return kvm_hv_msr_set_crash_ctl(vcpu, data, host); | |
e516cebb AS |
977 | case HV_X64_MSR_RESET: |
978 | if (data == 1) { | |
979 | vcpu_debug(vcpu, "hyper-v reset requested\n"); | |
980 | kvm_make_request(KVM_REQ_HV_RESET, vcpu); | |
981 | } | |
982 | break; | |
e83d5887 AS |
983 | default: |
984 | vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n", | |
985 | msr, data); | |
986 | return 1; | |
987 | } | |
988 | return 0; | |
989 | } | |
990 | ||
9eec50b8 AS |
991 | /* Calculate cpu time spent by current task in 100ns units */ |
992 | static u64 current_task_runtime_100ns(void) | |
993 | { | |
5613fda9 | 994 | u64 utime, stime; |
9eec50b8 AS |
995 | |
996 | task_cputime_adjusted(current, &utime, &stime); | |
5613fda9 FW |
997 | |
998 | return div_u64(utime + stime, 100); | |
9eec50b8 AS |
999 | } |
1000 | ||
1001 | static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) | |
e83d5887 AS |
1002 | { |
1003 | struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv; | |
1004 | ||
1005 | switch (msr) { | |
d3457c87 RK |
1006 | case HV_X64_MSR_VP_INDEX: |
1007 | if (!host) | |
1008 | return 1; | |
1009 | hv->vp_index = (u32)data; | |
1010 | break; | |
e83d5887 AS |
1011 | case HV_X64_MSR_APIC_ASSIST_PAGE: { |
1012 | u64 gfn; | |
1013 | unsigned long addr; | |
1014 | ||
1015 | if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) { | |
1016 | hv->hv_vapic = data; | |
1017 | if (kvm_lapic_enable_pv_eoi(vcpu, 0)) | |
1018 | return 1; | |
1019 | break; | |
1020 | } | |
1021 | gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT; | |
1022 | addr = kvm_vcpu_gfn_to_hva(vcpu, gfn); | |
1023 | if (kvm_is_error_hva(addr)) | |
1024 | return 1; | |
1025 | if (__clear_user((void __user *)addr, PAGE_SIZE)) | |
1026 | return 1; | |
1027 | hv->hv_vapic = data; | |
1028 | kvm_vcpu_mark_page_dirty(vcpu, gfn); | |
1029 | if (kvm_lapic_enable_pv_eoi(vcpu, | |
1030 | gfn_to_gpa(gfn) | KVM_MSR_ENABLED)) | |
1031 | return 1; | |
1032 | break; | |
1033 | } | |
1034 | case HV_X64_MSR_EOI: | |
1035 | return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data); | |
1036 | case HV_X64_MSR_ICR: | |
1037 | return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data); | |
1038 | case HV_X64_MSR_TPR: | |
1039 | return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data); | |
9eec50b8 AS |
1040 | case HV_X64_MSR_VP_RUNTIME: |
1041 | if (!host) | |
1042 | return 1; | |
1043 | hv->runtime_offset = data - current_task_runtime_100ns(); | |
1044 | break; | |
5c919412 AS |
1045 | case HV_X64_MSR_SCONTROL: |
1046 | case HV_X64_MSR_SVERSION: | |
1047 | case HV_X64_MSR_SIEFP: | |
1048 | case HV_X64_MSR_SIMP: | |
1049 | case HV_X64_MSR_EOM: | |
1050 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
1051 | return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host); | |
1f4b34f8 AS |
1052 | case HV_X64_MSR_STIMER0_CONFIG: |
1053 | case HV_X64_MSR_STIMER1_CONFIG: | |
1054 | case HV_X64_MSR_STIMER2_CONFIG: | |
1055 | case HV_X64_MSR_STIMER3_CONFIG: { | |
1056 | int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; | |
1057 | ||
1058 | return stimer_set_config(vcpu_to_stimer(vcpu, timer_index), | |
1059 | data, host); | |
1060 | } | |
1061 | case HV_X64_MSR_STIMER0_COUNT: | |
1062 | case HV_X64_MSR_STIMER1_COUNT: | |
1063 | case HV_X64_MSR_STIMER2_COUNT: | |
1064 | case HV_X64_MSR_STIMER3_COUNT: { | |
1065 | int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; | |
1066 | ||
1067 | return stimer_set_count(vcpu_to_stimer(vcpu, timer_index), | |
1068 | data, host); | |
1069 | } | |
e83d5887 AS |
1070 | default: |
1071 | vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n", | |
1072 | msr, data); | |
1073 | return 1; | |
1074 | } | |
1075 | ||
1076 | return 0; | |
1077 | } | |
1078 | ||
1079 | static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
1080 | { | |
1081 | u64 data = 0; | |
1082 | struct kvm *kvm = vcpu->kvm; | |
1083 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
1084 | ||
1085 | switch (msr) { | |
1086 | case HV_X64_MSR_GUEST_OS_ID: | |
1087 | data = hv->hv_guest_os_id; | |
1088 | break; | |
1089 | case HV_X64_MSR_HYPERCALL: | |
1090 | data = hv->hv_hypercall; | |
1091 | break; | |
93bf4172 AS |
1092 | case HV_X64_MSR_TIME_REF_COUNT: |
1093 | data = get_time_ref_counter(kvm); | |
e83d5887 | 1094 | break; |
e83d5887 AS |
1095 | case HV_X64_MSR_REFERENCE_TSC: |
1096 | data = hv->hv_tsc_page; | |
1097 | break; | |
e7d9513b AS |
1098 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: |
1099 | return kvm_hv_msr_get_crash_data(vcpu, | |
1100 | msr - HV_X64_MSR_CRASH_P0, | |
1101 | pdata); | |
1102 | case HV_X64_MSR_CRASH_CTL: | |
1103 | return kvm_hv_msr_get_crash_ctl(vcpu, pdata); | |
e516cebb AS |
1104 | case HV_X64_MSR_RESET: |
1105 | data = 0; | |
1106 | break; | |
e83d5887 AS |
1107 | default: |
1108 | vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); | |
1109 | return 1; | |
1110 | } | |
1111 | ||
1112 | *pdata = data; | |
1113 | return 0; | |
1114 | } | |
1115 | ||
1116 | static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
1117 | { | |
1118 | u64 data = 0; | |
1119 | struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv; | |
1120 | ||
1121 | switch (msr) { | |
d3457c87 RK |
1122 | case HV_X64_MSR_VP_INDEX: |
1123 | data = hv->vp_index; | |
e83d5887 | 1124 | break; |
e83d5887 AS |
1125 | case HV_X64_MSR_EOI: |
1126 | return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata); | |
1127 | case HV_X64_MSR_ICR: | |
1128 | return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata); | |
1129 | case HV_X64_MSR_TPR: | |
1130 | return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata); | |
1131 | case HV_X64_MSR_APIC_ASSIST_PAGE: | |
1132 | data = hv->hv_vapic; | |
1133 | break; | |
9eec50b8 AS |
1134 | case HV_X64_MSR_VP_RUNTIME: |
1135 | data = current_task_runtime_100ns() + hv->runtime_offset; | |
1136 | break; | |
5c919412 AS |
1137 | case HV_X64_MSR_SCONTROL: |
1138 | case HV_X64_MSR_SVERSION: | |
1139 | case HV_X64_MSR_SIEFP: | |
1140 | case HV_X64_MSR_SIMP: | |
1141 | case HV_X64_MSR_EOM: | |
1142 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
1143 | return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata); | |
1f4b34f8 AS |
1144 | case HV_X64_MSR_STIMER0_CONFIG: |
1145 | case HV_X64_MSR_STIMER1_CONFIG: | |
1146 | case HV_X64_MSR_STIMER2_CONFIG: | |
1147 | case HV_X64_MSR_STIMER3_CONFIG: { | |
1148 | int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; | |
1149 | ||
1150 | return stimer_get_config(vcpu_to_stimer(vcpu, timer_index), | |
1151 | pdata); | |
1152 | } | |
1153 | case HV_X64_MSR_STIMER0_COUNT: | |
1154 | case HV_X64_MSR_STIMER1_COUNT: | |
1155 | case HV_X64_MSR_STIMER2_COUNT: | |
1156 | case HV_X64_MSR_STIMER3_COUNT: { | |
1157 | int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; | |
1158 | ||
1159 | return stimer_get_count(vcpu_to_stimer(vcpu, timer_index), | |
1160 | pdata); | |
1161 | } | |
e83d5887 AS |
1162 | default: |
1163 | vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); | |
1164 | return 1; | |
1165 | } | |
1166 | *pdata = data; | |
1167 | return 0; | |
1168 | } | |
1169 | ||
e7d9513b | 1170 | int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) |
e83d5887 AS |
1171 | { |
1172 | if (kvm_hv_msr_partition_wide(msr)) { | |
1173 | int r; | |
1174 | ||
3f5ad8be | 1175 | mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock); |
e7d9513b | 1176 | r = kvm_hv_set_msr_pw(vcpu, msr, data, host); |
3f5ad8be | 1177 | mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 AS |
1178 | return r; |
1179 | } else | |
9eec50b8 | 1180 | return kvm_hv_set_msr(vcpu, msr, data, host); |
e83d5887 AS |
1181 | } |
1182 | ||
1183 | int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
1184 | { | |
1185 | if (kvm_hv_msr_partition_wide(msr)) { | |
1186 | int r; | |
1187 | ||
3f5ad8be | 1188 | mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 | 1189 | r = kvm_hv_get_msr_pw(vcpu, msr, pdata); |
3f5ad8be | 1190 | mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 AS |
1191 | return r; |
1192 | } else | |
1193 | return kvm_hv_get_msr(vcpu, msr, pdata); | |
1194 | } | |
1195 | ||
1196 | bool kvm_hv_hypercall_enabled(struct kvm *kvm) | |
1197 | { | |
3f5ad8be | 1198 | return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE; |
e83d5887 AS |
1199 | } |
1200 | ||
83326e43 AS |
1201 | static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result) |
1202 | { | |
1203 | bool longmode; | |
1204 | ||
1205 | longmode = is_64_bit_mode(vcpu); | |
1206 | if (longmode) | |
1207 | kvm_register_write(vcpu, VCPU_REGS_RAX, result); | |
1208 | else { | |
1209 | kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32); | |
1210 | kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff); | |
1211 | } | |
1212 | } | |
1213 | ||
1214 | static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu) | |
1215 | { | |
1216 | struct kvm_run *run = vcpu->run; | |
1217 | ||
1218 | kvm_hv_hypercall_set_result(vcpu, run->hyperv.u.hcall.result); | |
1219 | return 1; | |
1220 | } | |
1221 | ||
e83d5887 AS |
1222 | int kvm_hv_hypercall(struct kvm_vcpu *vcpu) |
1223 | { | |
1224 | u64 param, ingpa, outgpa, ret; | |
1225 | uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0; | |
1226 | bool fast, longmode; | |
1227 | ||
1228 | /* | |
1229 | * hypercall generates UD from non zero cpl and real mode | |
1230 | * per HYPER-V spec | |
1231 | */ | |
1232 | if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) { | |
1233 | kvm_queue_exception(vcpu, UD_VECTOR); | |
0d9c055e | 1234 | return 1; |
e83d5887 AS |
1235 | } |
1236 | ||
1237 | longmode = is_64_bit_mode(vcpu); | |
1238 | ||
1239 | if (!longmode) { | |
1240 | param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) | | |
1241 | (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff); | |
1242 | ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) | | |
1243 | (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff); | |
1244 | outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) | | |
1245 | (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff); | |
1246 | } | |
1247 | #ifdef CONFIG_X86_64 | |
1248 | else { | |
1249 | param = kvm_register_read(vcpu, VCPU_REGS_RCX); | |
1250 | ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX); | |
1251 | outgpa = kvm_register_read(vcpu, VCPU_REGS_R8); | |
1252 | } | |
1253 | #endif | |
1254 | ||
1255 | code = param & 0xffff; | |
1256 | fast = (param >> 16) & 0x1; | |
1257 | rep_cnt = (param >> 32) & 0xfff; | |
1258 | rep_idx = (param >> 48) & 0xfff; | |
1259 | ||
1260 | trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa); | |
1261 | ||
b2fdc257 AS |
1262 | /* Hypercall continuation is not supported yet */ |
1263 | if (rep_cnt || rep_idx) { | |
1264 | res = HV_STATUS_INVALID_HYPERCALL_CODE; | |
1265 | goto set_result; | |
1266 | } | |
1267 | ||
e83d5887 | 1268 | switch (code) { |
8ed6d767 | 1269 | case HVCALL_NOTIFY_LONG_SPIN_WAIT: |
e83d5887 AS |
1270 | kvm_vcpu_on_spin(vcpu); |
1271 | break; | |
83326e43 AS |
1272 | case HVCALL_POST_MESSAGE: |
1273 | case HVCALL_SIGNAL_EVENT: | |
a2b5c3c0 PB |
1274 | /* don't bother userspace if it has no way to handle it */ |
1275 | if (!vcpu_to_synic(vcpu)->active) { | |
1276 | res = HV_STATUS_INVALID_HYPERCALL_CODE; | |
1277 | break; | |
1278 | } | |
83326e43 AS |
1279 | vcpu->run->exit_reason = KVM_EXIT_HYPERV; |
1280 | vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL; | |
1281 | vcpu->run->hyperv.u.hcall.input = param; | |
1282 | vcpu->run->hyperv.u.hcall.params[0] = ingpa; | |
1283 | vcpu->run->hyperv.u.hcall.params[1] = outgpa; | |
1284 | vcpu->arch.complete_userspace_io = | |
1285 | kvm_hv_hypercall_complete_userspace; | |
1286 | return 0; | |
e83d5887 AS |
1287 | default: |
1288 | res = HV_STATUS_INVALID_HYPERCALL_CODE; | |
1289 | break; | |
1290 | } | |
1291 | ||
b2fdc257 | 1292 | set_result: |
e83d5887 | 1293 | ret = res | (((u64)rep_done & 0xfff) << 32); |
83326e43 | 1294 | kvm_hv_hypercall_set_result(vcpu, ret); |
e83d5887 AS |
1295 | return 1; |
1296 | } |