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Commit | Line | Data |
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e83d5887 AS |
1 | /* |
2 | * KVM Microsoft Hyper-V emulation | |
3 | * | |
4 | * derived from arch/x86/kvm/x86.c | |
5 | * | |
6 | * Copyright (C) 2006 Qumranet, Inc. | |
7 | * Copyright (C) 2008 Qumranet, Inc. | |
8 | * Copyright IBM Corporation, 2008 | |
9 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. | |
10 | * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com> | |
11 | * | |
12 | * Authors: | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * Yaniv Kamay <yaniv@qumranet.com> | |
15 | * Amit Shah <amit.shah@qumranet.com> | |
16 | * Ben-Ami Yassour <benami@il.ibm.com> | |
17 | * Andrey Smetanin <asmetanin@virtuozzo.com> | |
18 | * | |
19 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
20 | * the COPYING file in the top-level directory. | |
21 | * | |
22 | */ | |
23 | ||
24 | #include "x86.h" | |
25 | #include "lapic.h" | |
5c919412 | 26 | #include "ioapic.h" |
e83d5887 AS |
27 | #include "hyperv.h" |
28 | ||
29 | #include <linux/kvm_host.h> | |
765eaa0f | 30 | #include <linux/highmem.h> |
32ef5517 IM |
31 | #include <linux/sched/cputime.h> |
32 | ||
5c919412 | 33 | #include <asm/apicdef.h> |
e83d5887 AS |
34 | #include <trace/events/kvm.h> |
35 | ||
36 | #include "trace.h" | |
37 | ||
5c919412 AS |
38 | static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint) |
39 | { | |
40 | return atomic64_read(&synic->sint[sint]); | |
41 | } | |
42 | ||
43 | static inline int synic_get_sint_vector(u64 sint_value) | |
44 | { | |
45 | if (sint_value & HV_SYNIC_SINT_MASKED) | |
46 | return -1; | |
47 | return sint_value & HV_SYNIC_SINT_VECTOR_MASK; | |
48 | } | |
49 | ||
50 | static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic, | |
51 | int vector) | |
52 | { | |
53 | int i; | |
54 | ||
55 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
56 | if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector) | |
57 | return true; | |
58 | } | |
59 | return false; | |
60 | } | |
61 | ||
62 | static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic, | |
63 | int vector) | |
64 | { | |
65 | int i; | |
66 | u64 sint_value; | |
67 | ||
68 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
69 | sint_value = synic_read_sint(synic, i); | |
70 | if (synic_get_sint_vector(sint_value) == vector && | |
71 | sint_value & HV_SYNIC_SINT_AUTO_EOI) | |
72 | return true; | |
73 | } | |
74 | return false; | |
75 | } | |
76 | ||
7be58a64 AS |
77 | static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint, |
78 | u64 data, bool host) | |
5c919412 AS |
79 | { |
80 | int vector; | |
81 | ||
82 | vector = data & HV_SYNIC_SINT_VECTOR_MASK; | |
7be58a64 | 83 | if (vector < 16 && !host) |
5c919412 AS |
84 | return 1; |
85 | /* | |
86 | * Guest may configure multiple SINTs to use the same vector, so | |
87 | * we maintain a bitmap of vectors handled by synic, and a | |
88 | * bitmap of vectors with auto-eoi behavior. The bitmaps are | |
89 | * updated here, and atomically queried on fast paths. | |
90 | */ | |
91 | ||
92 | atomic64_set(&synic->sint[sint], data); | |
93 | ||
94 | if (synic_has_vector_connected(synic, vector)) | |
95 | __set_bit(vector, synic->vec_bitmap); | |
96 | else | |
97 | __clear_bit(vector, synic->vec_bitmap); | |
98 | ||
99 | if (synic_has_vector_auto_eoi(synic, vector)) | |
100 | __set_bit(vector, synic->auto_eoi_bitmap); | |
101 | else | |
102 | __clear_bit(vector, synic->auto_eoi_bitmap); | |
103 | ||
104 | /* Load SynIC vectors into EOI exit bitmap */ | |
105 | kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic)); | |
106 | return 0; | |
107 | } | |
108 | ||
d3457c87 RK |
109 | static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx) |
110 | { | |
111 | struct kvm_vcpu *vcpu = NULL; | |
112 | int i; | |
113 | ||
c7440f63 VK |
114 | if (vpidx >= KVM_MAX_VCPUS) |
115 | return NULL; | |
116 | ||
117 | vcpu = kvm_get_vcpu(kvm, vpidx); | |
d3457c87 RK |
118 | if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx) |
119 | return vcpu; | |
120 | kvm_for_each_vcpu(i, vcpu, kvm) | |
121 | if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx) | |
122 | return vcpu; | |
123 | return NULL; | |
124 | } | |
125 | ||
126 | static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx) | |
5c919412 AS |
127 | { |
128 | struct kvm_vcpu *vcpu; | |
129 | struct kvm_vcpu_hv_synic *synic; | |
130 | ||
d3457c87 | 131 | vcpu = get_vcpu_by_vpidx(kvm, vpidx); |
5c919412 AS |
132 | if (!vcpu) |
133 | return NULL; | |
134 | synic = vcpu_to_synic(vcpu); | |
135 | return (synic->active) ? synic : NULL; | |
136 | } | |
137 | ||
765eaa0f AS |
138 | static void synic_clear_sint_msg_pending(struct kvm_vcpu_hv_synic *synic, |
139 | u32 sint) | |
140 | { | |
141 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
142 | struct page *page; | |
143 | gpa_t gpa; | |
144 | struct hv_message *msg; | |
145 | struct hv_message_page *msg_page; | |
146 | ||
147 | gpa = synic->msg_page & PAGE_MASK; | |
148 | page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT); | |
149 | if (is_error_page(page)) { | |
150 | vcpu_err(vcpu, "Hyper-V SynIC can't get msg page, gpa 0x%llx\n", | |
151 | gpa); | |
152 | return; | |
153 | } | |
154 | msg_page = kmap_atomic(page); | |
155 | ||
156 | msg = &msg_page->sint_message[sint]; | |
157 | msg->header.message_flags.msg_pending = 0; | |
158 | ||
159 | kunmap_atomic(msg_page); | |
160 | kvm_release_page_dirty(page); | |
161 | kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT); | |
162 | } | |
163 | ||
5c919412 AS |
164 | static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint) |
165 | { | |
166 | struct kvm *kvm = vcpu->kvm; | |
765eaa0f | 167 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); |
1f4b34f8 AS |
168 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); |
169 | struct kvm_vcpu_hv_stimer *stimer; | |
170 | int gsi, idx, stimers_pending; | |
5c919412 | 171 | |
18659a9c | 172 | trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint); |
5c919412 | 173 | |
765eaa0f AS |
174 | if (synic->msg_page & HV_SYNIC_SIMP_ENABLE) |
175 | synic_clear_sint_msg_pending(synic, sint); | |
176 | ||
1f4b34f8 AS |
177 | /* Try to deliver pending Hyper-V SynIC timers messages */ |
178 | stimers_pending = 0; | |
179 | for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) { | |
180 | stimer = &hv_vcpu->stimer[idx]; | |
181 | if (stimer->msg_pending && | |
182 | (stimer->config & HV_STIMER_ENABLE) && | |
183 | HV_STIMER_SINT(stimer->config) == sint) { | |
184 | set_bit(stimer->index, | |
185 | hv_vcpu->stimer_pending_bitmap); | |
186 | stimers_pending++; | |
187 | } | |
188 | } | |
189 | if (stimers_pending) | |
190 | kvm_make_request(KVM_REQ_HV_STIMER, vcpu); | |
191 | ||
5c919412 | 192 | idx = srcu_read_lock(&kvm->irq_srcu); |
1f4b34f8 | 193 | gsi = atomic_read(&synic->sint_to_gsi[sint]); |
5c919412 AS |
194 | if (gsi != -1) |
195 | kvm_notify_acked_gsi(kvm, gsi); | |
196 | srcu_read_unlock(&kvm->irq_srcu, idx); | |
197 | } | |
198 | ||
db397571 AS |
199 | static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr) |
200 | { | |
201 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
202 | struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv; | |
203 | ||
204 | hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC; | |
205 | hv_vcpu->exit.u.synic.msr = msr; | |
206 | hv_vcpu->exit.u.synic.control = synic->control; | |
207 | hv_vcpu->exit.u.synic.evt_page = synic->evt_page; | |
208 | hv_vcpu->exit.u.synic.msg_page = synic->msg_page; | |
209 | ||
210 | kvm_make_request(KVM_REQ_HV_EXIT, vcpu); | |
211 | } | |
212 | ||
5c919412 AS |
213 | static int synic_set_msr(struct kvm_vcpu_hv_synic *synic, |
214 | u32 msr, u64 data, bool host) | |
215 | { | |
216 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
217 | int ret; | |
218 | ||
eecb912c | 219 | if (!synic->active && !host) |
5c919412 AS |
220 | return 1; |
221 | ||
18659a9c AS |
222 | trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host); |
223 | ||
5c919412 AS |
224 | ret = 0; |
225 | switch (msr) { | |
226 | case HV_X64_MSR_SCONTROL: | |
227 | synic->control = data; | |
db397571 AS |
228 | if (!host) |
229 | synic_exit(synic, msr); | |
5c919412 AS |
230 | break; |
231 | case HV_X64_MSR_SVERSION: | |
232 | if (!host) { | |
233 | ret = 1; | |
234 | break; | |
235 | } | |
236 | synic->version = data; | |
237 | break; | |
238 | case HV_X64_MSR_SIEFP: | |
efc479e6 RK |
239 | if ((data & HV_SYNIC_SIEFP_ENABLE) && !host && |
240 | !synic->dont_zero_synic_pages) | |
5c919412 AS |
241 | if (kvm_clear_guest(vcpu->kvm, |
242 | data & PAGE_MASK, PAGE_SIZE)) { | |
243 | ret = 1; | |
244 | break; | |
245 | } | |
246 | synic->evt_page = data; | |
db397571 AS |
247 | if (!host) |
248 | synic_exit(synic, msr); | |
5c919412 AS |
249 | break; |
250 | case HV_X64_MSR_SIMP: | |
efc479e6 RK |
251 | if ((data & HV_SYNIC_SIMP_ENABLE) && !host && |
252 | !synic->dont_zero_synic_pages) | |
5c919412 AS |
253 | if (kvm_clear_guest(vcpu->kvm, |
254 | data & PAGE_MASK, PAGE_SIZE)) { | |
255 | ret = 1; | |
256 | break; | |
257 | } | |
258 | synic->msg_page = data; | |
db397571 AS |
259 | if (!host) |
260 | synic_exit(synic, msr); | |
5c919412 AS |
261 | break; |
262 | case HV_X64_MSR_EOM: { | |
263 | int i; | |
264 | ||
265 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) | |
266 | kvm_hv_notify_acked_sint(vcpu, i); | |
267 | break; | |
268 | } | |
269 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
7be58a64 | 270 | ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host); |
5c919412 AS |
271 | break; |
272 | default: | |
273 | ret = 1; | |
274 | break; | |
275 | } | |
276 | return ret; | |
277 | } | |
278 | ||
eecb912c PB |
279 | static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata, |
280 | bool host) | |
5c919412 AS |
281 | { |
282 | int ret; | |
283 | ||
eecb912c | 284 | if (!synic->active && !host) |
5c919412 AS |
285 | return 1; |
286 | ||
287 | ret = 0; | |
288 | switch (msr) { | |
289 | case HV_X64_MSR_SCONTROL: | |
290 | *pdata = synic->control; | |
291 | break; | |
292 | case HV_X64_MSR_SVERSION: | |
293 | *pdata = synic->version; | |
294 | break; | |
295 | case HV_X64_MSR_SIEFP: | |
296 | *pdata = synic->evt_page; | |
297 | break; | |
298 | case HV_X64_MSR_SIMP: | |
299 | *pdata = synic->msg_page; | |
300 | break; | |
301 | case HV_X64_MSR_EOM: | |
302 | *pdata = 0; | |
303 | break; | |
304 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
305 | *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]); | |
306 | break; | |
307 | default: | |
308 | ret = 1; | |
309 | break; | |
310 | } | |
311 | return ret; | |
312 | } | |
313 | ||
ecd8a8c2 | 314 | static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint) |
5c919412 AS |
315 | { |
316 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
317 | struct kvm_lapic_irq irq; | |
318 | int ret, vector; | |
319 | ||
320 | if (sint >= ARRAY_SIZE(synic->sint)) | |
321 | return -EINVAL; | |
322 | ||
323 | vector = synic_get_sint_vector(synic_read_sint(synic, sint)); | |
324 | if (vector < 0) | |
325 | return -ENOENT; | |
326 | ||
327 | memset(&irq, 0, sizeof(irq)); | |
f98a3efb | 328 | irq.shorthand = APIC_DEST_SELF; |
5c919412 AS |
329 | irq.dest_mode = APIC_DEST_PHYSICAL; |
330 | irq.delivery_mode = APIC_DM_FIXED; | |
331 | irq.vector = vector; | |
332 | irq.level = 1; | |
333 | ||
f98a3efb | 334 | ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL); |
18659a9c | 335 | trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret); |
5c919412 AS |
336 | return ret; |
337 | } | |
338 | ||
d3457c87 | 339 | int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint) |
5c919412 AS |
340 | { |
341 | struct kvm_vcpu_hv_synic *synic; | |
342 | ||
d3457c87 | 343 | synic = synic_get(kvm, vpidx); |
5c919412 AS |
344 | if (!synic) |
345 | return -EINVAL; | |
346 | ||
347 | return synic_set_irq(synic, sint); | |
348 | } | |
349 | ||
350 | void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector) | |
351 | { | |
352 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); | |
353 | int i; | |
354 | ||
18659a9c | 355 | trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector); |
5c919412 AS |
356 | |
357 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) | |
358 | if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector) | |
359 | kvm_hv_notify_acked_sint(vcpu, i); | |
360 | } | |
361 | ||
d3457c87 | 362 | static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi) |
5c919412 AS |
363 | { |
364 | struct kvm_vcpu_hv_synic *synic; | |
365 | ||
d3457c87 | 366 | synic = synic_get(kvm, vpidx); |
5c919412 AS |
367 | if (!synic) |
368 | return -EINVAL; | |
369 | ||
370 | if (sint >= ARRAY_SIZE(synic->sint_to_gsi)) | |
371 | return -EINVAL; | |
372 | ||
373 | atomic_set(&synic->sint_to_gsi[sint], gsi); | |
374 | return 0; | |
375 | } | |
376 | ||
377 | void kvm_hv_irq_routing_update(struct kvm *kvm) | |
378 | { | |
379 | struct kvm_irq_routing_table *irq_rt; | |
380 | struct kvm_kernel_irq_routing_entry *e; | |
381 | u32 gsi; | |
382 | ||
383 | irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu, | |
384 | lockdep_is_held(&kvm->irq_lock)); | |
385 | ||
386 | for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) { | |
387 | hlist_for_each_entry(e, &irq_rt->map[gsi], link) { | |
388 | if (e->type == KVM_IRQ_ROUTING_HV_SINT) | |
389 | kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu, | |
390 | e->hv_sint.sint, gsi); | |
391 | } | |
392 | } | |
393 | } | |
394 | ||
395 | static void synic_init(struct kvm_vcpu_hv_synic *synic) | |
396 | { | |
397 | int i; | |
398 | ||
399 | memset(synic, 0, sizeof(*synic)); | |
400 | synic->version = HV_SYNIC_VERSION_1; | |
401 | for (i = 0; i < ARRAY_SIZE(synic->sint); i++) { | |
402 | atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED); | |
403 | atomic_set(&synic->sint_to_gsi[i], -1); | |
404 | } | |
405 | } | |
406 | ||
93bf4172 AS |
407 | static u64 get_time_ref_counter(struct kvm *kvm) |
408 | { | |
095cf55d PB |
409 | struct kvm_hv *hv = &kvm->arch.hyperv; |
410 | struct kvm_vcpu *vcpu; | |
411 | u64 tsc; | |
412 | ||
413 | /* | |
414 | * The guest has not set up the TSC page or the clock isn't | |
415 | * stable, fall back to get_kvmclock_ns. | |
416 | */ | |
417 | if (!hv->tsc_ref.tsc_sequence) | |
418 | return div_u64(get_kvmclock_ns(kvm), 100); | |
419 | ||
420 | vcpu = kvm_get_vcpu(kvm, 0); | |
421 | tsc = kvm_read_l1_tsc(vcpu, rdtsc()); | |
422 | return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64) | |
423 | + hv->tsc_ref.tsc_offset; | |
93bf4172 AS |
424 | } |
425 | ||
f3b138c5 | 426 | static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer, |
1f4b34f8 AS |
427 | bool vcpu_kick) |
428 | { | |
429 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
430 | ||
431 | set_bit(stimer->index, | |
432 | vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap); | |
433 | kvm_make_request(KVM_REQ_HV_STIMER, vcpu); | |
434 | if (vcpu_kick) | |
435 | kvm_vcpu_kick(vcpu); | |
436 | } | |
437 | ||
1f4b34f8 AS |
438 | static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer) |
439 | { | |
440 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
441 | ||
ac3e5fca AS |
442 | trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id, |
443 | stimer->index); | |
444 | ||
019b9781 | 445 | hrtimer_cancel(&stimer->timer); |
1f4b34f8 AS |
446 | clear_bit(stimer->index, |
447 | vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap); | |
448 | stimer->msg_pending = false; | |
f808495d | 449 | stimer->exp_time = 0; |
1f4b34f8 AS |
450 | } |
451 | ||
452 | static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer) | |
453 | { | |
454 | struct kvm_vcpu_hv_stimer *stimer; | |
455 | ||
456 | stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer); | |
ac3e5fca AS |
457 | trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id, |
458 | stimer->index); | |
f3b138c5 | 459 | stimer_mark_pending(stimer, true); |
1f4b34f8 AS |
460 | |
461 | return HRTIMER_NORESTART; | |
462 | } | |
463 | ||
f808495d AS |
464 | /* |
465 | * stimer_start() assumptions: | |
466 | * a) stimer->count is not equal to 0 | |
467 | * b) stimer->config has HV_STIMER_ENABLE flag | |
468 | */ | |
1f4b34f8 AS |
469 | static int stimer_start(struct kvm_vcpu_hv_stimer *stimer) |
470 | { | |
471 | u64 time_now; | |
472 | ktime_t ktime_now; | |
473 | ||
474 | time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm); | |
475 | ktime_now = ktime_get(); | |
476 | ||
477 | if (stimer->config & HV_STIMER_PERIODIC) { | |
f808495d AS |
478 | if (stimer->exp_time) { |
479 | if (time_now >= stimer->exp_time) { | |
480 | u64 remainder; | |
481 | ||
482 | div64_u64_rem(time_now - stimer->exp_time, | |
483 | stimer->count, &remainder); | |
484 | stimer->exp_time = | |
485 | time_now + (stimer->count - remainder); | |
486 | } | |
487 | } else | |
488 | stimer->exp_time = time_now + stimer->count; | |
1f4b34f8 | 489 | |
ac3e5fca AS |
490 | trace_kvm_hv_stimer_start_periodic( |
491 | stimer_to_vcpu(stimer)->vcpu_id, | |
492 | stimer->index, | |
493 | time_now, stimer->exp_time); | |
494 | ||
1f4b34f8 | 495 | hrtimer_start(&stimer->timer, |
f808495d AS |
496 | ktime_add_ns(ktime_now, |
497 | 100 * (stimer->exp_time - time_now)), | |
1f4b34f8 AS |
498 | HRTIMER_MODE_ABS); |
499 | return 0; | |
500 | } | |
501 | stimer->exp_time = stimer->count; | |
502 | if (time_now >= stimer->count) { | |
503 | /* | |
504 | * Expire timer according to Hypervisor Top-Level Functional | |
505 | * specification v4(15.3.1): | |
506 | * "If a one shot is enabled and the specified count is in | |
507 | * the past, it will expire immediately." | |
508 | */ | |
f3b138c5 | 509 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
510 | return 0; |
511 | } | |
512 | ||
ac3e5fca AS |
513 | trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id, |
514 | stimer->index, | |
515 | time_now, stimer->count); | |
516 | ||
1f4b34f8 AS |
517 | hrtimer_start(&stimer->timer, |
518 | ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)), | |
519 | HRTIMER_MODE_ABS); | |
520 | return 0; | |
521 | } | |
522 | ||
523 | static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config, | |
524 | bool host) | |
525 | { | |
ac3e5fca AS |
526 | trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id, |
527 | stimer->index, config, host); | |
528 | ||
f3b138c5 | 529 | stimer_cleanup(stimer); |
23a3b201 | 530 | if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0) |
1f4b34f8 AS |
531 | config &= ~HV_STIMER_ENABLE; |
532 | stimer->config = config; | |
f3b138c5 | 533 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
534 | return 0; |
535 | } | |
536 | ||
537 | static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count, | |
538 | bool host) | |
539 | { | |
ac3e5fca AS |
540 | trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id, |
541 | stimer->index, count, host); | |
542 | ||
1f4b34f8 | 543 | stimer_cleanup(stimer); |
f3b138c5 | 544 | stimer->count = count; |
1f4b34f8 AS |
545 | if (stimer->count == 0) |
546 | stimer->config &= ~HV_STIMER_ENABLE; | |
f3b138c5 | 547 | else if (stimer->config & HV_STIMER_AUTOENABLE) |
1f4b34f8 | 548 | stimer->config |= HV_STIMER_ENABLE; |
f3b138c5 | 549 | stimer_mark_pending(stimer, false); |
1f4b34f8 AS |
550 | return 0; |
551 | } | |
552 | ||
553 | static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig) | |
554 | { | |
555 | *pconfig = stimer->config; | |
556 | return 0; | |
557 | } | |
558 | ||
559 | static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount) | |
560 | { | |
561 | *pcount = stimer->count; | |
562 | return 0; | |
563 | } | |
564 | ||
565 | static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint, | |
566 | struct hv_message *src_msg) | |
567 | { | |
568 | struct kvm_vcpu *vcpu = synic_to_vcpu(synic); | |
569 | struct page *page; | |
570 | gpa_t gpa; | |
571 | struct hv_message *dst_msg; | |
572 | int r; | |
573 | struct hv_message_page *msg_page; | |
574 | ||
575 | if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE)) | |
576 | return -ENOENT; | |
577 | ||
578 | gpa = synic->msg_page & PAGE_MASK; | |
579 | page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT); | |
580 | if (is_error_page(page)) | |
581 | return -EFAULT; | |
582 | ||
583 | msg_page = kmap_atomic(page); | |
584 | dst_msg = &msg_page->sint_message[sint]; | |
585 | if (sync_cmpxchg(&dst_msg->header.message_type, HVMSG_NONE, | |
586 | src_msg->header.message_type) != HVMSG_NONE) { | |
587 | dst_msg->header.message_flags.msg_pending = 1; | |
588 | r = -EAGAIN; | |
589 | } else { | |
590 | memcpy(&dst_msg->u.payload, &src_msg->u.payload, | |
591 | src_msg->header.payload_size); | |
592 | dst_msg->header.message_type = src_msg->header.message_type; | |
593 | dst_msg->header.payload_size = src_msg->header.payload_size; | |
594 | r = synic_set_irq(synic, sint); | |
595 | if (r >= 1) | |
596 | r = 0; | |
597 | else if (r == 0) | |
598 | r = -EFAULT; | |
599 | } | |
600 | kunmap_atomic(msg_page); | |
601 | kvm_release_page_dirty(page); | |
602 | kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT); | |
603 | return r; | |
604 | } | |
605 | ||
0cdeabb1 | 606 | static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer) |
1f4b34f8 AS |
607 | { |
608 | struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer); | |
609 | struct hv_message *msg = &stimer->msg; | |
610 | struct hv_timer_message_payload *payload = | |
611 | (struct hv_timer_message_payload *)&msg->u.payload; | |
1f4b34f8 | 612 | |
1f4b34f8 AS |
613 | payload->expiration_time = stimer->exp_time; |
614 | payload->delivery_time = get_time_ref_counter(vcpu->kvm); | |
0cdeabb1 AS |
615 | return synic_deliver_msg(vcpu_to_synic(vcpu), |
616 | HV_STIMER_SINT(stimer->config), msg); | |
1f4b34f8 AS |
617 | } |
618 | ||
619 | static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer) | |
620 | { | |
ac3e5fca AS |
621 | int r; |
622 | ||
0cdeabb1 | 623 | stimer->msg_pending = true; |
ac3e5fca AS |
624 | r = stimer_send_msg(stimer); |
625 | trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id, | |
626 | stimer->index, r); | |
627 | if (!r) { | |
0cdeabb1 AS |
628 | stimer->msg_pending = false; |
629 | if (!(stimer->config & HV_STIMER_PERIODIC)) | |
630 | stimer->config &= ~HV_STIMER_ENABLE; | |
631 | } | |
1f4b34f8 AS |
632 | } |
633 | ||
634 | void kvm_hv_process_stimers(struct kvm_vcpu *vcpu) | |
635 | { | |
636 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
637 | struct kvm_vcpu_hv_stimer *stimer; | |
f3b138c5 | 638 | u64 time_now, exp_time; |
1f4b34f8 AS |
639 | int i; |
640 | ||
641 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
642 | if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) { | |
643 | stimer = &hv_vcpu->stimer[i]; | |
1f4b34f8 | 644 | if (stimer->config & HV_STIMER_ENABLE) { |
f3b138c5 AS |
645 | exp_time = stimer->exp_time; |
646 | ||
647 | if (exp_time) { | |
648 | time_now = | |
649 | get_time_ref_counter(vcpu->kvm); | |
650 | if (time_now >= exp_time) | |
651 | stimer_expiration(stimer); | |
652 | } | |
0cdeabb1 | 653 | |
f3b138c5 | 654 | if ((stimer->config & HV_STIMER_ENABLE) && |
f1ff89ec RK |
655 | stimer->count) { |
656 | if (!stimer->msg_pending) | |
657 | stimer_start(stimer); | |
658 | } else | |
0cdeabb1 | 659 | stimer_cleanup(stimer); |
1f4b34f8 AS |
660 | } |
661 | } | |
662 | } | |
663 | ||
664 | void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu) | |
665 | { | |
666 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
667 | int i; | |
668 | ||
669 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
670 | stimer_cleanup(&hv_vcpu->stimer[i]); | |
671 | } | |
672 | ||
673 | static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer) | |
674 | { | |
675 | struct hv_message *msg = &stimer->msg; | |
676 | struct hv_timer_message_payload *payload = | |
677 | (struct hv_timer_message_payload *)&msg->u.payload; | |
678 | ||
679 | memset(&msg->header, 0, sizeof(msg->header)); | |
680 | msg->header.message_type = HVMSG_TIMER_EXPIRED; | |
681 | msg->header.payload_size = sizeof(*payload); | |
682 | ||
683 | payload->timer_index = stimer->index; | |
684 | payload->expiration_time = 0; | |
685 | payload->delivery_time = 0; | |
686 | } | |
687 | ||
688 | static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index) | |
689 | { | |
690 | memset(stimer, 0, sizeof(*stimer)); | |
691 | stimer->index = timer_index; | |
692 | hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
693 | stimer->timer.function = stimer_timer_callback; | |
694 | stimer_prepare_msg(stimer); | |
695 | } | |
696 | ||
5c919412 AS |
697 | void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu) |
698 | { | |
1f4b34f8 AS |
699 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); |
700 | int i; | |
701 | ||
702 | synic_init(&hv_vcpu->synic); | |
703 | ||
704 | bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); | |
705 | for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) | |
706 | stimer_init(&hv_vcpu->stimer[i], i); | |
5c919412 AS |
707 | } |
708 | ||
d3457c87 RK |
709 | void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu) |
710 | { | |
711 | struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu); | |
712 | ||
713 | hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu); | |
714 | } | |
715 | ||
efc479e6 | 716 | int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages) |
5c919412 | 717 | { |
efc479e6 RK |
718 | struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu); |
719 | ||
5c919412 AS |
720 | /* |
721 | * Hyper-V SynIC auto EOI SINT's are | |
722 | * not compatible with APICV, so deactivate APICV | |
723 | */ | |
724 | kvm_vcpu_deactivate_apicv(vcpu); | |
efc479e6 RK |
725 | synic->active = true; |
726 | synic->dont_zero_synic_pages = dont_zero_synic_pages; | |
5c919412 AS |
727 | return 0; |
728 | } | |
729 | ||
e83d5887 AS |
730 | static bool kvm_hv_msr_partition_wide(u32 msr) |
731 | { | |
732 | bool r = false; | |
733 | ||
734 | switch (msr) { | |
735 | case HV_X64_MSR_GUEST_OS_ID: | |
736 | case HV_X64_MSR_HYPERCALL: | |
737 | case HV_X64_MSR_REFERENCE_TSC: | |
738 | case HV_X64_MSR_TIME_REF_COUNT: | |
e7d9513b AS |
739 | case HV_X64_MSR_CRASH_CTL: |
740 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: | |
e516cebb | 741 | case HV_X64_MSR_RESET: |
e83d5887 AS |
742 | r = true; |
743 | break; | |
744 | } | |
745 | ||
746 | return r; | |
747 | } | |
748 | ||
e7d9513b AS |
749 | static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu, |
750 | u32 index, u64 *pdata) | |
751 | { | |
752 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
3d8f1192 | 753 | size_t size = ARRAY_SIZE(hv->hv_crash_param); |
e7d9513b | 754 | |
3d8f1192 | 755 | if (WARN_ON_ONCE(index >= size)) |
e7d9513b AS |
756 | return -EINVAL; |
757 | ||
3d8f1192 | 758 | *pdata = hv->hv_crash_param[array_index_nospec(index, size)]; |
e7d9513b AS |
759 | return 0; |
760 | } | |
761 | ||
762 | static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata) | |
763 | { | |
764 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
765 | ||
766 | *pdata = hv->hv_crash_ctl; | |
767 | return 0; | |
768 | } | |
769 | ||
770 | static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host) | |
771 | { | |
772 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
773 | ||
774 | if (host) | |
775 | hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY; | |
776 | ||
777 | if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) { | |
778 | ||
779 | vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n", | |
780 | hv->hv_crash_param[0], | |
781 | hv->hv_crash_param[1], | |
782 | hv->hv_crash_param[2], | |
783 | hv->hv_crash_param[3], | |
784 | hv->hv_crash_param[4]); | |
785 | ||
786 | /* Send notification about crash to user space */ | |
787 | kvm_make_request(KVM_REQ_HV_CRASH, vcpu); | |
788 | } | |
789 | ||
790 | return 0; | |
791 | } | |
792 | ||
793 | static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu, | |
794 | u32 index, u64 data) | |
795 | { | |
796 | struct kvm_hv *hv = &vcpu->kvm->arch.hyperv; | |
3d8f1192 | 797 | size_t size = ARRAY_SIZE(hv->hv_crash_param); |
e7d9513b | 798 | |
3d8f1192 | 799 | if (WARN_ON_ONCE(index >= size)) |
e7d9513b AS |
800 | return -EINVAL; |
801 | ||
3d8f1192 | 802 | hv->hv_crash_param[array_index_nospec(index, size)] = data; |
e7d9513b AS |
803 | return 0; |
804 | } | |
805 | ||
095cf55d PB |
806 | /* |
807 | * The kvmclock and Hyper-V TSC page use similar formulas, and converting | |
808 | * between them is possible: | |
809 | * | |
810 | * kvmclock formula: | |
811 | * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32) | |
812 | * + system_time | |
813 | * | |
814 | * Hyper-V formula: | |
815 | * nsec/100 = ticks * scale / 2^64 + offset | |
816 | * | |
817 | * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula. | |
818 | * By dividing the kvmclock formula by 100 and equating what's left we get: | |
819 | * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
820 | * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
821 | * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100 | |
822 | * | |
823 | * Now expand the kvmclock formula and divide by 100: | |
824 | * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32) | |
825 | * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) | |
826 | * + system_time | |
827 | * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
828 | * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100 | |
829 | * + system_time / 100 | |
830 | * | |
831 | * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64: | |
832 | * nsec/100 = ticks * scale / 2^64 | |
833 | * - tsc_timestamp * scale / 2^64 | |
834 | * + system_time / 100 | |
835 | * | |
836 | * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out: | |
837 | * offset = system_time / 100 - tsc_timestamp * scale / 2^64 | |
838 | * | |
839 | * These two equivalencies are implemented in this function. | |
840 | */ | |
841 | static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock, | |
842 | HV_REFERENCE_TSC_PAGE *tsc_ref) | |
843 | { | |
844 | u64 max_mul; | |
845 | ||
846 | if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT)) | |
847 | return false; | |
848 | ||
849 | /* | |
850 | * check if scale would overflow, if so we use the time ref counter | |
851 | * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64 | |
852 | * tsc_to_system_mul / 100 >= 2^(32-tsc_shift) | |
853 | * tsc_to_system_mul >= 100 * 2^(32-tsc_shift) | |
854 | */ | |
855 | max_mul = 100ull << (32 - hv_clock->tsc_shift); | |
856 | if (hv_clock->tsc_to_system_mul >= max_mul) | |
857 | return false; | |
858 | ||
859 | /* | |
860 | * Otherwise compute the scale and offset according to the formulas | |
861 | * derived above. | |
862 | */ | |
863 | tsc_ref->tsc_scale = | |
864 | mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift), | |
865 | hv_clock->tsc_to_system_mul, | |
866 | 100); | |
867 | ||
868 | tsc_ref->tsc_offset = hv_clock->system_time; | |
869 | do_div(tsc_ref->tsc_offset, 100); | |
870 | tsc_ref->tsc_offset -= | |
871 | mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64); | |
872 | return true; | |
873 | } | |
874 | ||
875 | void kvm_hv_setup_tsc_page(struct kvm *kvm, | |
876 | struct pvclock_vcpu_time_info *hv_clock) | |
877 | { | |
878 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
879 | u32 tsc_seq; | |
880 | u64 gfn; | |
881 | ||
882 | BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence)); | |
883 | BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0); | |
884 | ||
885 | if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) | |
886 | return; | |
887 | ||
3f5ad8be PB |
888 | mutex_lock(&kvm->arch.hyperv.hv_lock); |
889 | if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) | |
890 | goto out_unlock; | |
891 | ||
095cf55d PB |
892 | gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT; |
893 | /* | |
894 | * Because the TSC parameters only vary when there is a | |
895 | * change in the master clock, do not bother with caching. | |
896 | */ | |
897 | if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn), | |
898 | &tsc_seq, sizeof(tsc_seq)))) | |
3f5ad8be | 899 | goto out_unlock; |
095cf55d PB |
900 | |
901 | /* | |
902 | * While we're computing and writing the parameters, force the | |
903 | * guest to use the time reference count MSR. | |
904 | */ | |
905 | hv->tsc_ref.tsc_sequence = 0; | |
906 | if (kvm_write_guest(kvm, gfn_to_gpa(gfn), | |
907 | &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence))) | |
3f5ad8be | 908 | goto out_unlock; |
095cf55d PB |
909 | |
910 | if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref)) | |
3f5ad8be | 911 | goto out_unlock; |
095cf55d PB |
912 | |
913 | /* Ensure sequence is zero before writing the rest of the struct. */ | |
914 | smp_wmb(); | |
915 | if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref))) | |
3f5ad8be | 916 | goto out_unlock; |
095cf55d PB |
917 | |
918 | /* | |
919 | * Now switch to the TSC page mechanism by writing the sequence. | |
920 | */ | |
921 | tsc_seq++; | |
922 | if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0) | |
923 | tsc_seq = 1; | |
924 | ||
925 | /* Write the struct entirely before the non-zero sequence. */ | |
926 | smp_wmb(); | |
927 | ||
928 | hv->tsc_ref.tsc_sequence = tsc_seq; | |
929 | kvm_write_guest(kvm, gfn_to_gpa(gfn), | |
930 | &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)); | |
3f5ad8be PB |
931 | out_unlock: |
932 | mutex_unlock(&kvm->arch.hyperv.hv_lock); | |
095cf55d PB |
933 | } |
934 | ||
e7d9513b AS |
935 | static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data, |
936 | bool host) | |
e83d5887 AS |
937 | { |
938 | struct kvm *kvm = vcpu->kvm; | |
939 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
940 | ||
941 | switch (msr) { | |
942 | case HV_X64_MSR_GUEST_OS_ID: | |
943 | hv->hv_guest_os_id = data; | |
944 | /* setting guest os id to zero disables hypercall page */ | |
945 | if (!hv->hv_guest_os_id) | |
946 | hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE; | |
947 | break; | |
948 | case HV_X64_MSR_HYPERCALL: { | |
949 | u64 gfn; | |
950 | unsigned long addr; | |
951 | u8 instructions[4]; | |
952 | ||
953 | /* if guest os id is not set hypercall should remain disabled */ | |
954 | if (!hv->hv_guest_os_id) | |
955 | break; | |
956 | if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) { | |
957 | hv->hv_hypercall = data; | |
958 | break; | |
959 | } | |
960 | gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT; | |
961 | addr = gfn_to_hva(kvm, gfn); | |
962 | if (kvm_is_error_hva(addr)) | |
963 | return 1; | |
964 | kvm_x86_ops->patch_hypercall(vcpu, instructions); | |
965 | ((unsigned char *)instructions)[3] = 0xc3; /* ret */ | |
966 | if (__copy_to_user((void __user *)addr, instructions, 4)) | |
967 | return 1; | |
968 | hv->hv_hypercall = data; | |
969 | mark_page_dirty(kvm, gfn); | |
970 | break; | |
971 | } | |
095cf55d | 972 | case HV_X64_MSR_REFERENCE_TSC: |
e83d5887 | 973 | hv->hv_tsc_page = data; |
095cf55d PB |
974 | if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE) |
975 | kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu); | |
e83d5887 | 976 | break; |
e7d9513b AS |
977 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: |
978 | return kvm_hv_msr_set_crash_data(vcpu, | |
979 | msr - HV_X64_MSR_CRASH_P0, | |
980 | data); | |
981 | case HV_X64_MSR_CRASH_CTL: | |
982 | return kvm_hv_msr_set_crash_ctl(vcpu, data, host); | |
e516cebb AS |
983 | case HV_X64_MSR_RESET: |
984 | if (data == 1) { | |
985 | vcpu_debug(vcpu, "hyper-v reset requested\n"); | |
986 | kvm_make_request(KVM_REQ_HV_RESET, vcpu); | |
987 | } | |
988 | break; | |
eecb912c PB |
989 | case HV_X64_MSR_TIME_REF_COUNT: |
990 | /* read-only, but still ignore it if host-initiated */ | |
991 | if (!host) | |
992 | return 1; | |
993 | break; | |
e83d5887 AS |
994 | default: |
995 | vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n", | |
996 | msr, data); | |
997 | return 1; | |
998 | } | |
999 | return 0; | |
1000 | } | |
1001 | ||
9eec50b8 AS |
1002 | /* Calculate cpu time spent by current task in 100ns units */ |
1003 | static u64 current_task_runtime_100ns(void) | |
1004 | { | |
5613fda9 | 1005 | u64 utime, stime; |
9eec50b8 AS |
1006 | |
1007 | task_cputime_adjusted(current, &utime, &stime); | |
5613fda9 FW |
1008 | |
1009 | return div_u64(utime + stime, 100); | |
9eec50b8 AS |
1010 | } |
1011 | ||
1012 | static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) | |
e83d5887 | 1013 | { |
7e9a5a8d | 1014 | struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv; |
e83d5887 AS |
1015 | |
1016 | switch (msr) { | |
d3457c87 | 1017 | case HV_X64_MSR_VP_INDEX: |
c7440f63 | 1018 | if (!host || (u32)data >= KVM_MAX_VCPUS) |
d3457c87 | 1019 | return 1; |
7e9a5a8d | 1020 | hv_vcpu->vp_index = (u32)data; |
d3457c87 | 1021 | break; |
e83d5887 AS |
1022 | case HV_X64_MSR_APIC_ASSIST_PAGE: { |
1023 | u64 gfn; | |
1024 | unsigned long addr; | |
1025 | ||
1026 | if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) { | |
7e9a5a8d | 1027 | hv_vcpu->hv_vapic = data; |
e83d5887 AS |
1028 | if (kvm_lapic_enable_pv_eoi(vcpu, 0)) |
1029 | return 1; | |
1030 | break; | |
1031 | } | |
1032 | gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT; | |
1033 | addr = kvm_vcpu_gfn_to_hva(vcpu, gfn); | |
1034 | if (kvm_is_error_hva(addr)) | |
1035 | return 1; | |
1036 | if (__clear_user((void __user *)addr, PAGE_SIZE)) | |
1037 | return 1; | |
7e9a5a8d | 1038 | hv_vcpu->hv_vapic = data; |
e83d5887 AS |
1039 | kvm_vcpu_mark_page_dirty(vcpu, gfn); |
1040 | if (kvm_lapic_enable_pv_eoi(vcpu, | |
1041 | gfn_to_gpa(gfn) | KVM_MSR_ENABLED)) | |
1042 | return 1; | |
1043 | break; | |
1044 | } | |
1045 | case HV_X64_MSR_EOI: | |
1046 | return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data); | |
1047 | case HV_X64_MSR_ICR: | |
1048 | return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data); | |
1049 | case HV_X64_MSR_TPR: | |
1050 | return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data); | |
9eec50b8 AS |
1051 | case HV_X64_MSR_VP_RUNTIME: |
1052 | if (!host) | |
1053 | return 1; | |
7e9a5a8d | 1054 | hv_vcpu->runtime_offset = data - current_task_runtime_100ns(); |
9eec50b8 | 1055 | break; |
5c919412 AS |
1056 | case HV_X64_MSR_SCONTROL: |
1057 | case HV_X64_MSR_SVERSION: | |
1058 | case HV_X64_MSR_SIEFP: | |
1059 | case HV_X64_MSR_SIMP: | |
1060 | case HV_X64_MSR_EOM: | |
1061 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
1062 | return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host); | |
1f4b34f8 AS |
1063 | case HV_X64_MSR_STIMER0_CONFIG: |
1064 | case HV_X64_MSR_STIMER1_CONFIG: | |
1065 | case HV_X64_MSR_STIMER2_CONFIG: | |
1066 | case HV_X64_MSR_STIMER3_CONFIG: { | |
1067 | int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; | |
1068 | ||
1069 | return stimer_set_config(vcpu_to_stimer(vcpu, timer_index), | |
1070 | data, host); | |
1071 | } | |
1072 | case HV_X64_MSR_STIMER0_COUNT: | |
1073 | case HV_X64_MSR_STIMER1_COUNT: | |
1074 | case HV_X64_MSR_STIMER2_COUNT: | |
1075 | case HV_X64_MSR_STIMER3_COUNT: { | |
1076 | int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; | |
1077 | ||
1078 | return stimer_set_count(vcpu_to_stimer(vcpu, timer_index), | |
1079 | data, host); | |
1080 | } | |
eecb912c PB |
1081 | case HV_X64_MSR_TSC_FREQUENCY: |
1082 | case HV_X64_MSR_APIC_FREQUENCY: | |
1083 | /* read-only, but still ignore it if host-initiated */ | |
1084 | if (!host) | |
1085 | return 1; | |
1086 | break; | |
e83d5887 AS |
1087 | default: |
1088 | vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n", | |
1089 | msr, data); | |
1090 | return 1; | |
1091 | } | |
1092 | ||
1093 | return 0; | |
1094 | } | |
1095 | ||
1096 | static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
1097 | { | |
1098 | u64 data = 0; | |
1099 | struct kvm *kvm = vcpu->kvm; | |
1100 | struct kvm_hv *hv = &kvm->arch.hyperv; | |
1101 | ||
1102 | switch (msr) { | |
1103 | case HV_X64_MSR_GUEST_OS_ID: | |
1104 | data = hv->hv_guest_os_id; | |
1105 | break; | |
1106 | case HV_X64_MSR_HYPERCALL: | |
1107 | data = hv->hv_hypercall; | |
1108 | break; | |
93bf4172 AS |
1109 | case HV_X64_MSR_TIME_REF_COUNT: |
1110 | data = get_time_ref_counter(kvm); | |
e83d5887 | 1111 | break; |
e83d5887 AS |
1112 | case HV_X64_MSR_REFERENCE_TSC: |
1113 | data = hv->hv_tsc_page; | |
1114 | break; | |
e7d9513b AS |
1115 | case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: |
1116 | return kvm_hv_msr_get_crash_data(vcpu, | |
1117 | msr - HV_X64_MSR_CRASH_P0, | |
1118 | pdata); | |
1119 | case HV_X64_MSR_CRASH_CTL: | |
1120 | return kvm_hv_msr_get_crash_ctl(vcpu, pdata); | |
e516cebb AS |
1121 | case HV_X64_MSR_RESET: |
1122 | data = 0; | |
1123 | break; | |
e83d5887 AS |
1124 | default: |
1125 | vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); | |
1126 | return 1; | |
1127 | } | |
1128 | ||
1129 | *pdata = data; | |
1130 | return 0; | |
1131 | } | |
1132 | ||
eecb912c PB |
1133 | static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, |
1134 | bool host) | |
e83d5887 AS |
1135 | { |
1136 | u64 data = 0; | |
7e9a5a8d | 1137 | struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv; |
e83d5887 AS |
1138 | |
1139 | switch (msr) { | |
d3457c87 | 1140 | case HV_X64_MSR_VP_INDEX: |
7e9a5a8d | 1141 | data = hv_vcpu->vp_index; |
e83d5887 | 1142 | break; |
e83d5887 AS |
1143 | case HV_X64_MSR_EOI: |
1144 | return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata); | |
1145 | case HV_X64_MSR_ICR: | |
1146 | return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata); | |
1147 | case HV_X64_MSR_TPR: | |
1148 | return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata); | |
1149 | case HV_X64_MSR_APIC_ASSIST_PAGE: | |
7e9a5a8d | 1150 | data = hv_vcpu->hv_vapic; |
e83d5887 | 1151 | break; |
9eec50b8 | 1152 | case HV_X64_MSR_VP_RUNTIME: |
7e9a5a8d | 1153 | data = current_task_runtime_100ns() + hv_vcpu->runtime_offset; |
9eec50b8 | 1154 | break; |
5c919412 AS |
1155 | case HV_X64_MSR_SCONTROL: |
1156 | case HV_X64_MSR_SVERSION: | |
1157 | case HV_X64_MSR_SIEFP: | |
1158 | case HV_X64_MSR_SIMP: | |
1159 | case HV_X64_MSR_EOM: | |
1160 | case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15: | |
eecb912c | 1161 | return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host); |
1f4b34f8 AS |
1162 | case HV_X64_MSR_STIMER0_CONFIG: |
1163 | case HV_X64_MSR_STIMER1_CONFIG: | |
1164 | case HV_X64_MSR_STIMER2_CONFIG: | |
1165 | case HV_X64_MSR_STIMER3_CONFIG: { | |
1166 | int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; | |
1167 | ||
1168 | return stimer_get_config(vcpu_to_stimer(vcpu, timer_index), | |
1169 | pdata); | |
1170 | } | |
1171 | case HV_X64_MSR_STIMER0_COUNT: | |
1172 | case HV_X64_MSR_STIMER1_COUNT: | |
1173 | case HV_X64_MSR_STIMER2_COUNT: | |
1174 | case HV_X64_MSR_STIMER3_COUNT: { | |
1175 | int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; | |
1176 | ||
1177 | return stimer_get_count(vcpu_to_stimer(vcpu, timer_index), | |
1178 | pdata); | |
1179 | } | |
72c139ba LP |
1180 | case HV_X64_MSR_TSC_FREQUENCY: |
1181 | data = (u64)vcpu->arch.virtual_tsc_khz * 1000; | |
1182 | break; | |
1183 | case HV_X64_MSR_APIC_FREQUENCY: | |
1184 | data = APIC_BUS_FREQUENCY; | |
1185 | break; | |
e83d5887 AS |
1186 | default: |
1187 | vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); | |
1188 | return 1; | |
1189 | } | |
1190 | *pdata = data; | |
1191 | return 0; | |
1192 | } | |
1193 | ||
e7d9513b | 1194 | int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) |
e83d5887 AS |
1195 | { |
1196 | if (kvm_hv_msr_partition_wide(msr)) { | |
1197 | int r; | |
1198 | ||
3f5ad8be | 1199 | mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock); |
e7d9513b | 1200 | r = kvm_hv_set_msr_pw(vcpu, msr, data, host); |
3f5ad8be | 1201 | mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 AS |
1202 | return r; |
1203 | } else | |
9eec50b8 | 1204 | return kvm_hv_set_msr(vcpu, msr, data, host); |
e83d5887 AS |
1205 | } |
1206 | ||
eecb912c | 1207 | int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host) |
e83d5887 AS |
1208 | { |
1209 | if (kvm_hv_msr_partition_wide(msr)) { | |
1210 | int r; | |
1211 | ||
3f5ad8be | 1212 | mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 | 1213 | r = kvm_hv_get_msr_pw(vcpu, msr, pdata); |
3f5ad8be | 1214 | mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock); |
e83d5887 AS |
1215 | return r; |
1216 | } else | |
eecb912c | 1217 | return kvm_hv_get_msr(vcpu, msr, pdata, host); |
e83d5887 AS |
1218 | } |
1219 | ||
1220 | bool kvm_hv_hypercall_enabled(struct kvm *kvm) | |
1221 | { | |
3f5ad8be | 1222 | return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE; |
e83d5887 AS |
1223 | } |
1224 | ||
83326e43 AS |
1225 | static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result) |
1226 | { | |
1227 | bool longmode; | |
1228 | ||
1229 | longmode = is_64_bit_mode(vcpu); | |
1230 | if (longmode) | |
1231 | kvm_register_write(vcpu, VCPU_REGS_RAX, result); | |
1232 | else { | |
1233 | kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32); | |
1234 | kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff); | |
1235 | } | |
1236 | } | |
1237 | ||
1238 | static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu) | |
1239 | { | |
1240 | struct kvm_run *run = vcpu->run; | |
1241 | ||
1242 | kvm_hv_hypercall_set_result(vcpu, run->hyperv.u.hcall.result); | |
ba30a6df | 1243 | return kvm_skip_emulated_instruction(vcpu); |
83326e43 AS |
1244 | } |
1245 | ||
e83d5887 AS |
1246 | int kvm_hv_hypercall(struct kvm_vcpu *vcpu) |
1247 | { | |
1248 | u64 param, ingpa, outgpa, ret; | |
1249 | uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0; | |
1250 | bool fast, longmode; | |
1251 | ||
1252 | /* | |
1253 | * hypercall generates UD from non zero cpl and real mode | |
1254 | * per HYPER-V spec | |
1255 | */ | |
1256 | if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) { | |
1257 | kvm_queue_exception(vcpu, UD_VECTOR); | |
0d9c055e | 1258 | return 1; |
e83d5887 AS |
1259 | } |
1260 | ||
1261 | longmode = is_64_bit_mode(vcpu); | |
1262 | ||
1263 | if (!longmode) { | |
1264 | param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) | | |
1265 | (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff); | |
1266 | ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) | | |
1267 | (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff); | |
1268 | outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) | | |
1269 | (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff); | |
1270 | } | |
1271 | #ifdef CONFIG_X86_64 | |
1272 | else { | |
1273 | param = kvm_register_read(vcpu, VCPU_REGS_RCX); | |
1274 | ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX); | |
1275 | outgpa = kvm_register_read(vcpu, VCPU_REGS_R8); | |
1276 | } | |
1277 | #endif | |
1278 | ||
1279 | code = param & 0xffff; | |
1280 | fast = (param >> 16) & 0x1; | |
1281 | rep_cnt = (param >> 32) & 0xfff; | |
1282 | rep_idx = (param >> 48) & 0xfff; | |
1283 | ||
1284 | trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa); | |
1285 | ||
b2fdc257 AS |
1286 | /* Hypercall continuation is not supported yet */ |
1287 | if (rep_cnt || rep_idx) { | |
1288 | res = HV_STATUS_INVALID_HYPERCALL_CODE; | |
1289 | goto set_result; | |
1290 | } | |
1291 | ||
e83d5887 | 1292 | switch (code) { |
8ed6d767 | 1293 | case HVCALL_NOTIFY_LONG_SPIN_WAIT: |
de63ad4c | 1294 | kvm_vcpu_on_spin(vcpu, true); |
e83d5887 | 1295 | break; |
83326e43 AS |
1296 | case HVCALL_POST_MESSAGE: |
1297 | case HVCALL_SIGNAL_EVENT: | |
a2b5c3c0 PB |
1298 | /* don't bother userspace if it has no way to handle it */ |
1299 | if (!vcpu_to_synic(vcpu)->active) { | |
1300 | res = HV_STATUS_INVALID_HYPERCALL_CODE; | |
1301 | break; | |
1302 | } | |
83326e43 AS |
1303 | vcpu->run->exit_reason = KVM_EXIT_HYPERV; |
1304 | vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL; | |
1305 | vcpu->run->hyperv.u.hcall.input = param; | |
1306 | vcpu->run->hyperv.u.hcall.params[0] = ingpa; | |
1307 | vcpu->run->hyperv.u.hcall.params[1] = outgpa; | |
1308 | vcpu->arch.complete_userspace_io = | |
1309 | kvm_hv_hypercall_complete_userspace; | |
1310 | return 0; | |
e83d5887 AS |
1311 | default: |
1312 | res = HV_STATUS_INVALID_HYPERCALL_CODE; | |
1313 | break; | |
1314 | } | |
1315 | ||
b2fdc257 | 1316 | set_result: |
e83d5887 | 1317 | ret = res | (((u64)rep_done & 0xfff) << 32); |
83326e43 | 1318 | kvm_hv_hypercall_set_result(vcpu, ret); |
e83d5887 AS |
1319 | return 1; |
1320 | } |