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Commit | Line | Data |
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7837699f SY |
1 | /* |
2 | * 8253/8254 interval timer emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2006 Intel Corporation | |
6 | * Copyright (c) 2007 Keir Fraser, XenSource Inc | |
7 | * Copyright (c) 2008 Intel Corporation | |
9611c187 | 8 | * Copyright 2009 Red Hat, Inc. and/or its affiliates. |
7837699f SY |
9 | * |
10 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
11 | * of this software and associated documentation files (the "Software"), to deal | |
12 | * in the Software without restriction, including without limitation the rights | |
13 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
14 | * copies of the Software, and to permit persons to whom the Software is | |
15 | * furnished to do so, subject to the following conditions: | |
16 | * | |
17 | * The above copyright notice and this permission notice shall be included in | |
18 | * all copies or substantial portions of the Software. | |
19 | * | |
20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
21 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
23 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
24 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
25 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
26 | * THE SOFTWARE. | |
27 | * | |
28 | * Authors: | |
29 | * Sheng Yang <sheng.yang@intel.com> | |
30 | * Based on QEMU and Xen. | |
31 | */ | |
32 | ||
a78d9626 JP |
33 | #define pr_fmt(fmt) "pit: " fmt |
34 | ||
7837699f | 35 | #include <linux/kvm_host.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
7837699f SY |
37 | |
38 | #include "irq.h" | |
39 | #include "i8254.h" | |
40 | ||
41 | #ifndef CONFIG_X86_64 | |
6f6d6a1a | 42 | #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) |
7837699f SY |
43 | #else |
44 | #define mod_64(x, y) ((x) % (y)) | |
45 | #endif | |
46 | ||
47 | #define RW_STATE_LSB 1 | |
48 | #define RW_STATE_MSB 2 | |
49 | #define RW_STATE_WORD0 3 | |
50 | #define RW_STATE_WORD1 4 | |
51 | ||
52 | /* Compute with 96 bit intermediate result: (a*b)/c */ | |
53 | static u64 muldiv64(u64 a, u32 b, u32 c) | |
54 | { | |
55 | union { | |
56 | u64 ll; | |
57 | struct { | |
58 | u32 low, high; | |
59 | } l; | |
60 | } u, res; | |
61 | u64 rl, rh; | |
62 | ||
63 | u.ll = a; | |
64 | rl = (u64)u.l.low * (u64)b; | |
65 | rh = (u64)u.l.high * (u64)b; | |
66 | rh += (rl >> 32); | |
6f6d6a1a RZ |
67 | res.l.high = div64_u64(rh, c); |
68 | res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); | |
7837699f SY |
69 | return res.ll; |
70 | } | |
71 | ||
72 | static void pit_set_gate(struct kvm *kvm, int channel, u32 val) | |
73 | { | |
74 | struct kvm_kpit_channel_state *c = | |
75 | &kvm->arch.vpit->pit_state.channels[channel]; | |
76 | ||
77 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
78 | ||
79 | switch (c->mode) { | |
80 | default: | |
81 | case 0: | |
82 | case 4: | |
83 | /* XXX: just disable/enable counting */ | |
84 | break; | |
85 | case 1: | |
86 | case 2: | |
87 | case 3: | |
88 | case 5: | |
89 | /* Restart counting on rising edge. */ | |
90 | if (c->gate < val) | |
91 | c->count_load_time = ktime_get(); | |
92 | break; | |
93 | } | |
94 | ||
95 | c->gate = val; | |
96 | } | |
97 | ||
8b2cf73c | 98 | static int pit_get_gate(struct kvm *kvm, int channel) |
7837699f SY |
99 | { |
100 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
101 | ||
102 | return kvm->arch.vpit->pit_state.channels[channel].gate; | |
103 | } | |
104 | ||
fd668423 MT |
105 | static s64 __kpit_elapsed(struct kvm *kvm) |
106 | { | |
107 | s64 elapsed; | |
108 | ktime_t remaining; | |
109 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
110 | ||
26ef1924 | 111 | if (!ps->period) |
0ff77873 MT |
112 | return 0; |
113 | ||
ede2ccc5 MT |
114 | /* |
115 | * The Counter does not stop when it reaches zero. In | |
116 | * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to | |
117 | * the highest count, either FFFF hex for binary counting | |
118 | * or 9999 for BCD counting, and continues counting. | |
119 | * Modes 2 and 3 are periodic; the Counter reloads | |
120 | * itself with the initial count and continues counting | |
121 | * from there. | |
122 | */ | |
26ef1924 AK |
123 | remaining = hrtimer_get_remaining(&ps->timer); |
124 | elapsed = ps->period - ktime_to_ns(remaining); | |
fd668423 MT |
125 | |
126 | return elapsed; | |
127 | } | |
128 | ||
129 | static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c, | |
130 | int channel) | |
131 | { | |
132 | if (channel == 0) | |
133 | return __kpit_elapsed(kvm); | |
134 | ||
135 | return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
136 | } | |
137 | ||
7837699f SY |
138 | static int pit_get_count(struct kvm *kvm, int channel) |
139 | { | |
140 | struct kvm_kpit_channel_state *c = | |
141 | &kvm->arch.vpit->pit_state.channels[channel]; | |
142 | s64 d, t; | |
143 | int counter; | |
144 | ||
145 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
146 | ||
fd668423 | 147 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
148 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
149 | ||
150 | switch (c->mode) { | |
151 | case 0: | |
152 | case 1: | |
153 | case 4: | |
154 | case 5: | |
155 | counter = (c->count - d) & 0xffff; | |
156 | break; | |
157 | case 3: | |
158 | /* XXX: may be incorrect for odd counts */ | |
159 | counter = c->count - (mod_64((2 * d), c->count)); | |
160 | break; | |
161 | default: | |
162 | counter = c->count - mod_64(d, c->count); | |
163 | break; | |
164 | } | |
165 | return counter; | |
166 | } | |
167 | ||
168 | static int pit_get_out(struct kvm *kvm, int channel) | |
169 | { | |
170 | struct kvm_kpit_channel_state *c = | |
171 | &kvm->arch.vpit->pit_state.channels[channel]; | |
172 | s64 d, t; | |
173 | int out; | |
174 | ||
175 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
176 | ||
fd668423 | 177 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
178 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
179 | ||
180 | switch (c->mode) { | |
181 | default: | |
182 | case 0: | |
183 | out = (d >= c->count); | |
184 | break; | |
185 | case 1: | |
186 | out = (d < c->count); | |
187 | break; | |
188 | case 2: | |
189 | out = ((mod_64(d, c->count) == 0) && (d != 0)); | |
190 | break; | |
191 | case 3: | |
192 | out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); | |
193 | break; | |
194 | case 4: | |
195 | case 5: | |
196 | out = (d == c->count); | |
197 | break; | |
198 | } | |
199 | ||
200 | return out; | |
201 | } | |
202 | ||
203 | static void pit_latch_count(struct kvm *kvm, int channel) | |
204 | { | |
205 | struct kvm_kpit_channel_state *c = | |
206 | &kvm->arch.vpit->pit_state.channels[channel]; | |
207 | ||
208 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
209 | ||
210 | if (!c->count_latched) { | |
211 | c->latched_count = pit_get_count(kvm, channel); | |
212 | c->count_latched = c->rw_mode; | |
213 | } | |
214 | } | |
215 | ||
216 | static void pit_latch_status(struct kvm *kvm, int channel) | |
217 | { | |
218 | struct kvm_kpit_channel_state *c = | |
219 | &kvm->arch.vpit->pit_state.channels[channel]; | |
220 | ||
221 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
222 | ||
223 | if (!c->status_latched) { | |
224 | /* TODO: Return NULL COUNT (bit 6). */ | |
225 | c->status = ((pit_get_out(kvm, channel) << 7) | | |
226 | (c->rw_mode << 4) | | |
227 | (c->mode << 1) | | |
228 | c->bcd); | |
229 | c->status_latched = 1; | |
230 | } | |
231 | } | |
232 | ||
ee032c99 | 233 | static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian) |
3cf57fed MT |
234 | { |
235 | struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, | |
236 | irq_ack_notifier); | |
33572ac0 CL |
237 | int value; |
238 | ||
239 | spin_lock(&ps->inject_lock); | |
26ef1924 | 240 | value = atomic_dec_return(&ps->pending); |
33572ac0 CL |
241 | if (value < 0) |
242 | /* spurious acks can be generated if, for example, the | |
243 | * PIC is being reset. Handle it gracefully here | |
244 | */ | |
26ef1924 | 245 | atomic_inc(&ps->pending); |
33572ac0 CL |
246 | else if (value > 0) |
247 | /* in this case, we had multiple outstanding pit interrupts | |
248 | * that we needed to inject. Reinject | |
249 | */ | |
b6ddf05f | 250 | queue_kthread_work(&ps->pit->worker, &ps->pit->expired); |
3cf57fed | 251 | ps->irq_ack = 1; |
33572ac0 | 252 | spin_unlock(&ps->inject_lock); |
3cf57fed MT |
253 | } |
254 | ||
2f599714 MT |
255 | void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu) |
256 | { | |
257 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
258 | struct hrtimer *timer; | |
259 | ||
c5af89b6 | 260 | if (!kvm_vcpu_is_bsp(vcpu) || !pit) |
2f599714 MT |
261 | return; |
262 | ||
26ef1924 | 263 | timer = &pit->pit_state.timer; |
2f599714 | 264 | if (hrtimer_cancel(timer)) |
beb20d52 | 265 | hrtimer_start_expires(timer, HRTIMER_MODE_ABS); |
2f599714 MT |
266 | } |
267 | ||
33572ac0 | 268 | static void destroy_pit_timer(struct kvm_pit *pit) |
7837699f | 269 | { |
26ef1924 | 270 | hrtimer_cancel(&pit->pit_state.timer); |
b6ddf05f | 271 | flush_kthread_work(&pit->expired); |
7837699f SY |
272 | } |
273 | ||
b6ddf05f | 274 | static void pit_do_work(struct kthread_work *work) |
33572ac0 CL |
275 | { |
276 | struct kvm_pit *pit = container_of(work, struct kvm_pit, expired); | |
277 | struct kvm *kvm = pit->kvm; | |
278 | struct kvm_vcpu *vcpu; | |
279 | int i; | |
280 | struct kvm_kpit_state *ps = &pit->pit_state; | |
281 | int inject = 0; | |
282 | ||
283 | /* Try to inject pending interrupts when | |
284 | * last one has been acked. | |
285 | */ | |
286 | spin_lock(&ps->inject_lock); | |
287 | if (ps->irq_ack) { | |
288 | ps->irq_ack = 0; | |
289 | inject = 1; | |
290 | } | |
291 | spin_unlock(&ps->inject_lock); | |
292 | if (inject) { | |
aa2fbe6d YZ |
293 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1, false); |
294 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0, false); | |
33572ac0 CL |
295 | |
296 | /* | |
297 | * Provides NMI watchdog support via Virtual Wire mode. | |
298 | * The route is: PIT -> PIC -> LVT0 in NMI mode. | |
299 | * | |
300 | * Note: Our Virtual Wire implementation is simplified, only | |
301 | * propagating PIT interrupts to all VCPUs when they have set | |
302 | * LVT0 to NMI delivery. Other PIC interrupts are just sent to | |
303 | * VCPU0, and only if its LVT0 is in EXTINT mode. | |
304 | */ | |
305 | if (kvm->arch.vapics_in_nmi_mode > 0) | |
306 | kvm_for_each_vcpu(i, vcpu, kvm) | |
307 | kvm_apic_nmi_wd_deliver(vcpu); | |
308 | } | |
309 | } | |
310 | ||
311 | static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) | |
312 | { | |
26ef1924 AK |
313 | struct kvm_kpit_state *ps = container_of(data, struct kvm_kpit_state, timer); |
314 | struct kvm_pit *pt = ps->kvm->arch.vpit; | |
33572ac0 | 315 | |
26ef1924 AK |
316 | if (ps->reinject || !atomic_read(&ps->pending)) { |
317 | atomic_inc(&ps->pending); | |
b6ddf05f | 318 | queue_kthread_work(&pt->worker, &pt->expired); |
33572ac0 CL |
319 | } |
320 | ||
26ef1924 AK |
321 | if (ps->is_periodic) { |
322 | hrtimer_add_expires_ns(&ps->timer, ps->period); | |
33572ac0 CL |
323 | return HRTIMER_RESTART; |
324 | } else | |
325 | return HRTIMER_NORESTART; | |
326 | } | |
327 | ||
0924ab2c | 328 | static void create_pit_timer(struct kvm *kvm, u32 val, int is_period) |
7837699f | 329 | { |
0924ab2c | 330 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; |
7837699f SY |
331 | s64 interval; |
332 | ||
a647795e | 333 | if (!irqchip_in_kernel(kvm) || ps->flags & KVM_PIT_FLAGS_HPET_LEGACY) |
0924ab2c JK |
334 | return; |
335 | ||
7837699f SY |
336 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); |
337 | ||
a78d9626 | 338 | pr_debug("create pit timer, interval is %llu nsec\n", interval); |
7837699f SY |
339 | |
340 | /* TODO The new value only affected after the retriggered */ | |
26ef1924 | 341 | hrtimer_cancel(&ps->timer); |
b6ddf05f | 342 | flush_kthread_work(&ps->pit->expired); |
26ef1924 | 343 | ps->period = interval; |
d3c7b77d MT |
344 | ps->is_periodic = is_period; |
345 | ||
26ef1924 AK |
346 | ps->timer.function = pit_timer_fn; |
347 | ps->kvm = ps->pit->kvm; | |
d3c7b77d | 348 | |
26ef1924 | 349 | atomic_set(&ps->pending, 0); |
3cf57fed | 350 | ps->irq_ack = 1; |
7837699f | 351 | |
26ef1924 | 352 | hrtimer_start(&ps->timer, ktime_add_ns(ktime_get(), interval), |
7837699f SY |
353 | HRTIMER_MODE_ABS); |
354 | } | |
355 | ||
356 | static void pit_load_count(struct kvm *kvm, int channel, u32 val) | |
357 | { | |
358 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
359 | ||
360 | WARN_ON(!mutex_is_locked(&ps->lock)); | |
361 | ||
a78d9626 | 362 | pr_debug("load_count val is %d, channel is %d\n", val, channel); |
7837699f SY |
363 | |
364 | /* | |
ede2ccc5 MT |
365 | * The largest possible initial count is 0; this is equivalent |
366 | * to 216 for binary counting and 104 for BCD counting. | |
7837699f SY |
367 | */ |
368 | if (val == 0) | |
369 | val = 0x10000; | |
370 | ||
7837699f SY |
371 | ps->channels[channel].count = val; |
372 | ||
fd668423 MT |
373 | if (channel != 0) { |
374 | ps->channels[channel].count_load_time = ktime_get(); | |
7837699f | 375 | return; |
fd668423 | 376 | } |
7837699f SY |
377 | |
378 | /* Two types of timer | |
379 | * mode 1 is one shot, mode 2 is period, otherwise del timer */ | |
380 | switch (ps->channels[0].mode) { | |
ede2ccc5 | 381 | case 0: |
7837699f | 382 | case 1: |
ece15bab MT |
383 | /* FIXME: enhance mode 4 precision */ |
384 | case 4: | |
a647795e | 385 | create_pit_timer(kvm, val, 0); |
7837699f SY |
386 | break; |
387 | case 2: | |
f6975545 | 388 | case 3: |
a647795e | 389 | create_pit_timer(kvm, val, 1); |
7837699f SY |
390 | break; |
391 | default: | |
33572ac0 | 392 | destroy_pit_timer(kvm->arch.vpit); |
7837699f SY |
393 | } |
394 | } | |
395 | ||
e9f42757 | 396 | void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start) |
e0f63cb9 | 397 | { |
e9f42757 BK |
398 | u8 saved_mode; |
399 | if (hpet_legacy_start) { | |
400 | /* save existing mode for later reenablement */ | |
401 | saved_mode = kvm->arch.vpit->pit_state.channels[0].mode; | |
402 | kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */ | |
403 | pit_load_count(kvm, channel, val); | |
404 | kvm->arch.vpit->pit_state.channels[0].mode = saved_mode; | |
405 | } else { | |
406 | pit_load_count(kvm, channel, val); | |
407 | } | |
e0f63cb9 SY |
408 | } |
409 | ||
d76685c4 GH |
410 | static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev) |
411 | { | |
412 | return container_of(dev, struct kvm_pit, dev); | |
413 | } | |
414 | ||
415 | static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev) | |
416 | { | |
417 | return container_of(dev, struct kvm_pit, speaker_dev); | |
418 | } | |
419 | ||
bda9020e MT |
420 | static inline int pit_in_range(gpa_t addr) |
421 | { | |
422 | return ((addr >= KVM_PIT_BASE_ADDRESS) && | |
423 | (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); | |
424 | } | |
425 | ||
426 | static int pit_ioport_write(struct kvm_io_device *this, | |
427 | gpa_t addr, int len, const void *data) | |
7837699f | 428 | { |
d76685c4 | 429 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
430 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
431 | struct kvm *kvm = pit->kvm; | |
432 | int channel, access; | |
433 | struct kvm_kpit_channel_state *s; | |
434 | u32 val = *(u32 *) data; | |
bda9020e MT |
435 | if (!pit_in_range(addr)) |
436 | return -EOPNOTSUPP; | |
7837699f SY |
437 | |
438 | val &= 0xff; | |
439 | addr &= KVM_PIT_CHANNEL_MASK; | |
440 | ||
441 | mutex_lock(&pit_state->lock); | |
442 | ||
443 | if (val != 0) | |
a78d9626 JP |
444 | pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n", |
445 | (unsigned int)addr, len, val); | |
7837699f SY |
446 | |
447 | if (addr == 3) { | |
448 | channel = val >> 6; | |
449 | if (channel == 3) { | |
450 | /* Read-Back Command. */ | |
451 | for (channel = 0; channel < 3; channel++) { | |
452 | s = &pit_state->channels[channel]; | |
453 | if (val & (2 << channel)) { | |
454 | if (!(val & 0x20)) | |
455 | pit_latch_count(kvm, channel); | |
456 | if (!(val & 0x10)) | |
457 | pit_latch_status(kvm, channel); | |
458 | } | |
459 | } | |
460 | } else { | |
461 | /* Select Counter <channel>. */ | |
462 | s = &pit_state->channels[channel]; | |
463 | access = (val >> 4) & KVM_PIT_CHANNEL_MASK; | |
464 | if (access == 0) { | |
465 | pit_latch_count(kvm, channel); | |
466 | } else { | |
467 | s->rw_mode = access; | |
468 | s->read_state = access; | |
469 | s->write_state = access; | |
470 | s->mode = (val >> 1) & 7; | |
471 | if (s->mode > 5) | |
472 | s->mode -= 4; | |
473 | s->bcd = val & 1; | |
474 | } | |
475 | } | |
476 | } else { | |
477 | /* Write Count. */ | |
478 | s = &pit_state->channels[addr]; | |
479 | switch (s->write_state) { | |
480 | default: | |
481 | case RW_STATE_LSB: | |
482 | pit_load_count(kvm, addr, val); | |
483 | break; | |
484 | case RW_STATE_MSB: | |
485 | pit_load_count(kvm, addr, val << 8); | |
486 | break; | |
487 | case RW_STATE_WORD0: | |
488 | s->write_latch = val; | |
489 | s->write_state = RW_STATE_WORD1; | |
490 | break; | |
491 | case RW_STATE_WORD1: | |
492 | pit_load_count(kvm, addr, s->write_latch | (val << 8)); | |
493 | s->write_state = RW_STATE_WORD0; | |
494 | break; | |
495 | } | |
496 | } | |
497 | ||
498 | mutex_unlock(&pit_state->lock); | |
bda9020e | 499 | return 0; |
7837699f SY |
500 | } |
501 | ||
bda9020e MT |
502 | static int pit_ioport_read(struct kvm_io_device *this, |
503 | gpa_t addr, int len, void *data) | |
7837699f | 504 | { |
d76685c4 | 505 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
506 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
507 | struct kvm *kvm = pit->kvm; | |
508 | int ret, count; | |
509 | struct kvm_kpit_channel_state *s; | |
bda9020e MT |
510 | if (!pit_in_range(addr)) |
511 | return -EOPNOTSUPP; | |
7837699f SY |
512 | |
513 | addr &= KVM_PIT_CHANNEL_MASK; | |
ee73f656 MT |
514 | if (addr == 3) |
515 | return 0; | |
516 | ||
7837699f SY |
517 | s = &pit_state->channels[addr]; |
518 | ||
519 | mutex_lock(&pit_state->lock); | |
520 | ||
521 | if (s->status_latched) { | |
522 | s->status_latched = 0; | |
523 | ret = s->status; | |
524 | } else if (s->count_latched) { | |
525 | switch (s->count_latched) { | |
526 | default: | |
527 | case RW_STATE_LSB: | |
528 | ret = s->latched_count & 0xff; | |
529 | s->count_latched = 0; | |
530 | break; | |
531 | case RW_STATE_MSB: | |
532 | ret = s->latched_count >> 8; | |
533 | s->count_latched = 0; | |
534 | break; | |
535 | case RW_STATE_WORD0: | |
536 | ret = s->latched_count & 0xff; | |
537 | s->count_latched = RW_STATE_MSB; | |
538 | break; | |
539 | } | |
540 | } else { | |
541 | switch (s->read_state) { | |
542 | default: | |
543 | case RW_STATE_LSB: | |
544 | count = pit_get_count(kvm, addr); | |
545 | ret = count & 0xff; | |
546 | break; | |
547 | case RW_STATE_MSB: | |
548 | count = pit_get_count(kvm, addr); | |
549 | ret = (count >> 8) & 0xff; | |
550 | break; | |
551 | case RW_STATE_WORD0: | |
552 | count = pit_get_count(kvm, addr); | |
553 | ret = count & 0xff; | |
554 | s->read_state = RW_STATE_WORD1; | |
555 | break; | |
556 | case RW_STATE_WORD1: | |
557 | count = pit_get_count(kvm, addr); | |
558 | ret = (count >> 8) & 0xff; | |
559 | s->read_state = RW_STATE_WORD0; | |
560 | break; | |
561 | } | |
562 | } | |
563 | ||
564 | if (len > sizeof(ret)) | |
565 | len = sizeof(ret); | |
566 | memcpy(data, (char *)&ret, len); | |
567 | ||
568 | mutex_unlock(&pit_state->lock); | |
bda9020e | 569 | return 0; |
7837699f SY |
570 | } |
571 | ||
bda9020e MT |
572 | static int speaker_ioport_write(struct kvm_io_device *this, |
573 | gpa_t addr, int len, const void *data) | |
7837699f | 574 | { |
d76685c4 | 575 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
576 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
577 | struct kvm *kvm = pit->kvm; | |
578 | u32 val = *(u32 *) data; | |
bda9020e MT |
579 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
580 | return -EOPNOTSUPP; | |
7837699f SY |
581 | |
582 | mutex_lock(&pit_state->lock); | |
583 | pit_state->speaker_data_on = (val >> 1) & 1; | |
584 | pit_set_gate(kvm, 2, val & 1); | |
585 | mutex_unlock(&pit_state->lock); | |
bda9020e | 586 | return 0; |
7837699f SY |
587 | } |
588 | ||
bda9020e MT |
589 | static int speaker_ioport_read(struct kvm_io_device *this, |
590 | gpa_t addr, int len, void *data) | |
7837699f | 591 | { |
d76685c4 | 592 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
593 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
594 | struct kvm *kvm = pit->kvm; | |
595 | unsigned int refresh_clock; | |
596 | int ret; | |
bda9020e MT |
597 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
598 | return -EOPNOTSUPP; | |
7837699f SY |
599 | |
600 | /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ | |
601 | refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; | |
602 | ||
603 | mutex_lock(&pit_state->lock); | |
604 | ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) | | |
605 | (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4)); | |
606 | if (len > sizeof(ret)) | |
607 | len = sizeof(ret); | |
608 | memcpy(data, (char *)&ret, len); | |
609 | mutex_unlock(&pit_state->lock); | |
bda9020e | 610 | return 0; |
7837699f SY |
611 | } |
612 | ||
308b0f23 | 613 | void kvm_pit_reset(struct kvm_pit *pit) |
7837699f SY |
614 | { |
615 | int i; | |
308b0f23 SY |
616 | struct kvm_kpit_channel_state *c; |
617 | ||
618 | mutex_lock(&pit->pit_state.lock); | |
e9f42757 | 619 | pit->pit_state.flags = 0; |
308b0f23 SY |
620 | for (i = 0; i < 3; i++) { |
621 | c = &pit->pit_state.channels[i]; | |
622 | c->mode = 0xff; | |
623 | c->gate = (i != 2); | |
624 | pit_load_count(pit->kvm, i, 0); | |
625 | } | |
626 | mutex_unlock(&pit->pit_state.lock); | |
627 | ||
26ef1924 | 628 | atomic_set(&pit->pit_state.pending, 0); |
3cf57fed | 629 | pit->pit_state.irq_ack = 1; |
308b0f23 SY |
630 | } |
631 | ||
4780c659 AK |
632 | static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask) |
633 | { | |
634 | struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier); | |
635 | ||
636 | if (!mask) { | |
26ef1924 | 637 | atomic_set(&pit->pit_state.pending, 0); |
4780c659 AK |
638 | pit->pit_state.irq_ack = 1; |
639 | } | |
640 | } | |
641 | ||
d76685c4 GH |
642 | static const struct kvm_io_device_ops pit_dev_ops = { |
643 | .read = pit_ioport_read, | |
644 | .write = pit_ioport_write, | |
d76685c4 GH |
645 | }; |
646 | ||
647 | static const struct kvm_io_device_ops speaker_dev_ops = { | |
648 | .read = speaker_ioport_read, | |
649 | .write = speaker_ioport_write, | |
d76685c4 GH |
650 | }; |
651 | ||
79fac95e | 652 | /* Caller must hold slots_lock */ |
c5ff41ce | 653 | struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags) |
308b0f23 | 654 | { |
7837699f SY |
655 | struct kvm_pit *pit; |
656 | struct kvm_kpit_state *pit_state; | |
b6ddf05f JK |
657 | struct pid *pid; |
658 | pid_t pid_nr; | |
090b7aff | 659 | int ret; |
7837699f SY |
660 | |
661 | pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); | |
662 | if (!pit) | |
663 | return NULL; | |
664 | ||
5550af4d | 665 | pit->irq_source_id = kvm_request_irq_source_id(kvm); |
e17d1dc0 AK |
666 | if (pit->irq_source_id < 0) { |
667 | kfree(pit); | |
5550af4d | 668 | return NULL; |
e17d1dc0 | 669 | } |
5550af4d | 670 | |
7837699f SY |
671 | mutex_init(&pit->pit_state.lock); |
672 | mutex_lock(&pit->pit_state.lock); | |
33572ac0 CL |
673 | spin_lock_init(&pit->pit_state.inject_lock); |
674 | ||
b6ddf05f JK |
675 | pid = get_pid(task_tgid(current)); |
676 | pid_nr = pid_vnr(pid); | |
677 | put_pid(pid); | |
678 | ||
679 | init_kthread_worker(&pit->worker); | |
680 | pit->worker_task = kthread_run(kthread_worker_fn, &pit->worker, | |
681 | "kvm-pit/%d", pid_nr); | |
682 | if (IS_ERR(pit->worker_task)) { | |
673813e8 | 683 | mutex_unlock(&pit->pit_state.lock); |
6b5d7a9f | 684 | kvm_free_irq_source_id(kvm, pit->irq_source_id); |
33572ac0 CL |
685 | kfree(pit); |
686 | return NULL; | |
687 | } | |
b6ddf05f | 688 | init_kthread_work(&pit->expired, pit_do_work); |
7837699f | 689 | |
7837699f SY |
690 | kvm->arch.vpit = pit; |
691 | pit->kvm = kvm; | |
692 | ||
693 | pit_state = &pit->pit_state; | |
694 | pit_state->pit = pit; | |
26ef1924 | 695 | hrtimer_init(&pit_state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); |
3cf57fed MT |
696 | pit_state->irq_ack_notifier.gsi = 0; |
697 | pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq; | |
698 | kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
26ef1924 | 699 | pit_state->reinject = true; |
7837699f SY |
700 | mutex_unlock(&pit->pit_state.lock); |
701 | ||
308b0f23 | 702 | kvm_pit_reset(pit); |
7837699f | 703 | |
4780c659 AK |
704 | pit->mask_notifier.func = pit_mask_notifer; |
705 | kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier); | |
706 | ||
6b66ac1a | 707 | kvm_iodevice_init(&pit->dev, &pit_dev_ops); |
743eeb0b SL |
708 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS, |
709 | KVM_PIT_MEM_LENGTH, &pit->dev); | |
090b7aff GH |
710 | if (ret < 0) |
711 | goto fail; | |
6b66ac1a GH |
712 | |
713 | if (flags & KVM_PIT_SPEAKER_DUMMY) { | |
714 | kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops); | |
e93f8a0f | 715 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, |
743eeb0b SL |
716 | KVM_SPEAKER_BASE_ADDRESS, 4, |
717 | &pit->speaker_dev); | |
090b7aff GH |
718 | if (ret < 0) |
719 | goto fail_unregister; | |
6b66ac1a GH |
720 | } |
721 | ||
7837699f | 722 | return pit; |
090b7aff GH |
723 | |
724 | fail_unregister: | |
e93f8a0f | 725 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev); |
090b7aff GH |
726 | |
727 | fail: | |
d225f53b WY |
728 | kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier); |
729 | kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
730 | kvm_free_irq_source_id(kvm, pit->irq_source_id); | |
b6ddf05f | 731 | kthread_stop(pit->worker_task); |
090b7aff GH |
732 | kfree(pit); |
733 | return NULL; | |
7837699f SY |
734 | } |
735 | ||
736 | void kvm_free_pit(struct kvm *kvm) | |
737 | { | |
738 | struct hrtimer *timer; | |
739 | ||
740 | if (kvm->arch.vpit) { | |
aea924f6 XG |
741 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev); |
742 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, | |
743 | &kvm->arch.vpit->speaker_dev); | |
4780c659 AK |
744 | kvm_unregister_irq_mask_notifier(kvm, 0, |
745 | &kvm->arch.vpit->mask_notifier); | |
84fde248 GN |
746 | kvm_unregister_irq_ack_notifier(kvm, |
747 | &kvm->arch.vpit->pit_state.irq_ack_notifier); | |
7837699f | 748 | mutex_lock(&kvm->arch.vpit->pit_state.lock); |
26ef1924 | 749 | timer = &kvm->arch.vpit->pit_state.timer; |
7837699f | 750 | hrtimer_cancel(timer); |
b6ddf05f JK |
751 | flush_kthread_work(&kvm->arch.vpit->expired); |
752 | kthread_stop(kvm->arch.vpit->worker_task); | |
5550af4d | 753 | kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id); |
7837699f SY |
754 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); |
755 | kfree(kvm->arch.vpit); | |
756 | } | |
757 | } |