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Commit | Line | Data |
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7837699f SY |
1 | /* |
2 | * 8253/8254 interval timer emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2006 Intel Corporation | |
6 | * Copyright (c) 2007 Keir Fraser, XenSource Inc | |
7 | * Copyright (c) 2008 Intel Corporation | |
9611c187 | 8 | * Copyright 2009 Red Hat, Inc. and/or its affiliates. |
7837699f SY |
9 | * |
10 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
11 | * of this software and associated documentation files (the "Software"), to deal | |
12 | * in the Software without restriction, including without limitation the rights | |
13 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
14 | * copies of the Software, and to permit persons to whom the Software is | |
15 | * furnished to do so, subject to the following conditions: | |
16 | * | |
17 | * The above copyright notice and this permission notice shall be included in | |
18 | * all copies or substantial portions of the Software. | |
19 | * | |
20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
21 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
23 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
24 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
25 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
26 | * THE SOFTWARE. | |
27 | * | |
28 | * Authors: | |
29 | * Sheng Yang <sheng.yang@intel.com> | |
30 | * Based on QEMU and Xen. | |
31 | */ | |
32 | ||
a78d9626 JP |
33 | #define pr_fmt(fmt) "pit: " fmt |
34 | ||
7837699f | 35 | #include <linux/kvm_host.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
7837699f SY |
37 | |
38 | #include "irq.h" | |
39 | #include "i8254.h" | |
9ed96e87 | 40 | #include "x86.h" |
7837699f SY |
41 | |
42 | #ifndef CONFIG_X86_64 | |
6f6d6a1a | 43 | #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) |
7837699f SY |
44 | #else |
45 | #define mod_64(x, y) ((x) % (y)) | |
46 | #endif | |
47 | ||
48 | #define RW_STATE_LSB 1 | |
49 | #define RW_STATE_MSB 2 | |
50 | #define RW_STATE_WORD0 3 | |
51 | #define RW_STATE_WORD1 4 | |
52 | ||
53 | /* Compute with 96 bit intermediate result: (a*b)/c */ | |
54 | static u64 muldiv64(u64 a, u32 b, u32 c) | |
55 | { | |
56 | union { | |
57 | u64 ll; | |
58 | struct { | |
59 | u32 low, high; | |
60 | } l; | |
61 | } u, res; | |
62 | u64 rl, rh; | |
63 | ||
64 | u.ll = a; | |
65 | rl = (u64)u.l.low * (u64)b; | |
66 | rh = (u64)u.l.high * (u64)b; | |
67 | rh += (rl >> 32); | |
6f6d6a1a RZ |
68 | res.l.high = div64_u64(rh, c); |
69 | res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); | |
7837699f SY |
70 | return res.ll; |
71 | } | |
72 | ||
73 | static void pit_set_gate(struct kvm *kvm, int channel, u32 val) | |
74 | { | |
75 | struct kvm_kpit_channel_state *c = | |
76 | &kvm->arch.vpit->pit_state.channels[channel]; | |
77 | ||
78 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
79 | ||
80 | switch (c->mode) { | |
81 | default: | |
82 | case 0: | |
83 | case 4: | |
84 | /* XXX: just disable/enable counting */ | |
85 | break; | |
86 | case 1: | |
87 | case 2: | |
88 | case 3: | |
89 | case 5: | |
90 | /* Restart counting on rising edge. */ | |
91 | if (c->gate < val) | |
92 | c->count_load_time = ktime_get(); | |
93 | break; | |
94 | } | |
95 | ||
96 | c->gate = val; | |
97 | } | |
98 | ||
8b2cf73c | 99 | static int pit_get_gate(struct kvm *kvm, int channel) |
7837699f SY |
100 | { |
101 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
102 | ||
103 | return kvm->arch.vpit->pit_state.channels[channel].gate; | |
104 | } | |
105 | ||
fd668423 MT |
106 | static s64 __kpit_elapsed(struct kvm *kvm) |
107 | { | |
108 | s64 elapsed; | |
109 | ktime_t remaining; | |
110 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
111 | ||
26ef1924 | 112 | if (!ps->period) |
0ff77873 MT |
113 | return 0; |
114 | ||
ede2ccc5 MT |
115 | /* |
116 | * The Counter does not stop when it reaches zero. In | |
117 | * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to | |
118 | * the highest count, either FFFF hex for binary counting | |
119 | * or 9999 for BCD counting, and continues counting. | |
120 | * Modes 2 and 3 are periodic; the Counter reloads | |
121 | * itself with the initial count and continues counting | |
122 | * from there. | |
123 | */ | |
26ef1924 AK |
124 | remaining = hrtimer_get_remaining(&ps->timer); |
125 | elapsed = ps->period - ktime_to_ns(remaining); | |
fd668423 MT |
126 | |
127 | return elapsed; | |
128 | } | |
129 | ||
130 | static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c, | |
131 | int channel) | |
132 | { | |
133 | if (channel == 0) | |
134 | return __kpit_elapsed(kvm); | |
135 | ||
136 | return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
137 | } | |
138 | ||
7837699f SY |
139 | static int pit_get_count(struct kvm *kvm, int channel) |
140 | { | |
141 | struct kvm_kpit_channel_state *c = | |
142 | &kvm->arch.vpit->pit_state.channels[channel]; | |
143 | s64 d, t; | |
144 | int counter; | |
145 | ||
146 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
147 | ||
fd668423 | 148 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
149 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
150 | ||
151 | switch (c->mode) { | |
152 | case 0: | |
153 | case 1: | |
154 | case 4: | |
155 | case 5: | |
156 | counter = (c->count - d) & 0xffff; | |
157 | break; | |
158 | case 3: | |
159 | /* XXX: may be incorrect for odd counts */ | |
160 | counter = c->count - (mod_64((2 * d), c->count)); | |
161 | break; | |
162 | default: | |
163 | counter = c->count - mod_64(d, c->count); | |
164 | break; | |
165 | } | |
166 | return counter; | |
167 | } | |
168 | ||
169 | static int pit_get_out(struct kvm *kvm, int channel) | |
170 | { | |
171 | struct kvm_kpit_channel_state *c = | |
172 | &kvm->arch.vpit->pit_state.channels[channel]; | |
173 | s64 d, t; | |
174 | int out; | |
175 | ||
176 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
177 | ||
fd668423 | 178 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
179 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
180 | ||
181 | switch (c->mode) { | |
182 | default: | |
183 | case 0: | |
184 | out = (d >= c->count); | |
185 | break; | |
186 | case 1: | |
187 | out = (d < c->count); | |
188 | break; | |
189 | case 2: | |
190 | out = ((mod_64(d, c->count) == 0) && (d != 0)); | |
191 | break; | |
192 | case 3: | |
193 | out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); | |
194 | break; | |
195 | case 4: | |
196 | case 5: | |
197 | out = (d == c->count); | |
198 | break; | |
199 | } | |
200 | ||
201 | return out; | |
202 | } | |
203 | ||
204 | static void pit_latch_count(struct kvm *kvm, int channel) | |
205 | { | |
206 | struct kvm_kpit_channel_state *c = | |
207 | &kvm->arch.vpit->pit_state.channels[channel]; | |
208 | ||
209 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
210 | ||
211 | if (!c->count_latched) { | |
212 | c->latched_count = pit_get_count(kvm, channel); | |
213 | c->count_latched = c->rw_mode; | |
214 | } | |
215 | } | |
216 | ||
217 | static void pit_latch_status(struct kvm *kvm, int channel) | |
218 | { | |
219 | struct kvm_kpit_channel_state *c = | |
220 | &kvm->arch.vpit->pit_state.channels[channel]; | |
221 | ||
222 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
223 | ||
224 | if (!c->status_latched) { | |
225 | /* TODO: Return NULL COUNT (bit 6). */ | |
226 | c->status = ((pit_get_out(kvm, channel) << 7) | | |
227 | (c->rw_mode << 4) | | |
228 | (c->mode << 1) | | |
229 | c->bcd); | |
230 | c->status_latched = 1; | |
231 | } | |
232 | } | |
233 | ||
ee032c99 | 234 | static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian) |
3cf57fed MT |
235 | { |
236 | struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, | |
237 | irq_ack_notifier); | |
33572ac0 CL |
238 | int value; |
239 | ||
240 | spin_lock(&ps->inject_lock); | |
26ef1924 | 241 | value = atomic_dec_return(&ps->pending); |
33572ac0 CL |
242 | if (value < 0) |
243 | /* spurious acks can be generated if, for example, the | |
244 | * PIC is being reset. Handle it gracefully here | |
245 | */ | |
26ef1924 | 246 | atomic_inc(&ps->pending); |
33572ac0 CL |
247 | else if (value > 0) |
248 | /* in this case, we had multiple outstanding pit interrupts | |
249 | * that we needed to inject. Reinject | |
250 | */ | |
b6ddf05f | 251 | queue_kthread_work(&ps->pit->worker, &ps->pit->expired); |
3cf57fed | 252 | ps->irq_ack = 1; |
33572ac0 | 253 | spin_unlock(&ps->inject_lock); |
3cf57fed MT |
254 | } |
255 | ||
2f599714 MT |
256 | void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu) |
257 | { | |
258 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
259 | struct hrtimer *timer; | |
260 | ||
c5af89b6 | 261 | if (!kvm_vcpu_is_bsp(vcpu) || !pit) |
2f599714 MT |
262 | return; |
263 | ||
26ef1924 | 264 | timer = &pit->pit_state.timer; |
2f599714 | 265 | if (hrtimer_cancel(timer)) |
beb20d52 | 266 | hrtimer_start_expires(timer, HRTIMER_MODE_ABS); |
2f599714 MT |
267 | } |
268 | ||
33572ac0 | 269 | static void destroy_pit_timer(struct kvm_pit *pit) |
7837699f | 270 | { |
26ef1924 | 271 | hrtimer_cancel(&pit->pit_state.timer); |
b6ddf05f | 272 | flush_kthread_work(&pit->expired); |
7837699f SY |
273 | } |
274 | ||
b6ddf05f | 275 | static void pit_do_work(struct kthread_work *work) |
33572ac0 CL |
276 | { |
277 | struct kvm_pit *pit = container_of(work, struct kvm_pit, expired); | |
278 | struct kvm *kvm = pit->kvm; | |
279 | struct kvm_vcpu *vcpu; | |
280 | int i; | |
281 | struct kvm_kpit_state *ps = &pit->pit_state; | |
282 | int inject = 0; | |
283 | ||
284 | /* Try to inject pending interrupts when | |
285 | * last one has been acked. | |
286 | */ | |
287 | spin_lock(&ps->inject_lock); | |
288 | if (ps->irq_ack) { | |
289 | ps->irq_ack = 0; | |
290 | inject = 1; | |
291 | } | |
292 | spin_unlock(&ps->inject_lock); | |
293 | if (inject) { | |
aa2fbe6d YZ |
294 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1, false); |
295 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0, false); | |
33572ac0 CL |
296 | |
297 | /* | |
298 | * Provides NMI watchdog support via Virtual Wire mode. | |
299 | * The route is: PIT -> PIC -> LVT0 in NMI mode. | |
300 | * | |
301 | * Note: Our Virtual Wire implementation is simplified, only | |
302 | * propagating PIT interrupts to all VCPUs when they have set | |
303 | * LVT0 to NMI delivery. Other PIC interrupts are just sent to | |
304 | * VCPU0, and only if its LVT0 is in EXTINT mode. | |
305 | */ | |
306 | if (kvm->arch.vapics_in_nmi_mode > 0) | |
307 | kvm_for_each_vcpu(i, vcpu, kvm) | |
308 | kvm_apic_nmi_wd_deliver(vcpu); | |
309 | } | |
310 | } | |
311 | ||
312 | static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) | |
313 | { | |
26ef1924 AK |
314 | struct kvm_kpit_state *ps = container_of(data, struct kvm_kpit_state, timer); |
315 | struct kvm_pit *pt = ps->kvm->arch.vpit; | |
33572ac0 | 316 | |
26ef1924 AK |
317 | if (ps->reinject || !atomic_read(&ps->pending)) { |
318 | atomic_inc(&ps->pending); | |
b6ddf05f | 319 | queue_kthread_work(&pt->worker, &pt->expired); |
33572ac0 CL |
320 | } |
321 | ||
26ef1924 AK |
322 | if (ps->is_periodic) { |
323 | hrtimer_add_expires_ns(&ps->timer, ps->period); | |
33572ac0 CL |
324 | return HRTIMER_RESTART; |
325 | } else | |
326 | return HRTIMER_NORESTART; | |
327 | } | |
328 | ||
0924ab2c | 329 | static void create_pit_timer(struct kvm *kvm, u32 val, int is_period) |
7837699f | 330 | { |
0924ab2c | 331 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; |
7837699f SY |
332 | s64 interval; |
333 | ||
a647795e | 334 | if (!irqchip_in_kernel(kvm) || ps->flags & KVM_PIT_FLAGS_HPET_LEGACY) |
0924ab2c JK |
335 | return; |
336 | ||
7837699f SY |
337 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); |
338 | ||
a78d9626 | 339 | pr_debug("create pit timer, interval is %llu nsec\n", interval); |
7837699f SY |
340 | |
341 | /* TODO The new value only affected after the retriggered */ | |
26ef1924 | 342 | hrtimer_cancel(&ps->timer); |
b6ddf05f | 343 | flush_kthread_work(&ps->pit->expired); |
26ef1924 | 344 | ps->period = interval; |
d3c7b77d MT |
345 | ps->is_periodic = is_period; |
346 | ||
26ef1924 AK |
347 | ps->timer.function = pit_timer_fn; |
348 | ps->kvm = ps->pit->kvm; | |
d3c7b77d | 349 | |
26ef1924 | 350 | atomic_set(&ps->pending, 0); |
3cf57fed | 351 | ps->irq_ack = 1; |
7837699f | 352 | |
9ed96e87 MT |
353 | /* |
354 | * Do not allow the guest to program periodic timers with small | |
355 | * interval, since the hrtimers are not throttled by the host | |
356 | * scheduler. | |
357 | */ | |
358 | if (ps->is_periodic) { | |
359 | s64 min_period = min_timer_period_us * 1000LL; | |
360 | ||
361 | if (ps->period < min_period) { | |
362 | pr_info_ratelimited( | |
363 | "kvm: requested %lld ns " | |
364 | "i8254 timer period limited to %lld ns\n", | |
365 | ps->period, min_period); | |
366 | ps->period = min_period; | |
367 | } | |
368 | } | |
369 | ||
26ef1924 | 370 | hrtimer_start(&ps->timer, ktime_add_ns(ktime_get(), interval), |
7837699f SY |
371 | HRTIMER_MODE_ABS); |
372 | } | |
373 | ||
374 | static void pit_load_count(struct kvm *kvm, int channel, u32 val) | |
375 | { | |
376 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
377 | ||
378 | WARN_ON(!mutex_is_locked(&ps->lock)); | |
379 | ||
a78d9626 | 380 | pr_debug("load_count val is %d, channel is %d\n", val, channel); |
7837699f SY |
381 | |
382 | /* | |
ede2ccc5 MT |
383 | * The largest possible initial count is 0; this is equivalent |
384 | * to 216 for binary counting and 104 for BCD counting. | |
7837699f SY |
385 | */ |
386 | if (val == 0) | |
387 | val = 0x10000; | |
388 | ||
7837699f SY |
389 | ps->channels[channel].count = val; |
390 | ||
fd668423 MT |
391 | if (channel != 0) { |
392 | ps->channels[channel].count_load_time = ktime_get(); | |
7837699f | 393 | return; |
fd668423 | 394 | } |
7837699f SY |
395 | |
396 | /* Two types of timer | |
397 | * mode 1 is one shot, mode 2 is period, otherwise del timer */ | |
398 | switch (ps->channels[0].mode) { | |
ede2ccc5 | 399 | case 0: |
7837699f | 400 | case 1: |
ece15bab MT |
401 | /* FIXME: enhance mode 4 precision */ |
402 | case 4: | |
a647795e | 403 | create_pit_timer(kvm, val, 0); |
7837699f SY |
404 | break; |
405 | case 2: | |
f6975545 | 406 | case 3: |
a647795e | 407 | create_pit_timer(kvm, val, 1); |
7837699f SY |
408 | break; |
409 | default: | |
33572ac0 | 410 | destroy_pit_timer(kvm->arch.vpit); |
7837699f SY |
411 | } |
412 | } | |
413 | ||
e9f42757 | 414 | void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start) |
e0f63cb9 | 415 | { |
e9f42757 BK |
416 | u8 saved_mode; |
417 | if (hpet_legacy_start) { | |
418 | /* save existing mode for later reenablement */ | |
419 | saved_mode = kvm->arch.vpit->pit_state.channels[0].mode; | |
420 | kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */ | |
421 | pit_load_count(kvm, channel, val); | |
422 | kvm->arch.vpit->pit_state.channels[0].mode = saved_mode; | |
423 | } else { | |
424 | pit_load_count(kvm, channel, val); | |
425 | } | |
e0f63cb9 SY |
426 | } |
427 | ||
d76685c4 GH |
428 | static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev) |
429 | { | |
430 | return container_of(dev, struct kvm_pit, dev); | |
431 | } | |
432 | ||
433 | static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev) | |
434 | { | |
435 | return container_of(dev, struct kvm_pit, speaker_dev); | |
436 | } | |
437 | ||
bda9020e MT |
438 | static inline int pit_in_range(gpa_t addr) |
439 | { | |
440 | return ((addr >= KVM_PIT_BASE_ADDRESS) && | |
441 | (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); | |
442 | } | |
443 | ||
444 | static int pit_ioport_write(struct kvm_io_device *this, | |
445 | gpa_t addr, int len, const void *data) | |
7837699f | 446 | { |
d76685c4 | 447 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
448 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
449 | struct kvm *kvm = pit->kvm; | |
450 | int channel, access; | |
451 | struct kvm_kpit_channel_state *s; | |
452 | u32 val = *(u32 *) data; | |
bda9020e MT |
453 | if (!pit_in_range(addr)) |
454 | return -EOPNOTSUPP; | |
7837699f SY |
455 | |
456 | val &= 0xff; | |
457 | addr &= KVM_PIT_CHANNEL_MASK; | |
458 | ||
459 | mutex_lock(&pit_state->lock); | |
460 | ||
461 | if (val != 0) | |
a78d9626 JP |
462 | pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n", |
463 | (unsigned int)addr, len, val); | |
7837699f SY |
464 | |
465 | if (addr == 3) { | |
466 | channel = val >> 6; | |
467 | if (channel == 3) { | |
468 | /* Read-Back Command. */ | |
469 | for (channel = 0; channel < 3; channel++) { | |
470 | s = &pit_state->channels[channel]; | |
471 | if (val & (2 << channel)) { | |
472 | if (!(val & 0x20)) | |
473 | pit_latch_count(kvm, channel); | |
474 | if (!(val & 0x10)) | |
475 | pit_latch_status(kvm, channel); | |
476 | } | |
477 | } | |
478 | } else { | |
479 | /* Select Counter <channel>. */ | |
480 | s = &pit_state->channels[channel]; | |
481 | access = (val >> 4) & KVM_PIT_CHANNEL_MASK; | |
482 | if (access == 0) { | |
483 | pit_latch_count(kvm, channel); | |
484 | } else { | |
485 | s->rw_mode = access; | |
486 | s->read_state = access; | |
487 | s->write_state = access; | |
488 | s->mode = (val >> 1) & 7; | |
489 | if (s->mode > 5) | |
490 | s->mode -= 4; | |
491 | s->bcd = val & 1; | |
492 | } | |
493 | } | |
494 | } else { | |
495 | /* Write Count. */ | |
496 | s = &pit_state->channels[addr]; | |
497 | switch (s->write_state) { | |
498 | default: | |
499 | case RW_STATE_LSB: | |
500 | pit_load_count(kvm, addr, val); | |
501 | break; | |
502 | case RW_STATE_MSB: | |
503 | pit_load_count(kvm, addr, val << 8); | |
504 | break; | |
505 | case RW_STATE_WORD0: | |
506 | s->write_latch = val; | |
507 | s->write_state = RW_STATE_WORD1; | |
508 | break; | |
509 | case RW_STATE_WORD1: | |
510 | pit_load_count(kvm, addr, s->write_latch | (val << 8)); | |
511 | s->write_state = RW_STATE_WORD0; | |
512 | break; | |
513 | } | |
514 | } | |
515 | ||
516 | mutex_unlock(&pit_state->lock); | |
bda9020e | 517 | return 0; |
7837699f SY |
518 | } |
519 | ||
bda9020e MT |
520 | static int pit_ioport_read(struct kvm_io_device *this, |
521 | gpa_t addr, int len, void *data) | |
7837699f | 522 | { |
d76685c4 | 523 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
524 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
525 | struct kvm *kvm = pit->kvm; | |
526 | int ret, count; | |
527 | struct kvm_kpit_channel_state *s; | |
bda9020e MT |
528 | if (!pit_in_range(addr)) |
529 | return -EOPNOTSUPP; | |
7837699f SY |
530 | |
531 | addr &= KVM_PIT_CHANNEL_MASK; | |
ee73f656 MT |
532 | if (addr == 3) |
533 | return 0; | |
534 | ||
7837699f SY |
535 | s = &pit_state->channels[addr]; |
536 | ||
537 | mutex_lock(&pit_state->lock); | |
538 | ||
539 | if (s->status_latched) { | |
540 | s->status_latched = 0; | |
541 | ret = s->status; | |
542 | } else if (s->count_latched) { | |
543 | switch (s->count_latched) { | |
544 | default: | |
545 | case RW_STATE_LSB: | |
546 | ret = s->latched_count & 0xff; | |
547 | s->count_latched = 0; | |
548 | break; | |
549 | case RW_STATE_MSB: | |
550 | ret = s->latched_count >> 8; | |
551 | s->count_latched = 0; | |
552 | break; | |
553 | case RW_STATE_WORD0: | |
554 | ret = s->latched_count & 0xff; | |
555 | s->count_latched = RW_STATE_MSB; | |
556 | break; | |
557 | } | |
558 | } else { | |
559 | switch (s->read_state) { | |
560 | default: | |
561 | case RW_STATE_LSB: | |
562 | count = pit_get_count(kvm, addr); | |
563 | ret = count & 0xff; | |
564 | break; | |
565 | case RW_STATE_MSB: | |
566 | count = pit_get_count(kvm, addr); | |
567 | ret = (count >> 8) & 0xff; | |
568 | break; | |
569 | case RW_STATE_WORD0: | |
570 | count = pit_get_count(kvm, addr); | |
571 | ret = count & 0xff; | |
572 | s->read_state = RW_STATE_WORD1; | |
573 | break; | |
574 | case RW_STATE_WORD1: | |
575 | count = pit_get_count(kvm, addr); | |
576 | ret = (count >> 8) & 0xff; | |
577 | s->read_state = RW_STATE_WORD0; | |
578 | break; | |
579 | } | |
580 | } | |
581 | ||
582 | if (len > sizeof(ret)) | |
583 | len = sizeof(ret); | |
584 | memcpy(data, (char *)&ret, len); | |
585 | ||
586 | mutex_unlock(&pit_state->lock); | |
bda9020e | 587 | return 0; |
7837699f SY |
588 | } |
589 | ||
bda9020e MT |
590 | static int speaker_ioport_write(struct kvm_io_device *this, |
591 | gpa_t addr, int len, const void *data) | |
7837699f | 592 | { |
d76685c4 | 593 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
594 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
595 | struct kvm *kvm = pit->kvm; | |
596 | u32 val = *(u32 *) data; | |
bda9020e MT |
597 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
598 | return -EOPNOTSUPP; | |
7837699f SY |
599 | |
600 | mutex_lock(&pit_state->lock); | |
601 | pit_state->speaker_data_on = (val >> 1) & 1; | |
602 | pit_set_gate(kvm, 2, val & 1); | |
603 | mutex_unlock(&pit_state->lock); | |
bda9020e | 604 | return 0; |
7837699f SY |
605 | } |
606 | ||
bda9020e MT |
607 | static int speaker_ioport_read(struct kvm_io_device *this, |
608 | gpa_t addr, int len, void *data) | |
7837699f | 609 | { |
d76685c4 | 610 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
611 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
612 | struct kvm *kvm = pit->kvm; | |
613 | unsigned int refresh_clock; | |
614 | int ret; | |
bda9020e MT |
615 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
616 | return -EOPNOTSUPP; | |
7837699f SY |
617 | |
618 | /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ | |
619 | refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; | |
620 | ||
621 | mutex_lock(&pit_state->lock); | |
622 | ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) | | |
623 | (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4)); | |
624 | if (len > sizeof(ret)) | |
625 | len = sizeof(ret); | |
626 | memcpy(data, (char *)&ret, len); | |
627 | mutex_unlock(&pit_state->lock); | |
bda9020e | 628 | return 0; |
7837699f SY |
629 | } |
630 | ||
308b0f23 | 631 | void kvm_pit_reset(struct kvm_pit *pit) |
7837699f SY |
632 | { |
633 | int i; | |
308b0f23 SY |
634 | struct kvm_kpit_channel_state *c; |
635 | ||
636 | mutex_lock(&pit->pit_state.lock); | |
e9f42757 | 637 | pit->pit_state.flags = 0; |
308b0f23 SY |
638 | for (i = 0; i < 3; i++) { |
639 | c = &pit->pit_state.channels[i]; | |
640 | c->mode = 0xff; | |
641 | c->gate = (i != 2); | |
642 | pit_load_count(pit->kvm, i, 0); | |
643 | } | |
644 | mutex_unlock(&pit->pit_state.lock); | |
645 | ||
26ef1924 | 646 | atomic_set(&pit->pit_state.pending, 0); |
3cf57fed | 647 | pit->pit_state.irq_ack = 1; |
308b0f23 SY |
648 | } |
649 | ||
4780c659 AK |
650 | static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask) |
651 | { | |
652 | struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier); | |
653 | ||
654 | if (!mask) { | |
26ef1924 | 655 | atomic_set(&pit->pit_state.pending, 0); |
4780c659 AK |
656 | pit->pit_state.irq_ack = 1; |
657 | } | |
658 | } | |
659 | ||
d76685c4 GH |
660 | static const struct kvm_io_device_ops pit_dev_ops = { |
661 | .read = pit_ioport_read, | |
662 | .write = pit_ioport_write, | |
d76685c4 GH |
663 | }; |
664 | ||
665 | static const struct kvm_io_device_ops speaker_dev_ops = { | |
666 | .read = speaker_ioport_read, | |
667 | .write = speaker_ioport_write, | |
d76685c4 GH |
668 | }; |
669 | ||
79fac95e | 670 | /* Caller must hold slots_lock */ |
c5ff41ce | 671 | struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags) |
308b0f23 | 672 | { |
7837699f SY |
673 | struct kvm_pit *pit; |
674 | struct kvm_kpit_state *pit_state; | |
b6ddf05f JK |
675 | struct pid *pid; |
676 | pid_t pid_nr; | |
090b7aff | 677 | int ret; |
7837699f SY |
678 | |
679 | pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); | |
680 | if (!pit) | |
681 | return NULL; | |
682 | ||
5550af4d | 683 | pit->irq_source_id = kvm_request_irq_source_id(kvm); |
e17d1dc0 AK |
684 | if (pit->irq_source_id < 0) { |
685 | kfree(pit); | |
5550af4d | 686 | return NULL; |
e17d1dc0 | 687 | } |
5550af4d | 688 | |
7837699f SY |
689 | mutex_init(&pit->pit_state.lock); |
690 | mutex_lock(&pit->pit_state.lock); | |
33572ac0 CL |
691 | spin_lock_init(&pit->pit_state.inject_lock); |
692 | ||
b6ddf05f JK |
693 | pid = get_pid(task_tgid(current)); |
694 | pid_nr = pid_vnr(pid); | |
695 | put_pid(pid); | |
696 | ||
697 | init_kthread_worker(&pit->worker); | |
698 | pit->worker_task = kthread_run(kthread_worker_fn, &pit->worker, | |
699 | "kvm-pit/%d", pid_nr); | |
700 | if (IS_ERR(pit->worker_task)) { | |
673813e8 | 701 | mutex_unlock(&pit->pit_state.lock); |
6b5d7a9f | 702 | kvm_free_irq_source_id(kvm, pit->irq_source_id); |
33572ac0 CL |
703 | kfree(pit); |
704 | return NULL; | |
705 | } | |
b6ddf05f | 706 | init_kthread_work(&pit->expired, pit_do_work); |
7837699f | 707 | |
7837699f SY |
708 | kvm->arch.vpit = pit; |
709 | pit->kvm = kvm; | |
710 | ||
711 | pit_state = &pit->pit_state; | |
712 | pit_state->pit = pit; | |
26ef1924 | 713 | hrtimer_init(&pit_state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); |
3cf57fed MT |
714 | pit_state->irq_ack_notifier.gsi = 0; |
715 | pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq; | |
716 | kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
26ef1924 | 717 | pit_state->reinject = true; |
7837699f SY |
718 | mutex_unlock(&pit->pit_state.lock); |
719 | ||
308b0f23 | 720 | kvm_pit_reset(pit); |
7837699f | 721 | |
4780c659 AK |
722 | pit->mask_notifier.func = pit_mask_notifer; |
723 | kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier); | |
724 | ||
6b66ac1a | 725 | kvm_iodevice_init(&pit->dev, &pit_dev_ops); |
743eeb0b SL |
726 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS, |
727 | KVM_PIT_MEM_LENGTH, &pit->dev); | |
090b7aff GH |
728 | if (ret < 0) |
729 | goto fail; | |
6b66ac1a GH |
730 | |
731 | if (flags & KVM_PIT_SPEAKER_DUMMY) { | |
732 | kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops); | |
e93f8a0f | 733 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, |
743eeb0b SL |
734 | KVM_SPEAKER_BASE_ADDRESS, 4, |
735 | &pit->speaker_dev); | |
090b7aff GH |
736 | if (ret < 0) |
737 | goto fail_unregister; | |
6b66ac1a GH |
738 | } |
739 | ||
7837699f | 740 | return pit; |
090b7aff GH |
741 | |
742 | fail_unregister: | |
e93f8a0f | 743 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev); |
090b7aff GH |
744 | |
745 | fail: | |
d225f53b WY |
746 | kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier); |
747 | kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
748 | kvm_free_irq_source_id(kvm, pit->irq_source_id); | |
b6ddf05f | 749 | kthread_stop(pit->worker_task); |
090b7aff GH |
750 | kfree(pit); |
751 | return NULL; | |
7837699f SY |
752 | } |
753 | ||
754 | void kvm_free_pit(struct kvm *kvm) | |
755 | { | |
756 | struct hrtimer *timer; | |
757 | ||
758 | if (kvm->arch.vpit) { | |
aea924f6 XG |
759 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev); |
760 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, | |
761 | &kvm->arch.vpit->speaker_dev); | |
4780c659 AK |
762 | kvm_unregister_irq_mask_notifier(kvm, 0, |
763 | &kvm->arch.vpit->mask_notifier); | |
84fde248 GN |
764 | kvm_unregister_irq_ack_notifier(kvm, |
765 | &kvm->arch.vpit->pit_state.irq_ack_notifier); | |
7837699f | 766 | mutex_lock(&kvm->arch.vpit->pit_state.lock); |
26ef1924 | 767 | timer = &kvm->arch.vpit->pit_state.timer; |
7837699f | 768 | hrtimer_cancel(timer); |
b6ddf05f JK |
769 | flush_kthread_work(&kvm->arch.vpit->expired); |
770 | kthread_stop(kvm->arch.vpit->worker_task); | |
5550af4d | 771 | kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id); |
7837699f SY |
772 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); |
773 | kfree(kvm->arch.vpit); | |
774 | } | |
775 | } |