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Commit | Line | Data |
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7837699f SY |
1 | /* |
2 | * 8253/8254 interval timer emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2006 Intel Corporation | |
6 | * Copyright (c) 2007 Keir Fraser, XenSource Inc | |
7 | * Copyright (c) 2008 Intel Corporation | |
9611c187 | 8 | * Copyright 2009 Red Hat, Inc. and/or its affiliates. |
7837699f SY |
9 | * |
10 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
11 | * of this software and associated documentation files (the "Software"), to deal | |
12 | * in the Software without restriction, including without limitation the rights | |
13 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
14 | * copies of the Software, and to permit persons to whom the Software is | |
15 | * furnished to do so, subject to the following conditions: | |
16 | * | |
17 | * The above copyright notice and this permission notice shall be included in | |
18 | * all copies or substantial portions of the Software. | |
19 | * | |
20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
21 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
23 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
24 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
25 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
26 | * THE SOFTWARE. | |
27 | * | |
28 | * Authors: | |
29 | * Sheng Yang <sheng.yang@intel.com> | |
30 | * Based on QEMU and Xen. | |
31 | */ | |
32 | ||
a78d9626 JP |
33 | #define pr_fmt(fmt) "pit: " fmt |
34 | ||
7837699f | 35 | #include <linux/kvm_host.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
7837699f | 37 | |
49df6397 | 38 | #include "ioapic.h" |
7837699f SY |
39 | #include "irq.h" |
40 | #include "i8254.h" | |
9ed96e87 | 41 | #include "x86.h" |
7837699f SY |
42 | |
43 | #ifndef CONFIG_X86_64 | |
6f6d6a1a | 44 | #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) |
7837699f SY |
45 | #else |
46 | #define mod_64(x, y) ((x) % (y)) | |
47 | #endif | |
48 | ||
49 | #define RW_STATE_LSB 1 | |
50 | #define RW_STATE_MSB 2 | |
51 | #define RW_STATE_WORD0 3 | |
52 | #define RW_STATE_WORD1 4 | |
53 | ||
54 | /* Compute with 96 bit intermediate result: (a*b)/c */ | |
55 | static u64 muldiv64(u64 a, u32 b, u32 c) | |
56 | { | |
57 | union { | |
58 | u64 ll; | |
59 | struct { | |
60 | u32 low, high; | |
61 | } l; | |
62 | } u, res; | |
63 | u64 rl, rh; | |
64 | ||
65 | u.ll = a; | |
66 | rl = (u64)u.l.low * (u64)b; | |
67 | rh = (u64)u.l.high * (u64)b; | |
68 | rh += (rl >> 32); | |
6f6d6a1a RZ |
69 | res.l.high = div64_u64(rh, c); |
70 | res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); | |
7837699f SY |
71 | return res.ll; |
72 | } | |
73 | ||
09edea72 | 74 | static void pit_set_gate(struct kvm_pit *pit, int channel, u32 val) |
7837699f | 75 | { |
09edea72 | 76 | struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; |
7837699f | 77 | |
7837699f SY |
78 | switch (c->mode) { |
79 | default: | |
80 | case 0: | |
81 | case 4: | |
82 | /* XXX: just disable/enable counting */ | |
83 | break; | |
84 | case 1: | |
85 | case 2: | |
86 | case 3: | |
87 | case 5: | |
88 | /* Restart counting on rising edge. */ | |
89 | if (c->gate < val) | |
90 | c->count_load_time = ktime_get(); | |
91 | break; | |
92 | } | |
93 | ||
94 | c->gate = val; | |
95 | } | |
96 | ||
09edea72 | 97 | static int pit_get_gate(struct kvm_pit *pit, int channel) |
7837699f | 98 | { |
09edea72 | 99 | return pit->pit_state.channels[channel].gate; |
7837699f SY |
100 | } |
101 | ||
09edea72 | 102 | static s64 __kpit_elapsed(struct kvm_pit *pit) |
fd668423 MT |
103 | { |
104 | s64 elapsed; | |
105 | ktime_t remaining; | |
09edea72 | 106 | struct kvm_kpit_state *ps = &pit->pit_state; |
fd668423 | 107 | |
26ef1924 | 108 | if (!ps->period) |
0ff77873 MT |
109 | return 0; |
110 | ||
ede2ccc5 MT |
111 | /* |
112 | * The Counter does not stop when it reaches zero. In | |
113 | * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to | |
114 | * the highest count, either FFFF hex for binary counting | |
115 | * or 9999 for BCD counting, and continues counting. | |
116 | * Modes 2 and 3 are periodic; the Counter reloads | |
117 | * itself with the initial count and continues counting | |
118 | * from there. | |
119 | */ | |
26ef1924 AK |
120 | remaining = hrtimer_get_remaining(&ps->timer); |
121 | elapsed = ps->period - ktime_to_ns(remaining); | |
fd668423 MT |
122 | |
123 | return elapsed; | |
124 | } | |
125 | ||
09edea72 | 126 | static s64 kpit_elapsed(struct kvm_pit *pit, struct kvm_kpit_channel_state *c, |
fd668423 MT |
127 | int channel) |
128 | { | |
129 | if (channel == 0) | |
09edea72 | 130 | return __kpit_elapsed(pit); |
fd668423 MT |
131 | |
132 | return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
133 | } | |
134 | ||
09edea72 | 135 | static int pit_get_count(struct kvm_pit *pit, int channel) |
7837699f | 136 | { |
09edea72 | 137 | struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; |
7837699f SY |
138 | s64 d, t; |
139 | int counter; | |
140 | ||
09edea72 | 141 | t = kpit_elapsed(pit, c, channel); |
7837699f SY |
142 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
143 | ||
144 | switch (c->mode) { | |
145 | case 0: | |
146 | case 1: | |
147 | case 4: | |
148 | case 5: | |
149 | counter = (c->count - d) & 0xffff; | |
150 | break; | |
151 | case 3: | |
152 | /* XXX: may be incorrect for odd counts */ | |
153 | counter = c->count - (mod_64((2 * d), c->count)); | |
154 | break; | |
155 | default: | |
156 | counter = c->count - mod_64(d, c->count); | |
157 | break; | |
158 | } | |
159 | return counter; | |
160 | } | |
161 | ||
09edea72 | 162 | static int pit_get_out(struct kvm_pit *pit, int channel) |
7837699f | 163 | { |
09edea72 | 164 | struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; |
7837699f SY |
165 | s64 d, t; |
166 | int out; | |
167 | ||
09edea72 | 168 | t = kpit_elapsed(pit, c, channel); |
7837699f SY |
169 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
170 | ||
171 | switch (c->mode) { | |
172 | default: | |
173 | case 0: | |
174 | out = (d >= c->count); | |
175 | break; | |
176 | case 1: | |
177 | out = (d < c->count); | |
178 | break; | |
179 | case 2: | |
180 | out = ((mod_64(d, c->count) == 0) && (d != 0)); | |
181 | break; | |
182 | case 3: | |
183 | out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); | |
184 | break; | |
185 | case 4: | |
186 | case 5: | |
187 | out = (d == c->count); | |
188 | break; | |
189 | } | |
190 | ||
191 | return out; | |
192 | } | |
193 | ||
09edea72 | 194 | static void pit_latch_count(struct kvm_pit *pit, int channel) |
7837699f | 195 | { |
09edea72 | 196 | struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; |
7837699f | 197 | |
7837699f | 198 | if (!c->count_latched) { |
09edea72 | 199 | c->latched_count = pit_get_count(pit, channel); |
7837699f SY |
200 | c->count_latched = c->rw_mode; |
201 | } | |
202 | } | |
203 | ||
09edea72 | 204 | static void pit_latch_status(struct kvm_pit *pit, int channel) |
7837699f | 205 | { |
09edea72 | 206 | struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; |
7837699f | 207 | |
7837699f SY |
208 | if (!c->status_latched) { |
209 | /* TODO: Return NULL COUNT (bit 6). */ | |
09edea72 | 210 | c->status = ((pit_get_out(pit, channel) << 7) | |
7837699f SY |
211 | (c->rw_mode << 4) | |
212 | (c->mode << 1) | | |
213 | c->bcd); | |
214 | c->status_latched = 1; | |
215 | } | |
216 | } | |
217 | ||
a3e13115 RK |
218 | static inline struct kvm_pit *pit_state_to_pit(struct kvm_kpit_state *ps) |
219 | { | |
220 | return container_of(ps, struct kvm_pit, pit_state); | |
221 | } | |
222 | ||
ee032c99 | 223 | static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian) |
3cf57fed MT |
224 | { |
225 | struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, | |
226 | irq_ack_notifier); | |
a3e13115 | 227 | struct kvm_pit *pit = pit_state_to_pit(ps); |
33572ac0 | 228 | |
ddf54503 RK |
229 | atomic_set(&ps->irq_ack, 1); |
230 | /* irq_ack should be set before pending is read. Order accesses with | |
231 | * inc(pending) in pit_timer_fn and xchg(irq_ack, 0) in pit_do_work. | |
232 | */ | |
233 | smp_mb(); | |
71474e2f | 234 | if (atomic_dec_if_positive(&ps->pending) > 0) |
a3e13115 | 235 | queue_kthread_work(&pit->worker, &pit->expired); |
3cf57fed MT |
236 | } |
237 | ||
2f599714 MT |
238 | void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu) |
239 | { | |
240 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
241 | struct hrtimer *timer; | |
242 | ||
c5af89b6 | 243 | if (!kvm_vcpu_is_bsp(vcpu) || !pit) |
2f599714 MT |
244 | return; |
245 | ||
26ef1924 | 246 | timer = &pit->pit_state.timer; |
2febc839 | 247 | mutex_lock(&pit->pit_state.lock); |
2f599714 | 248 | if (hrtimer_cancel(timer)) |
beb20d52 | 249 | hrtimer_start_expires(timer, HRTIMER_MODE_ABS); |
2febc839 | 250 | mutex_unlock(&pit->pit_state.lock); |
2f599714 MT |
251 | } |
252 | ||
33572ac0 | 253 | static void destroy_pit_timer(struct kvm_pit *pit) |
7837699f | 254 | { |
26ef1924 | 255 | hrtimer_cancel(&pit->pit_state.timer); |
b6ddf05f | 256 | flush_kthread_work(&pit->expired); |
7837699f SY |
257 | } |
258 | ||
b6ddf05f | 259 | static void pit_do_work(struct kthread_work *work) |
33572ac0 CL |
260 | { |
261 | struct kvm_pit *pit = container_of(work, struct kvm_pit, expired); | |
262 | struct kvm *kvm = pit->kvm; | |
263 | struct kvm_vcpu *vcpu; | |
264 | int i; | |
265 | struct kvm_kpit_state *ps = &pit->pit_state; | |
33572ac0 | 266 | |
a0aace5a | 267 | if (atomic_read(&ps->reinject) && !atomic_xchg(&ps->irq_ack, 0)) |
ddf54503 RK |
268 | return; |
269 | ||
4a2095df RK |
270 | kvm_set_irq(kvm, pit->irq_source_id, 0, 1, false); |
271 | kvm_set_irq(kvm, pit->irq_source_id, 0, 0, false); | |
ddf54503 RK |
272 | |
273 | /* | |
274 | * Provides NMI watchdog support via Virtual Wire mode. | |
275 | * The route is: PIT -> LVT0 in NMI mode. | |
276 | * | |
277 | * Note: Our Virtual Wire implementation does not follow | |
278 | * the MP specification. We propagate a PIT interrupt to all | |
279 | * VCPUs and only when LVT0 is in NMI mode. The interrupt can | |
280 | * also be simultaneously delivered through PIC and IOAPIC. | |
33572ac0 | 281 | */ |
ddf54503 RK |
282 | if (atomic_read(&kvm->arch.vapics_in_nmi_mode) > 0) |
283 | kvm_for_each_vcpu(i, vcpu, kvm) | |
284 | kvm_apic_nmi_wd_deliver(vcpu); | |
33572ac0 CL |
285 | } |
286 | ||
287 | static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) | |
288 | { | |
26ef1924 | 289 | struct kvm_kpit_state *ps = container_of(data, struct kvm_kpit_state, timer); |
a3e13115 | 290 | struct kvm_pit *pt = pit_state_to_pit(ps); |
33572ac0 | 291 | |
a0aace5a | 292 | if (atomic_read(&ps->reinject)) |
26ef1924 | 293 | atomic_inc(&ps->pending); |
7dd0fdff RK |
294 | |
295 | queue_kthread_work(&pt->worker, &pt->expired); | |
33572ac0 | 296 | |
26ef1924 AK |
297 | if (ps->is_periodic) { |
298 | hrtimer_add_expires_ns(&ps->timer, ps->period); | |
33572ac0 CL |
299 | return HRTIMER_RESTART; |
300 | } else | |
301 | return HRTIMER_NORESTART; | |
302 | } | |
303 | ||
fd700a00 RK |
304 | static inline void kvm_pit_reset_reinject(struct kvm_pit *pit) |
305 | { | |
306 | atomic_set(&pit->pit_state.pending, 0); | |
ddf54503 | 307 | atomic_set(&pit->pit_state.irq_ack, 1); |
fd700a00 RK |
308 | } |
309 | ||
71474e2f RK |
310 | void kvm_pit_set_reinject(struct kvm_pit *pit, bool reinject) |
311 | { | |
312 | struct kvm_kpit_state *ps = &pit->pit_state; | |
313 | struct kvm *kvm = pit->kvm; | |
314 | ||
a0aace5a | 315 | if (atomic_read(&ps->reinject) == reinject) |
71474e2f RK |
316 | return; |
317 | ||
318 | if (reinject) { | |
319 | /* The initial state is preserved while ps->reinject == 0. */ | |
320 | kvm_pit_reset_reinject(pit); | |
321 | kvm_register_irq_ack_notifier(kvm, &ps->irq_ack_notifier); | |
322 | kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier); | |
323 | } else { | |
324 | kvm_unregister_irq_ack_notifier(kvm, &ps->irq_ack_notifier); | |
325 | kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier); | |
326 | } | |
327 | ||
a0aace5a | 328 | atomic_set(&ps->reinject, reinject); |
71474e2f RK |
329 | } |
330 | ||
09edea72 | 331 | static void create_pit_timer(struct kvm_pit *pit, u32 val, int is_period) |
7837699f | 332 | { |
09edea72 RK |
333 | struct kvm_kpit_state *ps = &pit->pit_state; |
334 | struct kvm *kvm = pit->kvm; | |
7837699f SY |
335 | s64 interval; |
336 | ||
49df6397 SR |
337 | if (!ioapic_in_kernel(kvm) || |
338 | ps->flags & KVM_PIT_FLAGS_HPET_LEGACY) | |
0924ab2c JK |
339 | return; |
340 | ||
7837699f SY |
341 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); |
342 | ||
a78d9626 | 343 | pr_debug("create pit timer, interval is %llu nsec\n", interval); |
7837699f SY |
344 | |
345 | /* TODO The new value only affected after the retriggered */ | |
26ef1924 | 346 | hrtimer_cancel(&ps->timer); |
a3e13115 | 347 | flush_kthread_work(&pit->expired); |
26ef1924 | 348 | ps->period = interval; |
d3c7b77d MT |
349 | ps->is_periodic = is_period; |
350 | ||
09edea72 | 351 | kvm_pit_reset_reinject(pit); |
7837699f | 352 | |
9ed96e87 MT |
353 | /* |
354 | * Do not allow the guest to program periodic timers with small | |
355 | * interval, since the hrtimers are not throttled by the host | |
356 | * scheduler. | |
357 | */ | |
358 | if (ps->is_periodic) { | |
359 | s64 min_period = min_timer_period_us * 1000LL; | |
360 | ||
361 | if (ps->period < min_period) { | |
362 | pr_info_ratelimited( | |
363 | "kvm: requested %lld ns " | |
364 | "i8254 timer period limited to %lld ns\n", | |
365 | ps->period, min_period); | |
366 | ps->period = min_period; | |
367 | } | |
368 | } | |
369 | ||
26ef1924 | 370 | hrtimer_start(&ps->timer, ktime_add_ns(ktime_get(), interval), |
7837699f SY |
371 | HRTIMER_MODE_ABS); |
372 | } | |
373 | ||
09edea72 | 374 | static void pit_load_count(struct kvm_pit *pit, int channel, u32 val) |
7837699f | 375 | { |
09edea72 | 376 | struct kvm_kpit_state *ps = &pit->pit_state; |
7837699f | 377 | |
a78d9626 | 378 | pr_debug("load_count val is %d, channel is %d\n", val, channel); |
7837699f SY |
379 | |
380 | /* | |
ede2ccc5 MT |
381 | * The largest possible initial count is 0; this is equivalent |
382 | * to 216 for binary counting and 104 for BCD counting. | |
7837699f SY |
383 | */ |
384 | if (val == 0) | |
385 | val = 0x10000; | |
386 | ||
7837699f SY |
387 | ps->channels[channel].count = val; |
388 | ||
fd668423 MT |
389 | if (channel != 0) { |
390 | ps->channels[channel].count_load_time = ktime_get(); | |
7837699f | 391 | return; |
fd668423 | 392 | } |
7837699f SY |
393 | |
394 | /* Two types of timer | |
395 | * mode 1 is one shot, mode 2 is period, otherwise del timer */ | |
396 | switch (ps->channels[0].mode) { | |
ede2ccc5 | 397 | case 0: |
7837699f | 398 | case 1: |
ece15bab MT |
399 | /* FIXME: enhance mode 4 precision */ |
400 | case 4: | |
09edea72 | 401 | create_pit_timer(pit, val, 0); |
7837699f SY |
402 | break; |
403 | case 2: | |
f6975545 | 404 | case 3: |
09edea72 | 405 | create_pit_timer(pit, val, 1); |
7837699f SY |
406 | break; |
407 | default: | |
09edea72 | 408 | destroy_pit_timer(pit); |
7837699f SY |
409 | } |
410 | } | |
411 | ||
09edea72 RK |
412 | void kvm_pit_load_count(struct kvm_pit *pit, int channel, u32 val, |
413 | int hpet_legacy_start) | |
e0f63cb9 | 414 | { |
e9f42757 | 415 | u8 saved_mode; |
b69d920f | 416 | |
09edea72 | 417 | WARN_ON_ONCE(!mutex_is_locked(&pit->pit_state.lock)); |
b69d920f | 418 | |
e9f42757 BK |
419 | if (hpet_legacy_start) { |
420 | /* save existing mode for later reenablement */ | |
e5e57e7a | 421 | WARN_ON(channel != 0); |
09edea72 RK |
422 | saved_mode = pit->pit_state.channels[0].mode; |
423 | pit->pit_state.channels[0].mode = 0xff; /* disable timer */ | |
424 | pit_load_count(pit, channel, val); | |
425 | pit->pit_state.channels[0].mode = saved_mode; | |
e9f42757 | 426 | } else { |
09edea72 | 427 | pit_load_count(pit, channel, val); |
e9f42757 | 428 | } |
e0f63cb9 SY |
429 | } |
430 | ||
d76685c4 GH |
431 | static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev) |
432 | { | |
433 | return container_of(dev, struct kvm_pit, dev); | |
434 | } | |
435 | ||
436 | static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev) | |
437 | { | |
438 | return container_of(dev, struct kvm_pit, speaker_dev); | |
439 | } | |
440 | ||
bda9020e MT |
441 | static inline int pit_in_range(gpa_t addr) |
442 | { | |
443 | return ((addr >= KVM_PIT_BASE_ADDRESS) && | |
444 | (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); | |
445 | } | |
446 | ||
e32edf4f NN |
447 | static int pit_ioport_write(struct kvm_vcpu *vcpu, |
448 | struct kvm_io_device *this, | |
bda9020e | 449 | gpa_t addr, int len, const void *data) |
7837699f | 450 | { |
d76685c4 | 451 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f | 452 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
7837699f SY |
453 | int channel, access; |
454 | struct kvm_kpit_channel_state *s; | |
455 | u32 val = *(u32 *) data; | |
bda9020e MT |
456 | if (!pit_in_range(addr)) |
457 | return -EOPNOTSUPP; | |
7837699f SY |
458 | |
459 | val &= 0xff; | |
460 | addr &= KVM_PIT_CHANNEL_MASK; | |
461 | ||
462 | mutex_lock(&pit_state->lock); | |
463 | ||
464 | if (val != 0) | |
a78d9626 JP |
465 | pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n", |
466 | (unsigned int)addr, len, val); | |
7837699f SY |
467 | |
468 | if (addr == 3) { | |
469 | channel = val >> 6; | |
470 | if (channel == 3) { | |
471 | /* Read-Back Command. */ | |
472 | for (channel = 0; channel < 3; channel++) { | |
473 | s = &pit_state->channels[channel]; | |
474 | if (val & (2 << channel)) { | |
475 | if (!(val & 0x20)) | |
09edea72 | 476 | pit_latch_count(pit, channel); |
7837699f | 477 | if (!(val & 0x10)) |
09edea72 | 478 | pit_latch_status(pit, channel); |
7837699f SY |
479 | } |
480 | } | |
481 | } else { | |
482 | /* Select Counter <channel>. */ | |
483 | s = &pit_state->channels[channel]; | |
484 | access = (val >> 4) & KVM_PIT_CHANNEL_MASK; | |
485 | if (access == 0) { | |
09edea72 | 486 | pit_latch_count(pit, channel); |
7837699f SY |
487 | } else { |
488 | s->rw_mode = access; | |
489 | s->read_state = access; | |
490 | s->write_state = access; | |
491 | s->mode = (val >> 1) & 7; | |
492 | if (s->mode > 5) | |
493 | s->mode -= 4; | |
494 | s->bcd = val & 1; | |
495 | } | |
496 | } | |
497 | } else { | |
498 | /* Write Count. */ | |
499 | s = &pit_state->channels[addr]; | |
500 | switch (s->write_state) { | |
501 | default: | |
502 | case RW_STATE_LSB: | |
09edea72 | 503 | pit_load_count(pit, addr, val); |
7837699f SY |
504 | break; |
505 | case RW_STATE_MSB: | |
09edea72 | 506 | pit_load_count(pit, addr, val << 8); |
7837699f SY |
507 | break; |
508 | case RW_STATE_WORD0: | |
509 | s->write_latch = val; | |
510 | s->write_state = RW_STATE_WORD1; | |
511 | break; | |
512 | case RW_STATE_WORD1: | |
09edea72 | 513 | pit_load_count(pit, addr, s->write_latch | (val << 8)); |
7837699f SY |
514 | s->write_state = RW_STATE_WORD0; |
515 | break; | |
516 | } | |
517 | } | |
518 | ||
519 | mutex_unlock(&pit_state->lock); | |
bda9020e | 520 | return 0; |
7837699f SY |
521 | } |
522 | ||
e32edf4f NN |
523 | static int pit_ioport_read(struct kvm_vcpu *vcpu, |
524 | struct kvm_io_device *this, | |
bda9020e | 525 | gpa_t addr, int len, void *data) |
7837699f | 526 | { |
d76685c4 | 527 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f | 528 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
7837699f SY |
529 | int ret, count; |
530 | struct kvm_kpit_channel_state *s; | |
bda9020e MT |
531 | if (!pit_in_range(addr)) |
532 | return -EOPNOTSUPP; | |
7837699f SY |
533 | |
534 | addr &= KVM_PIT_CHANNEL_MASK; | |
ee73f656 MT |
535 | if (addr == 3) |
536 | return 0; | |
537 | ||
7837699f SY |
538 | s = &pit_state->channels[addr]; |
539 | ||
540 | mutex_lock(&pit_state->lock); | |
541 | ||
542 | if (s->status_latched) { | |
543 | s->status_latched = 0; | |
544 | ret = s->status; | |
545 | } else if (s->count_latched) { | |
546 | switch (s->count_latched) { | |
547 | default: | |
548 | case RW_STATE_LSB: | |
549 | ret = s->latched_count & 0xff; | |
550 | s->count_latched = 0; | |
551 | break; | |
552 | case RW_STATE_MSB: | |
553 | ret = s->latched_count >> 8; | |
554 | s->count_latched = 0; | |
555 | break; | |
556 | case RW_STATE_WORD0: | |
557 | ret = s->latched_count & 0xff; | |
558 | s->count_latched = RW_STATE_MSB; | |
559 | break; | |
560 | } | |
561 | } else { | |
562 | switch (s->read_state) { | |
563 | default: | |
564 | case RW_STATE_LSB: | |
09edea72 | 565 | count = pit_get_count(pit, addr); |
7837699f SY |
566 | ret = count & 0xff; |
567 | break; | |
568 | case RW_STATE_MSB: | |
09edea72 | 569 | count = pit_get_count(pit, addr); |
7837699f SY |
570 | ret = (count >> 8) & 0xff; |
571 | break; | |
572 | case RW_STATE_WORD0: | |
09edea72 | 573 | count = pit_get_count(pit, addr); |
7837699f SY |
574 | ret = count & 0xff; |
575 | s->read_state = RW_STATE_WORD1; | |
576 | break; | |
577 | case RW_STATE_WORD1: | |
09edea72 | 578 | count = pit_get_count(pit, addr); |
7837699f SY |
579 | ret = (count >> 8) & 0xff; |
580 | s->read_state = RW_STATE_WORD0; | |
581 | break; | |
582 | } | |
583 | } | |
584 | ||
585 | if (len > sizeof(ret)) | |
586 | len = sizeof(ret); | |
587 | memcpy(data, (char *)&ret, len); | |
588 | ||
589 | mutex_unlock(&pit_state->lock); | |
bda9020e | 590 | return 0; |
7837699f SY |
591 | } |
592 | ||
e32edf4f NN |
593 | static int speaker_ioport_write(struct kvm_vcpu *vcpu, |
594 | struct kvm_io_device *this, | |
bda9020e | 595 | gpa_t addr, int len, const void *data) |
7837699f | 596 | { |
d76685c4 | 597 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f | 598 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
7837699f | 599 | u32 val = *(u32 *) data; |
bda9020e MT |
600 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
601 | return -EOPNOTSUPP; | |
7837699f SY |
602 | |
603 | mutex_lock(&pit_state->lock); | |
604 | pit_state->speaker_data_on = (val >> 1) & 1; | |
09edea72 | 605 | pit_set_gate(pit, 2, val & 1); |
7837699f | 606 | mutex_unlock(&pit_state->lock); |
bda9020e | 607 | return 0; |
7837699f SY |
608 | } |
609 | ||
e32edf4f NN |
610 | static int speaker_ioport_read(struct kvm_vcpu *vcpu, |
611 | struct kvm_io_device *this, | |
612 | gpa_t addr, int len, void *data) | |
7837699f | 613 | { |
d76685c4 | 614 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f | 615 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
7837699f SY |
616 | unsigned int refresh_clock; |
617 | int ret; | |
bda9020e MT |
618 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
619 | return -EOPNOTSUPP; | |
7837699f SY |
620 | |
621 | /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ | |
622 | refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; | |
623 | ||
624 | mutex_lock(&pit_state->lock); | |
09edea72 RK |
625 | ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(pit, 2) | |
626 | (pit_get_out(pit, 2) << 5) | (refresh_clock << 4)); | |
7837699f SY |
627 | if (len > sizeof(ret)) |
628 | len = sizeof(ret); | |
629 | memcpy(data, (char *)&ret, len); | |
630 | mutex_unlock(&pit_state->lock); | |
bda9020e | 631 | return 0; |
7837699f SY |
632 | } |
633 | ||
b39c90b6 | 634 | static void kvm_pit_reset(struct kvm_pit *pit) |
7837699f SY |
635 | { |
636 | int i; | |
308b0f23 SY |
637 | struct kvm_kpit_channel_state *c; |
638 | ||
e9f42757 | 639 | pit->pit_state.flags = 0; |
308b0f23 SY |
640 | for (i = 0; i < 3; i++) { |
641 | c = &pit->pit_state.channels[i]; | |
642 | c->mode = 0xff; | |
643 | c->gate = (i != 2); | |
09edea72 | 644 | pit_load_count(pit, i, 0); |
308b0f23 | 645 | } |
308b0f23 | 646 | |
fd700a00 | 647 | kvm_pit_reset_reinject(pit); |
308b0f23 SY |
648 | } |
649 | ||
4780c659 AK |
650 | static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask) |
651 | { | |
652 | struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier); | |
653 | ||
fd700a00 RK |
654 | if (!mask) |
655 | kvm_pit_reset_reinject(pit); | |
4780c659 AK |
656 | } |
657 | ||
d76685c4 GH |
658 | static const struct kvm_io_device_ops pit_dev_ops = { |
659 | .read = pit_ioport_read, | |
660 | .write = pit_ioport_write, | |
d76685c4 GH |
661 | }; |
662 | ||
663 | static const struct kvm_io_device_ops speaker_dev_ops = { | |
664 | .read = speaker_ioport_read, | |
665 | .write = speaker_ioport_write, | |
d76685c4 GH |
666 | }; |
667 | ||
79fac95e | 668 | /* Caller must hold slots_lock */ |
c5ff41ce | 669 | struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags) |
308b0f23 | 670 | { |
7837699f SY |
671 | struct kvm_pit *pit; |
672 | struct kvm_kpit_state *pit_state; | |
b6ddf05f JK |
673 | struct pid *pid; |
674 | pid_t pid_nr; | |
090b7aff | 675 | int ret; |
7837699f SY |
676 | |
677 | pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); | |
678 | if (!pit) | |
679 | return NULL; | |
680 | ||
5550af4d | 681 | pit->irq_source_id = kvm_request_irq_source_id(kvm); |
10d24821 RK |
682 | if (pit->irq_source_id < 0) |
683 | goto fail_request; | |
5550af4d | 684 | |
7837699f | 685 | mutex_init(&pit->pit_state.lock); |
33572ac0 | 686 | |
b6ddf05f JK |
687 | pid = get_pid(task_tgid(current)); |
688 | pid_nr = pid_vnr(pid); | |
689 | put_pid(pid); | |
690 | ||
691 | init_kthread_worker(&pit->worker); | |
692 | pit->worker_task = kthread_run(kthread_worker_fn, &pit->worker, | |
693 | "kvm-pit/%d", pid_nr); | |
10d24821 RK |
694 | if (IS_ERR(pit->worker_task)) |
695 | goto fail_kthread; | |
696 | ||
b6ddf05f | 697 | init_kthread_work(&pit->expired, pit_do_work); |
7837699f | 698 | |
7837699f SY |
699 | pit->kvm = kvm; |
700 | ||
701 | pit_state = &pit->pit_state; | |
26ef1924 | 702 | hrtimer_init(&pit_state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); |
ab4c1476 | 703 | pit_state->timer.function = pit_timer_fn; |
71474e2f | 704 | |
3cf57fed MT |
705 | pit_state->irq_ack_notifier.gsi = 0; |
706 | pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq; | |
71474e2f | 707 | pit->mask_notifier.func = pit_mask_notifer; |
7837699f | 708 | |
308b0f23 | 709 | kvm_pit_reset(pit); |
7837699f | 710 | |
71474e2f | 711 | kvm_pit_set_reinject(pit, true); |
4780c659 | 712 | |
6b66ac1a | 713 | kvm_iodevice_init(&pit->dev, &pit_dev_ops); |
743eeb0b SL |
714 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS, |
715 | KVM_PIT_MEM_LENGTH, &pit->dev); | |
090b7aff | 716 | if (ret < 0) |
10d24821 | 717 | goto fail_register_pit; |
6b66ac1a GH |
718 | |
719 | if (flags & KVM_PIT_SPEAKER_DUMMY) { | |
720 | kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops); | |
e93f8a0f | 721 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, |
743eeb0b SL |
722 | KVM_SPEAKER_BASE_ADDRESS, 4, |
723 | &pit->speaker_dev); | |
090b7aff | 724 | if (ret < 0) |
10d24821 | 725 | goto fail_register_speaker; |
6b66ac1a GH |
726 | } |
727 | ||
7837699f | 728 | return pit; |
090b7aff | 729 | |
10d24821 | 730 | fail_register_speaker: |
e93f8a0f | 731 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev); |
10d24821 | 732 | fail_register_pit: |
71474e2f | 733 | kvm_pit_set_reinject(pit, false); |
b6ddf05f | 734 | kthread_stop(pit->worker_task); |
10d24821 RK |
735 | fail_kthread: |
736 | kvm_free_irq_source_id(kvm, pit->irq_source_id); | |
737 | fail_request: | |
090b7aff GH |
738 | kfree(pit); |
739 | return NULL; | |
7837699f SY |
740 | } |
741 | ||
742 | void kvm_free_pit(struct kvm *kvm) | |
743 | { | |
08e5ccf3 RK |
744 | struct kvm_pit *pit = kvm->arch.vpit; |
745 | ||
746 | if (pit) { | |
747 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev); | |
748 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->speaker_dev); | |
749 | kvm_pit_set_reinject(pit, false); | |
750 | hrtimer_cancel(&pit->pit_state.timer); | |
751 | flush_kthread_work(&pit->expired); | |
752 | kthread_stop(pit->worker_task); | |
753 | kvm_free_irq_source_id(kvm, pit->irq_source_id); | |
754 | kfree(pit); | |
7837699f SY |
755 | } |
756 | } |