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85f455f7 ED |
1 | /* |
2 | * irq.h: in kernel interrupt controller related definitions | |
3 | * Copyright (c) 2007, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
17 | * Authors: | |
18 | * Yaozu (Eddie) Dong <Eddie.dong@intel.com> | |
19 | * | |
20 | */ | |
21 | ||
22 | #ifndef __IRQ_H | |
23 | #define __IRQ_H | |
24 | ||
e01a1b57 HB |
25 | #include <linux/mm_types.h> |
26 | #include <linux/hrtimer.h> | |
edf88417 | 27 | #include <linux/kvm_host.h> |
3f353858 | 28 | #include <linux/spinlock.h> |
82470196 | 29 | |
af669ac6 | 30 | #include <kvm/iodev.h> |
82470196 ZX |
31 | #include "ioapic.h" |
32 | #include "lapic.h" | |
85f455f7 | 33 | |
c65bbfa1 | 34 | #define PIC_NUM_PINS 16 |
44882eed MT |
35 | #define SELECT_PIC(irq) \ |
36 | ((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE) | |
c65bbfa1 | 37 | |
e01a1b57 HB |
38 | struct kvm; |
39 | struct kvm_vcpu; | |
40 | ||
85f455f7 ED |
41 | struct kvm_kpic_state { |
42 | u8 last_irr; /* edge detection */ | |
43 | u8 irr; /* interrupt request register */ | |
44 | u8 imr; /* interrupt mask register */ | |
45 | u8 isr; /* interrupt service register */ | |
46 | u8 priority_add; /* highest irq priority */ | |
47 | u8 irq_base; | |
48 | u8 read_reg_select; | |
49 | u8 poll; | |
50 | u8 special_mask; | |
51 | u8 init_state; | |
52 | u8 auto_eoi; | |
53 | u8 rotate_on_auto_eoi; | |
54 | u8 special_fully_nested_mode; | |
55 | u8 init4; /* true if 4 byte init */ | |
56 | u8 elcr; /* PIIX edge/trigger selection */ | |
57 | u8 elcr_mask; | |
eebb5f31 | 58 | u8 isr_ack; /* interrupt ack detection */ |
85f455f7 ED |
59 | struct kvm_pic *pics_state; |
60 | }; | |
61 | ||
62 | struct kvm_pic { | |
f4f51050 | 63 | spinlock_t lock; |
50a085bd | 64 | bool wakeup_needed; |
3f353858 AK |
65 | unsigned pending_acks; |
66 | struct kvm *kvm; | |
85f455f7 | 67 | struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */ |
85f455f7 | 68 | int output; /* intr from master PIC */ |
743eeb0b SL |
69 | struct kvm_io_device dev_master; |
70 | struct kvm_io_device dev_slave; | |
71 | struct kvm_io_device dev_eclr; | |
f5244726 | 72 | void (*ack_notifier)(void *opaque, int irq); |
93b6547e | 73 | unsigned long irq_states[PIC_NUM_PINS]; |
85f455f7 ED |
74 | }; |
75 | ||
09941366 RK |
76 | int kvm_pic_init(struct kvm *kvm); |
77 | void kvm_pic_destroy(struct kvm *kvm); | |
f5244726 | 78 | int kvm_pic_read_irq(struct kvm *kvm); |
6ceb9d79 | 79 | void kvm_pic_update_irq(struct kvm_pic *s); |
85f455f7 | 80 | |
1c1a9ce9 SR |
81 | static inline int pic_in_kernel(struct kvm *kvm) |
82 | { | |
19d25a0e | 83 | int mode = kvm->arch.irqchip_mode; |
1c1a9ce9 | 84 | |
19d25a0e DH |
85 | /* Matches smp_wmb() when setting irqchip_mode */ |
86 | smp_rmb(); | |
87 | return mode == KVM_IRQCHIP_KERNEL; | |
1c1a9ce9 SR |
88 | } |
89 | ||
49df6397 SR |
90 | static inline int irqchip_split(struct kvm *kvm) |
91 | { | |
637e3f86 DH |
92 | int mode = kvm->arch.irqchip_mode; |
93 | ||
94 | /* Matches smp_wmb() when setting irqchip_mode */ | |
95 | smp_rmb(); | |
96 | return mode == KVM_IRQCHIP_SPLIT; | |
49df6397 SR |
97 | } |
98 | ||
49776faf | 99 | static inline int irqchip_kernel(struct kvm *kvm) |
682c59a3 | 100 | { |
637e3f86 DH |
101 | int mode = kvm->arch.irqchip_mode; |
102 | ||
103 | /* Matches smp_wmb() when setting irqchip_mode */ | |
104 | smp_rmb(); | |
105 | return mode == KVM_IRQCHIP_KERNEL; | |
49776faf | 106 | } |
49df6397 | 107 | |
49776faf RK |
108 | static inline int irqchip_in_kernel(struct kvm *kvm) |
109 | { | |
637e3f86 | 110 | int mode = kvm->arch.irqchip_mode; |
3ddea128 | 111 | |
637e3f86 | 112 | /* Matches smp_wmb() when setting irqchip_mode */ |
3ddea128 | 113 | smp_rmb(); |
5c0aea0e | 114 | return mode != KVM_IRQCHIP_NONE; |
682c59a3 ZX |
115 | } |
116 | ||
9898e051 | 117 | bool kvm_arch_irqfd_allowed(struct kvm *kvm, struct kvm_irqfd *args); |
1b9778da ED |
118 | void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu); |
119 | void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu); | |
8fdb2351 | 120 | void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu); |
2f52d58c | 121 | void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu); |
2f599714 MT |
122 | void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu); |
123 | void __kvm_migrate_timers(struct kvm_vcpu *vcpu); | |
97222cc8 | 124 | |
3d80840d MT |
125 | int apic_has_pending_timer(struct kvm_vcpu *vcpu); |
126 | ||
d9565a73 EA |
127 | int kvm_setup_default_irq_routing(struct kvm *kvm); |
128 | int kvm_setup_empty_irq_routing(struct kvm *kvm); | |
129 | ||
85f455f7 | 130 | #endif |