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KVM: MMU: Separate the code for unlinking a shadow page from its parents
[mirror_ubuntu-hirsute-kernel.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
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33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
d6c69ee9
YD
73#ifndef MMU_DEBUG
74#define ASSERT(x) do { } while (0)
75#else
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76#define ASSERT(x) \
77 if (!(x)) { \
78 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
79 __FILE__, __LINE__, #x); \
80 }
d6c69ee9 81#endif
6aa8b732 82
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83#define PT_FIRST_AVAIL_BITS_SHIFT 9
84#define PT64_SECOND_AVAIL_BITS_SHIFT 52
85
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86#define VALID_PAGE(x) ((x) != INVALID_PAGE)
87
88#define PT64_LEVEL_BITS 9
89
90#define PT64_LEVEL_SHIFT(level) \
d77c26fc 91 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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92
93#define PT64_LEVEL_MASK(level) \
94 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
95
96#define PT64_INDEX(address, level)\
97 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
98
99
100#define PT32_LEVEL_BITS 10
101
102#define PT32_LEVEL_SHIFT(level) \
d77c26fc 103 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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104
105#define PT32_LEVEL_MASK(level) \
106 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
107
108#define PT32_INDEX(address, level)\
109 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
110
111
27aba766 112#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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113#define PT64_DIR_BASE_ADDR_MASK \
114 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
115
116#define PT32_BASE_ADDR_MASK PAGE_MASK
117#define PT32_DIR_BASE_ADDR_MASK \
118 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
119
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120#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
121 | PT64_NX_MASK)
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122
123#define PFERR_PRESENT_MASK (1U << 0)
124#define PFERR_WRITE_MASK (1U << 1)
125#define PFERR_USER_MASK (1U << 2)
73b1087e 126#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 127
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128#define PT_DIRECTORY_LEVEL 2
129#define PT_PAGE_TABLE_LEVEL 1
130
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131#define RMAP_EXT 4
132
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133#define ACC_EXEC_MASK 1
134#define ACC_WRITE_MASK PT_WRITABLE_MASK
135#define ACC_USER_MASK PT_USER_MASK
136#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
137
2f333bcb
MT
138struct kvm_pv_mmu_op_buffer {
139 void *ptr;
140 unsigned len;
141 unsigned processed;
142 char buf[512] __aligned(sizeof(long));
143};
144
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145struct kvm_rmap_desc {
146 u64 *shadow_ptes[RMAP_EXT];
147 struct kvm_rmap_desc *more;
148};
149
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150static struct kmem_cache *pte_chain_cache;
151static struct kmem_cache *rmap_desc_cache;
d3d25b04 152static struct kmem_cache *mmu_page_header_cache;
b5a33a75 153
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154static u64 __read_mostly shadow_trap_nonpresent_pte;
155static u64 __read_mostly shadow_notrap_nonpresent_pte;
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SY
156static u64 __read_mostly shadow_base_present_pte;
157static u64 __read_mostly shadow_nx_mask;
158static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
159static u64 __read_mostly shadow_user_mask;
160static u64 __read_mostly shadow_accessed_mask;
161static u64 __read_mostly shadow_dirty_mask;
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162
163void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
164{
165 shadow_trap_nonpresent_pte = trap_pte;
166 shadow_notrap_nonpresent_pte = notrap_pte;
167}
168EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
169
7b52345e
SY
170void kvm_mmu_set_base_ptes(u64 base_pte)
171{
172 shadow_base_present_pte = base_pte;
173}
174EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
175
176void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
177 u64 dirty_mask, u64 nx_mask, u64 x_mask)
178{
179 shadow_user_mask = user_mask;
180 shadow_accessed_mask = accessed_mask;
181 shadow_dirty_mask = dirty_mask;
182 shadow_nx_mask = nx_mask;
183 shadow_x_mask = x_mask;
184}
185EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
186
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187static int is_write_protection(struct kvm_vcpu *vcpu)
188{
ad312c7c 189 return vcpu->arch.cr0 & X86_CR0_WP;
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190}
191
192static int is_cpuid_PSE36(void)
193{
194 return 1;
195}
196
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197static int is_nx(struct kvm_vcpu *vcpu)
198{
ad312c7c 199 return vcpu->arch.shadow_efer & EFER_NX;
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200}
201
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202static int is_present_pte(unsigned long pte)
203{
204 return pte & PT_PRESENT_MASK;
205}
206
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207static int is_shadow_present_pte(u64 pte)
208{
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209 return pte != shadow_trap_nonpresent_pte
210 && pte != shadow_notrap_nonpresent_pte;
211}
212
05da4558
MT
213static int is_large_pte(u64 pte)
214{
215 return pte & PT_PAGE_SIZE_MASK;
216}
217
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218static int is_writeble_pte(unsigned long pte)
219{
220 return pte & PT_WRITABLE_MASK;
221}
222
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223static int is_dirty_pte(unsigned long pte)
224{
7b52345e 225 return pte & shadow_dirty_mask;
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226}
227
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228static int is_rmap_pte(u64 pte)
229{
4b1a80fa 230 return is_shadow_present_pte(pte);
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231}
232
35149e21 233static pfn_t spte_to_pfn(u64 pte)
0b49ea86 234{
35149e21 235 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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236}
237
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238static gfn_t pse36_gfn_delta(u32 gpte)
239{
240 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
241
242 return (gpte & PT32_DIR_PSE36_MASK) << shift;
243}
244
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245static void set_shadow_pte(u64 *sptep, u64 spte)
246{
247#ifdef CONFIG_X86_64
248 set_64bit((unsigned long *)sptep, spte);
249#else
250 set_64bit((unsigned long long *)sptep, spte);
251#endif
252}
253
e2dec939 254static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 255 struct kmem_cache *base_cache, int min)
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256{
257 void *obj;
258
259 if (cache->nobjs >= min)
e2dec939 260 return 0;
714b93da 261 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 262 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 263 if (!obj)
e2dec939 264 return -ENOMEM;
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265 cache->objects[cache->nobjs++] = obj;
266 }
e2dec939 267 return 0;
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268}
269
270static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
271{
272 while (mc->nobjs)
273 kfree(mc->objects[--mc->nobjs]);
274}
275
c1158e63 276static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 277 int min)
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278{
279 struct page *page;
280
281 if (cache->nobjs >= min)
282 return 0;
283 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 284 page = alloc_page(GFP_KERNEL);
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285 if (!page)
286 return -ENOMEM;
287 set_page_private(page, 0);
288 cache->objects[cache->nobjs++] = page_address(page);
289 }
290 return 0;
291}
292
293static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
294{
295 while (mc->nobjs)
c4d198d5 296 free_page((unsigned long)mc->objects[--mc->nobjs]);
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297}
298
2e3e5882 299static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 300{
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301 int r;
302
ad312c7c 303 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 304 pte_chain_cache, 4);
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305 if (r)
306 goto out;
ad312c7c 307 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 308 rmap_desc_cache, 1);
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309 if (r)
310 goto out;
ad312c7c 311 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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312 if (r)
313 goto out;
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 315 mmu_page_header_cache, 4);
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316out:
317 return r;
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318}
319
320static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
321{
ad312c7c
ZX
322 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
323 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
324 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
325 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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326}
327
328static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
329 size_t size)
330{
331 void *p;
332
333 BUG_ON(!mc->nobjs);
334 p = mc->objects[--mc->nobjs];
335 memset(p, 0, size);
336 return p;
337}
338
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339static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
340{
ad312c7c 341 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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342 sizeof(struct kvm_pte_chain));
343}
344
90cb0529 345static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 346{
90cb0529 347 kfree(pc);
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348}
349
350static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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353 sizeof(struct kvm_rmap_desc));
354}
355
90cb0529 356static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 357{
90cb0529 358 kfree(rd);
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AK
359}
360
05da4558
MT
361/*
362 * Return the pointer to the largepage write count for a given
363 * gfn, handling slots that are not large page aligned.
364 */
365static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
366{
367 unsigned long idx;
368
369 idx = (gfn / KVM_PAGES_PER_HPAGE) -
370 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
371 return &slot->lpage_info[idx].write_count;
372}
373
374static void account_shadowed(struct kvm *kvm, gfn_t gfn)
375{
376 int *write_count;
377
378 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
379 *write_count += 1;
05da4558
MT
380}
381
382static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
383{
384 int *write_count;
385
386 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
387 *write_count -= 1;
388 WARN_ON(*write_count < 0);
389}
390
391static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
392{
393 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
394 int *largepage_idx;
395
396 if (slot) {
397 largepage_idx = slot_largepage_idx(gfn, slot);
398 return *largepage_idx;
399 }
400
401 return 1;
402}
403
404static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
405{
406 struct vm_area_struct *vma;
407 unsigned long addr;
408
409 addr = gfn_to_hva(kvm, gfn);
410 if (kvm_is_error_hva(addr))
411 return 0;
412
413 vma = find_vma(current->mm, addr);
414 if (vma && is_vm_hugetlb_page(vma))
415 return 1;
416
417 return 0;
418}
419
420static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
421{
422 struct kvm_memory_slot *slot;
423
424 if (has_wrprotected_page(vcpu->kvm, large_gfn))
425 return 0;
426
427 if (!host_largepage_backed(vcpu->kvm, large_gfn))
428 return 0;
429
430 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
431 if (slot && slot->dirty_bitmap)
432 return 0;
433
434 return 1;
435}
436
290fc38d
IE
437/*
438 * Take gfn and return the reverse mapping to it.
439 * Note: gfn must be unaliased before this function get called
440 */
441
05da4558 442static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
443{
444 struct kvm_memory_slot *slot;
05da4558 445 unsigned long idx;
290fc38d
IE
446
447 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
448 if (!lpage)
449 return &slot->rmap[gfn - slot->base_gfn];
450
451 idx = (gfn / KVM_PAGES_PER_HPAGE) -
452 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
453
454 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
455}
456
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457/*
458 * Reverse mapping data structures:
459 *
290fc38d
IE
460 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
461 * that points to page_address(page).
cd4a4e53 462 *
290fc38d
IE
463 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
464 * containing more mappings.
cd4a4e53 465 */
05da4558 466static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 467{
4db35314 468 struct kvm_mmu_page *sp;
cd4a4e53 469 struct kvm_rmap_desc *desc;
290fc38d 470 unsigned long *rmapp;
cd4a4e53
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471 int i;
472
473 if (!is_rmap_pte(*spte))
474 return;
290fc38d 475 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
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476 sp = page_header(__pa(spte));
477 sp->gfns[spte - sp->spt] = gfn;
05da4558 478 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 479 if (!*rmapp) {
cd4a4e53 480 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
481 *rmapp = (unsigned long)spte;
482 } else if (!(*rmapp & 1)) {
cd4a4e53 483 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 484 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 485 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 486 desc->shadow_ptes[1] = spte;
290fc38d 487 *rmapp = (unsigned long)desc | 1;
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488 } else {
489 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 490 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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491 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
492 desc = desc->more;
493 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 494 desc->more = mmu_alloc_rmap_desc(vcpu);
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495 desc = desc->more;
496 }
497 for (i = 0; desc->shadow_ptes[i]; ++i)
498 ;
499 desc->shadow_ptes[i] = spte;
500 }
501}
502
290fc38d 503static void rmap_desc_remove_entry(unsigned long *rmapp,
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504 struct kvm_rmap_desc *desc,
505 int i,
506 struct kvm_rmap_desc *prev_desc)
507{
508 int j;
509
510 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
511 ;
512 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 513 desc->shadow_ptes[j] = NULL;
cd4a4e53
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514 if (j != 0)
515 return;
516 if (!prev_desc && !desc->more)
290fc38d 517 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
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518 else
519 if (prev_desc)
520 prev_desc->more = desc->more;
521 else
290fc38d 522 *rmapp = (unsigned long)desc->more | 1;
90cb0529 523 mmu_free_rmap_desc(desc);
cd4a4e53
AK
524}
525
290fc38d 526static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 527{
cd4a4e53
AK
528 struct kvm_rmap_desc *desc;
529 struct kvm_rmap_desc *prev_desc;
4db35314 530 struct kvm_mmu_page *sp;
35149e21 531 pfn_t pfn;
290fc38d 532 unsigned long *rmapp;
cd4a4e53
AK
533 int i;
534
535 if (!is_rmap_pte(*spte))
536 return;
4db35314 537 sp = page_header(__pa(spte));
35149e21 538 pfn = spte_to_pfn(*spte);
7b52345e 539 if (*spte & shadow_accessed_mask)
35149e21 540 kvm_set_pfn_accessed(pfn);
b4231d61 541 if (is_writeble_pte(*spte))
35149e21 542 kvm_release_pfn_dirty(pfn);
b4231d61 543 else
35149e21 544 kvm_release_pfn_clean(pfn);
05da4558 545 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 546 if (!*rmapp) {
cd4a4e53
AK
547 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
548 BUG();
290fc38d 549 } else if (!(*rmapp & 1)) {
cd4a4e53 550 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 551 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
552 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
553 spte, *spte);
554 BUG();
555 }
290fc38d 556 *rmapp = 0;
cd4a4e53
AK
557 } else {
558 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 559 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
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560 prev_desc = NULL;
561 while (desc) {
562 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
563 if (desc->shadow_ptes[i] == spte) {
290fc38d 564 rmap_desc_remove_entry(rmapp,
714b93da 565 desc, i,
cd4a4e53
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566 prev_desc);
567 return;
568 }
569 prev_desc = desc;
570 desc = desc->more;
571 }
572 BUG();
573 }
574}
575
98348e95 576static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 577{
374cbac0 578 struct kvm_rmap_desc *desc;
98348e95
IE
579 struct kvm_rmap_desc *prev_desc;
580 u64 *prev_spte;
581 int i;
582
583 if (!*rmapp)
584 return NULL;
585 else if (!(*rmapp & 1)) {
586 if (!spte)
587 return (u64 *)*rmapp;
588 return NULL;
589 }
590 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
591 prev_desc = NULL;
592 prev_spte = NULL;
593 while (desc) {
594 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
595 if (prev_spte == spte)
596 return desc->shadow_ptes[i];
597 prev_spte = desc->shadow_ptes[i];
598 }
599 desc = desc->more;
600 }
601 return NULL;
602}
603
604static void rmap_write_protect(struct kvm *kvm, u64 gfn)
605{
290fc38d 606 unsigned long *rmapp;
374cbac0 607 u64 *spte;
caa5b8a5 608 int write_protected = 0;
374cbac0 609
4a4c9924 610 gfn = unalias_gfn(kvm, gfn);
05da4558 611 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 612
98348e95
IE
613 spte = rmap_next(kvm, rmapp, NULL);
614 while (spte) {
374cbac0 615 BUG_ON(!spte);
374cbac0 616 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 617 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 618 if (is_writeble_pte(*spte)) {
9647c14c 619 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
620 write_protected = 1;
621 }
9647c14c 622 spte = rmap_next(kvm, rmapp, spte);
374cbac0 623 }
855149aa 624 if (write_protected) {
35149e21 625 pfn_t pfn;
855149aa
IE
626
627 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
628 pfn = spte_to_pfn(*spte);
629 kvm_set_pfn_dirty(pfn);
855149aa
IE
630 }
631
05da4558
MT
632 /* check for huge page mappings */
633 rmapp = gfn_to_rmap(kvm, gfn, 1);
634 spte = rmap_next(kvm, rmapp, NULL);
635 while (spte) {
636 BUG_ON(!spte);
637 BUG_ON(!(*spte & PT_PRESENT_MASK));
638 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
639 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
640 if (is_writeble_pte(*spte)) {
641 rmap_remove(kvm, spte);
642 --kvm->stat.lpages;
643 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 644 spte = NULL;
05da4558
MT
645 write_protected = 1;
646 }
647 spte = rmap_next(kvm, rmapp, spte);
648 }
649
caa5b8a5
ED
650 if (write_protected)
651 kvm_flush_remote_tlbs(kvm);
05da4558
MT
652
653 account_shadowed(kvm, gfn);
374cbac0
AK
654}
655
e930bffe
AA
656static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
657{
658 u64 *spte;
659 int need_tlb_flush = 0;
660
661 while ((spte = rmap_next(kvm, rmapp, NULL))) {
662 BUG_ON(!(*spte & PT_PRESENT_MASK));
663 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
664 rmap_remove(kvm, spte);
665 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
666 need_tlb_flush = 1;
667 }
668 return need_tlb_flush;
669}
670
671static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
672 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
673{
674 int i;
675 int retval = 0;
676
677 /*
678 * If mmap_sem isn't taken, we can look the memslots with only
679 * the mmu_lock by skipping over the slots with userspace_addr == 0.
680 */
681 for (i = 0; i < kvm->nmemslots; i++) {
682 struct kvm_memory_slot *memslot = &kvm->memslots[i];
683 unsigned long start = memslot->userspace_addr;
684 unsigned long end;
685
686 /* mmu_lock protects userspace_addr */
687 if (!start)
688 continue;
689
690 end = start + (memslot->npages << PAGE_SHIFT);
691 if (hva >= start && hva < end) {
692 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
693 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
694 retval |= handler(kvm,
695 &memslot->lpage_info[
696 gfn_offset /
697 KVM_PAGES_PER_HPAGE].rmap_pde);
698 }
699 }
700
701 return retval;
702}
703
704int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
705{
706 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
707}
708
709static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
710{
711 u64 *spte;
712 int young = 0;
713
534e38b4
SY
714 /* always return old for EPT */
715 if (!shadow_accessed_mask)
716 return 0;
717
e930bffe
AA
718 spte = rmap_next(kvm, rmapp, NULL);
719 while (spte) {
720 int _young;
721 u64 _spte = *spte;
722 BUG_ON(!(_spte & PT_PRESENT_MASK));
723 _young = _spte & PT_ACCESSED_MASK;
724 if (_young) {
725 young = 1;
726 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
727 }
728 spte = rmap_next(kvm, rmapp, spte);
729 }
730 return young;
731}
732
733int kvm_age_hva(struct kvm *kvm, unsigned long hva)
734{
735 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
736}
737
d6c69ee9 738#ifdef MMU_DEBUG
47ad8e68 739static int is_empty_shadow_page(u64 *spt)
6aa8b732 740{
139bdb2d
AK
741 u64 *pos;
742 u64 *end;
743
47ad8e68 744 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 745 if (is_shadow_present_pte(*pos)) {
b8688d51 746 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 747 pos, *pos);
6aa8b732 748 return 0;
139bdb2d 749 }
6aa8b732
AK
750 return 1;
751}
d6c69ee9 752#endif
6aa8b732 753
4db35314 754static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 755{
4db35314
AK
756 ASSERT(is_empty_shadow_page(sp->spt));
757 list_del(&sp->link);
758 __free_page(virt_to_page(sp->spt));
759 __free_page(virt_to_page(sp->gfns));
760 kfree(sp);
f05e70ac 761 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
762}
763
cea0f0e7
AK
764static unsigned kvm_page_table_hashfn(gfn_t gfn)
765{
1ae0a13d 766 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
767}
768
25c0de2c
AK
769static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
770 u64 *parent_pte)
6aa8b732 771{
4db35314 772 struct kvm_mmu_page *sp;
6aa8b732 773
ad312c7c
ZX
774 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
775 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
776 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 777 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 778 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
779 ASSERT(is_empty_shadow_page(sp->spt));
780 sp->slot_bitmap = 0;
781 sp->multimapped = 0;
782 sp->parent_pte = parent_pte;
f05e70ac 783 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 784 return sp;
6aa8b732
AK
785}
786
714b93da 787static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 788 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
789{
790 struct kvm_pte_chain *pte_chain;
791 struct hlist_node *node;
792 int i;
793
794 if (!parent_pte)
795 return;
4db35314
AK
796 if (!sp->multimapped) {
797 u64 *old = sp->parent_pte;
cea0f0e7
AK
798
799 if (!old) {
4db35314 800 sp->parent_pte = parent_pte;
cea0f0e7
AK
801 return;
802 }
4db35314 803 sp->multimapped = 1;
714b93da 804 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
805 INIT_HLIST_HEAD(&sp->parent_ptes);
806 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
807 pte_chain->parent_ptes[0] = old;
808 }
4db35314 809 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
810 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
811 continue;
812 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
813 if (!pte_chain->parent_ptes[i]) {
814 pte_chain->parent_ptes[i] = parent_pte;
815 return;
816 }
817 }
714b93da 818 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 819 BUG_ON(!pte_chain);
4db35314 820 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
821 pte_chain->parent_ptes[0] = parent_pte;
822}
823
4db35314 824static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
825 u64 *parent_pte)
826{
827 struct kvm_pte_chain *pte_chain;
828 struct hlist_node *node;
829 int i;
830
4db35314
AK
831 if (!sp->multimapped) {
832 BUG_ON(sp->parent_pte != parent_pte);
833 sp->parent_pte = NULL;
cea0f0e7
AK
834 return;
835 }
4db35314 836 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
837 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
838 if (!pte_chain->parent_ptes[i])
839 break;
840 if (pte_chain->parent_ptes[i] != parent_pte)
841 continue;
697fe2e2
AK
842 while (i + 1 < NR_PTE_CHAIN_ENTRIES
843 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
844 pte_chain->parent_ptes[i]
845 = pte_chain->parent_ptes[i + 1];
846 ++i;
847 }
848 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
849 if (i == 0) {
850 hlist_del(&pte_chain->link);
90cb0529 851 mmu_free_pte_chain(pte_chain);
4db35314
AK
852 if (hlist_empty(&sp->parent_ptes)) {
853 sp->multimapped = 0;
854 sp->parent_pte = NULL;
697fe2e2
AK
855 }
856 }
cea0f0e7
AK
857 return;
858 }
859 BUG();
860}
861
d761a501
AK
862static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
863 struct kvm_mmu_page *sp)
864{
865 int i;
866
867 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
868 sp->spt[i] = shadow_trap_nonpresent_pte;
869}
870
4db35314 871static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
872{
873 unsigned index;
874 struct hlist_head *bucket;
4db35314 875 struct kvm_mmu_page *sp;
cea0f0e7
AK
876 struct hlist_node *node;
877
b8688d51 878 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 879 index = kvm_page_table_hashfn(gfn);
f05e70ac 880 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 881 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
882 if (sp->gfn == gfn && !sp->role.metaphysical
883 && !sp->role.invalid) {
cea0f0e7 884 pgprintk("%s: found role %x\n",
b8688d51 885 __func__, sp->role.word);
4db35314 886 return sp;
cea0f0e7
AK
887 }
888 return NULL;
889}
890
891static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
892 gfn_t gfn,
893 gva_t gaddr,
894 unsigned level,
895 int metaphysical,
41074d07 896 unsigned access,
f7d9c7b7 897 u64 *parent_pte)
cea0f0e7
AK
898{
899 union kvm_mmu_page_role role;
900 unsigned index;
901 unsigned quadrant;
902 struct hlist_head *bucket;
4db35314 903 struct kvm_mmu_page *sp;
cea0f0e7
AK
904 struct hlist_node *node;
905
906 role.word = 0;
ad312c7c 907 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
908 role.level = level;
909 role.metaphysical = metaphysical;
41074d07 910 role.access = access;
ad312c7c 911 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
912 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
913 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
914 role.quadrant = quadrant;
915 }
b8688d51 916 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 917 gfn, role.word);
1ae0a13d 918 index = kvm_page_table_hashfn(gfn);
f05e70ac 919 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
920 hlist_for_each_entry(sp, node, bucket, hash_link)
921 if (sp->gfn == gfn && sp->role.word == role.word) {
922 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
b8688d51 923 pgprintk("%s: found\n", __func__);
4db35314 924 return sp;
cea0f0e7 925 }
dfc5aa00 926 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
927 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
928 if (!sp)
929 return sp;
b8688d51 930 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
931 sp->gfn = gfn;
932 sp->role = role;
933 hlist_add_head(&sp->hash_link, bucket);
374cbac0 934 if (!metaphysical)
4a4c9924 935 rmap_write_protect(vcpu->kvm, gfn);
131d8279
AK
936 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
937 vcpu->arch.mmu.prefetch_page(vcpu, sp);
938 else
939 nonpaging_prefetch_page(vcpu, sp);
4db35314 940 return sp;
cea0f0e7
AK
941}
942
90cb0529 943static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 944 struct kvm_mmu_page *sp)
a436036b 945{
697fe2e2
AK
946 unsigned i;
947 u64 *pt;
948 u64 ent;
949
4db35314 950 pt = sp->spt;
697fe2e2 951
4db35314 952 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 953 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 954 if (is_shadow_present_pte(pt[i]))
290fc38d 955 rmap_remove(kvm, &pt[i]);
c7addb90 956 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 957 }
90cb0529 958 kvm_flush_remote_tlbs(kvm);
697fe2e2
AK
959 return;
960 }
961
962 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
963 ent = pt[i];
964
05da4558
MT
965 if (is_shadow_present_pte(ent)) {
966 if (!is_large_pte(ent)) {
967 ent &= PT64_BASE_ADDR_MASK;
968 mmu_page_remove_parent_pte(page_header(ent),
969 &pt[i]);
970 } else {
971 --kvm->stat.lpages;
972 rmap_remove(kvm, &pt[i]);
973 }
974 }
c7addb90 975 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 976 }
90cb0529 977 kvm_flush_remote_tlbs(kvm);
a436036b
AK
978}
979
4db35314 980static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 981{
4db35314 982 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
983}
984
12b7d28f
AK
985static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
986{
987 int i;
988
989 for (i = 0; i < KVM_MAX_VCPUS; ++i)
990 if (kvm->vcpus[i])
ad312c7c 991 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
992}
993
31aa2b44 994static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
995{
996 u64 *parent_pte;
997
4db35314
AK
998 while (sp->multimapped || sp->parent_pte) {
999 if (!sp->multimapped)
1000 parent_pte = sp->parent_pte;
a436036b
AK
1001 else {
1002 struct kvm_pte_chain *chain;
1003
4db35314 1004 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1005 struct kvm_pte_chain, link);
1006 parent_pte = chain->parent_ptes[0];
1007 }
697fe2e2 1008 BUG_ON(!parent_pte);
4db35314 1009 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1010 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1011 }
31aa2b44
AK
1012}
1013
1014static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1015{
1016 ++kvm->stat.mmu_shadow_zapped;
4db35314 1017 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1018 kvm_mmu_unlink_parents(kvm, sp);
4db35314 1019 if (!sp->root_count) {
376c53c2 1020 if (!sp->role.metaphysical && !sp->role.invalid)
05da4558 1021 unaccount_shadowed(kvm, sp->gfn);
4db35314
AK
1022 hlist_del(&sp->hash_link);
1023 kvm_mmu_free_page(kvm, sp);
2e53d63a 1024 } else {
376c53c2 1025 int invalid = sp->role.invalid;
f05e70ac 1026 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1027 sp->role.invalid = 1;
1028 kvm_reload_remote_mmus(kvm);
376c53c2
MT
1029 if (!sp->role.metaphysical && !invalid)
1030 unaccount_shadowed(kvm, sp->gfn);
2e53d63a 1031 }
12b7d28f 1032 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
1033}
1034
82ce2c96
IE
1035/*
1036 * Changing the number of mmu pages allocated to the vm
1037 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1038 */
1039void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1040{
1041 /*
1042 * If we set the number of mmu pages to be smaller be than the
1043 * number of actived pages , we must to free some mmu pages before we
1044 * change the value
1045 */
1046
f05e70ac 1047 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1048 kvm_nr_mmu_pages) {
f05e70ac
ZX
1049 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1050 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1051
1052 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1053 struct kvm_mmu_page *page;
1054
f05e70ac 1055 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1056 struct kvm_mmu_page, link);
1057 kvm_mmu_zap_page(kvm, page);
1058 n_used_mmu_pages--;
1059 }
f05e70ac 1060 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1061 }
1062 else
f05e70ac
ZX
1063 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1064 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1065
f05e70ac 1066 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1067}
1068
f67a46f4 1069static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1070{
1071 unsigned index;
1072 struct hlist_head *bucket;
4db35314 1073 struct kvm_mmu_page *sp;
a436036b
AK
1074 struct hlist_node *node, *n;
1075 int r;
1076
b8688d51 1077 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1078 r = 0;
1ae0a13d 1079 index = kvm_page_table_hashfn(gfn);
f05e70ac 1080 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1081 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1082 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1083 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314
AK
1084 sp->role.word);
1085 kvm_mmu_zap_page(kvm, sp);
a436036b
AK
1086 r = 1;
1087 }
1088 return r;
cea0f0e7
AK
1089}
1090
f67a46f4 1091static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1092{
4db35314 1093 struct kvm_mmu_page *sp;
97a0a01e 1094
4db35314 1095 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1096 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1097 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1098 }
1099}
1100
38c335f1 1101static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1102{
38c335f1 1103 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1104 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1105
4db35314 1106 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1107}
1108
039576c0
AK
1109struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1110{
72dc67a6
IE
1111 struct page *page;
1112
ad312c7c 1113 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1114
1115 if (gpa == UNMAPPED_GVA)
1116 return NULL;
72dc67a6
IE
1117
1118 down_read(&current->mm->mmap_sem);
1119 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1120 up_read(&current->mm->mmap_sem);
1121
1122 return page;
039576c0
AK
1123}
1124
1c4f1fd6
AK
1125static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1126 unsigned pt_access, unsigned pte_access,
1127 int user_fault, int write_fault, int dirty,
05da4558 1128 int *ptwrite, int largepage, gfn_t gfn,
35149e21 1129 pfn_t pfn, bool speculative)
1c4f1fd6
AK
1130{
1131 u64 spte;
15aaa819 1132 int was_rmapped = 0;
75e68e60 1133 int was_writeble = is_writeble_pte(*shadow_pte);
1c4f1fd6 1134
bc750ba8 1135 pgprintk("%s: spte %llx access %x write_fault %d"
1c4f1fd6 1136 " user_fault %d gfn %lx\n",
b8688d51 1137 __func__, *shadow_pte, pt_access,
1c4f1fd6
AK
1138 write_fault, user_fault, gfn);
1139
15aaa819 1140 if (is_rmap_pte(*shadow_pte)) {
05da4558
MT
1141 /*
1142 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1143 * the parent of the now unreachable PTE.
1144 */
1145 if (largepage && !is_large_pte(*shadow_pte)) {
1146 struct kvm_mmu_page *child;
1147 u64 pte = *shadow_pte;
1148
1149 child = page_header(pte & PT64_BASE_ADDR_MASK);
1150 mmu_page_remove_parent_pte(child, shadow_pte);
35149e21 1151 } else if (pfn != spte_to_pfn(*shadow_pte)) {
15aaa819 1152 pgprintk("hfn old %lx new %lx\n",
35149e21 1153 spte_to_pfn(*shadow_pte), pfn);
15aaa819 1154 rmap_remove(vcpu->kvm, shadow_pte);
05da4558
MT
1155 } else {
1156 if (largepage)
1157 was_rmapped = is_large_pte(*shadow_pte);
1158 else
1159 was_rmapped = 1;
15aaa819 1160 }
15aaa819
MT
1161 }
1162
1c4f1fd6
AK
1163 /*
1164 * We don't set the accessed bit, since we sometimes want to see
1165 * whether the guest actually used the pte (in order to detect
1166 * demand paging).
1167 */
7b52345e 1168 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538
AK
1169 if (!speculative)
1170 pte_access |= PT_ACCESSED_MASK;
1c4f1fd6
AK
1171 if (!dirty)
1172 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1173 if (pte_access & ACC_EXEC_MASK)
1174 spte |= shadow_x_mask;
1175 else
1176 spte |= shadow_nx_mask;
1c4f1fd6 1177 if (pte_access & ACC_USER_MASK)
7b52345e 1178 spte |= shadow_user_mask;
05da4558
MT
1179 if (largepage)
1180 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1181
35149e21 1182 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1183
1184 if ((pte_access & ACC_WRITE_MASK)
1185 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1186 struct kvm_mmu_page *shadow;
1187
1188 spte |= PT_WRITABLE_MASK;
1c4f1fd6
AK
1189
1190 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
05da4558
MT
1191 if (shadow ||
1192 (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
1c4f1fd6 1193 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1194 __func__, gfn);
1c4f1fd6
AK
1195 pte_access &= ~ACC_WRITE_MASK;
1196 if (is_writeble_pte(spte)) {
1197 spte &= ~PT_WRITABLE_MASK;
1198 kvm_x86_ops->tlb_flush(vcpu);
1199 }
1200 if (write_fault)
1201 *ptwrite = 1;
1202 }
1203 }
1204
1c4f1fd6
AK
1205 if (pte_access & ACC_WRITE_MASK)
1206 mark_page_dirty(vcpu->kvm, gfn);
1207
b8688d51 1208 pgprintk("%s: setting spte %llx\n", __func__, spte);
db475c39 1209 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
05da4558
MT
1210 (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
1211 (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
1c4f1fd6 1212 set_shadow_pte(shadow_pte, spte);
05da4558
MT
1213 if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
1214 && (spte & PT_PRESENT_MASK))
1215 ++vcpu->kvm->stat.lpages;
1216
1c4f1fd6
AK
1217 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1218 if (!was_rmapped) {
05da4558 1219 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1220 if (!is_rmap_pte(*shadow_pte))
35149e21 1221 kvm_release_pfn_clean(pfn);
75e68e60
IE
1222 } else {
1223 if (was_writeble)
35149e21 1224 kvm_release_pfn_dirty(pfn);
75e68e60 1225 else
35149e21 1226 kvm_release_pfn_clean(pfn);
1c4f1fd6 1227 }
1b7fcd32 1228 if (speculative) {
ad312c7c 1229 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1230 vcpu->arch.last_pte_gfn = gfn;
1231 }
1c4f1fd6
AK
1232}
1233
6aa8b732
AK
1234static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1235{
1236}
1237
4d9976bb 1238static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
35149e21 1239 int largepage, gfn_t gfn, pfn_t pfn,
05da4558 1240 int level)
6aa8b732 1241{
ad312c7c 1242 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
e833240f 1243 int pt_write = 0;
6aa8b732
AK
1244
1245 for (; ; level--) {
1246 u32 index = PT64_INDEX(v, level);
1247 u64 *table;
1248
1249 ASSERT(VALID_PAGE(table_addr));
1250 table = __va(table_addr);
1251
1252 if (level == 1) {
e833240f 1253 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
35149e21 1254 0, write, 1, &pt_write, 0, gfn, pfn, false);
05da4558
MT
1255 return pt_write;
1256 }
1257
1258 if (largepage && level == 2) {
1259 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
35149e21 1260 0, write, 1, &pt_write, 1, gfn, pfn, false);
d196e343 1261 return pt_write;
6aa8b732
AK
1262 }
1263
c7addb90 1264 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 1265 struct kvm_mmu_page *new_table;
cea0f0e7 1266 gfn_t pseudo_gfn;
6aa8b732 1267
cea0f0e7
AK
1268 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1269 >> PAGE_SHIFT;
1270 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1271 v, level - 1,
f7d9c7b7 1272 1, ACC_ALL, &table[index]);
25c0de2c 1273 if (!new_table) {
6aa8b732 1274 pgprintk("nonpaging_map: ENOMEM\n");
35149e21 1275 kvm_release_pfn_clean(pfn);
6aa8b732
AK
1276 return -ENOMEM;
1277 }
1278
722c05f2
AK
1279 set_shadow_pte(&table[index],
1280 __pa(new_table->spt)
1281 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1282 | shadow_user_mask | shadow_x_mask);
6aa8b732
AK
1283 }
1284 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1285 }
1286}
1287
10589a46
MT
1288static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1289{
1290 int r;
05da4558 1291 int largepage = 0;
35149e21 1292 pfn_t pfn;
e930bffe 1293 unsigned long mmu_seq;
aaee2c94
MT
1294
1295 down_read(&current->mm->mmap_sem);
05da4558
MT
1296 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1297 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1298 largepage = 1;
1299 }
1300
e930bffe
AA
1301 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1302 /* implicit mb(), we'll read before PT lock is unlocked */
35149e21 1303 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 1304 up_read(&current->mm->mmap_sem);
aaee2c94 1305
d196e343 1306 /* mmio */
35149e21
AL
1307 if (is_error_pfn(pfn)) {
1308 kvm_release_pfn_clean(pfn);
d196e343
AK
1309 return 1;
1310 }
1311
aaee2c94 1312 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1313 if (mmu_notifier_retry(vcpu, mmu_seq))
1314 goto out_unlock;
eb787d10 1315 kvm_mmu_free_some_pages(vcpu);
35149e21 1316 r = __direct_map(vcpu, v, write, largepage, gfn, pfn,
05da4558 1317 PT32E_ROOT_LEVEL);
aaee2c94
MT
1318 spin_unlock(&vcpu->kvm->mmu_lock);
1319
aaee2c94 1320
10589a46 1321 return r;
e930bffe
AA
1322
1323out_unlock:
1324 spin_unlock(&vcpu->kvm->mmu_lock);
1325 kvm_release_pfn_clean(pfn);
1326 return 0;
10589a46
MT
1327}
1328
1329
17ac10ad
AK
1330static void mmu_free_roots(struct kvm_vcpu *vcpu)
1331{
1332 int i;
4db35314 1333 struct kvm_mmu_page *sp;
17ac10ad 1334
ad312c7c 1335 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1336 return;
aaee2c94 1337 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1338 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1339 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1340
4db35314
AK
1341 sp = page_header(root);
1342 --sp->root_count;
2e53d63a
MT
1343 if (!sp->root_count && sp->role.invalid)
1344 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1345 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1346 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1347 return;
1348 }
17ac10ad 1349 for (i = 0; i < 4; ++i) {
ad312c7c 1350 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1351
417726a3 1352 if (root) {
417726a3 1353 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1354 sp = page_header(root);
1355 --sp->root_count;
2e53d63a
MT
1356 if (!sp->root_count && sp->role.invalid)
1357 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1358 }
ad312c7c 1359 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1360 }
aaee2c94 1361 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1362 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1363}
1364
1365static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1366{
1367 int i;
cea0f0e7 1368 gfn_t root_gfn;
4db35314 1369 struct kvm_mmu_page *sp;
fb72d167 1370 int metaphysical = 0;
3bb65a22 1371
ad312c7c 1372 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1373
ad312c7c
ZX
1374 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1375 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1376
1377 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1378 if (tdp_enabled)
1379 metaphysical = 1;
4db35314 1380 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1381 PT64_ROOT_LEVEL, metaphysical,
1382 ACC_ALL, NULL);
4db35314
AK
1383 root = __pa(sp->spt);
1384 ++sp->root_count;
ad312c7c 1385 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1386 return;
1387 }
fb72d167
JR
1388 metaphysical = !is_paging(vcpu);
1389 if (tdp_enabled)
1390 metaphysical = 1;
17ac10ad 1391 for (i = 0; i < 4; ++i) {
ad312c7c 1392 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1393
1394 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1395 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1396 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1397 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1398 continue;
1399 }
ad312c7c
ZX
1400 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1401 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1402 root_gfn = 0;
4db35314 1403 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1404 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1405 ACC_ALL, NULL);
4db35314
AK
1406 root = __pa(sp->spt);
1407 ++sp->root_count;
ad312c7c 1408 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1409 }
ad312c7c 1410 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1411}
1412
6aa8b732
AK
1413static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1414{
1415 return vaddr;
1416}
1417
1418static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1419 u32 error_code)
6aa8b732 1420{
e833240f 1421 gfn_t gfn;
e2dec939 1422 int r;
6aa8b732 1423
b8688d51 1424 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1425 r = mmu_topup_memory_caches(vcpu);
1426 if (r)
1427 return r;
714b93da 1428
6aa8b732 1429 ASSERT(vcpu);
ad312c7c 1430 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1431
e833240f 1432 gfn = gva >> PAGE_SHIFT;
6aa8b732 1433
e833240f
AK
1434 return nonpaging_map(vcpu, gva & PAGE_MASK,
1435 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1436}
1437
fb72d167
JR
1438static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1439 u32 error_code)
1440{
35149e21 1441 pfn_t pfn;
fb72d167 1442 int r;
05da4558
MT
1443 int largepage = 0;
1444 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 1445 unsigned long mmu_seq;
fb72d167
JR
1446
1447 ASSERT(vcpu);
1448 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1449
1450 r = mmu_topup_memory_caches(vcpu);
1451 if (r)
1452 return r;
1453
1454 down_read(&current->mm->mmap_sem);
05da4558
MT
1455 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1456 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1457 largepage = 1;
1458 }
e930bffe
AA
1459 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1460 /* implicit mb(), we'll read before PT lock is unlocked */
35149e21 1461 pfn = gfn_to_pfn(vcpu->kvm, gfn);
3200f405 1462 up_read(&current->mm->mmap_sem);
35149e21
AL
1463 if (is_error_pfn(pfn)) {
1464 kvm_release_pfn_clean(pfn);
fb72d167
JR
1465 return 1;
1466 }
1467 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1468 if (mmu_notifier_retry(vcpu, mmu_seq))
1469 goto out_unlock;
fb72d167
JR
1470 kvm_mmu_free_some_pages(vcpu);
1471 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
67253af5 1472 largepage, gfn, pfn, kvm_x86_ops->get_tdp_level());
fb72d167 1473 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1474
1475 return r;
e930bffe
AA
1476
1477out_unlock:
1478 spin_unlock(&vcpu->kvm->mmu_lock);
1479 kvm_release_pfn_clean(pfn);
1480 return 0;
fb72d167
JR
1481}
1482
6aa8b732
AK
1483static void nonpaging_free(struct kvm_vcpu *vcpu)
1484{
17ac10ad 1485 mmu_free_roots(vcpu);
6aa8b732
AK
1486}
1487
1488static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1489{
ad312c7c 1490 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1491
1492 context->new_cr3 = nonpaging_new_cr3;
1493 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1494 context->gva_to_gpa = nonpaging_gva_to_gpa;
1495 context->free = nonpaging_free;
c7addb90 1496 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1497 context->root_level = 0;
6aa8b732 1498 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1499 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1500 return 0;
1501}
1502
d835dfec 1503void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1504{
1165f5fe 1505 ++vcpu->stat.tlb_flush;
cbdd1bea 1506 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1507}
1508
1509static void paging_new_cr3(struct kvm_vcpu *vcpu)
1510{
b8688d51 1511 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1512 mmu_free_roots(vcpu);
6aa8b732
AK
1513}
1514
6aa8b732
AK
1515static void inject_page_fault(struct kvm_vcpu *vcpu,
1516 u64 addr,
1517 u32 err_code)
1518{
c3c91fee 1519 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1520}
1521
6aa8b732
AK
1522static void paging_free(struct kvm_vcpu *vcpu)
1523{
1524 nonpaging_free(vcpu);
1525}
1526
1527#define PTTYPE 64
1528#include "paging_tmpl.h"
1529#undef PTTYPE
1530
1531#define PTTYPE 32
1532#include "paging_tmpl.h"
1533#undef PTTYPE
1534
17ac10ad 1535static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1536{
ad312c7c 1537 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1538
1539 ASSERT(is_pae(vcpu));
1540 context->new_cr3 = paging_new_cr3;
1541 context->page_fault = paging64_page_fault;
6aa8b732 1542 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1543 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1544 context->free = paging_free;
17ac10ad
AK
1545 context->root_level = level;
1546 context->shadow_root_level = level;
17c3ba9d 1547 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1548 return 0;
1549}
1550
17ac10ad
AK
1551static int paging64_init_context(struct kvm_vcpu *vcpu)
1552{
1553 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1554}
1555
6aa8b732
AK
1556static int paging32_init_context(struct kvm_vcpu *vcpu)
1557{
ad312c7c 1558 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1559
1560 context->new_cr3 = paging_new_cr3;
1561 context->page_fault = paging32_page_fault;
6aa8b732
AK
1562 context->gva_to_gpa = paging32_gva_to_gpa;
1563 context->free = paging_free;
c7addb90 1564 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1565 context->root_level = PT32_ROOT_LEVEL;
1566 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1567 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1568 return 0;
1569}
1570
1571static int paging32E_init_context(struct kvm_vcpu *vcpu)
1572{
17ac10ad 1573 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1574}
1575
fb72d167
JR
1576static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1577{
1578 struct kvm_mmu *context = &vcpu->arch.mmu;
1579
1580 context->new_cr3 = nonpaging_new_cr3;
1581 context->page_fault = tdp_page_fault;
1582 context->free = nonpaging_free;
1583 context->prefetch_page = nonpaging_prefetch_page;
67253af5 1584 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
1585 context->root_hpa = INVALID_PAGE;
1586
1587 if (!is_paging(vcpu)) {
1588 context->gva_to_gpa = nonpaging_gva_to_gpa;
1589 context->root_level = 0;
1590 } else if (is_long_mode(vcpu)) {
1591 context->gva_to_gpa = paging64_gva_to_gpa;
1592 context->root_level = PT64_ROOT_LEVEL;
1593 } else if (is_pae(vcpu)) {
1594 context->gva_to_gpa = paging64_gva_to_gpa;
1595 context->root_level = PT32E_ROOT_LEVEL;
1596 } else {
1597 context->gva_to_gpa = paging32_gva_to_gpa;
1598 context->root_level = PT32_ROOT_LEVEL;
1599 }
1600
1601 return 0;
1602}
1603
1604static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1605{
1606 ASSERT(vcpu);
ad312c7c 1607 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1608
1609 if (!is_paging(vcpu))
1610 return nonpaging_init_context(vcpu);
a9058ecd 1611 else if (is_long_mode(vcpu))
6aa8b732
AK
1612 return paging64_init_context(vcpu);
1613 else if (is_pae(vcpu))
1614 return paging32E_init_context(vcpu);
1615 else
1616 return paging32_init_context(vcpu);
1617}
1618
fb72d167
JR
1619static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1620{
35149e21
AL
1621 vcpu->arch.update_pte.pfn = bad_pfn;
1622
fb72d167
JR
1623 if (tdp_enabled)
1624 return init_kvm_tdp_mmu(vcpu);
1625 else
1626 return init_kvm_softmmu(vcpu);
1627}
1628
6aa8b732
AK
1629static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1630{
1631 ASSERT(vcpu);
ad312c7c
ZX
1632 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1633 vcpu->arch.mmu.free(vcpu);
1634 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1635 }
1636}
1637
1638int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1639{
1640 destroy_kvm_mmu(vcpu);
1641 return init_kvm_mmu(vcpu);
1642}
8668a3c4 1643EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1644
1645int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1646{
714b93da
AK
1647 int r;
1648
e2dec939 1649 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1650 if (r)
1651 goto out;
aaee2c94 1652 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1653 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1654 mmu_alloc_roots(vcpu);
aaee2c94 1655 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1656 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1657 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1658out:
1659 return r;
6aa8b732 1660}
17c3ba9d
AK
1661EXPORT_SYMBOL_GPL(kvm_mmu_load);
1662
1663void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1664{
1665 mmu_free_roots(vcpu);
1666}
6aa8b732 1667
09072daf 1668static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1669 struct kvm_mmu_page *sp,
ac1b714e
AK
1670 u64 *spte)
1671{
1672 u64 pte;
1673 struct kvm_mmu_page *child;
1674
1675 pte = *spte;
c7addb90 1676 if (is_shadow_present_pte(pte)) {
05da4558
MT
1677 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
1678 is_large_pte(pte))
290fc38d 1679 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1680 else {
1681 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1682 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1683 }
1684 }
c7addb90 1685 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
1686 if (is_large_pte(pte))
1687 --vcpu->kvm->stat.lpages;
ac1b714e
AK
1688}
1689
0028425f 1690static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1691 struct kvm_mmu_page *sp,
0028425f 1692 u64 *spte,
489f1d65 1693 const void *new)
0028425f 1694{
30945387
MT
1695 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1696 if (!vcpu->arch.update_pte.largepage ||
1697 sp->role.glevels == PT32_ROOT_LEVEL) {
1698 ++vcpu->kvm->stat.mmu_pde_zapped;
1699 return;
1700 }
1701 }
0028425f 1702
4cee5764 1703 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 1704 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 1705 paging32_update_pte(vcpu, sp, spte, new);
0028425f 1706 else
489f1d65 1707 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
1708}
1709
79539cec
AK
1710static bool need_remote_flush(u64 old, u64 new)
1711{
1712 if (!is_shadow_present_pte(old))
1713 return false;
1714 if (!is_shadow_present_pte(new))
1715 return true;
1716 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1717 return true;
1718 old ^= PT64_NX_MASK;
1719 new ^= PT64_NX_MASK;
1720 return (old & ~new & PT64_PERM_MASK) != 0;
1721}
1722
1723static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1724{
1725 if (need_remote_flush(old, new))
1726 kvm_flush_remote_tlbs(vcpu->kvm);
1727 else
1728 kvm_mmu_flush_tlb(vcpu);
1729}
1730
12b7d28f
AK
1731static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1732{
ad312c7c 1733 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 1734
7b52345e 1735 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
1736}
1737
d7824fff
AK
1738static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1739 const u8 *new, int bytes)
1740{
1741 gfn_t gfn;
1742 int r;
1743 u64 gpte = 0;
35149e21 1744 pfn_t pfn;
d7824fff 1745
05da4558
MT
1746 vcpu->arch.update_pte.largepage = 0;
1747
d7824fff
AK
1748 if (bytes != 4 && bytes != 8)
1749 return;
1750
1751 /*
1752 * Assume that the pte write on a page table of the same type
1753 * as the current vcpu paging mode. This is nearly always true
1754 * (might be false while changing modes). Note it is verified later
1755 * by update_pte().
1756 */
1757 if (is_pae(vcpu)) {
1758 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1759 if ((bytes == 4) && (gpa % 4 == 0)) {
1760 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1761 if (r)
1762 return;
1763 memcpy((void *)&gpte + (gpa % 8), new, 4);
1764 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1765 memcpy((void *)&gpte, new, 8);
1766 }
1767 } else {
1768 if ((bytes == 4) && (gpa % 4 == 0))
1769 memcpy((void *)&gpte, new, 4);
1770 }
1771 if (!is_present_pte(gpte))
1772 return;
1773 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 1774
05da4558
MT
1775 down_read(&current->mm->mmap_sem);
1776 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1777 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1778 vcpu->arch.update_pte.largepage = 1;
1779 }
e930bffe
AA
1780 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
1781 /* implicit mb(), we'll read before PT lock is unlocked */
35149e21 1782 pfn = gfn_to_pfn(vcpu->kvm, gfn);
05da4558 1783 up_read(&current->mm->mmap_sem);
72dc67a6 1784
35149e21
AL
1785 if (is_error_pfn(pfn)) {
1786 kvm_release_pfn_clean(pfn);
d196e343
AK
1787 return;
1788 }
d7824fff 1789 vcpu->arch.update_pte.gfn = gfn;
35149e21 1790 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
1791}
1792
1b7fcd32
AK
1793static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
1794{
1795 u64 *spte = vcpu->arch.last_pte_updated;
1796
1797 if (spte
1798 && vcpu->arch.last_pte_gfn == gfn
1799 && shadow_accessed_mask
1800 && !(*spte & shadow_accessed_mask)
1801 && is_shadow_present_pte(*spte))
1802 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
1803}
1804
09072daf 1805void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1806 const u8 *new, int bytes)
da4a00f0 1807{
9b7a0325 1808 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1809 struct kvm_mmu_page *sp;
0e7bc4b9 1810 struct hlist_node *node, *n;
9b7a0325
AK
1811 struct hlist_head *bucket;
1812 unsigned index;
489f1d65 1813 u64 entry, gentry;
9b7a0325 1814 u64 *spte;
9b7a0325 1815 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1816 unsigned pte_size;
9b7a0325 1817 unsigned page_offset;
0e7bc4b9 1818 unsigned misaligned;
fce0657f 1819 unsigned quadrant;
9b7a0325 1820 int level;
86a5ba02 1821 int flooded = 0;
ac1b714e 1822 int npte;
489f1d65 1823 int r;
9b7a0325 1824
b8688d51 1825 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 1826 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1827 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 1828 kvm_mmu_access_page(vcpu, gfn);
eb787d10 1829 kvm_mmu_free_some_pages(vcpu);
4cee5764 1830 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1831 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1832 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1833 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1834 ++vcpu->arch.last_pt_write_count;
1835 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1836 flooded = 1;
1837 } else {
ad312c7c
ZX
1838 vcpu->arch.last_pt_write_gfn = gfn;
1839 vcpu->arch.last_pt_write_count = 1;
1840 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1841 }
1ae0a13d 1842 index = kvm_page_table_hashfn(gfn);
f05e70ac 1843 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
1844 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1845 if (sp->gfn != gfn || sp->role.metaphysical)
9b7a0325 1846 continue;
4db35314 1847 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1848 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1849 misaligned |= bytes < 4;
86a5ba02 1850 if (misaligned || flooded) {
0e7bc4b9
AK
1851 /*
1852 * Misaligned accesses are too much trouble to fix
1853 * up; also, they usually indicate a page is not used
1854 * as a page table.
86a5ba02
AK
1855 *
1856 * If we're seeing too many writes to a page,
1857 * it may no longer be a page table, or we may be
1858 * forking, in which case it is better to unmap the
1859 * page.
0e7bc4b9
AK
1860 */
1861 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1862 gpa, bytes, sp->role.word);
1863 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1864 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1865 continue;
1866 }
9b7a0325 1867 page_offset = offset;
4db35314 1868 level = sp->role.level;
ac1b714e 1869 npte = 1;
4db35314 1870 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1871 page_offset <<= 1; /* 32->64 */
1872 /*
1873 * A 32-bit pde maps 4MB while the shadow pdes map
1874 * only 2MB. So we need to double the offset again
1875 * and zap two pdes instead of one.
1876 */
1877 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1878 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1879 page_offset <<= 1;
1880 npte = 2;
1881 }
fce0657f 1882 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1883 page_offset &= ~PAGE_MASK;
4db35314 1884 if (quadrant != sp->role.quadrant)
fce0657f 1885 continue;
9b7a0325 1886 }
4db35314 1887 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
1888 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1889 gentry = 0;
1890 r = kvm_read_guest_atomic(vcpu->kvm,
1891 gpa & ~(u64)(pte_size - 1),
1892 &gentry, pte_size);
1893 new = (const void *)&gentry;
1894 if (r < 0)
1895 new = NULL;
1896 }
ac1b714e 1897 while (npte--) {
79539cec 1898 entry = *spte;
4db35314 1899 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
1900 if (new)
1901 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 1902 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1903 ++spte;
9b7a0325 1904 }
9b7a0325 1905 }
c7addb90 1906 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 1907 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
1908 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
1909 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
1910 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 1911 }
da4a00f0
AK
1912}
1913
a436036b
AK
1914int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1915{
10589a46
MT
1916 gpa_t gpa;
1917 int r;
a436036b 1918
10589a46 1919 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 1920
aaee2c94 1921 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 1922 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 1923 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 1924 return r;
a436036b 1925}
577bdc49 1926EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 1927
22d95b12 1928void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 1929{
f05e70ac 1930 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1931 struct kvm_mmu_page *sp;
ebeace86 1932
f05e70ac 1933 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
1934 struct kvm_mmu_page, link);
1935 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1936 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1937 }
1938}
ebeace86 1939
3067714c
AK
1940int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1941{
1942 int r;
1943 enum emulation_result er;
1944
ad312c7c 1945 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1946 if (r < 0)
1947 goto out;
1948
1949 if (!r) {
1950 r = 1;
1951 goto out;
1952 }
1953
b733bfb5
AK
1954 r = mmu_topup_memory_caches(vcpu);
1955 if (r)
1956 goto out;
1957
3067714c 1958 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
1959
1960 switch (er) {
1961 case EMULATE_DONE:
1962 return 1;
1963 case EMULATE_DO_MMIO:
1964 ++vcpu->stat.mmio_exits;
1965 return 0;
1966 case EMULATE_FAIL:
1967 kvm_report_emulation_failure(vcpu, "pagetable");
1968 return 1;
1969 default:
1970 BUG();
1971 }
1972out:
3067714c
AK
1973 return r;
1974}
1975EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1976
18552672
JR
1977void kvm_enable_tdp(void)
1978{
1979 tdp_enabled = true;
1980}
1981EXPORT_SYMBOL_GPL(kvm_enable_tdp);
1982
5f4cb662
JR
1983void kvm_disable_tdp(void)
1984{
1985 tdp_enabled = false;
1986}
1987EXPORT_SYMBOL_GPL(kvm_disable_tdp);
1988
6aa8b732
AK
1989static void free_mmu_pages(struct kvm_vcpu *vcpu)
1990{
4db35314 1991 struct kvm_mmu_page *sp;
6aa8b732 1992
f05e70ac
ZX
1993 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1994 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
1995 struct kvm_mmu_page, link);
1996 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 1997 cond_resched();
f51234c2 1998 }
ad312c7c 1999 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2000}
2001
2002static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2003{
17ac10ad 2004 struct page *page;
6aa8b732
AK
2005 int i;
2006
2007 ASSERT(vcpu);
2008
f05e70ac
ZX
2009 if (vcpu->kvm->arch.n_requested_mmu_pages)
2010 vcpu->kvm->arch.n_free_mmu_pages =
2011 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2012 else
f05e70ac
ZX
2013 vcpu->kvm->arch.n_free_mmu_pages =
2014 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2015 /*
2016 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2017 * Therefore we need to allocate shadow page tables in the first
2018 * 4GB of memory, which happens to fit the DMA32 zone.
2019 */
2020 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2021 if (!page)
2022 goto error_1;
ad312c7c 2023 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2024 for (i = 0; i < 4; ++i)
ad312c7c 2025 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2026
6aa8b732
AK
2027 return 0;
2028
2029error_1:
2030 free_mmu_pages(vcpu);
2031 return -ENOMEM;
2032}
2033
8018c27b 2034int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2035{
6aa8b732 2036 ASSERT(vcpu);
ad312c7c 2037 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2038
8018c27b
IM
2039 return alloc_mmu_pages(vcpu);
2040}
6aa8b732 2041
8018c27b
IM
2042int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2043{
2044 ASSERT(vcpu);
ad312c7c 2045 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2046
8018c27b 2047 return init_kvm_mmu(vcpu);
6aa8b732
AK
2048}
2049
2050void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2051{
2052 ASSERT(vcpu);
2053
2054 destroy_kvm_mmu(vcpu);
2055 free_mmu_pages(vcpu);
714b93da 2056 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2057}
2058
90cb0529 2059void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2060{
4db35314 2061 struct kvm_mmu_page *sp;
6aa8b732 2062
f05e70ac 2063 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2064 int i;
2065 u64 *pt;
2066
4db35314 2067 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
2068 continue;
2069
4db35314 2070 pt = sp->spt;
6aa8b732
AK
2071 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2072 /* avoid RMW */
9647c14c 2073 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2074 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
2075 }
2076}
37a7d8b0 2077
90cb0529 2078void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2079{
4db35314 2080 struct kvm_mmu_page *sp, *node;
e0fa826f 2081
aaee2c94 2082 spin_lock(&kvm->mmu_lock);
f05e70ac 2083 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 2084 kvm_mmu_zap_page(kvm, sp);
aaee2c94 2085 spin_unlock(&kvm->mmu_lock);
e0fa826f 2086
90cb0529 2087 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2088}
2089
8b2cf73c 2090static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2091{
2092 struct kvm_mmu_page *page;
2093
2094 page = container_of(kvm->arch.active_mmu_pages.prev,
2095 struct kvm_mmu_page, link);
2096 kvm_mmu_zap_page(kvm, page);
2097}
2098
2099static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2100{
2101 struct kvm *kvm;
2102 struct kvm *kvm_freed = NULL;
2103 int cache_count = 0;
2104
2105 spin_lock(&kvm_lock);
2106
2107 list_for_each_entry(kvm, &vm_list, vm_list) {
2108 int npages;
2109
5a4c9288
MT
2110 if (!down_read_trylock(&kvm->slots_lock))
2111 continue;
3ee16c81
IE
2112 spin_lock(&kvm->mmu_lock);
2113 npages = kvm->arch.n_alloc_mmu_pages -
2114 kvm->arch.n_free_mmu_pages;
2115 cache_count += npages;
2116 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2117 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2118 cache_count--;
2119 kvm_freed = kvm;
2120 }
2121 nr_to_scan--;
2122
2123 spin_unlock(&kvm->mmu_lock);
5a4c9288 2124 up_read(&kvm->slots_lock);
3ee16c81
IE
2125 }
2126 if (kvm_freed)
2127 list_move_tail(&kvm_freed->vm_list, &vm_list);
2128
2129 spin_unlock(&kvm_lock);
2130
2131 return cache_count;
2132}
2133
2134static struct shrinker mmu_shrinker = {
2135 .shrink = mmu_shrink,
2136 .seeks = DEFAULT_SEEKS * 10,
2137};
2138
2ddfd20e 2139static void mmu_destroy_caches(void)
b5a33a75
AK
2140{
2141 if (pte_chain_cache)
2142 kmem_cache_destroy(pte_chain_cache);
2143 if (rmap_desc_cache)
2144 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2145 if (mmu_page_header_cache)
2146 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2147}
2148
3ee16c81
IE
2149void kvm_mmu_module_exit(void)
2150{
2151 mmu_destroy_caches();
2152 unregister_shrinker(&mmu_shrinker);
2153}
2154
b5a33a75
AK
2155int kvm_mmu_module_init(void)
2156{
2157 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2158 sizeof(struct kvm_pte_chain),
20c2df83 2159 0, 0, NULL);
b5a33a75
AK
2160 if (!pte_chain_cache)
2161 goto nomem;
2162 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2163 sizeof(struct kvm_rmap_desc),
20c2df83 2164 0, 0, NULL);
b5a33a75
AK
2165 if (!rmap_desc_cache)
2166 goto nomem;
2167
d3d25b04
AK
2168 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2169 sizeof(struct kvm_mmu_page),
20c2df83 2170 0, 0, NULL);
d3d25b04
AK
2171 if (!mmu_page_header_cache)
2172 goto nomem;
2173
3ee16c81
IE
2174 register_shrinker(&mmu_shrinker);
2175
b5a33a75
AK
2176 return 0;
2177
2178nomem:
3ee16c81 2179 mmu_destroy_caches();
b5a33a75
AK
2180 return -ENOMEM;
2181}
2182
3ad82a7e
ZX
2183/*
2184 * Caculate mmu pages needed for kvm.
2185 */
2186unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2187{
2188 int i;
2189 unsigned int nr_mmu_pages;
2190 unsigned int nr_pages = 0;
2191
2192 for (i = 0; i < kvm->nmemslots; i++)
2193 nr_pages += kvm->memslots[i].npages;
2194
2195 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2196 nr_mmu_pages = max(nr_mmu_pages,
2197 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2198
2199 return nr_mmu_pages;
2200}
2201
2f333bcb
MT
2202static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2203 unsigned len)
2204{
2205 if (len > buffer->len)
2206 return NULL;
2207 return buffer->ptr;
2208}
2209
2210static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2211 unsigned len)
2212{
2213 void *ret;
2214
2215 ret = pv_mmu_peek_buffer(buffer, len);
2216 if (!ret)
2217 return ret;
2218 buffer->ptr += len;
2219 buffer->len -= len;
2220 buffer->processed += len;
2221 return ret;
2222}
2223
2224static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2225 gpa_t addr, gpa_t value)
2226{
2227 int bytes = 8;
2228 int r;
2229
2230 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2231 bytes = 4;
2232
2233 r = mmu_topup_memory_caches(vcpu);
2234 if (r)
2235 return r;
2236
3200f405 2237 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2238 return -EFAULT;
2239
2240 return 1;
2241}
2242
2243static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2244{
2245 kvm_x86_ops->tlb_flush(vcpu);
2246 return 1;
2247}
2248
2249static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2250{
2251 spin_lock(&vcpu->kvm->mmu_lock);
2252 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2253 spin_unlock(&vcpu->kvm->mmu_lock);
2254 return 1;
2255}
2256
2257static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2258 struct kvm_pv_mmu_op_buffer *buffer)
2259{
2260 struct kvm_mmu_op_header *header;
2261
2262 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2263 if (!header)
2264 return 0;
2265 switch (header->op) {
2266 case KVM_MMU_OP_WRITE_PTE: {
2267 struct kvm_mmu_op_write_pte *wpte;
2268
2269 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2270 if (!wpte)
2271 return 0;
2272 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2273 wpte->pte_val);
2274 }
2275 case KVM_MMU_OP_FLUSH_TLB: {
2276 struct kvm_mmu_op_flush_tlb *ftlb;
2277
2278 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2279 if (!ftlb)
2280 return 0;
2281 return kvm_pv_mmu_flush_tlb(vcpu);
2282 }
2283 case KVM_MMU_OP_RELEASE_PT: {
2284 struct kvm_mmu_op_release_pt *rpt;
2285
2286 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2287 if (!rpt)
2288 return 0;
2289 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2290 }
2291 default: return 0;
2292 }
2293}
2294
2295int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2296 gpa_t addr, unsigned long *ret)
2297{
2298 int r;
2299 struct kvm_pv_mmu_op_buffer buffer;
2300
2f333bcb
MT
2301 buffer.ptr = buffer.buf;
2302 buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
2303 buffer.processed = 0;
2304
2305 r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
2306 if (r)
2307 goto out;
2308
2309 while (buffer.len) {
2310 r = kvm_pv_mmu_op_one(vcpu, &buffer);
2311 if (r < 0)
2312 goto out;
2313 if (r == 0)
2314 break;
2315 }
2316
2317 r = 1;
2318out:
2319 *ret = buffer.processed;
2f333bcb
MT
2320 return r;
2321}
2322
37a7d8b0
AK
2323#ifdef AUDIT
2324
2325static const char *audit_msg;
2326
2327static gva_t canonicalize(gva_t gva)
2328{
2329#ifdef CONFIG_X86_64
2330 gva = (long long)(gva << 16) >> 16;
2331#endif
2332 return gva;
2333}
2334
2335static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2336 gva_t va, int level)
2337{
2338 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2339 int i;
2340 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2341
2342 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2343 u64 ent = pt[i];
2344
c7addb90 2345 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2346 continue;
2347
2348 va = canonicalize(va);
c7addb90
AK
2349 if (level > 1) {
2350 if (ent == shadow_notrap_nonpresent_pte)
2351 printk(KERN_ERR "audit: (%s) nontrapping pte"
2352 " in nonleaf level: levels %d gva %lx"
2353 " level %d pte %llx\n", audit_msg,
ad312c7c 2354 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2355
37a7d8b0 2356 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2357 } else {
ad312c7c 2358 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2359 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2360
c7addb90 2361 if (is_shadow_present_pte(ent)
37a7d8b0 2362 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2363 printk(KERN_ERR "xx audit error: (%s) levels %d"
2364 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2365 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2366 va, gpa, hpa, ent,
2367 is_shadow_present_pte(ent));
c7addb90
AK
2368 else if (ent == shadow_notrap_nonpresent_pte
2369 && !is_error_hpa(hpa))
2370 printk(KERN_ERR "audit: (%s) notrap shadow,"
2371 " valid guest gva %lx\n", audit_msg, va);
35149e21 2372 kvm_release_pfn_clean(pfn);
c7addb90 2373
37a7d8b0
AK
2374 }
2375 }
2376}
2377
2378static void audit_mappings(struct kvm_vcpu *vcpu)
2379{
1ea252af 2380 unsigned i;
37a7d8b0 2381
ad312c7c
ZX
2382 if (vcpu->arch.mmu.root_level == 4)
2383 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2384 else
2385 for (i = 0; i < 4; ++i)
ad312c7c 2386 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2387 audit_mappings_page(vcpu,
ad312c7c 2388 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2389 i << 30,
2390 2);
2391}
2392
2393static int count_rmaps(struct kvm_vcpu *vcpu)
2394{
2395 int nmaps = 0;
2396 int i, j, k;
2397
2398 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2399 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2400 struct kvm_rmap_desc *d;
2401
2402 for (j = 0; j < m->npages; ++j) {
290fc38d 2403 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2404
290fc38d 2405 if (!*rmapp)
37a7d8b0 2406 continue;
290fc38d 2407 if (!(*rmapp & 1)) {
37a7d8b0
AK
2408 ++nmaps;
2409 continue;
2410 }
290fc38d 2411 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2412 while (d) {
2413 for (k = 0; k < RMAP_EXT; ++k)
2414 if (d->shadow_ptes[k])
2415 ++nmaps;
2416 else
2417 break;
2418 d = d->more;
2419 }
2420 }
2421 }
2422 return nmaps;
2423}
2424
2425static int count_writable_mappings(struct kvm_vcpu *vcpu)
2426{
2427 int nmaps = 0;
4db35314 2428 struct kvm_mmu_page *sp;
37a7d8b0
AK
2429 int i;
2430
f05e70ac 2431 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2432 u64 *pt = sp->spt;
37a7d8b0 2433
4db35314 2434 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2435 continue;
2436
2437 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2438 u64 ent = pt[i];
2439
2440 if (!(ent & PT_PRESENT_MASK))
2441 continue;
2442 if (!(ent & PT_WRITABLE_MASK))
2443 continue;
2444 ++nmaps;
2445 }
2446 }
2447 return nmaps;
2448}
2449
2450static void audit_rmap(struct kvm_vcpu *vcpu)
2451{
2452 int n_rmap = count_rmaps(vcpu);
2453 int n_actual = count_writable_mappings(vcpu);
2454
2455 if (n_rmap != n_actual)
2456 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2457 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2458}
2459
2460static void audit_write_protection(struct kvm_vcpu *vcpu)
2461{
4db35314 2462 struct kvm_mmu_page *sp;
290fc38d
IE
2463 struct kvm_memory_slot *slot;
2464 unsigned long *rmapp;
2465 gfn_t gfn;
37a7d8b0 2466
f05e70ac 2467 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2468 if (sp->role.metaphysical)
37a7d8b0
AK
2469 continue;
2470
4db35314
AK
2471 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2472 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2473 rmapp = &slot->rmap[gfn - slot->base_gfn];
2474 if (*rmapp)
37a7d8b0
AK
2475 printk(KERN_ERR "%s: (%s) shadow page has writable"
2476 " mappings: gfn %lx role %x\n",
b8688d51 2477 __func__, audit_msg, sp->gfn,
4db35314 2478 sp->role.word);
37a7d8b0
AK
2479 }
2480}
2481
2482static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2483{
2484 int olddbg = dbg;
2485
2486 dbg = 0;
2487 audit_msg = msg;
2488 audit_rmap(vcpu);
2489 audit_write_protection(vcpu);
2490 audit_mappings(vcpu);
2491 dbg = olddbg;
2492}
2493
2494#endif