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KVM: MMU: Add generic shadow walker
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
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33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
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73#ifndef MMU_DEBUG
74#define ASSERT(x) do { } while (0)
75#else
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76#define ASSERT(x) \
77 if (!(x)) { \
78 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
79 __FILE__, __LINE__, #x); \
80 }
d6c69ee9 81#endif
6aa8b732 82
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83#define PT_FIRST_AVAIL_BITS_SHIFT 9
84#define PT64_SECOND_AVAIL_BITS_SHIFT 52
85
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86#define VALID_PAGE(x) ((x) != INVALID_PAGE)
87
88#define PT64_LEVEL_BITS 9
89
90#define PT64_LEVEL_SHIFT(level) \
d77c26fc 91 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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92
93#define PT64_LEVEL_MASK(level) \
94 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
95
96#define PT64_INDEX(address, level)\
97 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
98
99
100#define PT32_LEVEL_BITS 10
101
102#define PT32_LEVEL_SHIFT(level) \
d77c26fc 103 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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104
105#define PT32_LEVEL_MASK(level) \
106 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
107
108#define PT32_INDEX(address, level)\
109 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
110
111
27aba766 112#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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113#define PT64_DIR_BASE_ADDR_MASK \
114 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
115
116#define PT32_BASE_ADDR_MASK PAGE_MASK
117#define PT32_DIR_BASE_ADDR_MASK \
118 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
119
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120#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
121 | PT64_NX_MASK)
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122
123#define PFERR_PRESENT_MASK (1U << 0)
124#define PFERR_WRITE_MASK (1U << 1)
125#define PFERR_USER_MASK (1U << 2)
73b1087e 126#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 127
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128#define PT_DIRECTORY_LEVEL 2
129#define PT_PAGE_TABLE_LEVEL 1
130
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131#define RMAP_EXT 4
132
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133#define ACC_EXEC_MASK 1
134#define ACC_WRITE_MASK PT_WRITABLE_MASK
135#define ACC_USER_MASK PT_USER_MASK
136#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
137
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138#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
139
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140struct kvm_rmap_desc {
141 u64 *shadow_ptes[RMAP_EXT];
142 struct kvm_rmap_desc *more;
143};
144
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145struct kvm_shadow_walk {
146 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
147 gva_t addr, u64 *spte, int level);
148};
149
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150static struct kmem_cache *pte_chain_cache;
151static struct kmem_cache *rmap_desc_cache;
d3d25b04 152static struct kmem_cache *mmu_page_header_cache;
b5a33a75 153
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154static u64 __read_mostly shadow_trap_nonpresent_pte;
155static u64 __read_mostly shadow_notrap_nonpresent_pte;
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156static u64 __read_mostly shadow_base_present_pte;
157static u64 __read_mostly shadow_nx_mask;
158static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
159static u64 __read_mostly shadow_user_mask;
160static u64 __read_mostly shadow_accessed_mask;
161static u64 __read_mostly shadow_dirty_mask;
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162
163void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
164{
165 shadow_trap_nonpresent_pte = trap_pte;
166 shadow_notrap_nonpresent_pte = notrap_pte;
167}
168EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
169
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SY
170void kvm_mmu_set_base_ptes(u64 base_pte)
171{
172 shadow_base_present_pte = base_pte;
173}
174EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
175
176void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
177 u64 dirty_mask, u64 nx_mask, u64 x_mask)
178{
179 shadow_user_mask = user_mask;
180 shadow_accessed_mask = accessed_mask;
181 shadow_dirty_mask = dirty_mask;
182 shadow_nx_mask = nx_mask;
183 shadow_x_mask = x_mask;
184}
185EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
186
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187static int is_write_protection(struct kvm_vcpu *vcpu)
188{
ad312c7c 189 return vcpu->arch.cr0 & X86_CR0_WP;
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190}
191
192static int is_cpuid_PSE36(void)
193{
194 return 1;
195}
196
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197static int is_nx(struct kvm_vcpu *vcpu)
198{
ad312c7c 199 return vcpu->arch.shadow_efer & EFER_NX;
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200}
201
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202static int is_present_pte(unsigned long pte)
203{
204 return pte & PT_PRESENT_MASK;
205}
206
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207static int is_shadow_present_pte(u64 pte)
208{
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209 return pte != shadow_trap_nonpresent_pte
210 && pte != shadow_notrap_nonpresent_pte;
211}
212
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213static int is_large_pte(u64 pte)
214{
215 return pte & PT_PAGE_SIZE_MASK;
216}
217
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218static int is_writeble_pte(unsigned long pte)
219{
220 return pte & PT_WRITABLE_MASK;
221}
222
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223static int is_dirty_pte(unsigned long pte)
224{
7b52345e 225 return pte & shadow_dirty_mask;
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226}
227
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228static int is_rmap_pte(u64 pte)
229{
4b1a80fa 230 return is_shadow_present_pte(pte);
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231}
232
35149e21 233static pfn_t spte_to_pfn(u64 pte)
0b49ea86 234{
35149e21 235 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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236}
237
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238static gfn_t pse36_gfn_delta(u32 gpte)
239{
240 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
241
242 return (gpte & PT32_DIR_PSE36_MASK) << shift;
243}
244
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245static void set_shadow_pte(u64 *sptep, u64 spte)
246{
247#ifdef CONFIG_X86_64
248 set_64bit((unsigned long *)sptep, spte);
249#else
250 set_64bit((unsigned long long *)sptep, spte);
251#endif
252}
253
e2dec939 254static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 255 struct kmem_cache *base_cache, int min)
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256{
257 void *obj;
258
259 if (cache->nobjs >= min)
e2dec939 260 return 0;
714b93da 261 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 262 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 263 if (!obj)
e2dec939 264 return -ENOMEM;
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265 cache->objects[cache->nobjs++] = obj;
266 }
e2dec939 267 return 0;
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268}
269
270static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
271{
272 while (mc->nobjs)
273 kfree(mc->objects[--mc->nobjs]);
274}
275
c1158e63 276static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 277 int min)
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278{
279 struct page *page;
280
281 if (cache->nobjs >= min)
282 return 0;
283 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 284 page = alloc_page(GFP_KERNEL);
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285 if (!page)
286 return -ENOMEM;
287 set_page_private(page, 0);
288 cache->objects[cache->nobjs++] = page_address(page);
289 }
290 return 0;
291}
292
293static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
294{
295 while (mc->nobjs)
c4d198d5 296 free_page((unsigned long)mc->objects[--mc->nobjs]);
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297}
298
2e3e5882 299static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 300{
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301 int r;
302
ad312c7c 303 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 304 pte_chain_cache, 4);
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305 if (r)
306 goto out;
ad312c7c 307 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 308 rmap_desc_cache, 1);
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309 if (r)
310 goto out;
ad312c7c 311 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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312 if (r)
313 goto out;
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 315 mmu_page_header_cache, 4);
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316out:
317 return r;
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318}
319
320static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
321{
ad312c7c
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322 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
323 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
324 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
325 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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326}
327
328static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
329 size_t size)
330{
331 void *p;
332
333 BUG_ON(!mc->nobjs);
334 p = mc->objects[--mc->nobjs];
335 memset(p, 0, size);
336 return p;
337}
338
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339static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
340{
ad312c7c 341 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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342 sizeof(struct kvm_pte_chain));
343}
344
90cb0529 345static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 346{
90cb0529 347 kfree(pc);
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348}
349
350static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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353 sizeof(struct kvm_rmap_desc));
354}
355
90cb0529 356static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 357{
90cb0529 358 kfree(rd);
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359}
360
05da4558
MT
361/*
362 * Return the pointer to the largepage write count for a given
363 * gfn, handling slots that are not large page aligned.
364 */
365static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
366{
367 unsigned long idx;
368
369 idx = (gfn / KVM_PAGES_PER_HPAGE) -
370 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
371 return &slot->lpage_info[idx].write_count;
372}
373
374static void account_shadowed(struct kvm *kvm, gfn_t gfn)
375{
376 int *write_count;
377
378 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
379 *write_count += 1;
05da4558
MT
380}
381
382static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
383{
384 int *write_count;
385
386 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
387 *write_count -= 1;
388 WARN_ON(*write_count < 0);
389}
390
391static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
392{
393 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
394 int *largepage_idx;
395
396 if (slot) {
397 largepage_idx = slot_largepage_idx(gfn, slot);
398 return *largepage_idx;
399 }
400
401 return 1;
402}
403
404static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
405{
406 struct vm_area_struct *vma;
407 unsigned long addr;
408
409 addr = gfn_to_hva(kvm, gfn);
410 if (kvm_is_error_hva(addr))
411 return 0;
412
413 vma = find_vma(current->mm, addr);
414 if (vma && is_vm_hugetlb_page(vma))
415 return 1;
416
417 return 0;
418}
419
420static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
421{
422 struct kvm_memory_slot *slot;
423
424 if (has_wrprotected_page(vcpu->kvm, large_gfn))
425 return 0;
426
427 if (!host_largepage_backed(vcpu->kvm, large_gfn))
428 return 0;
429
430 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
431 if (slot && slot->dirty_bitmap)
432 return 0;
433
434 return 1;
435}
436
290fc38d
IE
437/*
438 * Take gfn and return the reverse mapping to it.
439 * Note: gfn must be unaliased before this function get called
440 */
441
05da4558 442static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
443{
444 struct kvm_memory_slot *slot;
05da4558 445 unsigned long idx;
290fc38d
IE
446
447 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
448 if (!lpage)
449 return &slot->rmap[gfn - slot->base_gfn];
450
451 idx = (gfn / KVM_PAGES_PER_HPAGE) -
452 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
453
454 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
455}
456
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457/*
458 * Reverse mapping data structures:
459 *
290fc38d
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460 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
461 * that points to page_address(page).
cd4a4e53 462 *
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463 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
464 * containing more mappings.
cd4a4e53 465 */
05da4558 466static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 467{
4db35314 468 struct kvm_mmu_page *sp;
cd4a4e53 469 struct kvm_rmap_desc *desc;
290fc38d 470 unsigned long *rmapp;
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471 int i;
472
473 if (!is_rmap_pte(*spte))
474 return;
290fc38d 475 gfn = unalias_gfn(vcpu->kvm, gfn);
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476 sp = page_header(__pa(spte));
477 sp->gfns[spte - sp->spt] = gfn;
05da4558 478 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 479 if (!*rmapp) {
cd4a4e53 480 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
481 *rmapp = (unsigned long)spte;
482 } else if (!(*rmapp & 1)) {
cd4a4e53 483 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 484 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 485 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 486 desc->shadow_ptes[1] = spte;
290fc38d 487 *rmapp = (unsigned long)desc | 1;
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488 } else {
489 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 490 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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491 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
492 desc = desc->more;
493 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 494 desc->more = mmu_alloc_rmap_desc(vcpu);
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495 desc = desc->more;
496 }
497 for (i = 0; desc->shadow_ptes[i]; ++i)
498 ;
499 desc->shadow_ptes[i] = spte;
500 }
501}
502
290fc38d 503static void rmap_desc_remove_entry(unsigned long *rmapp,
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504 struct kvm_rmap_desc *desc,
505 int i,
506 struct kvm_rmap_desc *prev_desc)
507{
508 int j;
509
510 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
511 ;
512 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 513 desc->shadow_ptes[j] = NULL;
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514 if (j != 0)
515 return;
516 if (!prev_desc && !desc->more)
290fc38d 517 *rmapp = (unsigned long)desc->shadow_ptes[0];
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518 else
519 if (prev_desc)
520 prev_desc->more = desc->more;
521 else
290fc38d 522 *rmapp = (unsigned long)desc->more | 1;
90cb0529 523 mmu_free_rmap_desc(desc);
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524}
525
290fc38d 526static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 527{
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528 struct kvm_rmap_desc *desc;
529 struct kvm_rmap_desc *prev_desc;
4db35314 530 struct kvm_mmu_page *sp;
35149e21 531 pfn_t pfn;
290fc38d 532 unsigned long *rmapp;
cd4a4e53
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533 int i;
534
535 if (!is_rmap_pte(*spte))
536 return;
4db35314 537 sp = page_header(__pa(spte));
35149e21 538 pfn = spte_to_pfn(*spte);
7b52345e 539 if (*spte & shadow_accessed_mask)
35149e21 540 kvm_set_pfn_accessed(pfn);
b4231d61 541 if (is_writeble_pte(*spte))
35149e21 542 kvm_release_pfn_dirty(pfn);
b4231d61 543 else
35149e21 544 kvm_release_pfn_clean(pfn);
05da4558 545 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 546 if (!*rmapp) {
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547 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
548 BUG();
290fc38d 549 } else if (!(*rmapp & 1)) {
cd4a4e53 550 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 551 if ((u64 *)*rmapp != spte) {
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552 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
553 spte, *spte);
554 BUG();
555 }
290fc38d 556 *rmapp = 0;
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557 } else {
558 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 559 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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560 prev_desc = NULL;
561 while (desc) {
562 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
563 if (desc->shadow_ptes[i] == spte) {
290fc38d 564 rmap_desc_remove_entry(rmapp,
714b93da 565 desc, i,
cd4a4e53
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566 prev_desc);
567 return;
568 }
569 prev_desc = desc;
570 desc = desc->more;
571 }
572 BUG();
573 }
574}
575
98348e95 576static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 577{
374cbac0 578 struct kvm_rmap_desc *desc;
98348e95
IE
579 struct kvm_rmap_desc *prev_desc;
580 u64 *prev_spte;
581 int i;
582
583 if (!*rmapp)
584 return NULL;
585 else if (!(*rmapp & 1)) {
586 if (!spte)
587 return (u64 *)*rmapp;
588 return NULL;
589 }
590 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
591 prev_desc = NULL;
592 prev_spte = NULL;
593 while (desc) {
594 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
595 if (prev_spte == spte)
596 return desc->shadow_ptes[i];
597 prev_spte = desc->shadow_ptes[i];
598 }
599 desc = desc->more;
600 }
601 return NULL;
602}
603
604static void rmap_write_protect(struct kvm *kvm, u64 gfn)
605{
290fc38d 606 unsigned long *rmapp;
374cbac0 607 u64 *spte;
caa5b8a5 608 int write_protected = 0;
374cbac0 609
4a4c9924 610 gfn = unalias_gfn(kvm, gfn);
05da4558 611 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 612
98348e95
IE
613 spte = rmap_next(kvm, rmapp, NULL);
614 while (spte) {
374cbac0 615 BUG_ON(!spte);
374cbac0 616 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 617 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 618 if (is_writeble_pte(*spte)) {
9647c14c 619 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
620 write_protected = 1;
621 }
9647c14c 622 spte = rmap_next(kvm, rmapp, spte);
374cbac0 623 }
855149aa 624 if (write_protected) {
35149e21 625 pfn_t pfn;
855149aa
IE
626
627 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
628 pfn = spte_to_pfn(*spte);
629 kvm_set_pfn_dirty(pfn);
855149aa
IE
630 }
631
05da4558
MT
632 /* check for huge page mappings */
633 rmapp = gfn_to_rmap(kvm, gfn, 1);
634 spte = rmap_next(kvm, rmapp, NULL);
635 while (spte) {
636 BUG_ON(!spte);
637 BUG_ON(!(*spte & PT_PRESENT_MASK));
638 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
639 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
640 if (is_writeble_pte(*spte)) {
641 rmap_remove(kvm, spte);
642 --kvm->stat.lpages;
643 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 644 spte = NULL;
05da4558
MT
645 write_protected = 1;
646 }
647 spte = rmap_next(kvm, rmapp, spte);
648 }
649
caa5b8a5
ED
650 if (write_protected)
651 kvm_flush_remote_tlbs(kvm);
05da4558
MT
652
653 account_shadowed(kvm, gfn);
374cbac0
AK
654}
655
e930bffe
AA
656static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
657{
658 u64 *spte;
659 int need_tlb_flush = 0;
660
661 while ((spte = rmap_next(kvm, rmapp, NULL))) {
662 BUG_ON(!(*spte & PT_PRESENT_MASK));
663 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
664 rmap_remove(kvm, spte);
665 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
666 need_tlb_flush = 1;
667 }
668 return need_tlb_flush;
669}
670
671static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
672 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
673{
674 int i;
675 int retval = 0;
676
677 /*
678 * If mmap_sem isn't taken, we can look the memslots with only
679 * the mmu_lock by skipping over the slots with userspace_addr == 0.
680 */
681 for (i = 0; i < kvm->nmemslots; i++) {
682 struct kvm_memory_slot *memslot = &kvm->memslots[i];
683 unsigned long start = memslot->userspace_addr;
684 unsigned long end;
685
686 /* mmu_lock protects userspace_addr */
687 if (!start)
688 continue;
689
690 end = start + (memslot->npages << PAGE_SHIFT);
691 if (hva >= start && hva < end) {
692 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
693 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
694 retval |= handler(kvm,
695 &memslot->lpage_info[
696 gfn_offset /
697 KVM_PAGES_PER_HPAGE].rmap_pde);
698 }
699 }
700
701 return retval;
702}
703
704int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
705{
706 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
707}
708
709static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
710{
711 u64 *spte;
712 int young = 0;
713
534e38b4
SY
714 /* always return old for EPT */
715 if (!shadow_accessed_mask)
716 return 0;
717
e930bffe
AA
718 spte = rmap_next(kvm, rmapp, NULL);
719 while (spte) {
720 int _young;
721 u64 _spte = *spte;
722 BUG_ON(!(_spte & PT_PRESENT_MASK));
723 _young = _spte & PT_ACCESSED_MASK;
724 if (_young) {
725 young = 1;
726 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
727 }
728 spte = rmap_next(kvm, rmapp, spte);
729 }
730 return young;
731}
732
733int kvm_age_hva(struct kvm *kvm, unsigned long hva)
734{
735 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
736}
737
d6c69ee9 738#ifdef MMU_DEBUG
47ad8e68 739static int is_empty_shadow_page(u64 *spt)
6aa8b732 740{
139bdb2d
AK
741 u64 *pos;
742 u64 *end;
743
47ad8e68 744 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 745 if (is_shadow_present_pte(*pos)) {
b8688d51 746 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 747 pos, *pos);
6aa8b732 748 return 0;
139bdb2d 749 }
6aa8b732
AK
750 return 1;
751}
d6c69ee9 752#endif
6aa8b732 753
4db35314 754static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 755{
4db35314
AK
756 ASSERT(is_empty_shadow_page(sp->spt));
757 list_del(&sp->link);
758 __free_page(virt_to_page(sp->spt));
759 __free_page(virt_to_page(sp->gfns));
760 kfree(sp);
f05e70ac 761 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
762}
763
cea0f0e7
AK
764static unsigned kvm_page_table_hashfn(gfn_t gfn)
765{
1ae0a13d 766 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
767}
768
25c0de2c
AK
769static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
770 u64 *parent_pte)
6aa8b732 771{
4db35314 772 struct kvm_mmu_page *sp;
6aa8b732 773
ad312c7c
ZX
774 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
775 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
776 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 777 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 778 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
779 ASSERT(is_empty_shadow_page(sp->spt));
780 sp->slot_bitmap = 0;
781 sp->multimapped = 0;
782 sp->parent_pte = parent_pte;
f05e70ac 783 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 784 return sp;
6aa8b732
AK
785}
786
714b93da 787static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 788 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
789{
790 struct kvm_pte_chain *pte_chain;
791 struct hlist_node *node;
792 int i;
793
794 if (!parent_pte)
795 return;
4db35314
AK
796 if (!sp->multimapped) {
797 u64 *old = sp->parent_pte;
cea0f0e7
AK
798
799 if (!old) {
4db35314 800 sp->parent_pte = parent_pte;
cea0f0e7
AK
801 return;
802 }
4db35314 803 sp->multimapped = 1;
714b93da 804 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
805 INIT_HLIST_HEAD(&sp->parent_ptes);
806 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
807 pte_chain->parent_ptes[0] = old;
808 }
4db35314 809 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
810 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
811 continue;
812 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
813 if (!pte_chain->parent_ptes[i]) {
814 pte_chain->parent_ptes[i] = parent_pte;
815 return;
816 }
817 }
714b93da 818 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 819 BUG_ON(!pte_chain);
4db35314 820 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
821 pte_chain->parent_ptes[0] = parent_pte;
822}
823
4db35314 824static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
825 u64 *parent_pte)
826{
827 struct kvm_pte_chain *pte_chain;
828 struct hlist_node *node;
829 int i;
830
4db35314
AK
831 if (!sp->multimapped) {
832 BUG_ON(sp->parent_pte != parent_pte);
833 sp->parent_pte = NULL;
cea0f0e7
AK
834 return;
835 }
4db35314 836 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
837 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
838 if (!pte_chain->parent_ptes[i])
839 break;
840 if (pte_chain->parent_ptes[i] != parent_pte)
841 continue;
697fe2e2
AK
842 while (i + 1 < NR_PTE_CHAIN_ENTRIES
843 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
844 pte_chain->parent_ptes[i]
845 = pte_chain->parent_ptes[i + 1];
846 ++i;
847 }
848 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
849 if (i == 0) {
850 hlist_del(&pte_chain->link);
90cb0529 851 mmu_free_pte_chain(pte_chain);
4db35314
AK
852 if (hlist_empty(&sp->parent_ptes)) {
853 sp->multimapped = 0;
854 sp->parent_pte = NULL;
697fe2e2
AK
855 }
856 }
cea0f0e7
AK
857 return;
858 }
859 BUG();
860}
861
d761a501
AK
862static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
863 struct kvm_mmu_page *sp)
864{
865 int i;
866
867 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
868 sp->spt[i] = shadow_trap_nonpresent_pte;
869}
870
4db35314 871static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
872{
873 unsigned index;
874 struct hlist_head *bucket;
4db35314 875 struct kvm_mmu_page *sp;
cea0f0e7
AK
876 struct hlist_node *node;
877
b8688d51 878 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 879 index = kvm_page_table_hashfn(gfn);
f05e70ac 880 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 881 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
882 if (sp->gfn == gfn && !sp->role.metaphysical
883 && !sp->role.invalid) {
cea0f0e7 884 pgprintk("%s: found role %x\n",
b8688d51 885 __func__, sp->role.word);
4db35314 886 return sp;
cea0f0e7
AK
887 }
888 return NULL;
889}
890
891static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
892 gfn_t gfn,
893 gva_t gaddr,
894 unsigned level,
895 int metaphysical,
41074d07 896 unsigned access,
f7d9c7b7 897 u64 *parent_pte)
cea0f0e7
AK
898{
899 union kvm_mmu_page_role role;
900 unsigned index;
901 unsigned quadrant;
902 struct hlist_head *bucket;
4db35314 903 struct kvm_mmu_page *sp;
cea0f0e7
AK
904 struct hlist_node *node;
905
906 role.word = 0;
ad312c7c 907 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
908 role.level = level;
909 role.metaphysical = metaphysical;
41074d07 910 role.access = access;
ad312c7c 911 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
912 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
913 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
914 role.quadrant = quadrant;
915 }
b8688d51 916 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 917 gfn, role.word);
1ae0a13d 918 index = kvm_page_table_hashfn(gfn);
f05e70ac 919 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
920 hlist_for_each_entry(sp, node, bucket, hash_link)
921 if (sp->gfn == gfn && sp->role.word == role.word) {
922 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
b8688d51 923 pgprintk("%s: found\n", __func__);
4db35314 924 return sp;
cea0f0e7 925 }
dfc5aa00 926 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
927 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
928 if (!sp)
929 return sp;
b8688d51 930 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
931 sp->gfn = gfn;
932 sp->role = role;
933 hlist_add_head(&sp->hash_link, bucket);
374cbac0 934 if (!metaphysical)
4a4c9924 935 rmap_write_protect(vcpu->kvm, gfn);
131d8279
AK
936 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
937 vcpu->arch.mmu.prefetch_page(vcpu, sp);
938 else
939 nonpaging_prefetch_page(vcpu, sp);
4db35314 940 return sp;
cea0f0e7
AK
941}
942
3d000db5
AK
943static int walk_shadow(struct kvm_shadow_walk *walker,
944 struct kvm_vcpu *vcpu, gva_t addr)
945{
946 hpa_t shadow_addr;
947 int level;
948 int r;
949 u64 *sptep;
950 unsigned index;
951
952 shadow_addr = vcpu->arch.mmu.root_hpa;
953 level = vcpu->arch.mmu.shadow_root_level;
954 if (level == PT32E_ROOT_LEVEL) {
955 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
956 shadow_addr &= PT64_BASE_ADDR_MASK;
957 --level;
958 }
959
960 while (level >= PT_PAGE_TABLE_LEVEL) {
961 index = SHADOW_PT_INDEX(addr, level);
962 sptep = ((u64 *)__va(shadow_addr)) + index;
963 r = walker->entry(walker, vcpu, addr, sptep, level);
964 if (r)
965 return r;
966 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
967 --level;
968 }
969 return 0;
970}
971
90cb0529 972static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 973 struct kvm_mmu_page *sp)
a436036b 974{
697fe2e2
AK
975 unsigned i;
976 u64 *pt;
977 u64 ent;
978
4db35314 979 pt = sp->spt;
697fe2e2 980
4db35314 981 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 982 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 983 if (is_shadow_present_pte(pt[i]))
290fc38d 984 rmap_remove(kvm, &pt[i]);
c7addb90 985 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
986 }
987 return;
988 }
989
990 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
991 ent = pt[i];
992
05da4558
MT
993 if (is_shadow_present_pte(ent)) {
994 if (!is_large_pte(ent)) {
995 ent &= PT64_BASE_ADDR_MASK;
996 mmu_page_remove_parent_pte(page_header(ent),
997 &pt[i]);
998 } else {
999 --kvm->stat.lpages;
1000 rmap_remove(kvm, &pt[i]);
1001 }
1002 }
c7addb90 1003 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1004 }
a436036b
AK
1005}
1006
4db35314 1007static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1008{
4db35314 1009 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1010}
1011
12b7d28f
AK
1012static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1013{
1014 int i;
1015
1016 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1017 if (kvm->vcpus[i])
ad312c7c 1018 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1019}
1020
31aa2b44 1021static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1022{
1023 u64 *parent_pte;
1024
4db35314
AK
1025 while (sp->multimapped || sp->parent_pte) {
1026 if (!sp->multimapped)
1027 parent_pte = sp->parent_pte;
a436036b
AK
1028 else {
1029 struct kvm_pte_chain *chain;
1030
4db35314 1031 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1032 struct kvm_pte_chain, link);
1033 parent_pte = chain->parent_ptes[0];
1034 }
697fe2e2 1035 BUG_ON(!parent_pte);
4db35314 1036 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1037 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1038 }
31aa2b44
AK
1039}
1040
1041static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1042{
1043 ++kvm->stat.mmu_shadow_zapped;
4db35314 1044 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1045 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1046 kvm_flush_remote_tlbs(kvm);
1047 if (!sp->role.invalid && !sp->role.metaphysical)
1048 unaccount_shadowed(kvm, sp->gfn);
4db35314
AK
1049 if (!sp->root_count) {
1050 hlist_del(&sp->hash_link);
1051 kvm_mmu_free_page(kvm, sp);
2e53d63a 1052 } else {
2e53d63a 1053 sp->role.invalid = 1;
5b5c6a5a 1054 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1055 kvm_reload_remote_mmus(kvm);
1056 }
12b7d28f 1057 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
1058}
1059
82ce2c96
IE
1060/*
1061 * Changing the number of mmu pages allocated to the vm
1062 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1063 */
1064void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1065{
1066 /*
1067 * If we set the number of mmu pages to be smaller be than the
1068 * number of actived pages , we must to free some mmu pages before we
1069 * change the value
1070 */
1071
f05e70ac 1072 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1073 kvm_nr_mmu_pages) {
f05e70ac
ZX
1074 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1075 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1076
1077 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1078 struct kvm_mmu_page *page;
1079
f05e70ac 1080 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1081 struct kvm_mmu_page, link);
1082 kvm_mmu_zap_page(kvm, page);
1083 n_used_mmu_pages--;
1084 }
f05e70ac 1085 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1086 }
1087 else
f05e70ac
ZX
1088 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1089 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1090
f05e70ac 1091 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1092}
1093
f67a46f4 1094static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1095{
1096 unsigned index;
1097 struct hlist_head *bucket;
4db35314 1098 struct kvm_mmu_page *sp;
a436036b
AK
1099 struct hlist_node *node, *n;
1100 int r;
1101
b8688d51 1102 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1103 r = 0;
1ae0a13d 1104 index = kvm_page_table_hashfn(gfn);
f05e70ac 1105 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1106 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1107 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1108 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314
AK
1109 sp->role.word);
1110 kvm_mmu_zap_page(kvm, sp);
a436036b
AK
1111 r = 1;
1112 }
1113 return r;
cea0f0e7
AK
1114}
1115
f67a46f4 1116static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1117{
4db35314 1118 struct kvm_mmu_page *sp;
97a0a01e 1119
4db35314 1120 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1121 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1122 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1123 }
1124}
1125
38c335f1 1126static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1127{
38c335f1 1128 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1129 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1130
4db35314 1131 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1132}
1133
039576c0
AK
1134struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1135{
72dc67a6
IE
1136 struct page *page;
1137
ad312c7c 1138 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1139
1140 if (gpa == UNMAPPED_GVA)
1141 return NULL;
72dc67a6
IE
1142
1143 down_read(&current->mm->mmap_sem);
1144 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1145 up_read(&current->mm->mmap_sem);
1146
1147 return page;
039576c0
AK
1148}
1149
1c4f1fd6
AK
1150static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1151 unsigned pt_access, unsigned pte_access,
1152 int user_fault, int write_fault, int dirty,
05da4558 1153 int *ptwrite, int largepage, gfn_t gfn,
35149e21 1154 pfn_t pfn, bool speculative)
1c4f1fd6
AK
1155{
1156 u64 spte;
15aaa819 1157 int was_rmapped = 0;
75e68e60 1158 int was_writeble = is_writeble_pte(*shadow_pte);
1c4f1fd6 1159
bc750ba8 1160 pgprintk("%s: spte %llx access %x write_fault %d"
1c4f1fd6 1161 " user_fault %d gfn %lx\n",
b8688d51 1162 __func__, *shadow_pte, pt_access,
1c4f1fd6
AK
1163 write_fault, user_fault, gfn);
1164
15aaa819 1165 if (is_rmap_pte(*shadow_pte)) {
05da4558
MT
1166 /*
1167 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1168 * the parent of the now unreachable PTE.
1169 */
1170 if (largepage && !is_large_pte(*shadow_pte)) {
1171 struct kvm_mmu_page *child;
1172 u64 pte = *shadow_pte;
1173
1174 child = page_header(pte & PT64_BASE_ADDR_MASK);
1175 mmu_page_remove_parent_pte(child, shadow_pte);
35149e21 1176 } else if (pfn != spte_to_pfn(*shadow_pte)) {
15aaa819 1177 pgprintk("hfn old %lx new %lx\n",
35149e21 1178 spte_to_pfn(*shadow_pte), pfn);
15aaa819 1179 rmap_remove(vcpu->kvm, shadow_pte);
05da4558
MT
1180 } else {
1181 if (largepage)
1182 was_rmapped = is_large_pte(*shadow_pte);
1183 else
1184 was_rmapped = 1;
15aaa819 1185 }
15aaa819
MT
1186 }
1187
1c4f1fd6
AK
1188 /*
1189 * We don't set the accessed bit, since we sometimes want to see
1190 * whether the guest actually used the pte (in order to detect
1191 * demand paging).
1192 */
7b52345e 1193 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538
AK
1194 if (!speculative)
1195 pte_access |= PT_ACCESSED_MASK;
1c4f1fd6
AK
1196 if (!dirty)
1197 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1198 if (pte_access & ACC_EXEC_MASK)
1199 spte |= shadow_x_mask;
1200 else
1201 spte |= shadow_nx_mask;
1c4f1fd6 1202 if (pte_access & ACC_USER_MASK)
7b52345e 1203 spte |= shadow_user_mask;
05da4558
MT
1204 if (largepage)
1205 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1206
35149e21 1207 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1208
1209 if ((pte_access & ACC_WRITE_MASK)
1210 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1211 struct kvm_mmu_page *shadow;
1212
1213 spte |= PT_WRITABLE_MASK;
1c4f1fd6
AK
1214
1215 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
05da4558
MT
1216 if (shadow ||
1217 (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
1c4f1fd6 1218 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1219 __func__, gfn);
1c4f1fd6
AK
1220 pte_access &= ~ACC_WRITE_MASK;
1221 if (is_writeble_pte(spte)) {
1222 spte &= ~PT_WRITABLE_MASK;
1223 kvm_x86_ops->tlb_flush(vcpu);
1224 }
1225 if (write_fault)
1226 *ptwrite = 1;
1227 }
1228 }
1229
1c4f1fd6
AK
1230 if (pte_access & ACC_WRITE_MASK)
1231 mark_page_dirty(vcpu->kvm, gfn);
1232
b8688d51 1233 pgprintk("%s: setting spte %llx\n", __func__, spte);
db475c39 1234 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
05da4558
MT
1235 (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
1236 (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
1c4f1fd6 1237 set_shadow_pte(shadow_pte, spte);
05da4558
MT
1238 if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
1239 && (spte & PT_PRESENT_MASK))
1240 ++vcpu->kvm->stat.lpages;
1241
1c4f1fd6
AK
1242 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1243 if (!was_rmapped) {
05da4558 1244 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1245 if (!is_rmap_pte(*shadow_pte))
35149e21 1246 kvm_release_pfn_clean(pfn);
75e68e60
IE
1247 } else {
1248 if (was_writeble)
35149e21 1249 kvm_release_pfn_dirty(pfn);
75e68e60 1250 else
35149e21 1251 kvm_release_pfn_clean(pfn);
1c4f1fd6 1252 }
1b7fcd32 1253 if (speculative) {
ad312c7c 1254 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1255 vcpu->arch.last_pte_gfn = gfn;
1256 }
1c4f1fd6
AK
1257}
1258
6aa8b732
AK
1259static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1260{
1261}
1262
4d9976bb 1263static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
6c41f428 1264 int largepage, gfn_t gfn, pfn_t pfn)
6aa8b732 1265{
ad312c7c 1266 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
e833240f 1267 int pt_write = 0;
6c41f428 1268 int level = vcpu->arch.mmu.shadow_root_level;
6aa8b732
AK
1269
1270 for (; ; level--) {
1271 u32 index = PT64_INDEX(v, level);
1272 u64 *table;
1273
1274 ASSERT(VALID_PAGE(table_addr));
1275 table = __va(table_addr);
1276
6e37d3dc 1277 if (level == 1 || (largepage && level == 2)) {
e833240f 1278 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
6e37d3dc
AK
1279 0, write, 1, &pt_write, largepage,
1280 gfn, pfn, false);
d196e343 1281 return pt_write;
6aa8b732
AK
1282 }
1283
c7addb90 1284 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 1285 struct kvm_mmu_page *new_table;
cea0f0e7 1286 gfn_t pseudo_gfn;
6aa8b732 1287
cea0f0e7
AK
1288 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1289 >> PAGE_SHIFT;
1290 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1291 v, level - 1,
f7d9c7b7 1292 1, ACC_ALL, &table[index]);
25c0de2c 1293 if (!new_table) {
6aa8b732 1294 pgprintk("nonpaging_map: ENOMEM\n");
35149e21 1295 kvm_release_pfn_clean(pfn);
6aa8b732
AK
1296 return -ENOMEM;
1297 }
1298
722c05f2
AK
1299 set_shadow_pte(&table[index],
1300 __pa(new_table->spt)
1301 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1302 | shadow_user_mask | shadow_x_mask);
6aa8b732
AK
1303 }
1304 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1305 }
1306}
1307
10589a46
MT
1308static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1309{
1310 int r;
05da4558 1311 int largepage = 0;
35149e21 1312 pfn_t pfn;
e930bffe 1313 unsigned long mmu_seq;
aaee2c94
MT
1314
1315 down_read(&current->mm->mmap_sem);
05da4558
MT
1316 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1317 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1318 largepage = 1;
1319 }
1320
e930bffe
AA
1321 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1322 /* implicit mb(), we'll read before PT lock is unlocked */
35149e21 1323 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 1324 up_read(&current->mm->mmap_sem);
aaee2c94 1325
d196e343 1326 /* mmio */
35149e21
AL
1327 if (is_error_pfn(pfn)) {
1328 kvm_release_pfn_clean(pfn);
d196e343
AK
1329 return 1;
1330 }
1331
aaee2c94 1332 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1333 if (mmu_notifier_retry(vcpu, mmu_seq))
1334 goto out_unlock;
eb787d10 1335 kvm_mmu_free_some_pages(vcpu);
6c41f428 1336 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1337 spin_unlock(&vcpu->kvm->mmu_lock);
1338
aaee2c94 1339
10589a46 1340 return r;
e930bffe
AA
1341
1342out_unlock:
1343 spin_unlock(&vcpu->kvm->mmu_lock);
1344 kvm_release_pfn_clean(pfn);
1345 return 0;
10589a46
MT
1346}
1347
1348
17ac10ad
AK
1349static void mmu_free_roots(struct kvm_vcpu *vcpu)
1350{
1351 int i;
4db35314 1352 struct kvm_mmu_page *sp;
17ac10ad 1353
ad312c7c 1354 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1355 return;
aaee2c94 1356 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1357 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1358 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1359
4db35314
AK
1360 sp = page_header(root);
1361 --sp->root_count;
2e53d63a
MT
1362 if (!sp->root_count && sp->role.invalid)
1363 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1364 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1365 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1366 return;
1367 }
17ac10ad 1368 for (i = 0; i < 4; ++i) {
ad312c7c 1369 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1370
417726a3 1371 if (root) {
417726a3 1372 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1373 sp = page_header(root);
1374 --sp->root_count;
2e53d63a
MT
1375 if (!sp->root_count && sp->role.invalid)
1376 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1377 }
ad312c7c 1378 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1379 }
aaee2c94 1380 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1381 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1382}
1383
1384static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1385{
1386 int i;
cea0f0e7 1387 gfn_t root_gfn;
4db35314 1388 struct kvm_mmu_page *sp;
fb72d167 1389 int metaphysical = 0;
3bb65a22 1390
ad312c7c 1391 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1392
ad312c7c
ZX
1393 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1394 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1395
1396 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1397 if (tdp_enabled)
1398 metaphysical = 1;
4db35314 1399 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1400 PT64_ROOT_LEVEL, metaphysical,
1401 ACC_ALL, NULL);
4db35314
AK
1402 root = __pa(sp->spt);
1403 ++sp->root_count;
ad312c7c 1404 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1405 return;
1406 }
fb72d167
JR
1407 metaphysical = !is_paging(vcpu);
1408 if (tdp_enabled)
1409 metaphysical = 1;
17ac10ad 1410 for (i = 0; i < 4; ++i) {
ad312c7c 1411 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1412
1413 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1414 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1415 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1416 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1417 continue;
1418 }
ad312c7c
ZX
1419 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1420 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1421 root_gfn = 0;
4db35314 1422 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1423 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1424 ACC_ALL, NULL);
4db35314
AK
1425 root = __pa(sp->spt);
1426 ++sp->root_count;
ad312c7c 1427 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1428 }
ad312c7c 1429 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1430}
1431
6aa8b732
AK
1432static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1433{
1434 return vaddr;
1435}
1436
1437static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1438 u32 error_code)
6aa8b732 1439{
e833240f 1440 gfn_t gfn;
e2dec939 1441 int r;
6aa8b732 1442
b8688d51 1443 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1444 r = mmu_topup_memory_caches(vcpu);
1445 if (r)
1446 return r;
714b93da 1447
6aa8b732 1448 ASSERT(vcpu);
ad312c7c 1449 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1450
e833240f 1451 gfn = gva >> PAGE_SHIFT;
6aa8b732 1452
e833240f
AK
1453 return nonpaging_map(vcpu, gva & PAGE_MASK,
1454 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1455}
1456
fb72d167
JR
1457static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1458 u32 error_code)
1459{
35149e21 1460 pfn_t pfn;
fb72d167 1461 int r;
05da4558
MT
1462 int largepage = 0;
1463 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 1464 unsigned long mmu_seq;
fb72d167
JR
1465
1466 ASSERT(vcpu);
1467 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1468
1469 r = mmu_topup_memory_caches(vcpu);
1470 if (r)
1471 return r;
1472
1473 down_read(&current->mm->mmap_sem);
05da4558
MT
1474 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1475 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1476 largepage = 1;
1477 }
e930bffe
AA
1478 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1479 /* implicit mb(), we'll read before PT lock is unlocked */
35149e21 1480 pfn = gfn_to_pfn(vcpu->kvm, gfn);
3200f405 1481 up_read(&current->mm->mmap_sem);
35149e21
AL
1482 if (is_error_pfn(pfn)) {
1483 kvm_release_pfn_clean(pfn);
fb72d167
JR
1484 return 1;
1485 }
1486 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1487 if (mmu_notifier_retry(vcpu, mmu_seq))
1488 goto out_unlock;
fb72d167
JR
1489 kvm_mmu_free_some_pages(vcpu);
1490 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 1491 largepage, gfn, pfn);
fb72d167 1492 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1493
1494 return r;
e930bffe
AA
1495
1496out_unlock:
1497 spin_unlock(&vcpu->kvm->mmu_lock);
1498 kvm_release_pfn_clean(pfn);
1499 return 0;
fb72d167
JR
1500}
1501
6aa8b732
AK
1502static void nonpaging_free(struct kvm_vcpu *vcpu)
1503{
17ac10ad 1504 mmu_free_roots(vcpu);
6aa8b732
AK
1505}
1506
1507static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1508{
ad312c7c 1509 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1510
1511 context->new_cr3 = nonpaging_new_cr3;
1512 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1513 context->gva_to_gpa = nonpaging_gva_to_gpa;
1514 context->free = nonpaging_free;
c7addb90 1515 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1516 context->root_level = 0;
6aa8b732 1517 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1518 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1519 return 0;
1520}
1521
d835dfec 1522void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1523{
1165f5fe 1524 ++vcpu->stat.tlb_flush;
cbdd1bea 1525 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1526}
1527
1528static void paging_new_cr3(struct kvm_vcpu *vcpu)
1529{
b8688d51 1530 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1531 mmu_free_roots(vcpu);
6aa8b732
AK
1532}
1533
6aa8b732
AK
1534static void inject_page_fault(struct kvm_vcpu *vcpu,
1535 u64 addr,
1536 u32 err_code)
1537{
c3c91fee 1538 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1539}
1540
6aa8b732
AK
1541static void paging_free(struct kvm_vcpu *vcpu)
1542{
1543 nonpaging_free(vcpu);
1544}
1545
1546#define PTTYPE 64
1547#include "paging_tmpl.h"
1548#undef PTTYPE
1549
1550#define PTTYPE 32
1551#include "paging_tmpl.h"
1552#undef PTTYPE
1553
17ac10ad 1554static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1555{
ad312c7c 1556 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1557
1558 ASSERT(is_pae(vcpu));
1559 context->new_cr3 = paging_new_cr3;
1560 context->page_fault = paging64_page_fault;
6aa8b732 1561 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1562 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1563 context->free = paging_free;
17ac10ad
AK
1564 context->root_level = level;
1565 context->shadow_root_level = level;
17c3ba9d 1566 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1567 return 0;
1568}
1569
17ac10ad
AK
1570static int paging64_init_context(struct kvm_vcpu *vcpu)
1571{
1572 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1573}
1574
6aa8b732
AK
1575static int paging32_init_context(struct kvm_vcpu *vcpu)
1576{
ad312c7c 1577 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1578
1579 context->new_cr3 = paging_new_cr3;
1580 context->page_fault = paging32_page_fault;
6aa8b732
AK
1581 context->gva_to_gpa = paging32_gva_to_gpa;
1582 context->free = paging_free;
c7addb90 1583 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1584 context->root_level = PT32_ROOT_LEVEL;
1585 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1586 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1587 return 0;
1588}
1589
1590static int paging32E_init_context(struct kvm_vcpu *vcpu)
1591{
17ac10ad 1592 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1593}
1594
fb72d167
JR
1595static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1596{
1597 struct kvm_mmu *context = &vcpu->arch.mmu;
1598
1599 context->new_cr3 = nonpaging_new_cr3;
1600 context->page_fault = tdp_page_fault;
1601 context->free = nonpaging_free;
1602 context->prefetch_page = nonpaging_prefetch_page;
67253af5 1603 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
1604 context->root_hpa = INVALID_PAGE;
1605
1606 if (!is_paging(vcpu)) {
1607 context->gva_to_gpa = nonpaging_gva_to_gpa;
1608 context->root_level = 0;
1609 } else if (is_long_mode(vcpu)) {
1610 context->gva_to_gpa = paging64_gva_to_gpa;
1611 context->root_level = PT64_ROOT_LEVEL;
1612 } else if (is_pae(vcpu)) {
1613 context->gva_to_gpa = paging64_gva_to_gpa;
1614 context->root_level = PT32E_ROOT_LEVEL;
1615 } else {
1616 context->gva_to_gpa = paging32_gva_to_gpa;
1617 context->root_level = PT32_ROOT_LEVEL;
1618 }
1619
1620 return 0;
1621}
1622
1623static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1624{
1625 ASSERT(vcpu);
ad312c7c 1626 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1627
1628 if (!is_paging(vcpu))
1629 return nonpaging_init_context(vcpu);
a9058ecd 1630 else if (is_long_mode(vcpu))
6aa8b732
AK
1631 return paging64_init_context(vcpu);
1632 else if (is_pae(vcpu))
1633 return paging32E_init_context(vcpu);
1634 else
1635 return paging32_init_context(vcpu);
1636}
1637
fb72d167
JR
1638static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1639{
35149e21
AL
1640 vcpu->arch.update_pte.pfn = bad_pfn;
1641
fb72d167
JR
1642 if (tdp_enabled)
1643 return init_kvm_tdp_mmu(vcpu);
1644 else
1645 return init_kvm_softmmu(vcpu);
1646}
1647
6aa8b732
AK
1648static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1649{
1650 ASSERT(vcpu);
ad312c7c
ZX
1651 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1652 vcpu->arch.mmu.free(vcpu);
1653 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1654 }
1655}
1656
1657int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1658{
1659 destroy_kvm_mmu(vcpu);
1660 return init_kvm_mmu(vcpu);
1661}
8668a3c4 1662EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1663
1664int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1665{
714b93da
AK
1666 int r;
1667
e2dec939 1668 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1669 if (r)
1670 goto out;
aaee2c94 1671 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1672 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1673 mmu_alloc_roots(vcpu);
aaee2c94 1674 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1675 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1676 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1677out:
1678 return r;
6aa8b732 1679}
17c3ba9d
AK
1680EXPORT_SYMBOL_GPL(kvm_mmu_load);
1681
1682void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1683{
1684 mmu_free_roots(vcpu);
1685}
6aa8b732 1686
09072daf 1687static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1688 struct kvm_mmu_page *sp,
ac1b714e
AK
1689 u64 *spte)
1690{
1691 u64 pte;
1692 struct kvm_mmu_page *child;
1693
1694 pte = *spte;
c7addb90 1695 if (is_shadow_present_pte(pte)) {
05da4558
MT
1696 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
1697 is_large_pte(pte))
290fc38d 1698 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1699 else {
1700 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1701 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1702 }
1703 }
c7addb90 1704 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
1705 if (is_large_pte(pte))
1706 --vcpu->kvm->stat.lpages;
ac1b714e
AK
1707}
1708
0028425f 1709static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1710 struct kvm_mmu_page *sp,
0028425f 1711 u64 *spte,
489f1d65 1712 const void *new)
0028425f 1713{
30945387
MT
1714 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1715 if (!vcpu->arch.update_pte.largepage ||
1716 sp->role.glevels == PT32_ROOT_LEVEL) {
1717 ++vcpu->kvm->stat.mmu_pde_zapped;
1718 return;
1719 }
1720 }
0028425f 1721
4cee5764 1722 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 1723 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 1724 paging32_update_pte(vcpu, sp, spte, new);
0028425f 1725 else
489f1d65 1726 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
1727}
1728
79539cec
AK
1729static bool need_remote_flush(u64 old, u64 new)
1730{
1731 if (!is_shadow_present_pte(old))
1732 return false;
1733 if (!is_shadow_present_pte(new))
1734 return true;
1735 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1736 return true;
1737 old ^= PT64_NX_MASK;
1738 new ^= PT64_NX_MASK;
1739 return (old & ~new & PT64_PERM_MASK) != 0;
1740}
1741
1742static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1743{
1744 if (need_remote_flush(old, new))
1745 kvm_flush_remote_tlbs(vcpu->kvm);
1746 else
1747 kvm_mmu_flush_tlb(vcpu);
1748}
1749
12b7d28f
AK
1750static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1751{
ad312c7c 1752 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 1753
7b52345e 1754 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
1755}
1756
d7824fff
AK
1757static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1758 const u8 *new, int bytes)
1759{
1760 gfn_t gfn;
1761 int r;
1762 u64 gpte = 0;
35149e21 1763 pfn_t pfn;
d7824fff 1764
05da4558
MT
1765 vcpu->arch.update_pte.largepage = 0;
1766
d7824fff
AK
1767 if (bytes != 4 && bytes != 8)
1768 return;
1769
1770 /*
1771 * Assume that the pte write on a page table of the same type
1772 * as the current vcpu paging mode. This is nearly always true
1773 * (might be false while changing modes). Note it is verified later
1774 * by update_pte().
1775 */
1776 if (is_pae(vcpu)) {
1777 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1778 if ((bytes == 4) && (gpa % 4 == 0)) {
1779 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1780 if (r)
1781 return;
1782 memcpy((void *)&gpte + (gpa % 8), new, 4);
1783 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1784 memcpy((void *)&gpte, new, 8);
1785 }
1786 } else {
1787 if ((bytes == 4) && (gpa % 4 == 0))
1788 memcpy((void *)&gpte, new, 4);
1789 }
1790 if (!is_present_pte(gpte))
1791 return;
1792 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 1793
05da4558
MT
1794 down_read(&current->mm->mmap_sem);
1795 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1796 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1797 vcpu->arch.update_pte.largepage = 1;
1798 }
e930bffe
AA
1799 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
1800 /* implicit mb(), we'll read before PT lock is unlocked */
35149e21 1801 pfn = gfn_to_pfn(vcpu->kvm, gfn);
05da4558 1802 up_read(&current->mm->mmap_sem);
72dc67a6 1803
35149e21
AL
1804 if (is_error_pfn(pfn)) {
1805 kvm_release_pfn_clean(pfn);
d196e343
AK
1806 return;
1807 }
d7824fff 1808 vcpu->arch.update_pte.gfn = gfn;
35149e21 1809 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
1810}
1811
1b7fcd32
AK
1812static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
1813{
1814 u64 *spte = vcpu->arch.last_pte_updated;
1815
1816 if (spte
1817 && vcpu->arch.last_pte_gfn == gfn
1818 && shadow_accessed_mask
1819 && !(*spte & shadow_accessed_mask)
1820 && is_shadow_present_pte(*spte))
1821 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
1822}
1823
09072daf 1824void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1825 const u8 *new, int bytes)
da4a00f0 1826{
9b7a0325 1827 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1828 struct kvm_mmu_page *sp;
0e7bc4b9 1829 struct hlist_node *node, *n;
9b7a0325
AK
1830 struct hlist_head *bucket;
1831 unsigned index;
489f1d65 1832 u64 entry, gentry;
9b7a0325 1833 u64 *spte;
9b7a0325 1834 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1835 unsigned pte_size;
9b7a0325 1836 unsigned page_offset;
0e7bc4b9 1837 unsigned misaligned;
fce0657f 1838 unsigned quadrant;
9b7a0325 1839 int level;
86a5ba02 1840 int flooded = 0;
ac1b714e 1841 int npte;
489f1d65 1842 int r;
9b7a0325 1843
b8688d51 1844 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 1845 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1846 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 1847 kvm_mmu_access_page(vcpu, gfn);
eb787d10 1848 kvm_mmu_free_some_pages(vcpu);
4cee5764 1849 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1850 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1851 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1852 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1853 ++vcpu->arch.last_pt_write_count;
1854 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1855 flooded = 1;
1856 } else {
ad312c7c
ZX
1857 vcpu->arch.last_pt_write_gfn = gfn;
1858 vcpu->arch.last_pt_write_count = 1;
1859 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1860 }
1ae0a13d 1861 index = kvm_page_table_hashfn(gfn);
f05e70ac 1862 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 1863 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 1864 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 1865 continue;
4db35314 1866 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1867 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1868 misaligned |= bytes < 4;
86a5ba02 1869 if (misaligned || flooded) {
0e7bc4b9
AK
1870 /*
1871 * Misaligned accesses are too much trouble to fix
1872 * up; also, they usually indicate a page is not used
1873 * as a page table.
86a5ba02
AK
1874 *
1875 * If we're seeing too many writes to a page,
1876 * it may no longer be a page table, or we may be
1877 * forking, in which case it is better to unmap the
1878 * page.
0e7bc4b9
AK
1879 */
1880 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1881 gpa, bytes, sp->role.word);
1882 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1883 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1884 continue;
1885 }
9b7a0325 1886 page_offset = offset;
4db35314 1887 level = sp->role.level;
ac1b714e 1888 npte = 1;
4db35314 1889 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1890 page_offset <<= 1; /* 32->64 */
1891 /*
1892 * A 32-bit pde maps 4MB while the shadow pdes map
1893 * only 2MB. So we need to double the offset again
1894 * and zap two pdes instead of one.
1895 */
1896 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1897 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1898 page_offset <<= 1;
1899 npte = 2;
1900 }
fce0657f 1901 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1902 page_offset &= ~PAGE_MASK;
4db35314 1903 if (quadrant != sp->role.quadrant)
fce0657f 1904 continue;
9b7a0325 1905 }
4db35314 1906 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
1907 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1908 gentry = 0;
1909 r = kvm_read_guest_atomic(vcpu->kvm,
1910 gpa & ~(u64)(pte_size - 1),
1911 &gentry, pte_size);
1912 new = (const void *)&gentry;
1913 if (r < 0)
1914 new = NULL;
1915 }
ac1b714e 1916 while (npte--) {
79539cec 1917 entry = *spte;
4db35314 1918 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
1919 if (new)
1920 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 1921 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1922 ++spte;
9b7a0325 1923 }
9b7a0325 1924 }
c7addb90 1925 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 1926 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
1927 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
1928 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
1929 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 1930 }
da4a00f0
AK
1931}
1932
a436036b
AK
1933int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1934{
10589a46
MT
1935 gpa_t gpa;
1936 int r;
a436036b 1937
10589a46 1938 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 1939
aaee2c94 1940 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 1941 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 1942 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 1943 return r;
a436036b 1944}
577bdc49 1945EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 1946
22d95b12 1947void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 1948{
f05e70ac 1949 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1950 struct kvm_mmu_page *sp;
ebeace86 1951
f05e70ac 1952 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
1953 struct kvm_mmu_page, link);
1954 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1955 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1956 }
1957}
ebeace86 1958
3067714c
AK
1959int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1960{
1961 int r;
1962 enum emulation_result er;
1963
ad312c7c 1964 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1965 if (r < 0)
1966 goto out;
1967
1968 if (!r) {
1969 r = 1;
1970 goto out;
1971 }
1972
b733bfb5
AK
1973 r = mmu_topup_memory_caches(vcpu);
1974 if (r)
1975 goto out;
1976
3067714c 1977 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
1978
1979 switch (er) {
1980 case EMULATE_DONE:
1981 return 1;
1982 case EMULATE_DO_MMIO:
1983 ++vcpu->stat.mmio_exits;
1984 return 0;
1985 case EMULATE_FAIL:
1986 kvm_report_emulation_failure(vcpu, "pagetable");
1987 return 1;
1988 default:
1989 BUG();
1990 }
1991out:
3067714c
AK
1992 return r;
1993}
1994EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1995
18552672
JR
1996void kvm_enable_tdp(void)
1997{
1998 tdp_enabled = true;
1999}
2000EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2001
5f4cb662
JR
2002void kvm_disable_tdp(void)
2003{
2004 tdp_enabled = false;
2005}
2006EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2007
6aa8b732
AK
2008static void free_mmu_pages(struct kvm_vcpu *vcpu)
2009{
4db35314 2010 struct kvm_mmu_page *sp;
6aa8b732 2011
f05e70ac
ZX
2012 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2013 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2014 struct kvm_mmu_page, link);
2015 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2016 cond_resched();
f51234c2 2017 }
ad312c7c 2018 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2019}
2020
2021static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2022{
17ac10ad 2023 struct page *page;
6aa8b732
AK
2024 int i;
2025
2026 ASSERT(vcpu);
2027
f05e70ac
ZX
2028 if (vcpu->kvm->arch.n_requested_mmu_pages)
2029 vcpu->kvm->arch.n_free_mmu_pages =
2030 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2031 else
f05e70ac
ZX
2032 vcpu->kvm->arch.n_free_mmu_pages =
2033 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2034 /*
2035 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2036 * Therefore we need to allocate shadow page tables in the first
2037 * 4GB of memory, which happens to fit the DMA32 zone.
2038 */
2039 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2040 if (!page)
2041 goto error_1;
ad312c7c 2042 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2043 for (i = 0; i < 4; ++i)
ad312c7c 2044 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2045
6aa8b732
AK
2046 return 0;
2047
2048error_1:
2049 free_mmu_pages(vcpu);
2050 return -ENOMEM;
2051}
2052
8018c27b 2053int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2054{
6aa8b732 2055 ASSERT(vcpu);
ad312c7c 2056 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2057
8018c27b
IM
2058 return alloc_mmu_pages(vcpu);
2059}
6aa8b732 2060
8018c27b
IM
2061int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2062{
2063 ASSERT(vcpu);
ad312c7c 2064 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2065
8018c27b 2066 return init_kvm_mmu(vcpu);
6aa8b732
AK
2067}
2068
2069void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2070{
2071 ASSERT(vcpu);
2072
2073 destroy_kvm_mmu(vcpu);
2074 free_mmu_pages(vcpu);
714b93da 2075 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2076}
2077
90cb0529 2078void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2079{
4db35314 2080 struct kvm_mmu_page *sp;
6aa8b732 2081
f05e70ac 2082 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2083 int i;
2084 u64 *pt;
2085
4db35314 2086 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
2087 continue;
2088
4db35314 2089 pt = sp->spt;
6aa8b732
AK
2090 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2091 /* avoid RMW */
9647c14c 2092 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2093 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
2094 }
2095}
37a7d8b0 2096
90cb0529 2097void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2098{
4db35314 2099 struct kvm_mmu_page *sp, *node;
e0fa826f 2100
aaee2c94 2101 spin_lock(&kvm->mmu_lock);
f05e70ac 2102 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 2103 kvm_mmu_zap_page(kvm, sp);
aaee2c94 2104 spin_unlock(&kvm->mmu_lock);
e0fa826f 2105
90cb0529 2106 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2107}
2108
8b2cf73c 2109static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2110{
2111 struct kvm_mmu_page *page;
2112
2113 page = container_of(kvm->arch.active_mmu_pages.prev,
2114 struct kvm_mmu_page, link);
2115 kvm_mmu_zap_page(kvm, page);
2116}
2117
2118static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2119{
2120 struct kvm *kvm;
2121 struct kvm *kvm_freed = NULL;
2122 int cache_count = 0;
2123
2124 spin_lock(&kvm_lock);
2125
2126 list_for_each_entry(kvm, &vm_list, vm_list) {
2127 int npages;
2128
5a4c9288
MT
2129 if (!down_read_trylock(&kvm->slots_lock))
2130 continue;
3ee16c81
IE
2131 spin_lock(&kvm->mmu_lock);
2132 npages = kvm->arch.n_alloc_mmu_pages -
2133 kvm->arch.n_free_mmu_pages;
2134 cache_count += npages;
2135 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2136 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2137 cache_count--;
2138 kvm_freed = kvm;
2139 }
2140 nr_to_scan--;
2141
2142 spin_unlock(&kvm->mmu_lock);
5a4c9288 2143 up_read(&kvm->slots_lock);
3ee16c81
IE
2144 }
2145 if (kvm_freed)
2146 list_move_tail(&kvm_freed->vm_list, &vm_list);
2147
2148 spin_unlock(&kvm_lock);
2149
2150 return cache_count;
2151}
2152
2153static struct shrinker mmu_shrinker = {
2154 .shrink = mmu_shrink,
2155 .seeks = DEFAULT_SEEKS * 10,
2156};
2157
2ddfd20e 2158static void mmu_destroy_caches(void)
b5a33a75
AK
2159{
2160 if (pte_chain_cache)
2161 kmem_cache_destroy(pte_chain_cache);
2162 if (rmap_desc_cache)
2163 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2164 if (mmu_page_header_cache)
2165 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2166}
2167
3ee16c81
IE
2168void kvm_mmu_module_exit(void)
2169{
2170 mmu_destroy_caches();
2171 unregister_shrinker(&mmu_shrinker);
2172}
2173
b5a33a75
AK
2174int kvm_mmu_module_init(void)
2175{
2176 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2177 sizeof(struct kvm_pte_chain),
20c2df83 2178 0, 0, NULL);
b5a33a75
AK
2179 if (!pte_chain_cache)
2180 goto nomem;
2181 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2182 sizeof(struct kvm_rmap_desc),
20c2df83 2183 0, 0, NULL);
b5a33a75
AK
2184 if (!rmap_desc_cache)
2185 goto nomem;
2186
d3d25b04
AK
2187 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2188 sizeof(struct kvm_mmu_page),
20c2df83 2189 0, 0, NULL);
d3d25b04
AK
2190 if (!mmu_page_header_cache)
2191 goto nomem;
2192
3ee16c81
IE
2193 register_shrinker(&mmu_shrinker);
2194
b5a33a75
AK
2195 return 0;
2196
2197nomem:
3ee16c81 2198 mmu_destroy_caches();
b5a33a75
AK
2199 return -ENOMEM;
2200}
2201
3ad82a7e
ZX
2202/*
2203 * Caculate mmu pages needed for kvm.
2204 */
2205unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2206{
2207 int i;
2208 unsigned int nr_mmu_pages;
2209 unsigned int nr_pages = 0;
2210
2211 for (i = 0; i < kvm->nmemslots; i++)
2212 nr_pages += kvm->memslots[i].npages;
2213
2214 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2215 nr_mmu_pages = max(nr_mmu_pages,
2216 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2217
2218 return nr_mmu_pages;
2219}
2220
2f333bcb
MT
2221static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2222 unsigned len)
2223{
2224 if (len > buffer->len)
2225 return NULL;
2226 return buffer->ptr;
2227}
2228
2229static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2230 unsigned len)
2231{
2232 void *ret;
2233
2234 ret = pv_mmu_peek_buffer(buffer, len);
2235 if (!ret)
2236 return ret;
2237 buffer->ptr += len;
2238 buffer->len -= len;
2239 buffer->processed += len;
2240 return ret;
2241}
2242
2243static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2244 gpa_t addr, gpa_t value)
2245{
2246 int bytes = 8;
2247 int r;
2248
2249 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2250 bytes = 4;
2251
2252 r = mmu_topup_memory_caches(vcpu);
2253 if (r)
2254 return r;
2255
3200f405 2256 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2257 return -EFAULT;
2258
2259 return 1;
2260}
2261
2262static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2263{
2264 kvm_x86_ops->tlb_flush(vcpu);
2265 return 1;
2266}
2267
2268static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2269{
2270 spin_lock(&vcpu->kvm->mmu_lock);
2271 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2272 spin_unlock(&vcpu->kvm->mmu_lock);
2273 return 1;
2274}
2275
2276static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2277 struct kvm_pv_mmu_op_buffer *buffer)
2278{
2279 struct kvm_mmu_op_header *header;
2280
2281 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2282 if (!header)
2283 return 0;
2284 switch (header->op) {
2285 case KVM_MMU_OP_WRITE_PTE: {
2286 struct kvm_mmu_op_write_pte *wpte;
2287
2288 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2289 if (!wpte)
2290 return 0;
2291 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2292 wpte->pte_val);
2293 }
2294 case KVM_MMU_OP_FLUSH_TLB: {
2295 struct kvm_mmu_op_flush_tlb *ftlb;
2296
2297 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2298 if (!ftlb)
2299 return 0;
2300 return kvm_pv_mmu_flush_tlb(vcpu);
2301 }
2302 case KVM_MMU_OP_RELEASE_PT: {
2303 struct kvm_mmu_op_release_pt *rpt;
2304
2305 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2306 if (!rpt)
2307 return 0;
2308 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2309 }
2310 default: return 0;
2311 }
2312}
2313
2314int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2315 gpa_t addr, unsigned long *ret)
2316{
2317 int r;
6ad18fba 2318 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2319
6ad18fba
DH
2320 buffer->ptr = buffer->buf;
2321 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2322 buffer->processed = 0;
2f333bcb 2323
6ad18fba 2324 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2325 if (r)
2326 goto out;
2327
6ad18fba
DH
2328 while (buffer->len) {
2329 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2330 if (r < 0)
2331 goto out;
2332 if (r == 0)
2333 break;
2334 }
2335
2336 r = 1;
2337out:
6ad18fba 2338 *ret = buffer->processed;
2f333bcb
MT
2339 return r;
2340}
2341
37a7d8b0
AK
2342#ifdef AUDIT
2343
2344static const char *audit_msg;
2345
2346static gva_t canonicalize(gva_t gva)
2347{
2348#ifdef CONFIG_X86_64
2349 gva = (long long)(gva << 16) >> 16;
2350#endif
2351 return gva;
2352}
2353
2354static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2355 gva_t va, int level)
2356{
2357 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2358 int i;
2359 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2360
2361 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2362 u64 ent = pt[i];
2363
c7addb90 2364 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2365 continue;
2366
2367 va = canonicalize(va);
c7addb90
AK
2368 if (level > 1) {
2369 if (ent == shadow_notrap_nonpresent_pte)
2370 printk(KERN_ERR "audit: (%s) nontrapping pte"
2371 " in nonleaf level: levels %d gva %lx"
2372 " level %d pte %llx\n", audit_msg,
ad312c7c 2373 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2374
37a7d8b0 2375 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2376 } else {
ad312c7c 2377 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2378 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2379
c7addb90 2380 if (is_shadow_present_pte(ent)
37a7d8b0 2381 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2382 printk(KERN_ERR "xx audit error: (%s) levels %d"
2383 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2384 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2385 va, gpa, hpa, ent,
2386 is_shadow_present_pte(ent));
c7addb90
AK
2387 else if (ent == shadow_notrap_nonpresent_pte
2388 && !is_error_hpa(hpa))
2389 printk(KERN_ERR "audit: (%s) notrap shadow,"
2390 " valid guest gva %lx\n", audit_msg, va);
35149e21 2391 kvm_release_pfn_clean(pfn);
c7addb90 2392
37a7d8b0
AK
2393 }
2394 }
2395}
2396
2397static void audit_mappings(struct kvm_vcpu *vcpu)
2398{
1ea252af 2399 unsigned i;
37a7d8b0 2400
ad312c7c
ZX
2401 if (vcpu->arch.mmu.root_level == 4)
2402 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2403 else
2404 for (i = 0; i < 4; ++i)
ad312c7c 2405 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2406 audit_mappings_page(vcpu,
ad312c7c 2407 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2408 i << 30,
2409 2);
2410}
2411
2412static int count_rmaps(struct kvm_vcpu *vcpu)
2413{
2414 int nmaps = 0;
2415 int i, j, k;
2416
2417 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2418 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2419 struct kvm_rmap_desc *d;
2420
2421 for (j = 0; j < m->npages; ++j) {
290fc38d 2422 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2423
290fc38d 2424 if (!*rmapp)
37a7d8b0 2425 continue;
290fc38d 2426 if (!(*rmapp & 1)) {
37a7d8b0
AK
2427 ++nmaps;
2428 continue;
2429 }
290fc38d 2430 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2431 while (d) {
2432 for (k = 0; k < RMAP_EXT; ++k)
2433 if (d->shadow_ptes[k])
2434 ++nmaps;
2435 else
2436 break;
2437 d = d->more;
2438 }
2439 }
2440 }
2441 return nmaps;
2442}
2443
2444static int count_writable_mappings(struct kvm_vcpu *vcpu)
2445{
2446 int nmaps = 0;
4db35314 2447 struct kvm_mmu_page *sp;
37a7d8b0
AK
2448 int i;
2449
f05e70ac 2450 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2451 u64 *pt = sp->spt;
37a7d8b0 2452
4db35314 2453 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2454 continue;
2455
2456 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2457 u64 ent = pt[i];
2458
2459 if (!(ent & PT_PRESENT_MASK))
2460 continue;
2461 if (!(ent & PT_WRITABLE_MASK))
2462 continue;
2463 ++nmaps;
2464 }
2465 }
2466 return nmaps;
2467}
2468
2469static void audit_rmap(struct kvm_vcpu *vcpu)
2470{
2471 int n_rmap = count_rmaps(vcpu);
2472 int n_actual = count_writable_mappings(vcpu);
2473
2474 if (n_rmap != n_actual)
2475 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2476 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2477}
2478
2479static void audit_write_protection(struct kvm_vcpu *vcpu)
2480{
4db35314 2481 struct kvm_mmu_page *sp;
290fc38d
IE
2482 struct kvm_memory_slot *slot;
2483 unsigned long *rmapp;
2484 gfn_t gfn;
37a7d8b0 2485
f05e70ac 2486 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2487 if (sp->role.metaphysical)
37a7d8b0
AK
2488 continue;
2489
4db35314
AK
2490 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2491 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2492 rmapp = &slot->rmap[gfn - slot->base_gfn];
2493 if (*rmapp)
37a7d8b0
AK
2494 printk(KERN_ERR "%s: (%s) shadow page has writable"
2495 " mappings: gfn %lx role %x\n",
b8688d51 2496 __func__, audit_msg, sp->gfn,
4db35314 2497 sp->role.word);
37a7d8b0
AK
2498 }
2499}
2500
2501static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2502{
2503 int olddbg = dbg;
2504
2505 dbg = 0;
2506 audit_msg = msg;
2507 audit_rmap(vcpu);
2508 audit_write_protection(vcpu);
2509 audit_mappings(vcpu);
2510 dbg = olddbg;
2511}
2512
2513#endif