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KVM: MMU: use page array in unsync walk
[mirror_ubuntu-jammy-kernel.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
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32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
d6c69ee9
YD
76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
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131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
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134#define RMAP_EXT 4
135
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136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
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141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
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143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
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148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
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151};
152
4731d4c7
MT
153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
ad8cfbe3
MT
157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
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159static struct kmem_cache *pte_chain_cache;
160static struct kmem_cache *rmap_desc_cache;
d3d25b04 161static struct kmem_cache *mmu_page_header_cache;
b5a33a75 162
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163static u64 __read_mostly shadow_trap_nonpresent_pte;
164static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY
165static u64 __read_mostly shadow_base_present_pte;
166static u64 __read_mostly shadow_nx_mask;
167static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168static u64 __read_mostly shadow_user_mask;
169static u64 __read_mostly shadow_accessed_mask;
170static u64 __read_mostly shadow_dirty_mask;
64d4d521 171static u64 __read_mostly shadow_mt_mask;
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172
173void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174{
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177}
178EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
7b52345e
SY
180void kvm_mmu_set_base_ptes(u64 base_pte)
181{
182 shadow_base_present_pte = base_pte;
183}
184EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
7b52345e
SY
188{
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
64d4d521 194 shadow_mt_mask = mt_mask;
7b52345e
SY
195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
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198static int is_write_protection(struct kvm_vcpu *vcpu)
199{
ad312c7c 200 return vcpu->arch.cr0 & X86_CR0_WP;
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201}
202
203static int is_cpuid_PSE36(void)
204{
205 return 1;
206}
207
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208static int is_nx(struct kvm_vcpu *vcpu)
209{
ad312c7c 210 return vcpu->arch.shadow_efer & EFER_NX;
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211}
212
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213static int is_present_pte(unsigned long pte)
214{
215 return pte & PT_PRESENT_MASK;
216}
217
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218static int is_shadow_present_pte(u64 pte)
219{
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220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222}
223
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MT
224static int is_large_pte(u64 pte)
225{
226 return pte & PT_PAGE_SIZE_MASK;
227}
228
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229static int is_writeble_pte(unsigned long pte)
230{
231 return pte & PT_WRITABLE_MASK;
232}
233
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234static int is_dirty_pte(unsigned long pte)
235{
7b52345e 236 return pte & shadow_dirty_mask;
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237}
238
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239static int is_rmap_pte(u64 pte)
240{
4b1a80fa 241 return is_shadow_present_pte(pte);
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242}
243
35149e21 244static pfn_t spte_to_pfn(u64 pte)
0b49ea86 245{
35149e21 246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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247}
248
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249static gfn_t pse36_gfn_delta(u32 gpte)
250{
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254}
255
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256static void set_shadow_pte(u64 *sptep, u64 spte)
257{
258#ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260#else
261 set_64bit((unsigned long long *)sptep, spte);
262#endif
263}
264
e2dec939 265static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 266 struct kmem_cache *base_cache, int min)
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267{
268 void *obj;
269
270 if (cache->nobjs >= min)
e2dec939 271 return 0;
714b93da 272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 274 if (!obj)
e2dec939 275 return -ENOMEM;
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276 cache->objects[cache->nobjs++] = obj;
277 }
e2dec939 278 return 0;
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279}
280
281static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282{
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285}
286
c1158e63 287static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 288 int min)
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289{
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 295 page = alloc_page(GFP_KERNEL);
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296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302}
303
304static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305{
306 while (mc->nobjs)
c4d198d5 307 free_page((unsigned long)mc->objects[--mc->nobjs]);
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308}
309
2e3e5882 310static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 311{
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312 int r;
313
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 315 pte_chain_cache, 4);
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316 if (r)
317 goto out;
ad312c7c 318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 319 rmap_desc_cache, 4);
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320 if (r)
321 goto out;
ad312c7c 322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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323 if (r)
324 goto out;
ad312c7c 325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 326 mmu_page_header_cache, 4);
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327out:
328 return r;
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329}
330
331static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332{
ad312c7c
ZX
333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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337}
338
339static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341{
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348}
349
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350static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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353 sizeof(struct kvm_pte_chain));
354}
355
90cb0529 356static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 357{
90cb0529 358 kfree(pc);
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359}
360
361static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362{
ad312c7c 363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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364 sizeof(struct kvm_rmap_desc));
365}
366
90cb0529 367static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 368{
90cb0529 369 kfree(rd);
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370}
371
05da4558
MT
372/*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377{
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383}
384
385static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386{
387 int *write_count;
388
2843099f
IE
389 gfn = unalias_gfn(kvm, gfn);
390 write_count = slot_largepage_idx(gfn,
391 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 392 *write_count += 1;
05da4558
MT
393}
394
395static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396{
397 int *write_count;
398
2843099f
IE
399 gfn = unalias_gfn(kvm, gfn);
400 write_count = slot_largepage_idx(gfn,
401 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
402 *write_count -= 1;
403 WARN_ON(*write_count < 0);
404}
405
406static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
407{
2843099f 408 struct kvm_memory_slot *slot;
05da4558
MT
409 int *largepage_idx;
410
2843099f
IE
411 gfn = unalias_gfn(kvm, gfn);
412 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
413 if (slot) {
414 largepage_idx = slot_largepage_idx(gfn, slot);
415 return *largepage_idx;
416 }
417
418 return 1;
419}
420
421static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
422{
423 struct vm_area_struct *vma;
424 unsigned long addr;
4c2155ce 425 int ret = 0;
05da4558
MT
426
427 addr = gfn_to_hva(kvm, gfn);
428 if (kvm_is_error_hva(addr))
4c2155ce 429 return ret;
05da4558 430
4c2155ce 431 down_read(&current->mm->mmap_sem);
05da4558
MT
432 vma = find_vma(current->mm, addr);
433 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
434 ret = 1;
435 up_read(&current->mm->mmap_sem);
05da4558 436
4c2155ce 437 return ret;
05da4558
MT
438}
439
440static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
441{
442 struct kvm_memory_slot *slot;
443
444 if (has_wrprotected_page(vcpu->kvm, large_gfn))
445 return 0;
446
447 if (!host_largepage_backed(vcpu->kvm, large_gfn))
448 return 0;
449
450 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
451 if (slot && slot->dirty_bitmap)
452 return 0;
453
454 return 1;
455}
456
290fc38d
IE
457/*
458 * Take gfn and return the reverse mapping to it.
459 * Note: gfn must be unaliased before this function get called
460 */
461
05da4558 462static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
463{
464 struct kvm_memory_slot *slot;
05da4558 465 unsigned long idx;
290fc38d
IE
466
467 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
468 if (!lpage)
469 return &slot->rmap[gfn - slot->base_gfn];
470
471 idx = (gfn / KVM_PAGES_PER_HPAGE) -
472 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
473
474 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
475}
476
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477/*
478 * Reverse mapping data structures:
479 *
290fc38d
IE
480 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
481 * that points to page_address(page).
cd4a4e53 482 *
290fc38d
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483 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
484 * containing more mappings.
cd4a4e53 485 */
05da4558 486static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 487{
4db35314 488 struct kvm_mmu_page *sp;
cd4a4e53 489 struct kvm_rmap_desc *desc;
290fc38d 490 unsigned long *rmapp;
cd4a4e53
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491 int i;
492
493 if (!is_rmap_pte(*spte))
494 return;
290fc38d 495 gfn = unalias_gfn(vcpu->kvm, gfn);
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AK
496 sp = page_header(__pa(spte));
497 sp->gfns[spte - sp->spt] = gfn;
05da4558 498 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 499 if (!*rmapp) {
cd4a4e53 500 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
501 *rmapp = (unsigned long)spte;
502 } else if (!(*rmapp & 1)) {
cd4a4e53 503 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 504 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 505 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 506 desc->shadow_ptes[1] = spte;
290fc38d 507 *rmapp = (unsigned long)desc | 1;
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508 } else {
509 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 510 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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511 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
512 desc = desc->more;
513 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 514 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
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515 desc = desc->more;
516 }
517 for (i = 0; desc->shadow_ptes[i]; ++i)
518 ;
519 desc->shadow_ptes[i] = spte;
520 }
521}
522
290fc38d 523static void rmap_desc_remove_entry(unsigned long *rmapp,
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524 struct kvm_rmap_desc *desc,
525 int i,
526 struct kvm_rmap_desc *prev_desc)
527{
528 int j;
529
530 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
531 ;
532 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 533 desc->shadow_ptes[j] = NULL;
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534 if (j != 0)
535 return;
536 if (!prev_desc && !desc->more)
290fc38d 537 *rmapp = (unsigned long)desc->shadow_ptes[0];
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538 else
539 if (prev_desc)
540 prev_desc->more = desc->more;
541 else
290fc38d 542 *rmapp = (unsigned long)desc->more | 1;
90cb0529 543 mmu_free_rmap_desc(desc);
cd4a4e53
AK
544}
545
290fc38d 546static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 547{
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548 struct kvm_rmap_desc *desc;
549 struct kvm_rmap_desc *prev_desc;
4db35314 550 struct kvm_mmu_page *sp;
35149e21 551 pfn_t pfn;
290fc38d 552 unsigned long *rmapp;
cd4a4e53
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553 int i;
554
555 if (!is_rmap_pte(*spte))
556 return;
4db35314 557 sp = page_header(__pa(spte));
35149e21 558 pfn = spte_to_pfn(*spte);
7b52345e 559 if (*spte & shadow_accessed_mask)
35149e21 560 kvm_set_pfn_accessed(pfn);
b4231d61 561 if (is_writeble_pte(*spte))
35149e21 562 kvm_release_pfn_dirty(pfn);
b4231d61 563 else
35149e21 564 kvm_release_pfn_clean(pfn);
05da4558 565 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 566 if (!*rmapp) {
cd4a4e53
AK
567 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
568 BUG();
290fc38d 569 } else if (!(*rmapp & 1)) {
cd4a4e53 570 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 571 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
572 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
573 spte, *spte);
574 BUG();
575 }
290fc38d 576 *rmapp = 0;
cd4a4e53
AK
577 } else {
578 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
580 prev_desc = NULL;
581 while (desc) {
582 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
583 if (desc->shadow_ptes[i] == spte) {
290fc38d 584 rmap_desc_remove_entry(rmapp,
714b93da 585 desc, i,
cd4a4e53
AK
586 prev_desc);
587 return;
588 }
589 prev_desc = desc;
590 desc = desc->more;
591 }
592 BUG();
593 }
594}
595
98348e95 596static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 597{
374cbac0 598 struct kvm_rmap_desc *desc;
98348e95
IE
599 struct kvm_rmap_desc *prev_desc;
600 u64 *prev_spte;
601 int i;
602
603 if (!*rmapp)
604 return NULL;
605 else if (!(*rmapp & 1)) {
606 if (!spte)
607 return (u64 *)*rmapp;
608 return NULL;
609 }
610 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
611 prev_desc = NULL;
612 prev_spte = NULL;
613 while (desc) {
614 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
615 if (prev_spte == spte)
616 return desc->shadow_ptes[i];
617 prev_spte = desc->shadow_ptes[i];
618 }
619 desc = desc->more;
620 }
621 return NULL;
622}
623
624static void rmap_write_protect(struct kvm *kvm, u64 gfn)
625{
290fc38d 626 unsigned long *rmapp;
374cbac0 627 u64 *spte;
caa5b8a5 628 int write_protected = 0;
374cbac0 629
4a4c9924 630 gfn = unalias_gfn(kvm, gfn);
05da4558 631 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 632
98348e95
IE
633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
374cbac0 635 BUG_ON(!spte);
374cbac0 636 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 637 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 638 if (is_writeble_pte(*spte)) {
9647c14c 639 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
640 write_protected = 1;
641 }
9647c14c 642 spte = rmap_next(kvm, rmapp, spte);
374cbac0 643 }
855149aa 644 if (write_protected) {
35149e21 645 pfn_t pfn;
855149aa
IE
646
647 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
648 pfn = spte_to_pfn(*spte);
649 kvm_set_pfn_dirty(pfn);
855149aa
IE
650 }
651
05da4558
MT
652 /* check for huge page mappings */
653 rmapp = gfn_to_rmap(kvm, gfn, 1);
654 spte = rmap_next(kvm, rmapp, NULL);
655 while (spte) {
656 BUG_ON(!spte);
657 BUG_ON(!(*spte & PT_PRESENT_MASK));
658 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
659 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
660 if (is_writeble_pte(*spte)) {
661 rmap_remove(kvm, spte);
662 --kvm->stat.lpages;
663 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 664 spte = NULL;
05da4558
MT
665 write_protected = 1;
666 }
667 spte = rmap_next(kvm, rmapp, spte);
668 }
669
caa5b8a5
ED
670 if (write_protected)
671 kvm_flush_remote_tlbs(kvm);
374cbac0
AK
672}
673
e930bffe
AA
674static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
675{
676 u64 *spte;
677 int need_tlb_flush = 0;
678
679 while ((spte = rmap_next(kvm, rmapp, NULL))) {
680 BUG_ON(!(*spte & PT_PRESENT_MASK));
681 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
682 rmap_remove(kvm, spte);
683 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
684 need_tlb_flush = 1;
685 }
686 return need_tlb_flush;
687}
688
689static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
690 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
691{
692 int i;
693 int retval = 0;
694
695 /*
696 * If mmap_sem isn't taken, we can look the memslots with only
697 * the mmu_lock by skipping over the slots with userspace_addr == 0.
698 */
699 for (i = 0; i < kvm->nmemslots; i++) {
700 struct kvm_memory_slot *memslot = &kvm->memslots[i];
701 unsigned long start = memslot->userspace_addr;
702 unsigned long end;
703
704 /* mmu_lock protects userspace_addr */
705 if (!start)
706 continue;
707
708 end = start + (memslot->npages << PAGE_SHIFT);
709 if (hva >= start && hva < end) {
710 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
711 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
712 retval |= handler(kvm,
713 &memslot->lpage_info[
714 gfn_offset /
715 KVM_PAGES_PER_HPAGE].rmap_pde);
716 }
717 }
718
719 return retval;
720}
721
722int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
723{
724 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
725}
726
727static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
728{
729 u64 *spte;
730 int young = 0;
731
534e38b4
SY
732 /* always return old for EPT */
733 if (!shadow_accessed_mask)
734 return 0;
735
e930bffe
AA
736 spte = rmap_next(kvm, rmapp, NULL);
737 while (spte) {
738 int _young;
739 u64 _spte = *spte;
740 BUG_ON(!(_spte & PT_PRESENT_MASK));
741 _young = _spte & PT_ACCESSED_MASK;
742 if (_young) {
743 young = 1;
744 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
745 }
746 spte = rmap_next(kvm, rmapp, spte);
747 }
748 return young;
749}
750
751int kvm_age_hva(struct kvm *kvm, unsigned long hva)
752{
753 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
754}
755
d6c69ee9 756#ifdef MMU_DEBUG
47ad8e68 757static int is_empty_shadow_page(u64 *spt)
6aa8b732 758{
139bdb2d
AK
759 u64 *pos;
760 u64 *end;
761
47ad8e68 762 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 763 if (is_shadow_present_pte(*pos)) {
b8688d51 764 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 765 pos, *pos);
6aa8b732 766 return 0;
139bdb2d 767 }
6aa8b732
AK
768 return 1;
769}
d6c69ee9 770#endif
6aa8b732 771
4db35314 772static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 773{
4db35314
AK
774 ASSERT(is_empty_shadow_page(sp->spt));
775 list_del(&sp->link);
776 __free_page(virt_to_page(sp->spt));
777 __free_page(virt_to_page(sp->gfns));
778 kfree(sp);
f05e70ac 779 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
780}
781
cea0f0e7
AK
782static unsigned kvm_page_table_hashfn(gfn_t gfn)
783{
1ae0a13d 784 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
785}
786
25c0de2c
AK
787static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
788 u64 *parent_pte)
6aa8b732 789{
4db35314 790 struct kvm_mmu_page *sp;
6aa8b732 791
ad312c7c
ZX
792 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
793 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
794 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 795 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 796 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314 797 ASSERT(is_empty_shadow_page(sp->spt));
291f26bc 798 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
799 sp->multimapped = 0;
800 sp->parent_pte = parent_pte;
f05e70ac 801 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 802 return sp;
6aa8b732
AK
803}
804
714b93da 805static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 806 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
807{
808 struct kvm_pte_chain *pte_chain;
809 struct hlist_node *node;
810 int i;
811
812 if (!parent_pte)
813 return;
4db35314
AK
814 if (!sp->multimapped) {
815 u64 *old = sp->parent_pte;
cea0f0e7
AK
816
817 if (!old) {
4db35314 818 sp->parent_pte = parent_pte;
cea0f0e7
AK
819 return;
820 }
4db35314 821 sp->multimapped = 1;
714b93da 822 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
823 INIT_HLIST_HEAD(&sp->parent_ptes);
824 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
825 pte_chain->parent_ptes[0] = old;
826 }
4db35314 827 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
828 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
829 continue;
830 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
831 if (!pte_chain->parent_ptes[i]) {
832 pte_chain->parent_ptes[i] = parent_pte;
833 return;
834 }
835 }
714b93da 836 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 837 BUG_ON(!pte_chain);
4db35314 838 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
839 pte_chain->parent_ptes[0] = parent_pte;
840}
841
4db35314 842static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
843 u64 *parent_pte)
844{
845 struct kvm_pte_chain *pte_chain;
846 struct hlist_node *node;
847 int i;
848
4db35314
AK
849 if (!sp->multimapped) {
850 BUG_ON(sp->parent_pte != parent_pte);
851 sp->parent_pte = NULL;
cea0f0e7
AK
852 return;
853 }
4db35314 854 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
855 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
856 if (!pte_chain->parent_ptes[i])
857 break;
858 if (pte_chain->parent_ptes[i] != parent_pte)
859 continue;
697fe2e2
AK
860 while (i + 1 < NR_PTE_CHAIN_ENTRIES
861 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
862 pte_chain->parent_ptes[i]
863 = pte_chain->parent_ptes[i + 1];
864 ++i;
865 }
866 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
867 if (i == 0) {
868 hlist_del(&pte_chain->link);
90cb0529 869 mmu_free_pte_chain(pte_chain);
4db35314
AK
870 if (hlist_empty(&sp->parent_ptes)) {
871 sp->multimapped = 0;
872 sp->parent_pte = NULL;
697fe2e2
AK
873 }
874 }
cea0f0e7
AK
875 return;
876 }
877 BUG();
878}
879
ad8cfbe3
MT
880
881static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
882 mmu_parent_walk_fn fn)
883{
884 struct kvm_pte_chain *pte_chain;
885 struct hlist_node *node;
886 struct kvm_mmu_page *parent_sp;
887 int i;
888
889 if (!sp->multimapped && sp->parent_pte) {
890 parent_sp = page_header(__pa(sp->parent_pte));
891 fn(vcpu, parent_sp);
892 mmu_parent_walk(vcpu, parent_sp, fn);
893 return;
894 }
895 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
896 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
897 if (!pte_chain->parent_ptes[i])
898 break;
899 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
900 fn(vcpu, parent_sp);
901 mmu_parent_walk(vcpu, parent_sp, fn);
902 }
903}
904
0074ff63
MT
905static void kvm_mmu_update_unsync_bitmap(u64 *spte)
906{
907 unsigned int index;
908 struct kvm_mmu_page *sp = page_header(__pa(spte));
909
910 index = spte - sp->spt;
60c8aec6
MT
911 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
912 sp->unsync_children++;
913 WARN_ON(!sp->unsync_children);
0074ff63
MT
914}
915
916static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
917{
918 struct kvm_pte_chain *pte_chain;
919 struct hlist_node *node;
920 int i;
921
922 if (!sp->parent_pte)
923 return;
924
925 if (!sp->multimapped) {
926 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
927 return;
928 }
929
930 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
931 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
932 if (!pte_chain->parent_ptes[i])
933 break;
934 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
935 }
936}
937
938static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
939{
0074ff63
MT
940 kvm_mmu_update_parents_unsync(sp);
941 return 1;
942}
943
944static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
945 struct kvm_mmu_page *sp)
946{
947 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
948 kvm_mmu_update_parents_unsync(sp);
949}
950
d761a501
AK
951static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
952 struct kvm_mmu_page *sp)
953{
954 int i;
955
956 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
957 sp->spt[i] = shadow_trap_nonpresent_pte;
958}
959
e8bc217a
MT
960static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
961 struct kvm_mmu_page *sp)
962{
963 return 1;
964}
965
a7052897
MT
966static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
967{
968}
969
60c8aec6
MT
970#define KVM_PAGE_ARRAY_NR 16
971
972struct kvm_mmu_pages {
973 struct mmu_page_and_offset {
974 struct kvm_mmu_page *sp;
975 unsigned int idx;
976 } page[KVM_PAGE_ARRAY_NR];
977 unsigned int nr;
978};
979
0074ff63
MT
980#define for_each_unsync_children(bitmap, idx) \
981 for (idx = find_first_bit(bitmap, 512); \
982 idx < 512; \
983 idx = find_next_bit(bitmap, 512, idx+1))
984
60c8aec6
MT
985int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
986 int idx)
4731d4c7 987{
60c8aec6 988 int i;
4731d4c7 989
60c8aec6
MT
990 if (sp->unsync)
991 for (i=0; i < pvec->nr; i++)
992 if (pvec->page[i].sp == sp)
993 return 0;
994
995 pvec->page[pvec->nr].sp = sp;
996 pvec->page[pvec->nr].idx = idx;
997 pvec->nr++;
998 return (pvec->nr == KVM_PAGE_ARRAY_NR);
999}
1000
1001static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1002 struct kvm_mmu_pages *pvec)
1003{
1004 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1005
0074ff63 1006 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1007 u64 ent = sp->spt[i];
1008
1009 if (is_shadow_present_pte(ent)) {
1010 struct kvm_mmu_page *child;
1011 child = page_header(ent & PT64_BASE_ADDR_MASK);
1012
1013 if (child->unsync_children) {
60c8aec6
MT
1014 if (mmu_pages_add(pvec, child, i))
1015 return -ENOSPC;
1016
1017 ret = __mmu_unsync_walk(child, pvec);
1018 if (!ret)
1019 __clear_bit(i, sp->unsync_child_bitmap);
1020 else if (ret > 0)
1021 nr_unsync_leaf += ret;
1022 else
4731d4c7
MT
1023 return ret;
1024 }
1025
1026 if (child->unsync) {
60c8aec6
MT
1027 nr_unsync_leaf++;
1028 if (mmu_pages_add(pvec, child, i))
1029 return -ENOSPC;
4731d4c7
MT
1030 }
1031 }
1032 }
1033
0074ff63 1034 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1035 sp->unsync_children = 0;
1036
60c8aec6
MT
1037 return nr_unsync_leaf;
1038}
1039
1040static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1041 struct kvm_mmu_pages *pvec)
1042{
1043 if (!sp->unsync_children)
1044 return 0;
1045
1046 mmu_pages_add(pvec, sp, 0);
1047 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1048}
1049
4db35314 1050static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1051{
1052 unsigned index;
1053 struct hlist_head *bucket;
4db35314 1054 struct kvm_mmu_page *sp;
cea0f0e7
AK
1055 struct hlist_node *node;
1056
b8688d51 1057 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1058 index = kvm_page_table_hashfn(gfn);
f05e70ac 1059 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1060 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1061 if (sp->gfn == gfn && !sp->role.metaphysical
1062 && !sp->role.invalid) {
cea0f0e7 1063 pgprintk("%s: found role %x\n",
b8688d51 1064 __func__, sp->role.word);
4db35314 1065 return sp;
cea0f0e7
AK
1066 }
1067 return NULL;
1068}
1069
4731d4c7
MT
1070static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1071{
1072 WARN_ON(!sp->unsync);
1073 sp->unsync = 0;
1074 --kvm->stat.mmu_unsync;
1075}
1076
1077static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1078
1079static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1080{
1081 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1082 kvm_mmu_zap_page(vcpu->kvm, sp);
1083 return 1;
1084 }
1085
1086 rmap_write_protect(vcpu->kvm, sp->gfn);
0c0f40bd 1087 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1088 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1089 kvm_mmu_zap_page(vcpu->kvm, sp);
1090 return 1;
1091 }
1092
1093 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1094 return 0;
1095}
1096
60c8aec6
MT
1097struct mmu_page_path {
1098 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1099 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1100};
1101
60c8aec6
MT
1102#define for_each_sp(pvec, sp, parents, i) \
1103 for (i = mmu_pages_next(&pvec, &parents, -1), \
1104 sp = pvec.page[i].sp; \
1105 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1106 i = mmu_pages_next(&pvec, &parents, i))
1107
1108int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1109 int i)
1110{
1111 int n;
1112
1113 for (n = i+1; n < pvec->nr; n++) {
1114 struct kvm_mmu_page *sp = pvec->page[n].sp;
1115
1116 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1117 parents->idx[0] = pvec->page[n].idx;
1118 return n;
1119 }
1120
1121 parents->parent[sp->role.level-2] = sp;
1122 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1123 }
1124
1125 return n;
1126}
1127
1128void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1129{
60c8aec6
MT
1130 struct kvm_mmu_page *sp;
1131 unsigned int level = 0;
1132
1133 do {
1134 unsigned int idx = parents->idx[level];
4731d4c7 1135
60c8aec6
MT
1136 sp = parents->parent[level];
1137 if (!sp)
1138 return;
1139
1140 --sp->unsync_children;
1141 WARN_ON((int)sp->unsync_children < 0);
1142 __clear_bit(idx, sp->unsync_child_bitmap);
1143 level++;
1144 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1145}
1146
60c8aec6
MT
1147static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1148 struct mmu_page_path *parents,
1149 struct kvm_mmu_pages *pvec)
4731d4c7 1150{
60c8aec6
MT
1151 parents->parent[parent->role.level-1] = NULL;
1152 pvec->nr = 0;
1153}
4731d4c7 1154
60c8aec6
MT
1155static void mmu_sync_children(struct kvm_vcpu *vcpu,
1156 struct kvm_mmu_page *parent)
1157{
1158 int i;
1159 struct kvm_mmu_page *sp;
1160 struct mmu_page_path parents;
1161 struct kvm_mmu_pages pages;
1162
1163 kvm_mmu_pages_init(parent, &parents, &pages);
1164 while (mmu_unsync_walk(parent, &pages)) {
1165 for_each_sp(pages, sp, parents, i) {
1166 kvm_sync_page(vcpu, sp);
1167 mmu_pages_clear_parents(&parents);
1168 }
4731d4c7 1169 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1170 kvm_mmu_pages_init(parent, &parents, &pages);
1171 }
4731d4c7
MT
1172}
1173
cea0f0e7
AK
1174static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1175 gfn_t gfn,
1176 gva_t gaddr,
1177 unsigned level,
1178 int metaphysical,
41074d07 1179 unsigned access,
f7d9c7b7 1180 u64 *parent_pte)
cea0f0e7
AK
1181{
1182 union kvm_mmu_page_role role;
1183 unsigned index;
1184 unsigned quadrant;
1185 struct hlist_head *bucket;
4db35314 1186 struct kvm_mmu_page *sp;
4731d4c7 1187 struct hlist_node *node, *tmp;
cea0f0e7
AK
1188
1189 role.word = 0;
ad312c7c 1190 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
1191 role.level = level;
1192 role.metaphysical = metaphysical;
41074d07 1193 role.access = access;
ad312c7c 1194 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1195 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1196 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1197 role.quadrant = quadrant;
1198 }
b8688d51 1199 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1200 gfn, role.word);
1ae0a13d 1201 index = kvm_page_table_hashfn(gfn);
f05e70ac 1202 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1203 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1204 if (sp->gfn == gfn) {
1205 if (sp->unsync)
1206 if (kvm_sync_page(vcpu, sp))
1207 continue;
1208
1209 if (sp->role.word != role.word)
1210 continue;
1211
4db35314 1212 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1213 if (sp->unsync_children) {
1214 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1215 kvm_mmu_mark_parents_unsync(vcpu, sp);
1216 }
b8688d51 1217 pgprintk("%s: found\n", __func__);
4db35314 1218 return sp;
cea0f0e7 1219 }
dfc5aa00 1220 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1221 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1222 if (!sp)
1223 return sp;
b8688d51 1224 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1225 sp->gfn = gfn;
1226 sp->role = role;
1227 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1228 if (!metaphysical) {
4a4c9924 1229 rmap_write_protect(vcpu->kvm, gfn);
4731d4c7
MT
1230 account_shadowed(vcpu->kvm, gfn);
1231 }
131d8279
AK
1232 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1233 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1234 else
1235 nonpaging_prefetch_page(vcpu, sp);
4db35314 1236 return sp;
cea0f0e7
AK
1237}
1238
3d000db5 1239static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1240 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
1241{
1242 hpa_t shadow_addr;
1243 int level;
1244 int r;
1245 u64 *sptep;
1246 unsigned index;
1247
1248 shadow_addr = vcpu->arch.mmu.root_hpa;
1249 level = vcpu->arch.mmu.shadow_root_level;
1250 if (level == PT32E_ROOT_LEVEL) {
1251 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1252 shadow_addr &= PT64_BASE_ADDR_MASK;
1253 --level;
1254 }
1255
1256 while (level >= PT_PAGE_TABLE_LEVEL) {
1257 index = SHADOW_PT_INDEX(addr, level);
1258 sptep = ((u64 *)__va(shadow_addr)) + index;
1259 r = walker->entry(walker, vcpu, addr, sptep, level);
1260 if (r)
1261 return r;
1262 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1263 --level;
1264 }
1265 return 0;
1266}
1267
90cb0529 1268static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1269 struct kvm_mmu_page *sp)
a436036b 1270{
697fe2e2
AK
1271 unsigned i;
1272 u64 *pt;
1273 u64 ent;
1274
4db35314 1275 pt = sp->spt;
697fe2e2 1276
4db35314 1277 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1278 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1279 if (is_shadow_present_pte(pt[i]))
290fc38d 1280 rmap_remove(kvm, &pt[i]);
c7addb90 1281 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1282 }
1283 return;
1284 }
1285
1286 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1287 ent = pt[i];
1288
05da4558
MT
1289 if (is_shadow_present_pte(ent)) {
1290 if (!is_large_pte(ent)) {
1291 ent &= PT64_BASE_ADDR_MASK;
1292 mmu_page_remove_parent_pte(page_header(ent),
1293 &pt[i]);
1294 } else {
1295 --kvm->stat.lpages;
1296 rmap_remove(kvm, &pt[i]);
1297 }
1298 }
c7addb90 1299 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1300 }
a436036b
AK
1301}
1302
4db35314 1303static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1304{
4db35314 1305 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1306}
1307
12b7d28f
AK
1308static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1309{
1310 int i;
1311
1312 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1313 if (kvm->vcpus[i])
ad312c7c 1314 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1315}
1316
31aa2b44 1317static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1318{
1319 u64 *parent_pte;
1320
4db35314
AK
1321 while (sp->multimapped || sp->parent_pte) {
1322 if (!sp->multimapped)
1323 parent_pte = sp->parent_pte;
a436036b
AK
1324 else {
1325 struct kvm_pte_chain *chain;
1326
4db35314 1327 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1328 struct kvm_pte_chain, link);
1329 parent_pte = chain->parent_ptes[0];
1330 }
697fe2e2 1331 BUG_ON(!parent_pte);
4db35314 1332 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1333 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1334 }
31aa2b44
AK
1335}
1336
60c8aec6
MT
1337static int mmu_zap_unsync_children(struct kvm *kvm,
1338 struct kvm_mmu_page *parent)
4731d4c7 1339{
60c8aec6
MT
1340 int i, zapped = 0;
1341 struct mmu_page_path parents;
1342 struct kvm_mmu_pages pages;
4731d4c7 1343
60c8aec6 1344 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1345 return 0;
60c8aec6
MT
1346
1347 kvm_mmu_pages_init(parent, &parents, &pages);
1348 while (mmu_unsync_walk(parent, &pages)) {
1349 struct kvm_mmu_page *sp;
1350
1351 for_each_sp(pages, sp, parents, i) {
1352 kvm_mmu_zap_page(kvm, sp);
1353 mmu_pages_clear_parents(&parents);
1354 }
1355 zapped += pages.nr;
1356 kvm_mmu_pages_init(parent, &parents, &pages);
1357 }
1358
1359 return zapped;
4731d4c7
MT
1360}
1361
07385413 1362static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1363{
4731d4c7 1364 int ret;
31aa2b44 1365 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1366 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1367 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1368 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1369 kvm_flush_remote_tlbs(kvm);
1370 if (!sp->role.invalid && !sp->role.metaphysical)
1371 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1372 if (sp->unsync)
1373 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1374 if (!sp->root_count) {
1375 hlist_del(&sp->hash_link);
1376 kvm_mmu_free_page(kvm, sp);
2e53d63a 1377 } else {
2e53d63a 1378 sp->role.invalid = 1;
5b5c6a5a 1379 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1380 kvm_reload_remote_mmus(kvm);
1381 }
12b7d28f 1382 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1383 return ret;
a436036b
AK
1384}
1385
82ce2c96
IE
1386/*
1387 * Changing the number of mmu pages allocated to the vm
1388 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1389 */
1390void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1391{
1392 /*
1393 * If we set the number of mmu pages to be smaller be than the
1394 * number of actived pages , we must to free some mmu pages before we
1395 * change the value
1396 */
1397
f05e70ac 1398 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1399 kvm_nr_mmu_pages) {
f05e70ac
ZX
1400 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1401 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1402
1403 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1404 struct kvm_mmu_page *page;
1405
f05e70ac 1406 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1407 struct kvm_mmu_page, link);
1408 kvm_mmu_zap_page(kvm, page);
1409 n_used_mmu_pages--;
1410 }
f05e70ac 1411 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1412 }
1413 else
f05e70ac
ZX
1414 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1415 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1416
f05e70ac 1417 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1418}
1419
f67a46f4 1420static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1421{
1422 unsigned index;
1423 struct hlist_head *bucket;
4db35314 1424 struct kvm_mmu_page *sp;
a436036b
AK
1425 struct hlist_node *node, *n;
1426 int r;
1427
b8688d51 1428 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1429 r = 0;
1ae0a13d 1430 index = kvm_page_table_hashfn(gfn);
f05e70ac 1431 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1432 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1433 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1434 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1435 sp->role.word);
a436036b 1436 r = 1;
07385413
MT
1437 if (kvm_mmu_zap_page(kvm, sp))
1438 n = bucket->first;
a436036b
AK
1439 }
1440 return r;
cea0f0e7
AK
1441}
1442
f67a46f4 1443static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1444{
4db35314 1445 struct kvm_mmu_page *sp;
97a0a01e 1446
4db35314 1447 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1448 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1449 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1450 }
1451}
1452
38c335f1 1453static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1454{
38c335f1 1455 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1456 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1457
291f26bc 1458 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1459}
1460
6844dec6
MT
1461static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1462{
1463 int i;
1464 u64 *pt = sp->spt;
1465
1466 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1467 return;
1468
1469 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1470 if (pt[i] == shadow_notrap_nonpresent_pte)
1471 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1472 }
1473}
1474
039576c0
AK
1475struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1476{
72dc67a6
IE
1477 struct page *page;
1478
ad312c7c 1479 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1480
1481 if (gpa == UNMAPPED_GVA)
1482 return NULL;
72dc67a6 1483
72dc67a6 1484 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1485
1486 return page;
039576c0
AK
1487}
1488
74be52e3
SY
1489/*
1490 * The function is based on mtrr_type_lookup() in
1491 * arch/x86/kernel/cpu/mtrr/generic.c
1492 */
1493static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1494 u64 start, u64 end)
1495{
1496 int i;
1497 u64 base, mask;
1498 u8 prev_match, curr_match;
1499 int num_var_ranges = KVM_NR_VAR_MTRR;
1500
1501 if (!mtrr_state->enabled)
1502 return 0xFF;
1503
1504 /* Make end inclusive end, instead of exclusive */
1505 end--;
1506
1507 /* Look in fixed ranges. Just return the type as per start */
1508 if (mtrr_state->have_fixed && (start < 0x100000)) {
1509 int idx;
1510
1511 if (start < 0x80000) {
1512 idx = 0;
1513 idx += (start >> 16);
1514 return mtrr_state->fixed_ranges[idx];
1515 } else if (start < 0xC0000) {
1516 idx = 1 * 8;
1517 idx += ((start - 0x80000) >> 14);
1518 return mtrr_state->fixed_ranges[idx];
1519 } else if (start < 0x1000000) {
1520 idx = 3 * 8;
1521 idx += ((start - 0xC0000) >> 12);
1522 return mtrr_state->fixed_ranges[idx];
1523 }
1524 }
1525
1526 /*
1527 * Look in variable ranges
1528 * Look of multiple ranges matching this address and pick type
1529 * as per MTRR precedence
1530 */
1531 if (!(mtrr_state->enabled & 2))
1532 return mtrr_state->def_type;
1533
1534 prev_match = 0xFF;
1535 for (i = 0; i < num_var_ranges; ++i) {
1536 unsigned short start_state, end_state;
1537
1538 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1539 continue;
1540
1541 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1542 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1543 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1544 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1545
1546 start_state = ((start & mask) == (base & mask));
1547 end_state = ((end & mask) == (base & mask));
1548 if (start_state != end_state)
1549 return 0xFE;
1550
1551 if ((start & mask) != (base & mask))
1552 continue;
1553
1554 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1555 if (prev_match == 0xFF) {
1556 prev_match = curr_match;
1557 continue;
1558 }
1559
1560 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1561 curr_match == MTRR_TYPE_UNCACHABLE)
1562 return MTRR_TYPE_UNCACHABLE;
1563
1564 if ((prev_match == MTRR_TYPE_WRBACK &&
1565 curr_match == MTRR_TYPE_WRTHROUGH) ||
1566 (prev_match == MTRR_TYPE_WRTHROUGH &&
1567 curr_match == MTRR_TYPE_WRBACK)) {
1568 prev_match = MTRR_TYPE_WRTHROUGH;
1569 curr_match = MTRR_TYPE_WRTHROUGH;
1570 }
1571
1572 if (prev_match != curr_match)
1573 return MTRR_TYPE_UNCACHABLE;
1574 }
1575
1576 if (prev_match != 0xFF)
1577 return prev_match;
1578
1579 return mtrr_state->def_type;
1580}
1581
1582static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1583{
1584 u8 mtrr;
1585
1586 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1587 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1588 if (mtrr == 0xfe || mtrr == 0xff)
1589 mtrr = MTRR_TYPE_WRBACK;
1590 return mtrr;
1591}
1592
4731d4c7
MT
1593static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1594{
1595 unsigned index;
1596 struct hlist_head *bucket;
1597 struct kvm_mmu_page *s;
1598 struct hlist_node *node, *n;
1599
1600 index = kvm_page_table_hashfn(sp->gfn);
1601 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1602 /* don't unsync if pagetable is shadowed with multiple roles */
1603 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1604 if (s->gfn != sp->gfn || s->role.metaphysical)
1605 continue;
1606 if (s->role.word != sp->role.word)
1607 return 1;
1608 }
0074ff63 1609 kvm_mmu_mark_parents_unsync(vcpu, sp);
4731d4c7
MT
1610 ++vcpu->kvm->stat.mmu_unsync;
1611 sp->unsync = 1;
1612 mmu_convert_notrap(sp);
1613 return 0;
1614}
1615
1616static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1617 bool can_unsync)
1618{
1619 struct kvm_mmu_page *shadow;
1620
1621 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1622 if (shadow) {
1623 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1624 return 1;
1625 if (shadow->unsync)
1626 return 0;
582801a9 1627 if (can_unsync && oos_shadow)
4731d4c7
MT
1628 return kvm_unsync_page(vcpu, shadow);
1629 return 1;
1630 }
1631 return 0;
1632}
1633
1e73f9dd
MT
1634static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1635 unsigned pte_access, int user_fault,
1636 int write_fault, int dirty, int largepage,
4731d4c7
MT
1637 gfn_t gfn, pfn_t pfn, bool speculative,
1638 bool can_unsync)
1c4f1fd6
AK
1639{
1640 u64 spte;
1e73f9dd 1641 int ret = 0;
64d4d521
SY
1642 u64 mt_mask = shadow_mt_mask;
1643
1c4f1fd6
AK
1644 /*
1645 * We don't set the accessed bit, since we sometimes want to see
1646 * whether the guest actually used the pte (in order to detect
1647 * demand paging).
1648 */
7b52345e 1649 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1650 if (!speculative)
3201b5d9 1651 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1652 if (!dirty)
1653 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1654 if (pte_access & ACC_EXEC_MASK)
1655 spte |= shadow_x_mask;
1656 else
1657 spte |= shadow_nx_mask;
1c4f1fd6 1658 if (pte_access & ACC_USER_MASK)
7b52345e 1659 spte |= shadow_user_mask;
05da4558
MT
1660 if (largepage)
1661 spte |= PT_PAGE_SIZE_MASK;
64d4d521
SY
1662 if (mt_mask) {
1663 mt_mask = get_memory_type(vcpu, gfn) <<
1664 kvm_x86_ops->get_mt_mask_shift();
1665 spte |= mt_mask;
1666 }
1c4f1fd6 1667
35149e21 1668 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1669
1670 if ((pte_access & ACC_WRITE_MASK)
1671 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1672
38187c83
MT
1673 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1674 ret = 1;
1675 spte = shadow_trap_nonpresent_pte;
1676 goto set_pte;
1677 }
1678
1c4f1fd6 1679 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1680
ecc5589f
MT
1681 /*
1682 * Optimization: for pte sync, if spte was writable the hash
1683 * lookup is unnecessary (and expensive). Write protection
1684 * is responsibility of mmu_get_page / kvm_sync_page.
1685 * Same reasoning can be applied to dirty page accounting.
1686 */
1687 if (!can_unsync && is_writeble_pte(*shadow_pte))
1688 goto set_pte;
1689
4731d4c7 1690 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1691 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1692 __func__, gfn);
1e73f9dd 1693 ret = 1;
1c4f1fd6 1694 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1695 if (is_writeble_pte(spte))
1c4f1fd6 1696 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1697 }
1698 }
1699
1c4f1fd6
AK
1700 if (pte_access & ACC_WRITE_MASK)
1701 mark_page_dirty(vcpu->kvm, gfn);
1702
38187c83 1703set_pte:
1c4f1fd6 1704 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1705 return ret;
1706}
1707
1e73f9dd
MT
1708static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1709 unsigned pt_access, unsigned pte_access,
1710 int user_fault, int write_fault, int dirty,
1711 int *ptwrite, int largepage, gfn_t gfn,
1712 pfn_t pfn, bool speculative)
1713{
1714 int was_rmapped = 0;
1715 int was_writeble = is_writeble_pte(*shadow_pte);
1716
1717 pgprintk("%s: spte %llx access %x write_fault %d"
1718 " user_fault %d gfn %lx\n",
1719 __func__, *shadow_pte, pt_access,
1720 write_fault, user_fault, gfn);
1721
1722 if (is_rmap_pte(*shadow_pte)) {
1723 /*
1724 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1725 * the parent of the now unreachable PTE.
1726 */
1727 if (largepage && !is_large_pte(*shadow_pte)) {
1728 struct kvm_mmu_page *child;
1729 u64 pte = *shadow_pte;
1730
1731 child = page_header(pte & PT64_BASE_ADDR_MASK);
1732 mmu_page_remove_parent_pte(child, shadow_pte);
1733 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1734 pgprintk("hfn old %lx new %lx\n",
1735 spte_to_pfn(*shadow_pte), pfn);
1736 rmap_remove(vcpu->kvm, shadow_pte);
1737 } else {
1738 if (largepage)
1739 was_rmapped = is_large_pte(*shadow_pte);
1740 else
1741 was_rmapped = 1;
1742 }
1743 }
1744 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
4731d4c7 1745 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1746 if (write_fault)
1747 *ptwrite = 1;
a378b4e6
MT
1748 kvm_x86_ops->tlb_flush(vcpu);
1749 }
1e73f9dd
MT
1750
1751 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1752 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1753 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1754 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1755 *shadow_pte, shadow_pte);
1756 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1757 ++vcpu->kvm->stat.lpages;
1758
1c4f1fd6
AK
1759 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1760 if (!was_rmapped) {
05da4558 1761 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1762 if (!is_rmap_pte(*shadow_pte))
35149e21 1763 kvm_release_pfn_clean(pfn);
75e68e60
IE
1764 } else {
1765 if (was_writeble)
35149e21 1766 kvm_release_pfn_dirty(pfn);
75e68e60 1767 else
35149e21 1768 kvm_release_pfn_clean(pfn);
1c4f1fd6 1769 }
1b7fcd32 1770 if (speculative) {
ad312c7c 1771 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1772 vcpu->arch.last_pte_gfn = gfn;
1773 }
1c4f1fd6
AK
1774}
1775
6aa8b732
AK
1776static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1777{
1778}
1779
140754bc
AK
1780struct direct_shadow_walk {
1781 struct kvm_shadow_walk walker;
1782 pfn_t pfn;
1783 int write;
1784 int largepage;
1785 int pt_write;
1786};
6aa8b732 1787
140754bc
AK
1788static int direct_map_entry(struct kvm_shadow_walk *_walk,
1789 struct kvm_vcpu *vcpu,
d40a1ee4 1790 u64 addr, u64 *sptep, int level)
140754bc
AK
1791{
1792 struct direct_shadow_walk *walk =
1793 container_of(_walk, struct direct_shadow_walk, walker);
1794 struct kvm_mmu_page *sp;
1795 gfn_t pseudo_gfn;
1796 gfn_t gfn = addr >> PAGE_SHIFT;
1797
1798 if (level == PT_PAGE_TABLE_LEVEL
1799 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1800 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1801 0, walk->write, 1, &walk->pt_write,
1802 walk->largepage, gfn, walk->pfn, false);
bc2d4299 1803 ++vcpu->stat.pf_fixed;
140754bc
AK
1804 return 1;
1805 }
6aa8b732 1806
140754bc
AK
1807 if (*sptep == shadow_trap_nonpresent_pte) {
1808 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1809 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1810 1, ACC_ALL, sptep);
1811 if (!sp) {
1812 pgprintk("nonpaging_map: ENOMEM\n");
1813 kvm_release_pfn_clean(walk->pfn);
1814 return -ENOMEM;
6aa8b732
AK
1815 }
1816
140754bc
AK
1817 set_shadow_pte(sptep,
1818 __pa(sp->spt)
1819 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1820 | shadow_user_mask | shadow_x_mask);
6aa8b732 1821 }
140754bc
AK
1822 return 0;
1823}
1824
1825static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1826 int largepage, gfn_t gfn, pfn_t pfn)
1827{
1828 int r;
1829 struct direct_shadow_walk walker = {
1830 .walker = { .entry = direct_map_entry, },
1831 .pfn = pfn,
1832 .largepage = largepage,
1833 .write = write,
1834 .pt_write = 0,
1835 };
1836
d40a1ee4 1837 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1838 if (r < 0)
1839 return r;
1840 return walker.pt_write;
6aa8b732
AK
1841}
1842
10589a46
MT
1843static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1844{
1845 int r;
05da4558 1846 int largepage = 0;
35149e21 1847 pfn_t pfn;
e930bffe 1848 unsigned long mmu_seq;
aaee2c94 1849
05da4558
MT
1850 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1851 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1852 largepage = 1;
1853 }
1854
e930bffe 1855 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1856 smp_rmb();
35149e21 1857 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1858
d196e343 1859 /* mmio */
35149e21
AL
1860 if (is_error_pfn(pfn)) {
1861 kvm_release_pfn_clean(pfn);
d196e343
AK
1862 return 1;
1863 }
1864
aaee2c94 1865 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1866 if (mmu_notifier_retry(vcpu, mmu_seq))
1867 goto out_unlock;
eb787d10 1868 kvm_mmu_free_some_pages(vcpu);
6c41f428 1869 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1870 spin_unlock(&vcpu->kvm->mmu_lock);
1871
aaee2c94 1872
10589a46 1873 return r;
e930bffe
AA
1874
1875out_unlock:
1876 spin_unlock(&vcpu->kvm->mmu_lock);
1877 kvm_release_pfn_clean(pfn);
1878 return 0;
10589a46
MT
1879}
1880
1881
17ac10ad
AK
1882static void mmu_free_roots(struct kvm_vcpu *vcpu)
1883{
1884 int i;
4db35314 1885 struct kvm_mmu_page *sp;
17ac10ad 1886
ad312c7c 1887 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1888 return;
aaee2c94 1889 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1890 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1891 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1892
4db35314
AK
1893 sp = page_header(root);
1894 --sp->root_count;
2e53d63a
MT
1895 if (!sp->root_count && sp->role.invalid)
1896 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1897 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1898 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1899 return;
1900 }
17ac10ad 1901 for (i = 0; i < 4; ++i) {
ad312c7c 1902 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1903
417726a3 1904 if (root) {
417726a3 1905 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1906 sp = page_header(root);
1907 --sp->root_count;
2e53d63a
MT
1908 if (!sp->root_count && sp->role.invalid)
1909 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1910 }
ad312c7c 1911 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1912 }
aaee2c94 1913 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1914 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1915}
1916
1917static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1918{
1919 int i;
cea0f0e7 1920 gfn_t root_gfn;
4db35314 1921 struct kvm_mmu_page *sp;
fb72d167 1922 int metaphysical = 0;
3bb65a22 1923
ad312c7c 1924 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1925
ad312c7c
ZX
1926 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1927 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1928
1929 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1930 if (tdp_enabled)
1931 metaphysical = 1;
4db35314 1932 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1933 PT64_ROOT_LEVEL, metaphysical,
1934 ACC_ALL, NULL);
4db35314
AK
1935 root = __pa(sp->spt);
1936 ++sp->root_count;
ad312c7c 1937 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1938 return;
1939 }
fb72d167
JR
1940 metaphysical = !is_paging(vcpu);
1941 if (tdp_enabled)
1942 metaphysical = 1;
17ac10ad 1943 for (i = 0; i < 4; ++i) {
ad312c7c 1944 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1945
1946 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1947 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1948 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1949 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1950 continue;
1951 }
ad312c7c
ZX
1952 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1953 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1954 root_gfn = 0;
4db35314 1955 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1956 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1957 ACC_ALL, NULL);
4db35314
AK
1958 root = __pa(sp->spt);
1959 ++sp->root_count;
ad312c7c 1960 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1961 }
ad312c7c 1962 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1963}
1964
0ba73cda
MT
1965static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1966{
1967 int i;
1968 struct kvm_mmu_page *sp;
1969
1970 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1971 return;
1972 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1973 hpa_t root = vcpu->arch.mmu.root_hpa;
1974 sp = page_header(root);
1975 mmu_sync_children(vcpu, sp);
1976 return;
1977 }
1978 for (i = 0; i < 4; ++i) {
1979 hpa_t root = vcpu->arch.mmu.pae_root[i];
1980
1981 if (root) {
1982 root &= PT64_BASE_ADDR_MASK;
1983 sp = page_header(root);
1984 mmu_sync_children(vcpu, sp);
1985 }
1986 }
1987}
1988
1989void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1990{
1991 spin_lock(&vcpu->kvm->mmu_lock);
1992 mmu_sync_roots(vcpu);
1993 spin_unlock(&vcpu->kvm->mmu_lock);
1994}
1995
6aa8b732
AK
1996static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1997{
1998 return vaddr;
1999}
2000
2001static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2002 u32 error_code)
6aa8b732 2003{
e833240f 2004 gfn_t gfn;
e2dec939 2005 int r;
6aa8b732 2006
b8688d51 2007 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2008 r = mmu_topup_memory_caches(vcpu);
2009 if (r)
2010 return r;
714b93da 2011
6aa8b732 2012 ASSERT(vcpu);
ad312c7c 2013 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2014
e833240f 2015 gfn = gva >> PAGE_SHIFT;
6aa8b732 2016
e833240f
AK
2017 return nonpaging_map(vcpu, gva & PAGE_MASK,
2018 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2019}
2020
fb72d167
JR
2021static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2022 u32 error_code)
2023{
35149e21 2024 pfn_t pfn;
fb72d167 2025 int r;
05da4558
MT
2026 int largepage = 0;
2027 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2028 unsigned long mmu_seq;
fb72d167
JR
2029
2030 ASSERT(vcpu);
2031 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2032
2033 r = mmu_topup_memory_caches(vcpu);
2034 if (r)
2035 return r;
2036
05da4558
MT
2037 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2038 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2039 largepage = 1;
2040 }
e930bffe 2041 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2042 smp_rmb();
35149e21 2043 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2044 if (is_error_pfn(pfn)) {
2045 kvm_release_pfn_clean(pfn);
fb72d167
JR
2046 return 1;
2047 }
2048 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2049 if (mmu_notifier_retry(vcpu, mmu_seq))
2050 goto out_unlock;
fb72d167
JR
2051 kvm_mmu_free_some_pages(vcpu);
2052 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2053 largepage, gfn, pfn);
fb72d167 2054 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2055
2056 return r;
e930bffe
AA
2057
2058out_unlock:
2059 spin_unlock(&vcpu->kvm->mmu_lock);
2060 kvm_release_pfn_clean(pfn);
2061 return 0;
fb72d167
JR
2062}
2063
6aa8b732
AK
2064static void nonpaging_free(struct kvm_vcpu *vcpu)
2065{
17ac10ad 2066 mmu_free_roots(vcpu);
6aa8b732
AK
2067}
2068
2069static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2070{
ad312c7c 2071 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2072
2073 context->new_cr3 = nonpaging_new_cr3;
2074 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2075 context->gva_to_gpa = nonpaging_gva_to_gpa;
2076 context->free = nonpaging_free;
c7addb90 2077 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2078 context->sync_page = nonpaging_sync_page;
a7052897 2079 context->invlpg = nonpaging_invlpg;
cea0f0e7 2080 context->root_level = 0;
6aa8b732 2081 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2082 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2083 return 0;
2084}
2085
d835dfec 2086void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2087{
1165f5fe 2088 ++vcpu->stat.tlb_flush;
cbdd1bea 2089 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2090}
2091
2092static void paging_new_cr3(struct kvm_vcpu *vcpu)
2093{
b8688d51 2094 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2095 mmu_free_roots(vcpu);
6aa8b732
AK
2096}
2097
6aa8b732
AK
2098static void inject_page_fault(struct kvm_vcpu *vcpu,
2099 u64 addr,
2100 u32 err_code)
2101{
c3c91fee 2102 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2103}
2104
6aa8b732
AK
2105static void paging_free(struct kvm_vcpu *vcpu)
2106{
2107 nonpaging_free(vcpu);
2108}
2109
2110#define PTTYPE 64
2111#include "paging_tmpl.h"
2112#undef PTTYPE
2113
2114#define PTTYPE 32
2115#include "paging_tmpl.h"
2116#undef PTTYPE
2117
17ac10ad 2118static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2119{
ad312c7c 2120 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2121
2122 ASSERT(is_pae(vcpu));
2123 context->new_cr3 = paging_new_cr3;
2124 context->page_fault = paging64_page_fault;
6aa8b732 2125 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2126 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2127 context->sync_page = paging64_sync_page;
a7052897 2128 context->invlpg = paging64_invlpg;
6aa8b732 2129 context->free = paging_free;
17ac10ad
AK
2130 context->root_level = level;
2131 context->shadow_root_level = level;
17c3ba9d 2132 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2133 return 0;
2134}
2135
17ac10ad
AK
2136static int paging64_init_context(struct kvm_vcpu *vcpu)
2137{
2138 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2139}
2140
6aa8b732
AK
2141static int paging32_init_context(struct kvm_vcpu *vcpu)
2142{
ad312c7c 2143 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2144
2145 context->new_cr3 = paging_new_cr3;
2146 context->page_fault = paging32_page_fault;
6aa8b732
AK
2147 context->gva_to_gpa = paging32_gva_to_gpa;
2148 context->free = paging_free;
c7addb90 2149 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2150 context->sync_page = paging32_sync_page;
a7052897 2151 context->invlpg = paging32_invlpg;
6aa8b732
AK
2152 context->root_level = PT32_ROOT_LEVEL;
2153 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2154 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2155 return 0;
2156}
2157
2158static int paging32E_init_context(struct kvm_vcpu *vcpu)
2159{
17ac10ad 2160 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2161}
2162
fb72d167
JR
2163static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2164{
2165 struct kvm_mmu *context = &vcpu->arch.mmu;
2166
2167 context->new_cr3 = nonpaging_new_cr3;
2168 context->page_fault = tdp_page_fault;
2169 context->free = nonpaging_free;
2170 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2171 context->sync_page = nonpaging_sync_page;
a7052897 2172 context->invlpg = nonpaging_invlpg;
67253af5 2173 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2174 context->root_hpa = INVALID_PAGE;
2175
2176 if (!is_paging(vcpu)) {
2177 context->gva_to_gpa = nonpaging_gva_to_gpa;
2178 context->root_level = 0;
2179 } else if (is_long_mode(vcpu)) {
2180 context->gva_to_gpa = paging64_gva_to_gpa;
2181 context->root_level = PT64_ROOT_LEVEL;
2182 } else if (is_pae(vcpu)) {
2183 context->gva_to_gpa = paging64_gva_to_gpa;
2184 context->root_level = PT32E_ROOT_LEVEL;
2185 } else {
2186 context->gva_to_gpa = paging32_gva_to_gpa;
2187 context->root_level = PT32_ROOT_LEVEL;
2188 }
2189
2190 return 0;
2191}
2192
2193static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
2194{
2195 ASSERT(vcpu);
ad312c7c 2196 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2197
2198 if (!is_paging(vcpu))
2199 return nonpaging_init_context(vcpu);
a9058ecd 2200 else if (is_long_mode(vcpu))
6aa8b732
AK
2201 return paging64_init_context(vcpu);
2202 else if (is_pae(vcpu))
2203 return paging32E_init_context(vcpu);
2204 else
2205 return paging32_init_context(vcpu);
2206}
2207
fb72d167
JR
2208static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2209{
35149e21
AL
2210 vcpu->arch.update_pte.pfn = bad_pfn;
2211
fb72d167
JR
2212 if (tdp_enabled)
2213 return init_kvm_tdp_mmu(vcpu);
2214 else
2215 return init_kvm_softmmu(vcpu);
2216}
2217
6aa8b732
AK
2218static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2219{
2220 ASSERT(vcpu);
ad312c7c
ZX
2221 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2222 vcpu->arch.mmu.free(vcpu);
2223 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2224 }
2225}
2226
2227int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2228{
2229 destroy_kvm_mmu(vcpu);
2230 return init_kvm_mmu(vcpu);
2231}
8668a3c4 2232EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2233
2234int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2235{
714b93da
AK
2236 int r;
2237
e2dec939 2238 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2239 if (r)
2240 goto out;
aaee2c94 2241 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2242 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2243 mmu_alloc_roots(vcpu);
0ba73cda 2244 mmu_sync_roots(vcpu);
aaee2c94 2245 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2246 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2247 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2248out:
2249 return r;
6aa8b732 2250}
17c3ba9d
AK
2251EXPORT_SYMBOL_GPL(kvm_mmu_load);
2252
2253void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2254{
2255 mmu_free_roots(vcpu);
2256}
6aa8b732 2257
09072daf 2258static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2259 struct kvm_mmu_page *sp,
ac1b714e
AK
2260 u64 *spte)
2261{
2262 u64 pte;
2263 struct kvm_mmu_page *child;
2264
2265 pte = *spte;
c7addb90 2266 if (is_shadow_present_pte(pte)) {
05da4558
MT
2267 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2268 is_large_pte(pte))
290fc38d 2269 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2270 else {
2271 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2272 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2273 }
2274 }
c7addb90 2275 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2276 if (is_large_pte(pte))
2277 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2278}
2279
0028425f 2280static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2281 struct kvm_mmu_page *sp,
0028425f 2282 u64 *spte,
489f1d65 2283 const void *new)
0028425f 2284{
30945387
MT
2285 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2286 if (!vcpu->arch.update_pte.largepage ||
2287 sp->role.glevels == PT32_ROOT_LEVEL) {
2288 ++vcpu->kvm->stat.mmu_pde_zapped;
2289 return;
2290 }
2291 }
0028425f 2292
4cee5764 2293 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2294 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2295 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2296 else
489f1d65 2297 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2298}
2299
79539cec
AK
2300static bool need_remote_flush(u64 old, u64 new)
2301{
2302 if (!is_shadow_present_pte(old))
2303 return false;
2304 if (!is_shadow_present_pte(new))
2305 return true;
2306 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2307 return true;
2308 old ^= PT64_NX_MASK;
2309 new ^= PT64_NX_MASK;
2310 return (old & ~new & PT64_PERM_MASK) != 0;
2311}
2312
2313static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2314{
2315 if (need_remote_flush(old, new))
2316 kvm_flush_remote_tlbs(vcpu->kvm);
2317 else
2318 kvm_mmu_flush_tlb(vcpu);
2319}
2320
12b7d28f
AK
2321static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2322{
ad312c7c 2323 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2324
7b52345e 2325 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2326}
2327
d7824fff
AK
2328static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2329 const u8 *new, int bytes)
2330{
2331 gfn_t gfn;
2332 int r;
2333 u64 gpte = 0;
35149e21 2334 pfn_t pfn;
d7824fff 2335
05da4558
MT
2336 vcpu->arch.update_pte.largepage = 0;
2337
d7824fff
AK
2338 if (bytes != 4 && bytes != 8)
2339 return;
2340
2341 /*
2342 * Assume that the pte write on a page table of the same type
2343 * as the current vcpu paging mode. This is nearly always true
2344 * (might be false while changing modes). Note it is verified later
2345 * by update_pte().
2346 */
2347 if (is_pae(vcpu)) {
2348 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2349 if ((bytes == 4) && (gpa % 4 == 0)) {
2350 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2351 if (r)
2352 return;
2353 memcpy((void *)&gpte + (gpa % 8), new, 4);
2354 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2355 memcpy((void *)&gpte, new, 8);
2356 }
2357 } else {
2358 if ((bytes == 4) && (gpa % 4 == 0))
2359 memcpy((void *)&gpte, new, 4);
2360 }
2361 if (!is_present_pte(gpte))
2362 return;
2363 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2364
05da4558
MT
2365 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2366 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2367 vcpu->arch.update_pte.largepage = 1;
2368 }
e930bffe 2369 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2370 smp_rmb();
35149e21 2371 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2372
35149e21
AL
2373 if (is_error_pfn(pfn)) {
2374 kvm_release_pfn_clean(pfn);
d196e343
AK
2375 return;
2376 }
d7824fff 2377 vcpu->arch.update_pte.gfn = gfn;
35149e21 2378 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2379}
2380
1b7fcd32
AK
2381static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2382{
2383 u64 *spte = vcpu->arch.last_pte_updated;
2384
2385 if (spte
2386 && vcpu->arch.last_pte_gfn == gfn
2387 && shadow_accessed_mask
2388 && !(*spte & shadow_accessed_mask)
2389 && is_shadow_present_pte(*spte))
2390 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2391}
2392
09072daf 2393void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 2394 const u8 *new, int bytes)
da4a00f0 2395{
9b7a0325 2396 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2397 struct kvm_mmu_page *sp;
0e7bc4b9 2398 struct hlist_node *node, *n;
9b7a0325
AK
2399 struct hlist_head *bucket;
2400 unsigned index;
489f1d65 2401 u64 entry, gentry;
9b7a0325 2402 u64 *spte;
9b7a0325 2403 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2404 unsigned pte_size;
9b7a0325 2405 unsigned page_offset;
0e7bc4b9 2406 unsigned misaligned;
fce0657f 2407 unsigned quadrant;
9b7a0325 2408 int level;
86a5ba02 2409 int flooded = 0;
ac1b714e 2410 int npte;
489f1d65 2411 int r;
9b7a0325 2412
b8688d51 2413 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2414 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2415 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2416 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2417 kvm_mmu_free_some_pages(vcpu);
4cee5764 2418 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2419 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 2420 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 2421 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
2422 ++vcpu->arch.last_pt_write_count;
2423 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
2424 flooded = 1;
2425 } else {
ad312c7c
ZX
2426 vcpu->arch.last_pt_write_gfn = gfn;
2427 vcpu->arch.last_pt_write_count = 1;
2428 vcpu->arch.last_pte_updated = NULL;
86a5ba02 2429 }
1ae0a13d 2430 index = kvm_page_table_hashfn(gfn);
f05e70ac 2431 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2432 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2433 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2434 continue;
4db35314 2435 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2436 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2437 misaligned |= bytes < 4;
86a5ba02 2438 if (misaligned || flooded) {
0e7bc4b9
AK
2439 /*
2440 * Misaligned accesses are too much trouble to fix
2441 * up; also, they usually indicate a page is not used
2442 * as a page table.
86a5ba02
AK
2443 *
2444 * If we're seeing too many writes to a page,
2445 * it may no longer be a page table, or we may be
2446 * forking, in which case it is better to unmap the
2447 * page.
0e7bc4b9
AK
2448 */
2449 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2450 gpa, bytes, sp->role.word);
07385413
MT
2451 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2452 n = bucket->first;
4cee5764 2453 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2454 continue;
2455 }
9b7a0325 2456 page_offset = offset;
4db35314 2457 level = sp->role.level;
ac1b714e 2458 npte = 1;
4db35314 2459 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2460 page_offset <<= 1; /* 32->64 */
2461 /*
2462 * A 32-bit pde maps 4MB while the shadow pdes map
2463 * only 2MB. So we need to double the offset again
2464 * and zap two pdes instead of one.
2465 */
2466 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2467 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2468 page_offset <<= 1;
2469 npte = 2;
2470 }
fce0657f 2471 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2472 page_offset &= ~PAGE_MASK;
4db35314 2473 if (quadrant != sp->role.quadrant)
fce0657f 2474 continue;
9b7a0325 2475 }
4db35314 2476 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2477 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2478 gentry = 0;
2479 r = kvm_read_guest_atomic(vcpu->kvm,
2480 gpa & ~(u64)(pte_size - 1),
2481 &gentry, pte_size);
2482 new = (const void *)&gentry;
2483 if (r < 0)
2484 new = NULL;
2485 }
ac1b714e 2486 while (npte--) {
79539cec 2487 entry = *spte;
4db35314 2488 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2489 if (new)
2490 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2491 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2492 ++spte;
9b7a0325 2493 }
9b7a0325 2494 }
c7addb90 2495 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2496 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2497 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2498 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2499 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2500 }
da4a00f0
AK
2501}
2502
a436036b
AK
2503int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2504{
10589a46
MT
2505 gpa_t gpa;
2506 int r;
a436036b 2507
10589a46 2508 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2509
aaee2c94 2510 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2511 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2512 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2513 return r;
a436036b 2514}
577bdc49 2515EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2516
22d95b12 2517void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2518{
f05e70ac 2519 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2520 struct kvm_mmu_page *sp;
ebeace86 2521
f05e70ac 2522 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2523 struct kvm_mmu_page, link);
2524 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2525 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2526 }
2527}
ebeace86 2528
3067714c
AK
2529int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2530{
2531 int r;
2532 enum emulation_result er;
2533
ad312c7c 2534 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2535 if (r < 0)
2536 goto out;
2537
2538 if (!r) {
2539 r = 1;
2540 goto out;
2541 }
2542
b733bfb5
AK
2543 r = mmu_topup_memory_caches(vcpu);
2544 if (r)
2545 goto out;
2546
3067714c 2547 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2548
2549 switch (er) {
2550 case EMULATE_DONE:
2551 return 1;
2552 case EMULATE_DO_MMIO:
2553 ++vcpu->stat.mmio_exits;
2554 return 0;
2555 case EMULATE_FAIL:
2556 kvm_report_emulation_failure(vcpu, "pagetable");
2557 return 1;
2558 default:
2559 BUG();
2560 }
2561out:
3067714c
AK
2562 return r;
2563}
2564EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2565
a7052897
MT
2566void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2567{
2568 spin_lock(&vcpu->kvm->mmu_lock);
2569 vcpu->arch.mmu.invlpg(vcpu, gva);
2570 spin_unlock(&vcpu->kvm->mmu_lock);
2571 kvm_mmu_flush_tlb(vcpu);
2572 ++vcpu->stat.invlpg;
2573}
2574EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2575
18552672
JR
2576void kvm_enable_tdp(void)
2577{
2578 tdp_enabled = true;
2579}
2580EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2581
5f4cb662
JR
2582void kvm_disable_tdp(void)
2583{
2584 tdp_enabled = false;
2585}
2586EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2587
6aa8b732
AK
2588static void free_mmu_pages(struct kvm_vcpu *vcpu)
2589{
4db35314 2590 struct kvm_mmu_page *sp;
6aa8b732 2591
f05e70ac
ZX
2592 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2593 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2594 struct kvm_mmu_page, link);
2595 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2596 cond_resched();
f51234c2 2597 }
ad312c7c 2598 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2599}
2600
2601static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2602{
17ac10ad 2603 struct page *page;
6aa8b732
AK
2604 int i;
2605
2606 ASSERT(vcpu);
2607
f05e70ac
ZX
2608 if (vcpu->kvm->arch.n_requested_mmu_pages)
2609 vcpu->kvm->arch.n_free_mmu_pages =
2610 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2611 else
f05e70ac
ZX
2612 vcpu->kvm->arch.n_free_mmu_pages =
2613 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2614 /*
2615 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2616 * Therefore we need to allocate shadow page tables in the first
2617 * 4GB of memory, which happens to fit the DMA32 zone.
2618 */
2619 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2620 if (!page)
2621 goto error_1;
ad312c7c 2622 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2623 for (i = 0; i < 4; ++i)
ad312c7c 2624 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2625
6aa8b732
AK
2626 return 0;
2627
2628error_1:
2629 free_mmu_pages(vcpu);
2630 return -ENOMEM;
2631}
2632
8018c27b 2633int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2634{
6aa8b732 2635 ASSERT(vcpu);
ad312c7c 2636 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2637
8018c27b
IM
2638 return alloc_mmu_pages(vcpu);
2639}
6aa8b732 2640
8018c27b
IM
2641int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2642{
2643 ASSERT(vcpu);
ad312c7c 2644 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2645
8018c27b 2646 return init_kvm_mmu(vcpu);
6aa8b732
AK
2647}
2648
2649void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2650{
2651 ASSERT(vcpu);
2652
2653 destroy_kvm_mmu(vcpu);
2654 free_mmu_pages(vcpu);
714b93da 2655 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2656}
2657
90cb0529 2658void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2659{
4db35314 2660 struct kvm_mmu_page *sp;
6aa8b732 2661
2245a28f 2662 spin_lock(&kvm->mmu_lock);
f05e70ac 2663 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2664 int i;
2665 u64 *pt;
2666
291f26bc 2667 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2668 continue;
2669
4db35314 2670 pt = sp->spt;
6aa8b732
AK
2671 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2672 /* avoid RMW */
9647c14c 2673 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2674 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2675 }
171d595d 2676 kvm_flush_remote_tlbs(kvm);
2245a28f 2677 spin_unlock(&kvm->mmu_lock);
6aa8b732 2678}
37a7d8b0 2679
90cb0529 2680void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2681{
4db35314 2682 struct kvm_mmu_page *sp, *node;
e0fa826f 2683
aaee2c94 2684 spin_lock(&kvm->mmu_lock);
f05e70ac 2685 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2686 if (kvm_mmu_zap_page(kvm, sp))
2687 node = container_of(kvm->arch.active_mmu_pages.next,
2688 struct kvm_mmu_page, link);
aaee2c94 2689 spin_unlock(&kvm->mmu_lock);
e0fa826f 2690
90cb0529 2691 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2692}
2693
8b2cf73c 2694static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2695{
2696 struct kvm_mmu_page *page;
2697
2698 page = container_of(kvm->arch.active_mmu_pages.prev,
2699 struct kvm_mmu_page, link);
2700 kvm_mmu_zap_page(kvm, page);
2701}
2702
2703static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2704{
2705 struct kvm *kvm;
2706 struct kvm *kvm_freed = NULL;
2707 int cache_count = 0;
2708
2709 spin_lock(&kvm_lock);
2710
2711 list_for_each_entry(kvm, &vm_list, vm_list) {
2712 int npages;
2713
5a4c9288
MT
2714 if (!down_read_trylock(&kvm->slots_lock))
2715 continue;
3ee16c81
IE
2716 spin_lock(&kvm->mmu_lock);
2717 npages = kvm->arch.n_alloc_mmu_pages -
2718 kvm->arch.n_free_mmu_pages;
2719 cache_count += npages;
2720 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2721 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2722 cache_count--;
2723 kvm_freed = kvm;
2724 }
2725 nr_to_scan--;
2726
2727 spin_unlock(&kvm->mmu_lock);
5a4c9288 2728 up_read(&kvm->slots_lock);
3ee16c81
IE
2729 }
2730 if (kvm_freed)
2731 list_move_tail(&kvm_freed->vm_list, &vm_list);
2732
2733 spin_unlock(&kvm_lock);
2734
2735 return cache_count;
2736}
2737
2738static struct shrinker mmu_shrinker = {
2739 .shrink = mmu_shrink,
2740 .seeks = DEFAULT_SEEKS * 10,
2741};
2742
2ddfd20e 2743static void mmu_destroy_caches(void)
b5a33a75
AK
2744{
2745 if (pte_chain_cache)
2746 kmem_cache_destroy(pte_chain_cache);
2747 if (rmap_desc_cache)
2748 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2749 if (mmu_page_header_cache)
2750 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2751}
2752
3ee16c81
IE
2753void kvm_mmu_module_exit(void)
2754{
2755 mmu_destroy_caches();
2756 unregister_shrinker(&mmu_shrinker);
2757}
2758
b5a33a75
AK
2759int kvm_mmu_module_init(void)
2760{
2761 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2762 sizeof(struct kvm_pte_chain),
20c2df83 2763 0, 0, NULL);
b5a33a75
AK
2764 if (!pte_chain_cache)
2765 goto nomem;
2766 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2767 sizeof(struct kvm_rmap_desc),
20c2df83 2768 0, 0, NULL);
b5a33a75
AK
2769 if (!rmap_desc_cache)
2770 goto nomem;
2771
d3d25b04
AK
2772 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2773 sizeof(struct kvm_mmu_page),
20c2df83 2774 0, 0, NULL);
d3d25b04
AK
2775 if (!mmu_page_header_cache)
2776 goto nomem;
2777
3ee16c81
IE
2778 register_shrinker(&mmu_shrinker);
2779
b5a33a75
AK
2780 return 0;
2781
2782nomem:
3ee16c81 2783 mmu_destroy_caches();
b5a33a75
AK
2784 return -ENOMEM;
2785}
2786
3ad82a7e
ZX
2787/*
2788 * Caculate mmu pages needed for kvm.
2789 */
2790unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2791{
2792 int i;
2793 unsigned int nr_mmu_pages;
2794 unsigned int nr_pages = 0;
2795
2796 for (i = 0; i < kvm->nmemslots; i++)
2797 nr_pages += kvm->memslots[i].npages;
2798
2799 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2800 nr_mmu_pages = max(nr_mmu_pages,
2801 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2802
2803 return nr_mmu_pages;
2804}
2805
2f333bcb
MT
2806static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2807 unsigned len)
2808{
2809 if (len > buffer->len)
2810 return NULL;
2811 return buffer->ptr;
2812}
2813
2814static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2815 unsigned len)
2816{
2817 void *ret;
2818
2819 ret = pv_mmu_peek_buffer(buffer, len);
2820 if (!ret)
2821 return ret;
2822 buffer->ptr += len;
2823 buffer->len -= len;
2824 buffer->processed += len;
2825 return ret;
2826}
2827
2828static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2829 gpa_t addr, gpa_t value)
2830{
2831 int bytes = 8;
2832 int r;
2833
2834 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2835 bytes = 4;
2836
2837 r = mmu_topup_memory_caches(vcpu);
2838 if (r)
2839 return r;
2840
3200f405 2841 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2842 return -EFAULT;
2843
2844 return 1;
2845}
2846
2847static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2848{
2849 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2850 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2851 return 1;
2852}
2853
2854static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2855{
2856 spin_lock(&vcpu->kvm->mmu_lock);
2857 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2858 spin_unlock(&vcpu->kvm->mmu_lock);
2859 return 1;
2860}
2861
2862static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2863 struct kvm_pv_mmu_op_buffer *buffer)
2864{
2865 struct kvm_mmu_op_header *header;
2866
2867 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2868 if (!header)
2869 return 0;
2870 switch (header->op) {
2871 case KVM_MMU_OP_WRITE_PTE: {
2872 struct kvm_mmu_op_write_pte *wpte;
2873
2874 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2875 if (!wpte)
2876 return 0;
2877 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2878 wpte->pte_val);
2879 }
2880 case KVM_MMU_OP_FLUSH_TLB: {
2881 struct kvm_mmu_op_flush_tlb *ftlb;
2882
2883 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2884 if (!ftlb)
2885 return 0;
2886 return kvm_pv_mmu_flush_tlb(vcpu);
2887 }
2888 case KVM_MMU_OP_RELEASE_PT: {
2889 struct kvm_mmu_op_release_pt *rpt;
2890
2891 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2892 if (!rpt)
2893 return 0;
2894 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2895 }
2896 default: return 0;
2897 }
2898}
2899
2900int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2901 gpa_t addr, unsigned long *ret)
2902{
2903 int r;
6ad18fba 2904 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2905
6ad18fba
DH
2906 buffer->ptr = buffer->buf;
2907 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2908 buffer->processed = 0;
2f333bcb 2909
6ad18fba 2910 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2911 if (r)
2912 goto out;
2913
6ad18fba
DH
2914 while (buffer->len) {
2915 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2916 if (r < 0)
2917 goto out;
2918 if (r == 0)
2919 break;
2920 }
2921
2922 r = 1;
2923out:
6ad18fba 2924 *ret = buffer->processed;
2f333bcb
MT
2925 return r;
2926}
2927
37a7d8b0
AK
2928#ifdef AUDIT
2929
2930static const char *audit_msg;
2931
2932static gva_t canonicalize(gva_t gva)
2933{
2934#ifdef CONFIG_X86_64
2935 gva = (long long)(gva << 16) >> 16;
2936#endif
2937 return gva;
2938}
2939
2940static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2941 gva_t va, int level)
2942{
2943 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2944 int i;
2945 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2946
2947 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2948 u64 ent = pt[i];
2949
c7addb90 2950 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2951 continue;
2952
2953 va = canonicalize(va);
c7addb90
AK
2954 if (level > 1) {
2955 if (ent == shadow_notrap_nonpresent_pte)
2956 printk(KERN_ERR "audit: (%s) nontrapping pte"
2957 " in nonleaf level: levels %d gva %lx"
2958 " level %d pte %llx\n", audit_msg,
ad312c7c 2959 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2960
37a7d8b0 2961 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2962 } else {
ad312c7c 2963 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2964 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2965
c7addb90 2966 if (is_shadow_present_pte(ent)
37a7d8b0 2967 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2968 printk(KERN_ERR "xx audit error: (%s) levels %d"
2969 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2970 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2971 va, gpa, hpa, ent,
2972 is_shadow_present_pte(ent));
c7addb90
AK
2973 else if (ent == shadow_notrap_nonpresent_pte
2974 && !is_error_hpa(hpa))
2975 printk(KERN_ERR "audit: (%s) notrap shadow,"
2976 " valid guest gva %lx\n", audit_msg, va);
35149e21 2977 kvm_release_pfn_clean(pfn);
c7addb90 2978
37a7d8b0
AK
2979 }
2980 }
2981}
2982
2983static void audit_mappings(struct kvm_vcpu *vcpu)
2984{
1ea252af 2985 unsigned i;
37a7d8b0 2986
ad312c7c
ZX
2987 if (vcpu->arch.mmu.root_level == 4)
2988 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2989 else
2990 for (i = 0; i < 4; ++i)
ad312c7c 2991 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2992 audit_mappings_page(vcpu,
ad312c7c 2993 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2994 i << 30,
2995 2);
2996}
2997
2998static int count_rmaps(struct kvm_vcpu *vcpu)
2999{
3000 int nmaps = 0;
3001 int i, j, k;
3002
3003 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3004 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3005 struct kvm_rmap_desc *d;
3006
3007 for (j = 0; j < m->npages; ++j) {
290fc38d 3008 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3009
290fc38d 3010 if (!*rmapp)
37a7d8b0 3011 continue;
290fc38d 3012 if (!(*rmapp & 1)) {
37a7d8b0
AK
3013 ++nmaps;
3014 continue;
3015 }
290fc38d 3016 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3017 while (d) {
3018 for (k = 0; k < RMAP_EXT; ++k)
3019 if (d->shadow_ptes[k])
3020 ++nmaps;
3021 else
3022 break;
3023 d = d->more;
3024 }
3025 }
3026 }
3027 return nmaps;
3028}
3029
3030static int count_writable_mappings(struct kvm_vcpu *vcpu)
3031{
3032 int nmaps = 0;
4db35314 3033 struct kvm_mmu_page *sp;
37a7d8b0
AK
3034 int i;
3035
f05e70ac 3036 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3037 u64 *pt = sp->spt;
37a7d8b0 3038
4db35314 3039 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3040 continue;
3041
3042 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3043 u64 ent = pt[i];
3044
3045 if (!(ent & PT_PRESENT_MASK))
3046 continue;
3047 if (!(ent & PT_WRITABLE_MASK))
3048 continue;
3049 ++nmaps;
3050 }
3051 }
3052 return nmaps;
3053}
3054
3055static void audit_rmap(struct kvm_vcpu *vcpu)
3056{
3057 int n_rmap = count_rmaps(vcpu);
3058 int n_actual = count_writable_mappings(vcpu);
3059
3060 if (n_rmap != n_actual)
3061 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3062 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3063}
3064
3065static void audit_write_protection(struct kvm_vcpu *vcpu)
3066{
4db35314 3067 struct kvm_mmu_page *sp;
290fc38d
IE
3068 struct kvm_memory_slot *slot;
3069 unsigned long *rmapp;
3070 gfn_t gfn;
37a7d8b0 3071
f05e70ac 3072 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3073 if (sp->role.metaphysical)
37a7d8b0
AK
3074 continue;
3075
4db35314 3076 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3077 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3078 rmapp = &slot->rmap[gfn - slot->base_gfn];
3079 if (*rmapp)
37a7d8b0
AK
3080 printk(KERN_ERR "%s: (%s) shadow page has writable"
3081 " mappings: gfn %lx role %x\n",
b8688d51 3082 __func__, audit_msg, sp->gfn,
4db35314 3083 sp->role.word);
37a7d8b0
AK
3084 }
3085}
3086
3087static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3088{
3089 int olddbg = dbg;
3090
3091 dbg = 0;
3092 audit_msg = msg;
3093 audit_rmap(vcpu);
3094 audit_write_protection(vcpu);
3095 audit_mappings(vcpu);
3096 dbg = olddbg;
3097}
3098
3099#endif