]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/x86/kvm/mmu.c
KVM: Add kvm_x86_ops get_tdp_level()
[mirror_ubuntu-artful-kernel.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d
AK
19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
6aa8b732
AK
24#include <linux/types.h>
25#include <linux/string.h>
6aa8b732
AK
26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
e495606d
AK
33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
37a7d8b0
AK
46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
69static int dbg = 1;
70#endif
6aa8b732 71
d6c69ee9
YD
72#ifndef MMU_DEBUG
73#define ASSERT(x) do { } while (0)
74#else
6aa8b732
AK
75#define ASSERT(x) \
76 if (!(x)) { \
77 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
78 __FILE__, __LINE__, #x); \
79 }
d6c69ee9 80#endif
6aa8b732 81
6aa8b732
AK
82#define PT_FIRST_AVAIL_BITS_SHIFT 9
83#define PT64_SECOND_AVAIL_BITS_SHIFT 52
84
6aa8b732
AK
85#define VALID_PAGE(x) ((x) != INVALID_PAGE)
86
87#define PT64_LEVEL_BITS 9
88
89#define PT64_LEVEL_SHIFT(level) \
d77c26fc 90 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK
91
92#define PT64_LEVEL_MASK(level) \
93 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
94
95#define PT64_INDEX(address, level)\
96 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
97
98
99#define PT32_LEVEL_BITS 10
100
101#define PT32_LEVEL_SHIFT(level) \
d77c26fc 102 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK
103
104#define PT32_LEVEL_MASK(level) \
105 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
106
107#define PT32_INDEX(address, level)\
108 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
109
110
27aba766 111#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK
112#define PT64_DIR_BASE_ADDR_MASK \
113 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
114
115#define PT32_BASE_ADDR_MASK PAGE_MASK
116#define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118
79539cec
AK
119#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
120 | PT64_NX_MASK)
6aa8b732
AK
121
122#define PFERR_PRESENT_MASK (1U << 0)
123#define PFERR_WRITE_MASK (1U << 1)
124#define PFERR_USER_MASK (1U << 2)
73b1087e 125#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 126
6aa8b732
AK
127#define PT_DIRECTORY_LEVEL 2
128#define PT_PAGE_TABLE_LEVEL 1
129
cd4a4e53
AK
130#define RMAP_EXT 4
131
fe135d2c
AK
132#define ACC_EXEC_MASK 1
133#define ACC_WRITE_MASK PT_WRITABLE_MASK
134#define ACC_USER_MASK PT_USER_MASK
135#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
136
2f333bcb
MT
137struct kvm_pv_mmu_op_buffer {
138 void *ptr;
139 unsigned len;
140 unsigned processed;
141 char buf[512] __aligned(sizeof(long));
142};
143
cd4a4e53
AK
144struct kvm_rmap_desc {
145 u64 *shadow_ptes[RMAP_EXT];
146 struct kvm_rmap_desc *more;
147};
148
b5a33a75
AK
149static struct kmem_cache *pte_chain_cache;
150static struct kmem_cache *rmap_desc_cache;
d3d25b04 151static struct kmem_cache *mmu_page_header_cache;
b5a33a75 152
c7addb90
AK
153static u64 __read_mostly shadow_trap_nonpresent_pte;
154static u64 __read_mostly shadow_notrap_nonpresent_pte;
155
156void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
157{
158 shadow_trap_nonpresent_pte = trap_pte;
159 shadow_notrap_nonpresent_pte = notrap_pte;
160}
161EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
162
6aa8b732
AK
163static int is_write_protection(struct kvm_vcpu *vcpu)
164{
ad312c7c 165 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK
166}
167
168static int is_cpuid_PSE36(void)
169{
170 return 1;
171}
172
73b1087e
AK
173static int is_nx(struct kvm_vcpu *vcpu)
174{
ad312c7c 175 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK
176}
177
6aa8b732
AK
178static int is_present_pte(unsigned long pte)
179{
180 return pte & PT_PRESENT_MASK;
181}
182
c7addb90
AK
183static int is_shadow_present_pte(u64 pte)
184{
c7addb90
AK
185 return pte != shadow_trap_nonpresent_pte
186 && pte != shadow_notrap_nonpresent_pte;
187}
188
05da4558
MT
189static int is_large_pte(u64 pte)
190{
191 return pte & PT_PAGE_SIZE_MASK;
192}
193
6aa8b732
AK
194static int is_writeble_pte(unsigned long pte)
195{
196 return pte & PT_WRITABLE_MASK;
197}
198
e3c5e7ec
AK
199static int is_dirty_pte(unsigned long pte)
200{
201 return pte & PT_DIRTY_MASK;
202}
203
cd4a4e53
AK
204static int is_rmap_pte(u64 pte)
205{
4b1a80fa 206 return is_shadow_present_pte(pte);
cd4a4e53
AK
207}
208
35149e21 209static pfn_t spte_to_pfn(u64 pte)
0b49ea86 210{
35149e21 211 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK
212}
213
da928521
AK
214static gfn_t pse36_gfn_delta(u32 gpte)
215{
216 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
217
218 return (gpte & PT32_DIR_PSE36_MASK) << shift;
219}
220
e663ee64
AK
221static void set_shadow_pte(u64 *sptep, u64 spte)
222{
223#ifdef CONFIG_X86_64
224 set_64bit((unsigned long *)sptep, spte);
225#else
226 set_64bit((unsigned long long *)sptep, spte);
227#endif
228}
229
e2dec939 230static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 231 struct kmem_cache *base_cache, int min)
714b93da
AK
232{
233 void *obj;
234
235 if (cache->nobjs >= min)
e2dec939 236 return 0;
714b93da 237 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 238 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 239 if (!obj)
e2dec939 240 return -ENOMEM;
714b93da
AK
241 cache->objects[cache->nobjs++] = obj;
242 }
e2dec939 243 return 0;
714b93da
AK
244}
245
246static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
247{
248 while (mc->nobjs)
249 kfree(mc->objects[--mc->nobjs]);
250}
251
c1158e63 252static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 253 int min)
c1158e63
AK
254{
255 struct page *page;
256
257 if (cache->nobjs >= min)
258 return 0;
259 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 260 page = alloc_page(GFP_KERNEL);
c1158e63
AK
261 if (!page)
262 return -ENOMEM;
263 set_page_private(page, 0);
264 cache->objects[cache->nobjs++] = page_address(page);
265 }
266 return 0;
267}
268
269static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
270{
271 while (mc->nobjs)
c4d198d5 272 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK
273}
274
2e3e5882 275static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 276{
e2dec939
AK
277 int r;
278
ad312c7c 279 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 280 pte_chain_cache, 4);
e2dec939
AK
281 if (r)
282 goto out;
ad312c7c 283 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 284 rmap_desc_cache, 1);
d3d25b04
AK
285 if (r)
286 goto out;
ad312c7c 287 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK
288 if (r)
289 goto out;
ad312c7c 290 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 291 mmu_page_header_cache, 4);
e2dec939
AK
292out:
293 return r;
714b93da
AK
294}
295
296static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
297{
ad312c7c
ZX
298 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
299 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
300 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
301 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK
302}
303
304static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
305 size_t size)
306{
307 void *p;
308
309 BUG_ON(!mc->nobjs);
310 p = mc->objects[--mc->nobjs];
311 memset(p, 0, size);
312 return p;
313}
314
714b93da
AK
315static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
316{
ad312c7c 317 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK
318 sizeof(struct kvm_pte_chain));
319}
320
90cb0529 321static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 322{
90cb0529 323 kfree(pc);
714b93da
AK
324}
325
326static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
327{
ad312c7c 328 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK
329 sizeof(struct kvm_rmap_desc));
330}
331
90cb0529 332static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 333{
90cb0529 334 kfree(rd);
714b93da
AK
335}
336
05da4558
MT
337/*
338 * Return the pointer to the largepage write count for a given
339 * gfn, handling slots that are not large page aligned.
340 */
341static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
342{
343 unsigned long idx;
344
345 idx = (gfn / KVM_PAGES_PER_HPAGE) -
346 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
347 return &slot->lpage_info[idx].write_count;
348}
349
350static void account_shadowed(struct kvm *kvm, gfn_t gfn)
351{
352 int *write_count;
353
354 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
355 *write_count += 1;
356 WARN_ON(*write_count > KVM_PAGES_PER_HPAGE);
357}
358
359static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
360{
361 int *write_count;
362
363 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
364 *write_count -= 1;
365 WARN_ON(*write_count < 0);
366}
367
368static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
369{
370 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
371 int *largepage_idx;
372
373 if (slot) {
374 largepage_idx = slot_largepage_idx(gfn, slot);
375 return *largepage_idx;
376 }
377
378 return 1;
379}
380
381static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
382{
383 struct vm_area_struct *vma;
384 unsigned long addr;
385
386 addr = gfn_to_hva(kvm, gfn);
387 if (kvm_is_error_hva(addr))
388 return 0;
389
390 vma = find_vma(current->mm, addr);
391 if (vma && is_vm_hugetlb_page(vma))
392 return 1;
393
394 return 0;
395}
396
397static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
398{
399 struct kvm_memory_slot *slot;
400
401 if (has_wrprotected_page(vcpu->kvm, large_gfn))
402 return 0;
403
404 if (!host_largepage_backed(vcpu->kvm, large_gfn))
405 return 0;
406
407 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
408 if (slot && slot->dirty_bitmap)
409 return 0;
410
411 return 1;
412}
413
290fc38d
IE
414/*
415 * Take gfn and return the reverse mapping to it.
416 * Note: gfn must be unaliased before this function get called
417 */
418
05da4558 419static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
420{
421 struct kvm_memory_slot *slot;
05da4558 422 unsigned long idx;
290fc38d
IE
423
424 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
425 if (!lpage)
426 return &slot->rmap[gfn - slot->base_gfn];
427
428 idx = (gfn / KVM_PAGES_PER_HPAGE) -
429 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
430
431 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
432}
433
cd4a4e53
AK
434/*
435 * Reverse mapping data structures:
436 *
290fc38d
IE
437 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
438 * that points to page_address(page).
cd4a4e53 439 *
290fc38d
IE
440 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
441 * containing more mappings.
cd4a4e53 442 */
05da4558 443static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 444{
4db35314 445 struct kvm_mmu_page *sp;
cd4a4e53 446 struct kvm_rmap_desc *desc;
290fc38d 447 unsigned long *rmapp;
cd4a4e53
AK
448 int i;
449
450 if (!is_rmap_pte(*spte))
451 return;
290fc38d 452 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK
453 sp = page_header(__pa(spte));
454 sp->gfns[spte - sp->spt] = gfn;
05da4558 455 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 456 if (!*rmapp) {
cd4a4e53 457 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
458 *rmapp = (unsigned long)spte;
459 } else if (!(*rmapp & 1)) {
cd4a4e53 460 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 461 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 462 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 463 desc->shadow_ptes[1] = spte;
290fc38d 464 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK
465 } else {
466 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 467 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
468 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
469 desc = desc->more;
470 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 471 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK
472 desc = desc->more;
473 }
474 for (i = 0; desc->shadow_ptes[i]; ++i)
475 ;
476 desc->shadow_ptes[i] = spte;
477 }
478}
479
290fc38d 480static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK
481 struct kvm_rmap_desc *desc,
482 int i,
483 struct kvm_rmap_desc *prev_desc)
484{
485 int j;
486
487 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
488 ;
489 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 490 desc->shadow_ptes[j] = NULL;
cd4a4e53
AK
491 if (j != 0)
492 return;
493 if (!prev_desc && !desc->more)
290fc38d 494 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
AK
495 else
496 if (prev_desc)
497 prev_desc->more = desc->more;
498 else
290fc38d 499 *rmapp = (unsigned long)desc->more | 1;
90cb0529 500 mmu_free_rmap_desc(desc);
cd4a4e53
AK
501}
502
290fc38d 503static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 504{
cd4a4e53
AK
505 struct kvm_rmap_desc *desc;
506 struct kvm_rmap_desc *prev_desc;
4db35314 507 struct kvm_mmu_page *sp;
35149e21 508 pfn_t pfn;
290fc38d 509 unsigned long *rmapp;
cd4a4e53
AK
510 int i;
511
512 if (!is_rmap_pte(*spte))
513 return;
4db35314 514 sp = page_header(__pa(spte));
35149e21 515 pfn = spte_to_pfn(*spte);
fcd6dbac 516 if (*spte & PT_ACCESSED_MASK)
35149e21 517 kvm_set_pfn_accessed(pfn);
b4231d61 518 if (is_writeble_pte(*spte))
35149e21 519 kvm_release_pfn_dirty(pfn);
b4231d61 520 else
35149e21 521 kvm_release_pfn_clean(pfn);
05da4558 522 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 523 if (!*rmapp) {
cd4a4e53
AK
524 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
525 BUG();
290fc38d 526 } else if (!(*rmapp & 1)) {
cd4a4e53 527 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 528 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
529 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
530 spte, *spte);
531 BUG();
532 }
290fc38d 533 *rmapp = 0;
cd4a4e53
AK
534 } else {
535 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 536 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
537 prev_desc = NULL;
538 while (desc) {
539 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
540 if (desc->shadow_ptes[i] == spte) {
290fc38d 541 rmap_desc_remove_entry(rmapp,
714b93da 542 desc, i,
cd4a4e53
AK
543 prev_desc);
544 return;
545 }
546 prev_desc = desc;
547 desc = desc->more;
548 }
549 BUG();
550 }
551}
552
98348e95 553static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 554{
374cbac0 555 struct kvm_rmap_desc *desc;
98348e95
IE
556 struct kvm_rmap_desc *prev_desc;
557 u64 *prev_spte;
558 int i;
559
560 if (!*rmapp)
561 return NULL;
562 else if (!(*rmapp & 1)) {
563 if (!spte)
564 return (u64 *)*rmapp;
565 return NULL;
566 }
567 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
568 prev_desc = NULL;
569 prev_spte = NULL;
570 while (desc) {
571 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
572 if (prev_spte == spte)
573 return desc->shadow_ptes[i];
574 prev_spte = desc->shadow_ptes[i];
575 }
576 desc = desc->more;
577 }
578 return NULL;
579}
580
581static void rmap_write_protect(struct kvm *kvm, u64 gfn)
582{
290fc38d 583 unsigned long *rmapp;
374cbac0 584 u64 *spte;
caa5b8a5 585 int write_protected = 0;
374cbac0 586
4a4c9924 587 gfn = unalias_gfn(kvm, gfn);
05da4558 588 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 589
98348e95
IE
590 spte = rmap_next(kvm, rmapp, NULL);
591 while (spte) {
374cbac0 592 BUG_ON(!spte);
374cbac0 593 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 594 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 595 if (is_writeble_pte(*spte)) {
9647c14c 596 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
597 write_protected = 1;
598 }
9647c14c 599 spte = rmap_next(kvm, rmapp, spte);
374cbac0 600 }
855149aa 601 if (write_protected) {
35149e21 602 pfn_t pfn;
855149aa
IE
603
604 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
605 pfn = spte_to_pfn(*spte);
606 kvm_set_pfn_dirty(pfn);
855149aa
IE
607 }
608
05da4558
MT
609 /* check for huge page mappings */
610 rmapp = gfn_to_rmap(kvm, gfn, 1);
611 spte = rmap_next(kvm, rmapp, NULL);
612 while (spte) {
613 BUG_ON(!spte);
614 BUG_ON(!(*spte & PT_PRESENT_MASK));
615 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
616 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
617 if (is_writeble_pte(*spte)) {
618 rmap_remove(kvm, spte);
619 --kvm->stat.lpages;
620 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
621 write_protected = 1;
622 }
623 spte = rmap_next(kvm, rmapp, spte);
624 }
625
caa5b8a5
ED
626 if (write_protected)
627 kvm_flush_remote_tlbs(kvm);
05da4558
MT
628
629 account_shadowed(kvm, gfn);
374cbac0
AK
630}
631
d6c69ee9 632#ifdef MMU_DEBUG
47ad8e68 633static int is_empty_shadow_page(u64 *spt)
6aa8b732 634{
139bdb2d
AK
635 u64 *pos;
636 u64 *end;
637
47ad8e68 638 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
d196e343 639 if (*pos != shadow_trap_nonpresent_pte) {
b8688d51 640 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 641 pos, *pos);
6aa8b732 642 return 0;
139bdb2d 643 }
6aa8b732
AK
644 return 1;
645}
d6c69ee9 646#endif
6aa8b732 647
4db35314 648static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 649{
4db35314
AK
650 ASSERT(is_empty_shadow_page(sp->spt));
651 list_del(&sp->link);
652 __free_page(virt_to_page(sp->spt));
653 __free_page(virt_to_page(sp->gfns));
654 kfree(sp);
f05e70ac 655 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
656}
657
cea0f0e7
AK
658static unsigned kvm_page_table_hashfn(gfn_t gfn)
659{
1ae0a13d 660 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
661}
662
25c0de2c
AK
663static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
664 u64 *parent_pte)
6aa8b732 665{
4db35314 666 struct kvm_mmu_page *sp;
6aa8b732 667
ad312c7c
ZX
668 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
669 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
670 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 671 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 672 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
673 ASSERT(is_empty_shadow_page(sp->spt));
674 sp->slot_bitmap = 0;
675 sp->multimapped = 0;
676 sp->parent_pte = parent_pte;
f05e70ac 677 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 678 return sp;
6aa8b732
AK
679}
680
714b93da 681static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 682 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
683{
684 struct kvm_pte_chain *pte_chain;
685 struct hlist_node *node;
686 int i;
687
688 if (!parent_pte)
689 return;
4db35314
AK
690 if (!sp->multimapped) {
691 u64 *old = sp->parent_pte;
cea0f0e7
AK
692
693 if (!old) {
4db35314 694 sp->parent_pte = parent_pte;
cea0f0e7
AK
695 return;
696 }
4db35314 697 sp->multimapped = 1;
714b93da 698 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
699 INIT_HLIST_HEAD(&sp->parent_ptes);
700 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
701 pte_chain->parent_ptes[0] = old;
702 }
4db35314 703 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
704 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
705 continue;
706 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
707 if (!pte_chain->parent_ptes[i]) {
708 pte_chain->parent_ptes[i] = parent_pte;
709 return;
710 }
711 }
714b93da 712 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 713 BUG_ON(!pte_chain);
4db35314 714 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
715 pte_chain->parent_ptes[0] = parent_pte;
716}
717
4db35314 718static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
719 u64 *parent_pte)
720{
721 struct kvm_pte_chain *pte_chain;
722 struct hlist_node *node;
723 int i;
724
4db35314
AK
725 if (!sp->multimapped) {
726 BUG_ON(sp->parent_pte != parent_pte);
727 sp->parent_pte = NULL;
cea0f0e7
AK
728 return;
729 }
4db35314 730 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
731 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
732 if (!pte_chain->parent_ptes[i])
733 break;
734 if (pte_chain->parent_ptes[i] != parent_pte)
735 continue;
697fe2e2
AK
736 while (i + 1 < NR_PTE_CHAIN_ENTRIES
737 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
738 pte_chain->parent_ptes[i]
739 = pte_chain->parent_ptes[i + 1];
740 ++i;
741 }
742 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
743 if (i == 0) {
744 hlist_del(&pte_chain->link);
90cb0529 745 mmu_free_pte_chain(pte_chain);
4db35314
AK
746 if (hlist_empty(&sp->parent_ptes)) {
747 sp->multimapped = 0;
748 sp->parent_pte = NULL;
697fe2e2
AK
749 }
750 }
cea0f0e7
AK
751 return;
752 }
753 BUG();
754}
755
4db35314 756static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
757{
758 unsigned index;
759 struct hlist_head *bucket;
4db35314 760 struct kvm_mmu_page *sp;
cea0f0e7
AK
761 struct hlist_node *node;
762
b8688d51 763 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 764 index = kvm_page_table_hashfn(gfn);
f05e70ac 765 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 766 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
767 if (sp->gfn == gfn && !sp->role.metaphysical
768 && !sp->role.invalid) {
cea0f0e7 769 pgprintk("%s: found role %x\n",
b8688d51 770 __func__, sp->role.word);
4db35314 771 return sp;
cea0f0e7
AK
772 }
773 return NULL;
774}
775
776static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
777 gfn_t gfn,
778 gva_t gaddr,
779 unsigned level,
780 int metaphysical,
41074d07 781 unsigned access,
f7d9c7b7 782 u64 *parent_pte)
cea0f0e7
AK
783{
784 union kvm_mmu_page_role role;
785 unsigned index;
786 unsigned quadrant;
787 struct hlist_head *bucket;
4db35314 788 struct kvm_mmu_page *sp;
cea0f0e7
AK
789 struct hlist_node *node;
790
791 role.word = 0;
ad312c7c 792 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
793 role.level = level;
794 role.metaphysical = metaphysical;
41074d07 795 role.access = access;
ad312c7c 796 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
797 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
798 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
799 role.quadrant = quadrant;
800 }
b8688d51 801 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 802 gfn, role.word);
1ae0a13d 803 index = kvm_page_table_hashfn(gfn);
f05e70ac 804 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
805 hlist_for_each_entry(sp, node, bucket, hash_link)
806 if (sp->gfn == gfn && sp->role.word == role.word) {
807 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
b8688d51 808 pgprintk("%s: found\n", __func__);
4db35314 809 return sp;
cea0f0e7 810 }
dfc5aa00 811 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
812 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
813 if (!sp)
814 return sp;
b8688d51 815 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
816 sp->gfn = gfn;
817 sp->role = role;
818 hlist_add_head(&sp->hash_link, bucket);
374cbac0 819 if (!metaphysical)
4a4c9924 820 rmap_write_protect(vcpu->kvm, gfn);
bed1d1df 821 vcpu->arch.mmu.prefetch_page(vcpu, sp);
4db35314 822 return sp;
cea0f0e7
AK
823}
824
90cb0529 825static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 826 struct kvm_mmu_page *sp)
a436036b 827{
697fe2e2
AK
828 unsigned i;
829 u64 *pt;
830 u64 ent;
831
4db35314 832 pt = sp->spt;
697fe2e2 833
4db35314 834 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 835 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 836 if (is_shadow_present_pte(pt[i]))
290fc38d 837 rmap_remove(kvm, &pt[i]);
c7addb90 838 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 839 }
90cb0529 840 kvm_flush_remote_tlbs(kvm);
697fe2e2
AK
841 return;
842 }
843
844 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
845 ent = pt[i];
846
05da4558
MT
847 if (is_shadow_present_pte(ent)) {
848 if (!is_large_pte(ent)) {
849 ent &= PT64_BASE_ADDR_MASK;
850 mmu_page_remove_parent_pte(page_header(ent),
851 &pt[i]);
852 } else {
853 --kvm->stat.lpages;
854 rmap_remove(kvm, &pt[i]);
855 }
856 }
c7addb90 857 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 858 }
90cb0529 859 kvm_flush_remote_tlbs(kvm);
a436036b
AK
860}
861
4db35314 862static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 863{
4db35314 864 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
865}
866
12b7d28f
AK
867static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
868{
869 int i;
870
871 for (i = 0; i < KVM_MAX_VCPUS; ++i)
872 if (kvm->vcpus[i])
ad312c7c 873 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
874}
875
4db35314 876static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
877{
878 u64 *parent_pte;
879
4cee5764 880 ++kvm->stat.mmu_shadow_zapped;
4db35314
AK
881 while (sp->multimapped || sp->parent_pte) {
882 if (!sp->multimapped)
883 parent_pte = sp->parent_pte;
a436036b
AK
884 else {
885 struct kvm_pte_chain *chain;
886
4db35314 887 chain = container_of(sp->parent_ptes.first,
a436036b
AK
888 struct kvm_pte_chain, link);
889 parent_pte = chain->parent_ptes[0];
890 }
697fe2e2 891 BUG_ON(!parent_pte);
4db35314 892 kvm_mmu_put_page(sp, parent_pte);
c7addb90 893 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 894 }
4db35314
AK
895 kvm_mmu_page_unlink_children(kvm, sp);
896 if (!sp->root_count) {
05da4558
MT
897 if (!sp->role.metaphysical)
898 unaccount_shadowed(kvm, sp->gfn);
4db35314
AK
899 hlist_del(&sp->hash_link);
900 kvm_mmu_free_page(kvm, sp);
2e53d63a 901 } else {
f05e70ac 902 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
903 sp->role.invalid = 1;
904 kvm_reload_remote_mmus(kvm);
905 }
12b7d28f 906 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
907}
908
82ce2c96
IE
909/*
910 * Changing the number of mmu pages allocated to the vm
911 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
912 */
913void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
914{
915 /*
916 * If we set the number of mmu pages to be smaller be than the
917 * number of actived pages , we must to free some mmu pages before we
918 * change the value
919 */
920
f05e70ac 921 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 922 kvm_nr_mmu_pages) {
f05e70ac
ZX
923 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
924 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
925
926 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
927 struct kvm_mmu_page *page;
928
f05e70ac 929 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
930 struct kvm_mmu_page, link);
931 kvm_mmu_zap_page(kvm, page);
932 n_used_mmu_pages--;
933 }
f05e70ac 934 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
935 }
936 else
f05e70ac
ZX
937 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
938 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 939
f05e70ac 940 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
941}
942
f67a46f4 943static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
944{
945 unsigned index;
946 struct hlist_head *bucket;
4db35314 947 struct kvm_mmu_page *sp;
a436036b
AK
948 struct hlist_node *node, *n;
949 int r;
950
b8688d51 951 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 952 r = 0;
1ae0a13d 953 index = kvm_page_table_hashfn(gfn);
f05e70ac 954 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
955 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
956 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 957 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314
AK
958 sp->role.word);
959 kvm_mmu_zap_page(kvm, sp);
a436036b
AK
960 r = 1;
961 }
962 return r;
cea0f0e7
AK
963}
964
f67a46f4 965static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 966{
4db35314 967 struct kvm_mmu_page *sp;
97a0a01e 968
4db35314 969 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 970 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 971 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
972 }
973}
974
38c335f1 975static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 976{
38c335f1 977 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 978 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 979
4db35314 980 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
981}
982
039576c0
AK
983struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
984{
72dc67a6
IE
985 struct page *page;
986
ad312c7c 987 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
988
989 if (gpa == UNMAPPED_GVA)
990 return NULL;
72dc67a6
IE
991
992 down_read(&current->mm->mmap_sem);
993 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
994 up_read(&current->mm->mmap_sem);
995
996 return page;
039576c0
AK
997}
998
1c4f1fd6
AK
999static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1000 unsigned pt_access, unsigned pte_access,
1001 int user_fault, int write_fault, int dirty,
05da4558 1002 int *ptwrite, int largepage, gfn_t gfn,
35149e21 1003 pfn_t pfn, bool speculative)
1c4f1fd6
AK
1004{
1005 u64 spte;
15aaa819 1006 int was_rmapped = 0;
75e68e60 1007 int was_writeble = is_writeble_pte(*shadow_pte);
1c4f1fd6 1008
bc750ba8 1009 pgprintk("%s: spte %llx access %x write_fault %d"
1c4f1fd6 1010 " user_fault %d gfn %lx\n",
b8688d51 1011 __func__, *shadow_pte, pt_access,
1c4f1fd6
AK
1012 write_fault, user_fault, gfn);
1013
15aaa819 1014 if (is_rmap_pte(*shadow_pte)) {
05da4558
MT
1015 /*
1016 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1017 * the parent of the now unreachable PTE.
1018 */
1019 if (largepage && !is_large_pte(*shadow_pte)) {
1020 struct kvm_mmu_page *child;
1021 u64 pte = *shadow_pte;
1022
1023 child = page_header(pte & PT64_BASE_ADDR_MASK);
1024 mmu_page_remove_parent_pte(child, shadow_pte);
35149e21 1025 } else if (pfn != spte_to_pfn(*shadow_pte)) {
15aaa819 1026 pgprintk("hfn old %lx new %lx\n",
35149e21 1027 spte_to_pfn(*shadow_pte), pfn);
15aaa819 1028 rmap_remove(vcpu->kvm, shadow_pte);
05da4558
MT
1029 } else {
1030 if (largepage)
1031 was_rmapped = is_large_pte(*shadow_pte);
1032 else
1033 was_rmapped = 1;
15aaa819 1034 }
15aaa819
MT
1035 }
1036
1c4f1fd6
AK
1037 /*
1038 * We don't set the accessed bit, since we sometimes want to see
1039 * whether the guest actually used the pte (in order to detect
1040 * demand paging).
1041 */
1042 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
947da538
AK
1043 if (!speculative)
1044 pte_access |= PT_ACCESSED_MASK;
1c4f1fd6
AK
1045 if (!dirty)
1046 pte_access &= ~ACC_WRITE_MASK;
1047 if (!(pte_access & ACC_EXEC_MASK))
1048 spte |= PT64_NX_MASK;
1049
1c4f1fd6
AK
1050 spte |= PT_PRESENT_MASK;
1051 if (pte_access & ACC_USER_MASK)
1052 spte |= PT_USER_MASK;
05da4558
MT
1053 if (largepage)
1054 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1055
35149e21 1056 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1057
1058 if ((pte_access & ACC_WRITE_MASK)
1059 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1060 struct kvm_mmu_page *shadow;
1061
1062 spte |= PT_WRITABLE_MASK;
1063 if (user_fault) {
1064 mmu_unshadow(vcpu->kvm, gfn);
1065 goto unshadowed;
1066 }
1067
1068 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
05da4558
MT
1069 if (shadow ||
1070 (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
1c4f1fd6 1071 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1072 __func__, gfn);
1c4f1fd6
AK
1073 pte_access &= ~ACC_WRITE_MASK;
1074 if (is_writeble_pte(spte)) {
1075 spte &= ~PT_WRITABLE_MASK;
1076 kvm_x86_ops->tlb_flush(vcpu);
1077 }
1078 if (write_fault)
1079 *ptwrite = 1;
1080 }
1081 }
1082
1083unshadowed:
1084
1085 if (pte_access & ACC_WRITE_MASK)
1086 mark_page_dirty(vcpu->kvm, gfn);
1087
b8688d51 1088 pgprintk("%s: setting spte %llx\n", __func__, spte);
05da4558
MT
1089 pgprintk("instantiating %s PTE (%s) at %d (%llx) addr %llx\n",
1090 (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
1091 (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
1c4f1fd6 1092 set_shadow_pte(shadow_pte, spte);
05da4558
MT
1093 if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
1094 && (spte & PT_PRESENT_MASK))
1095 ++vcpu->kvm->stat.lpages;
1096
1c4f1fd6
AK
1097 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1098 if (!was_rmapped) {
05da4558 1099 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1100 if (!is_rmap_pte(*shadow_pte))
35149e21 1101 kvm_release_pfn_clean(pfn);
75e68e60
IE
1102 } else {
1103 if (was_writeble)
35149e21 1104 kvm_release_pfn_dirty(pfn);
75e68e60 1105 else
35149e21 1106 kvm_release_pfn_clean(pfn);
1c4f1fd6 1107 }
1c4f1fd6 1108 if (!ptwrite || !*ptwrite)
ad312c7c 1109 vcpu->arch.last_pte_updated = shadow_pte;
1c4f1fd6
AK
1110}
1111
6aa8b732
AK
1112static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1113{
1114}
1115
4d9976bb 1116static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
35149e21 1117 int largepage, gfn_t gfn, pfn_t pfn,
05da4558 1118 int level)
6aa8b732 1119{
ad312c7c 1120 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
e833240f 1121 int pt_write = 0;
6aa8b732
AK
1122
1123 for (; ; level--) {
1124 u32 index = PT64_INDEX(v, level);
1125 u64 *table;
1126
1127 ASSERT(VALID_PAGE(table_addr));
1128 table = __va(table_addr);
1129
1130 if (level == 1) {
e833240f 1131 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
35149e21 1132 0, write, 1, &pt_write, 0, gfn, pfn, false);
05da4558
MT
1133 return pt_write;
1134 }
1135
1136 if (largepage && level == 2) {
1137 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
35149e21 1138 0, write, 1, &pt_write, 1, gfn, pfn, false);
d196e343 1139 return pt_write;
6aa8b732
AK
1140 }
1141
c7addb90 1142 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 1143 struct kvm_mmu_page *new_table;
cea0f0e7 1144 gfn_t pseudo_gfn;
6aa8b732 1145
cea0f0e7
AK
1146 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1147 >> PAGE_SHIFT;
1148 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1149 v, level - 1,
f7d9c7b7 1150 1, ACC_ALL, &table[index]);
25c0de2c 1151 if (!new_table) {
6aa8b732 1152 pgprintk("nonpaging_map: ENOMEM\n");
35149e21 1153 kvm_release_pfn_clean(pfn);
6aa8b732
AK
1154 return -ENOMEM;
1155 }
1156
47ad8e68 1157 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 1158 | PT_WRITABLE_MASK | PT_USER_MASK;
6aa8b732
AK
1159 }
1160 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1161 }
1162}
1163
10589a46
MT
1164static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1165{
1166 int r;
05da4558 1167 int largepage = 0;
35149e21 1168 pfn_t pfn;
aaee2c94
MT
1169
1170 down_read(&current->mm->mmap_sem);
05da4558
MT
1171 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1172 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1173 largepage = 1;
1174 }
1175
35149e21 1176 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 1177 up_read(&current->mm->mmap_sem);
aaee2c94 1178
d196e343 1179 /* mmio */
35149e21
AL
1180 if (is_error_pfn(pfn)) {
1181 kvm_release_pfn_clean(pfn);
d196e343
AK
1182 return 1;
1183 }
1184
aaee2c94 1185 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1186 kvm_mmu_free_some_pages(vcpu);
35149e21 1187 r = __direct_map(vcpu, v, write, largepage, gfn, pfn,
05da4558 1188 PT32E_ROOT_LEVEL);
aaee2c94
MT
1189 spin_unlock(&vcpu->kvm->mmu_lock);
1190
aaee2c94 1191
10589a46
MT
1192 return r;
1193}
1194
1195
c7addb90
AK
1196static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1197 struct kvm_mmu_page *sp)
1198{
1199 int i;
1200
1201 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1202 sp->spt[i] = shadow_trap_nonpresent_pte;
1203}
1204
17ac10ad
AK
1205static void mmu_free_roots(struct kvm_vcpu *vcpu)
1206{
1207 int i;
4db35314 1208 struct kvm_mmu_page *sp;
17ac10ad 1209
ad312c7c 1210 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1211 return;
aaee2c94 1212 spin_lock(&vcpu->kvm->mmu_lock);
17ac10ad 1213#ifdef CONFIG_X86_64
ad312c7c
ZX
1214 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1215 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1216
4db35314
AK
1217 sp = page_header(root);
1218 --sp->root_count;
2e53d63a
MT
1219 if (!sp->root_count && sp->role.invalid)
1220 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1221 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1222 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1223 return;
1224 }
1225#endif
1226 for (i = 0; i < 4; ++i) {
ad312c7c 1227 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1228
417726a3 1229 if (root) {
417726a3 1230 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1231 sp = page_header(root);
1232 --sp->root_count;
2e53d63a
MT
1233 if (!sp->root_count && sp->role.invalid)
1234 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1235 }
ad312c7c 1236 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1237 }
aaee2c94 1238 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1239 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1240}
1241
1242static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1243{
1244 int i;
cea0f0e7 1245 gfn_t root_gfn;
4db35314 1246 struct kvm_mmu_page *sp;
fb72d167 1247 int metaphysical = 0;
3bb65a22 1248
ad312c7c 1249 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad
AK
1250
1251#ifdef CONFIG_X86_64
ad312c7c
ZX
1252 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1253 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1254
1255 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1256 if (tdp_enabled)
1257 metaphysical = 1;
4db35314 1258 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1259 PT64_ROOT_LEVEL, metaphysical,
1260 ACC_ALL, NULL);
4db35314
AK
1261 root = __pa(sp->spt);
1262 ++sp->root_count;
ad312c7c 1263 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1264 return;
1265 }
1266#endif
fb72d167
JR
1267 metaphysical = !is_paging(vcpu);
1268 if (tdp_enabled)
1269 metaphysical = 1;
17ac10ad 1270 for (i = 0; i < 4; ++i) {
ad312c7c 1271 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1272
1273 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1274 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1275 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1276 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1277 continue;
1278 }
ad312c7c
ZX
1279 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1280 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1281 root_gfn = 0;
4db35314 1282 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1283 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1284 ACC_ALL, NULL);
4db35314
AK
1285 root = __pa(sp->spt);
1286 ++sp->root_count;
ad312c7c 1287 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1288 }
ad312c7c 1289 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1290}
1291
6aa8b732
AK
1292static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1293{
1294 return vaddr;
1295}
1296
1297static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1298 u32 error_code)
6aa8b732 1299{
e833240f 1300 gfn_t gfn;
e2dec939 1301 int r;
6aa8b732 1302
b8688d51 1303 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1304 r = mmu_topup_memory_caches(vcpu);
1305 if (r)
1306 return r;
714b93da 1307
6aa8b732 1308 ASSERT(vcpu);
ad312c7c 1309 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1310
e833240f 1311 gfn = gva >> PAGE_SHIFT;
6aa8b732 1312
e833240f
AK
1313 return nonpaging_map(vcpu, gva & PAGE_MASK,
1314 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1315}
1316
fb72d167
JR
1317static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1318 u32 error_code)
1319{
35149e21 1320 pfn_t pfn;
fb72d167 1321 int r;
05da4558
MT
1322 int largepage = 0;
1323 gfn_t gfn = gpa >> PAGE_SHIFT;
fb72d167
JR
1324
1325 ASSERT(vcpu);
1326 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1327
1328 r = mmu_topup_memory_caches(vcpu);
1329 if (r)
1330 return r;
1331
1332 down_read(&current->mm->mmap_sem);
05da4558
MT
1333 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1334 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1335 largepage = 1;
1336 }
35149e21 1337 pfn = gfn_to_pfn(vcpu->kvm, gfn);
3200f405 1338 up_read(&current->mm->mmap_sem);
35149e21
AL
1339 if (is_error_pfn(pfn)) {
1340 kvm_release_pfn_clean(pfn);
fb72d167
JR
1341 return 1;
1342 }
1343 spin_lock(&vcpu->kvm->mmu_lock);
1344 kvm_mmu_free_some_pages(vcpu);
1345 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
67253af5 1346 largepage, gfn, pfn, kvm_x86_ops->get_tdp_level());
fb72d167 1347 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1348
1349 return r;
1350}
1351
6aa8b732
AK
1352static void nonpaging_free(struct kvm_vcpu *vcpu)
1353{
17ac10ad 1354 mmu_free_roots(vcpu);
6aa8b732
AK
1355}
1356
1357static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1358{
ad312c7c 1359 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1360
1361 context->new_cr3 = nonpaging_new_cr3;
1362 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1363 context->gva_to_gpa = nonpaging_gva_to_gpa;
1364 context->free = nonpaging_free;
c7addb90 1365 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1366 context->root_level = 0;
6aa8b732 1367 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1368 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1369 return 0;
1370}
1371
d835dfec 1372void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1373{
1165f5fe 1374 ++vcpu->stat.tlb_flush;
cbdd1bea 1375 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1376}
1377
1378static void paging_new_cr3(struct kvm_vcpu *vcpu)
1379{
b8688d51 1380 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1381 mmu_free_roots(vcpu);
6aa8b732
AK
1382}
1383
6aa8b732
AK
1384static void inject_page_fault(struct kvm_vcpu *vcpu,
1385 u64 addr,
1386 u32 err_code)
1387{
c3c91fee 1388 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1389}
1390
6aa8b732
AK
1391static void paging_free(struct kvm_vcpu *vcpu)
1392{
1393 nonpaging_free(vcpu);
1394}
1395
1396#define PTTYPE 64
1397#include "paging_tmpl.h"
1398#undef PTTYPE
1399
1400#define PTTYPE 32
1401#include "paging_tmpl.h"
1402#undef PTTYPE
1403
17ac10ad 1404static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1405{
ad312c7c 1406 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1407
1408 ASSERT(is_pae(vcpu));
1409 context->new_cr3 = paging_new_cr3;
1410 context->page_fault = paging64_page_fault;
6aa8b732 1411 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1412 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1413 context->free = paging_free;
17ac10ad
AK
1414 context->root_level = level;
1415 context->shadow_root_level = level;
17c3ba9d 1416 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1417 return 0;
1418}
1419
17ac10ad
AK
1420static int paging64_init_context(struct kvm_vcpu *vcpu)
1421{
1422 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1423}
1424
6aa8b732
AK
1425static int paging32_init_context(struct kvm_vcpu *vcpu)
1426{
ad312c7c 1427 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1428
1429 context->new_cr3 = paging_new_cr3;
1430 context->page_fault = paging32_page_fault;
6aa8b732
AK
1431 context->gva_to_gpa = paging32_gva_to_gpa;
1432 context->free = paging_free;
c7addb90 1433 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1434 context->root_level = PT32_ROOT_LEVEL;
1435 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1436 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1437 return 0;
1438}
1439
1440static int paging32E_init_context(struct kvm_vcpu *vcpu)
1441{
17ac10ad 1442 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1443}
1444
fb72d167
JR
1445static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1446{
1447 struct kvm_mmu *context = &vcpu->arch.mmu;
1448
1449 context->new_cr3 = nonpaging_new_cr3;
1450 context->page_fault = tdp_page_fault;
1451 context->free = nonpaging_free;
1452 context->prefetch_page = nonpaging_prefetch_page;
67253af5 1453 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
1454 context->root_hpa = INVALID_PAGE;
1455
1456 if (!is_paging(vcpu)) {
1457 context->gva_to_gpa = nonpaging_gva_to_gpa;
1458 context->root_level = 0;
1459 } else if (is_long_mode(vcpu)) {
1460 context->gva_to_gpa = paging64_gva_to_gpa;
1461 context->root_level = PT64_ROOT_LEVEL;
1462 } else if (is_pae(vcpu)) {
1463 context->gva_to_gpa = paging64_gva_to_gpa;
1464 context->root_level = PT32E_ROOT_LEVEL;
1465 } else {
1466 context->gva_to_gpa = paging32_gva_to_gpa;
1467 context->root_level = PT32_ROOT_LEVEL;
1468 }
1469
1470 return 0;
1471}
1472
1473static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1474{
1475 ASSERT(vcpu);
ad312c7c 1476 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1477
1478 if (!is_paging(vcpu))
1479 return nonpaging_init_context(vcpu);
a9058ecd 1480 else if (is_long_mode(vcpu))
6aa8b732
AK
1481 return paging64_init_context(vcpu);
1482 else if (is_pae(vcpu))
1483 return paging32E_init_context(vcpu);
1484 else
1485 return paging32_init_context(vcpu);
1486}
1487
fb72d167
JR
1488static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1489{
35149e21
AL
1490 vcpu->arch.update_pte.pfn = bad_pfn;
1491
fb72d167
JR
1492 if (tdp_enabled)
1493 return init_kvm_tdp_mmu(vcpu);
1494 else
1495 return init_kvm_softmmu(vcpu);
1496}
1497
6aa8b732
AK
1498static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1499{
1500 ASSERT(vcpu);
ad312c7c
ZX
1501 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1502 vcpu->arch.mmu.free(vcpu);
1503 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1504 }
1505}
1506
1507int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1508{
1509 destroy_kvm_mmu(vcpu);
1510 return init_kvm_mmu(vcpu);
1511}
8668a3c4 1512EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1513
1514int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1515{
714b93da
AK
1516 int r;
1517
e2dec939 1518 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1519 if (r)
1520 goto out;
aaee2c94 1521 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1522 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1523 mmu_alloc_roots(vcpu);
aaee2c94 1524 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1525 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1526 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1527out:
1528 return r;
6aa8b732 1529}
17c3ba9d
AK
1530EXPORT_SYMBOL_GPL(kvm_mmu_load);
1531
1532void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1533{
1534 mmu_free_roots(vcpu);
1535}
6aa8b732 1536
09072daf 1537static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1538 struct kvm_mmu_page *sp,
ac1b714e
AK
1539 u64 *spte)
1540{
1541 u64 pte;
1542 struct kvm_mmu_page *child;
1543
1544 pte = *spte;
c7addb90 1545 if (is_shadow_present_pte(pte)) {
05da4558
MT
1546 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
1547 is_large_pte(pte))
290fc38d 1548 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1549 else {
1550 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1551 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1552 }
1553 }
c7addb90 1554 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
1555 if (is_large_pte(pte))
1556 --vcpu->kvm->stat.lpages;
ac1b714e
AK
1557}
1558
0028425f 1559static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1560 struct kvm_mmu_page *sp,
0028425f 1561 u64 *spte,
489f1d65 1562 const void *new)
0028425f 1563{
05da4558
MT
1564 if ((sp->role.level != PT_PAGE_TABLE_LEVEL)
1565 && !vcpu->arch.update_pte.largepage) {
4cee5764 1566 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1567 return;
4cee5764 1568 }
0028425f 1569
4cee5764 1570 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 1571 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 1572 paging32_update_pte(vcpu, sp, spte, new);
0028425f 1573 else
489f1d65 1574 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
1575}
1576
79539cec
AK
1577static bool need_remote_flush(u64 old, u64 new)
1578{
1579 if (!is_shadow_present_pte(old))
1580 return false;
1581 if (!is_shadow_present_pte(new))
1582 return true;
1583 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1584 return true;
1585 old ^= PT64_NX_MASK;
1586 new ^= PT64_NX_MASK;
1587 return (old & ~new & PT64_PERM_MASK) != 0;
1588}
1589
1590static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1591{
1592 if (need_remote_flush(old, new))
1593 kvm_flush_remote_tlbs(vcpu->kvm);
1594 else
1595 kvm_mmu_flush_tlb(vcpu);
1596}
1597
12b7d28f
AK
1598static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1599{
ad312c7c 1600 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f
AK
1601
1602 return !!(spte && (*spte & PT_ACCESSED_MASK));
1603}
1604
d7824fff
AK
1605static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1606 const u8 *new, int bytes)
1607{
1608 gfn_t gfn;
1609 int r;
1610 u64 gpte = 0;
35149e21 1611 pfn_t pfn;
d7824fff 1612
05da4558
MT
1613 vcpu->arch.update_pte.largepage = 0;
1614
d7824fff
AK
1615 if (bytes != 4 && bytes != 8)
1616 return;
1617
1618 /*
1619 * Assume that the pte write on a page table of the same type
1620 * as the current vcpu paging mode. This is nearly always true
1621 * (might be false while changing modes). Note it is verified later
1622 * by update_pte().
1623 */
1624 if (is_pae(vcpu)) {
1625 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1626 if ((bytes == 4) && (gpa % 4 == 0)) {
1627 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1628 if (r)
1629 return;
1630 memcpy((void *)&gpte + (gpa % 8), new, 4);
1631 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1632 memcpy((void *)&gpte, new, 8);
1633 }
1634 } else {
1635 if ((bytes == 4) && (gpa % 4 == 0))
1636 memcpy((void *)&gpte, new, 4);
1637 }
1638 if (!is_present_pte(gpte))
1639 return;
1640 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 1641
05da4558
MT
1642 down_read(&current->mm->mmap_sem);
1643 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1644 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1645 vcpu->arch.update_pte.largepage = 1;
1646 }
35149e21 1647 pfn = gfn_to_pfn(vcpu->kvm, gfn);
05da4558 1648 up_read(&current->mm->mmap_sem);
72dc67a6 1649
35149e21
AL
1650 if (is_error_pfn(pfn)) {
1651 kvm_release_pfn_clean(pfn);
d196e343
AK
1652 return;
1653 }
d7824fff 1654 vcpu->arch.update_pte.gfn = gfn;
35149e21 1655 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
1656}
1657
09072daf 1658void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1659 const u8 *new, int bytes)
da4a00f0 1660{
9b7a0325 1661 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1662 struct kvm_mmu_page *sp;
0e7bc4b9 1663 struct hlist_node *node, *n;
9b7a0325
AK
1664 struct hlist_head *bucket;
1665 unsigned index;
489f1d65 1666 u64 entry, gentry;
9b7a0325 1667 u64 *spte;
9b7a0325 1668 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1669 unsigned pte_size;
9b7a0325 1670 unsigned page_offset;
0e7bc4b9 1671 unsigned misaligned;
fce0657f 1672 unsigned quadrant;
9b7a0325 1673 int level;
86a5ba02 1674 int flooded = 0;
ac1b714e 1675 int npte;
489f1d65 1676 int r;
9b7a0325 1677
b8688d51 1678 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 1679 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1680 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1681 kvm_mmu_free_some_pages(vcpu);
4cee5764 1682 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1683 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1684 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1685 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1686 ++vcpu->arch.last_pt_write_count;
1687 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1688 flooded = 1;
1689 } else {
ad312c7c
ZX
1690 vcpu->arch.last_pt_write_gfn = gfn;
1691 vcpu->arch.last_pt_write_count = 1;
1692 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1693 }
1ae0a13d 1694 index = kvm_page_table_hashfn(gfn);
f05e70ac 1695 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
1696 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1697 if (sp->gfn != gfn || sp->role.metaphysical)
9b7a0325 1698 continue;
4db35314 1699 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1700 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1701 misaligned |= bytes < 4;
86a5ba02 1702 if (misaligned || flooded) {
0e7bc4b9
AK
1703 /*
1704 * Misaligned accesses are too much trouble to fix
1705 * up; also, they usually indicate a page is not used
1706 * as a page table.
86a5ba02
AK
1707 *
1708 * If we're seeing too many writes to a page,
1709 * it may no longer be a page table, or we may be
1710 * forking, in which case it is better to unmap the
1711 * page.
0e7bc4b9
AK
1712 */
1713 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1714 gpa, bytes, sp->role.word);
1715 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1716 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1717 continue;
1718 }
9b7a0325 1719 page_offset = offset;
4db35314 1720 level = sp->role.level;
ac1b714e 1721 npte = 1;
4db35314 1722 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1723 page_offset <<= 1; /* 32->64 */
1724 /*
1725 * A 32-bit pde maps 4MB while the shadow pdes map
1726 * only 2MB. So we need to double the offset again
1727 * and zap two pdes instead of one.
1728 */
1729 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1730 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1731 page_offset <<= 1;
1732 npte = 2;
1733 }
fce0657f 1734 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1735 page_offset &= ~PAGE_MASK;
4db35314 1736 if (quadrant != sp->role.quadrant)
fce0657f 1737 continue;
9b7a0325 1738 }
4db35314 1739 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
1740 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1741 gentry = 0;
1742 r = kvm_read_guest_atomic(vcpu->kvm,
1743 gpa & ~(u64)(pte_size - 1),
1744 &gentry, pte_size);
1745 new = (const void *)&gentry;
1746 if (r < 0)
1747 new = NULL;
1748 }
ac1b714e 1749 while (npte--) {
79539cec 1750 entry = *spte;
4db35314 1751 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
1752 if (new)
1753 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 1754 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1755 ++spte;
9b7a0325 1756 }
9b7a0325 1757 }
c7addb90 1758 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 1759 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
1760 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
1761 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
1762 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 1763 }
da4a00f0
AK
1764}
1765
a436036b
AK
1766int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1767{
10589a46
MT
1768 gpa_t gpa;
1769 int r;
a436036b 1770
10589a46 1771 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 1772
aaee2c94 1773 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 1774 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 1775 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 1776 return r;
a436036b
AK
1777}
1778
22d95b12 1779void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 1780{
f05e70ac 1781 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1782 struct kvm_mmu_page *sp;
ebeace86 1783
f05e70ac 1784 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
1785 struct kvm_mmu_page, link);
1786 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1787 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1788 }
1789}
ebeace86 1790
3067714c
AK
1791int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1792{
1793 int r;
1794 enum emulation_result er;
1795
ad312c7c 1796 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1797 if (r < 0)
1798 goto out;
1799
1800 if (!r) {
1801 r = 1;
1802 goto out;
1803 }
1804
b733bfb5
AK
1805 r = mmu_topup_memory_caches(vcpu);
1806 if (r)
1807 goto out;
1808
3067714c 1809 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
1810
1811 switch (er) {
1812 case EMULATE_DONE:
1813 return 1;
1814 case EMULATE_DO_MMIO:
1815 ++vcpu->stat.mmio_exits;
1816 return 0;
1817 case EMULATE_FAIL:
1818 kvm_report_emulation_failure(vcpu, "pagetable");
1819 return 1;
1820 default:
1821 BUG();
1822 }
1823out:
3067714c
AK
1824 return r;
1825}
1826EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1827
18552672
JR
1828void kvm_enable_tdp(void)
1829{
1830 tdp_enabled = true;
1831}
1832EXPORT_SYMBOL_GPL(kvm_enable_tdp);
1833
6aa8b732
AK
1834static void free_mmu_pages(struct kvm_vcpu *vcpu)
1835{
4db35314 1836 struct kvm_mmu_page *sp;
6aa8b732 1837
f05e70ac
ZX
1838 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1839 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
1840 struct kvm_mmu_page, link);
1841 kvm_mmu_zap_page(vcpu->kvm, sp);
f51234c2 1842 }
ad312c7c 1843 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
1844}
1845
1846static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1847{
17ac10ad 1848 struct page *page;
6aa8b732
AK
1849 int i;
1850
1851 ASSERT(vcpu);
1852
f05e70ac
ZX
1853 if (vcpu->kvm->arch.n_requested_mmu_pages)
1854 vcpu->kvm->arch.n_free_mmu_pages =
1855 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 1856 else
f05e70ac
ZX
1857 vcpu->kvm->arch.n_free_mmu_pages =
1858 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
1859 /*
1860 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1861 * Therefore we need to allocate shadow page tables in the first
1862 * 4GB of memory, which happens to fit the DMA32 zone.
1863 */
1864 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1865 if (!page)
1866 goto error_1;
ad312c7c 1867 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 1868 for (i = 0; i < 4; ++i)
ad312c7c 1869 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1870
6aa8b732
AK
1871 return 0;
1872
1873error_1:
1874 free_mmu_pages(vcpu);
1875 return -ENOMEM;
1876}
1877
8018c27b 1878int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1879{
6aa8b732 1880 ASSERT(vcpu);
ad312c7c 1881 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1882
8018c27b
IM
1883 return alloc_mmu_pages(vcpu);
1884}
6aa8b732 1885
8018c27b
IM
1886int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1887{
1888 ASSERT(vcpu);
ad312c7c 1889 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 1890
8018c27b 1891 return init_kvm_mmu(vcpu);
6aa8b732
AK
1892}
1893
1894void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1895{
1896 ASSERT(vcpu);
1897
1898 destroy_kvm_mmu(vcpu);
1899 free_mmu_pages(vcpu);
714b93da 1900 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1901}
1902
90cb0529 1903void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 1904{
4db35314 1905 struct kvm_mmu_page *sp;
6aa8b732 1906
f05e70ac 1907 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
1908 int i;
1909 u64 *pt;
1910
4db35314 1911 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
1912 continue;
1913
4db35314 1914 pt = sp->spt;
6aa8b732
AK
1915 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1916 /* avoid RMW */
9647c14c 1917 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1918 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1919 }
1920}
37a7d8b0 1921
90cb0529 1922void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1923{
4db35314 1924 struct kvm_mmu_page *sp, *node;
e0fa826f 1925
aaee2c94 1926 spin_lock(&kvm->mmu_lock);
f05e70ac 1927 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 1928 kvm_mmu_zap_page(kvm, sp);
aaee2c94 1929 spin_unlock(&kvm->mmu_lock);
e0fa826f 1930
90cb0529 1931 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1932}
1933
3ee16c81
IE
1934void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
1935{
1936 struct kvm_mmu_page *page;
1937
1938 page = container_of(kvm->arch.active_mmu_pages.prev,
1939 struct kvm_mmu_page, link);
1940 kvm_mmu_zap_page(kvm, page);
1941}
1942
1943static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
1944{
1945 struct kvm *kvm;
1946 struct kvm *kvm_freed = NULL;
1947 int cache_count = 0;
1948
1949 spin_lock(&kvm_lock);
1950
1951 list_for_each_entry(kvm, &vm_list, vm_list) {
1952 int npages;
1953
1954 spin_lock(&kvm->mmu_lock);
1955 npages = kvm->arch.n_alloc_mmu_pages -
1956 kvm->arch.n_free_mmu_pages;
1957 cache_count += npages;
1958 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
1959 kvm_mmu_remove_one_alloc_mmu_page(kvm);
1960 cache_count--;
1961 kvm_freed = kvm;
1962 }
1963 nr_to_scan--;
1964
1965 spin_unlock(&kvm->mmu_lock);
1966 }
1967 if (kvm_freed)
1968 list_move_tail(&kvm_freed->vm_list, &vm_list);
1969
1970 spin_unlock(&kvm_lock);
1971
1972 return cache_count;
1973}
1974
1975static struct shrinker mmu_shrinker = {
1976 .shrink = mmu_shrink,
1977 .seeks = DEFAULT_SEEKS * 10,
1978};
1979
1980void mmu_destroy_caches(void)
b5a33a75
AK
1981{
1982 if (pte_chain_cache)
1983 kmem_cache_destroy(pte_chain_cache);
1984 if (rmap_desc_cache)
1985 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1986 if (mmu_page_header_cache)
1987 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1988}
1989
3ee16c81
IE
1990void kvm_mmu_module_exit(void)
1991{
1992 mmu_destroy_caches();
1993 unregister_shrinker(&mmu_shrinker);
1994}
1995
b5a33a75
AK
1996int kvm_mmu_module_init(void)
1997{
1998 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1999 sizeof(struct kvm_pte_chain),
20c2df83 2000 0, 0, NULL);
b5a33a75
AK
2001 if (!pte_chain_cache)
2002 goto nomem;
2003 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2004 sizeof(struct kvm_rmap_desc),
20c2df83 2005 0, 0, NULL);
b5a33a75
AK
2006 if (!rmap_desc_cache)
2007 goto nomem;
2008
d3d25b04
AK
2009 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2010 sizeof(struct kvm_mmu_page),
20c2df83 2011 0, 0, NULL);
d3d25b04
AK
2012 if (!mmu_page_header_cache)
2013 goto nomem;
2014
3ee16c81
IE
2015 register_shrinker(&mmu_shrinker);
2016
b5a33a75
AK
2017 return 0;
2018
2019nomem:
3ee16c81 2020 mmu_destroy_caches();
b5a33a75
AK
2021 return -ENOMEM;
2022}
2023
3ad82a7e
ZX
2024/*
2025 * Caculate mmu pages needed for kvm.
2026 */
2027unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2028{
2029 int i;
2030 unsigned int nr_mmu_pages;
2031 unsigned int nr_pages = 0;
2032
2033 for (i = 0; i < kvm->nmemslots; i++)
2034 nr_pages += kvm->memslots[i].npages;
2035
2036 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2037 nr_mmu_pages = max(nr_mmu_pages,
2038 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2039
2040 return nr_mmu_pages;
2041}
2042
2f333bcb
MT
2043static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2044 unsigned len)
2045{
2046 if (len > buffer->len)
2047 return NULL;
2048 return buffer->ptr;
2049}
2050
2051static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2052 unsigned len)
2053{
2054 void *ret;
2055
2056 ret = pv_mmu_peek_buffer(buffer, len);
2057 if (!ret)
2058 return ret;
2059 buffer->ptr += len;
2060 buffer->len -= len;
2061 buffer->processed += len;
2062 return ret;
2063}
2064
2065static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2066 gpa_t addr, gpa_t value)
2067{
2068 int bytes = 8;
2069 int r;
2070
2071 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2072 bytes = 4;
2073
2074 r = mmu_topup_memory_caches(vcpu);
2075 if (r)
2076 return r;
2077
3200f405 2078 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2079 return -EFAULT;
2080
2081 return 1;
2082}
2083
2084static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2085{
2086 kvm_x86_ops->tlb_flush(vcpu);
2087 return 1;
2088}
2089
2090static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2091{
2092 spin_lock(&vcpu->kvm->mmu_lock);
2093 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2094 spin_unlock(&vcpu->kvm->mmu_lock);
2095 return 1;
2096}
2097
2098static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2099 struct kvm_pv_mmu_op_buffer *buffer)
2100{
2101 struct kvm_mmu_op_header *header;
2102
2103 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2104 if (!header)
2105 return 0;
2106 switch (header->op) {
2107 case KVM_MMU_OP_WRITE_PTE: {
2108 struct kvm_mmu_op_write_pte *wpte;
2109
2110 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2111 if (!wpte)
2112 return 0;
2113 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2114 wpte->pte_val);
2115 }
2116 case KVM_MMU_OP_FLUSH_TLB: {
2117 struct kvm_mmu_op_flush_tlb *ftlb;
2118
2119 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2120 if (!ftlb)
2121 return 0;
2122 return kvm_pv_mmu_flush_tlb(vcpu);
2123 }
2124 case KVM_MMU_OP_RELEASE_PT: {
2125 struct kvm_mmu_op_release_pt *rpt;
2126
2127 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2128 if (!rpt)
2129 return 0;
2130 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2131 }
2132 default: return 0;
2133 }
2134}
2135
2136int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2137 gpa_t addr, unsigned long *ret)
2138{
2139 int r;
2140 struct kvm_pv_mmu_op_buffer buffer;
2141
2f333bcb
MT
2142 buffer.ptr = buffer.buf;
2143 buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
2144 buffer.processed = 0;
2145
2146 r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
2147 if (r)
2148 goto out;
2149
2150 while (buffer.len) {
2151 r = kvm_pv_mmu_op_one(vcpu, &buffer);
2152 if (r < 0)
2153 goto out;
2154 if (r == 0)
2155 break;
2156 }
2157
2158 r = 1;
2159out:
2160 *ret = buffer.processed;
2f333bcb
MT
2161 return r;
2162}
2163
37a7d8b0
AK
2164#ifdef AUDIT
2165
2166static const char *audit_msg;
2167
2168static gva_t canonicalize(gva_t gva)
2169{
2170#ifdef CONFIG_X86_64
2171 gva = (long long)(gva << 16) >> 16;
2172#endif
2173 return gva;
2174}
2175
2176static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2177 gva_t va, int level)
2178{
2179 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2180 int i;
2181 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2182
2183 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2184 u64 ent = pt[i];
2185
c7addb90 2186 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2187 continue;
2188
2189 va = canonicalize(va);
c7addb90
AK
2190 if (level > 1) {
2191 if (ent == shadow_notrap_nonpresent_pte)
2192 printk(KERN_ERR "audit: (%s) nontrapping pte"
2193 " in nonleaf level: levels %d gva %lx"
2194 " level %d pte %llx\n", audit_msg,
ad312c7c 2195 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2196
37a7d8b0 2197 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2198 } else {
ad312c7c 2199 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2200 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2201
c7addb90 2202 if (is_shadow_present_pte(ent)
37a7d8b0 2203 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2204 printk(KERN_ERR "xx audit error: (%s) levels %d"
2205 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2206 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2207 va, gpa, hpa, ent,
2208 is_shadow_present_pte(ent));
c7addb90
AK
2209 else if (ent == shadow_notrap_nonpresent_pte
2210 && !is_error_hpa(hpa))
2211 printk(KERN_ERR "audit: (%s) notrap shadow,"
2212 " valid guest gva %lx\n", audit_msg, va);
35149e21 2213 kvm_release_pfn_clean(pfn);
c7addb90 2214
37a7d8b0
AK
2215 }
2216 }
2217}
2218
2219static void audit_mappings(struct kvm_vcpu *vcpu)
2220{
1ea252af 2221 unsigned i;
37a7d8b0 2222
ad312c7c
ZX
2223 if (vcpu->arch.mmu.root_level == 4)
2224 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2225 else
2226 for (i = 0; i < 4; ++i)
ad312c7c 2227 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2228 audit_mappings_page(vcpu,
ad312c7c 2229 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2230 i << 30,
2231 2);
2232}
2233
2234static int count_rmaps(struct kvm_vcpu *vcpu)
2235{
2236 int nmaps = 0;
2237 int i, j, k;
2238
2239 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2240 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2241 struct kvm_rmap_desc *d;
2242
2243 for (j = 0; j < m->npages; ++j) {
290fc38d 2244 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2245
290fc38d 2246 if (!*rmapp)
37a7d8b0 2247 continue;
290fc38d 2248 if (!(*rmapp & 1)) {
37a7d8b0
AK
2249 ++nmaps;
2250 continue;
2251 }
290fc38d 2252 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2253 while (d) {
2254 for (k = 0; k < RMAP_EXT; ++k)
2255 if (d->shadow_ptes[k])
2256 ++nmaps;
2257 else
2258 break;
2259 d = d->more;
2260 }
2261 }
2262 }
2263 return nmaps;
2264}
2265
2266static int count_writable_mappings(struct kvm_vcpu *vcpu)
2267{
2268 int nmaps = 0;
4db35314 2269 struct kvm_mmu_page *sp;
37a7d8b0
AK
2270 int i;
2271
f05e70ac 2272 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2273 u64 *pt = sp->spt;
37a7d8b0 2274
4db35314 2275 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2276 continue;
2277
2278 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2279 u64 ent = pt[i];
2280
2281 if (!(ent & PT_PRESENT_MASK))
2282 continue;
2283 if (!(ent & PT_WRITABLE_MASK))
2284 continue;
2285 ++nmaps;
2286 }
2287 }
2288 return nmaps;
2289}
2290
2291static void audit_rmap(struct kvm_vcpu *vcpu)
2292{
2293 int n_rmap = count_rmaps(vcpu);
2294 int n_actual = count_writable_mappings(vcpu);
2295
2296 if (n_rmap != n_actual)
2297 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2298 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2299}
2300
2301static void audit_write_protection(struct kvm_vcpu *vcpu)
2302{
4db35314 2303 struct kvm_mmu_page *sp;
290fc38d
IE
2304 struct kvm_memory_slot *slot;
2305 unsigned long *rmapp;
2306 gfn_t gfn;
37a7d8b0 2307
f05e70ac 2308 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2309 if (sp->role.metaphysical)
37a7d8b0
AK
2310 continue;
2311
4db35314
AK
2312 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2313 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2314 rmapp = &slot->rmap[gfn - slot->base_gfn];
2315 if (*rmapp)
37a7d8b0
AK
2316 printk(KERN_ERR "%s: (%s) shadow page has writable"
2317 " mappings: gfn %lx role %x\n",
b8688d51 2318 __func__, audit_msg, sp->gfn,
4db35314 2319 sp->role.word);
37a7d8b0
AK
2320 }
2321}
2322
2323static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2324{
2325 int olddbg = dbg;
2326
2327 dbg = 0;
2328 audit_msg = msg;
2329 audit_rmap(vcpu);
2330 audit_write_protection(vcpu);
2331 audit_mappings(vcpu);
2332 dbg = olddbg;
2333}
2334
2335#endif