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Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
1d737c8a | 21 | #include "mmu.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
6aa8b732 | 32 | |
e495606d AK |
33 | #include <asm/page.h> |
34 | #include <asm/cmpxchg.h> | |
4e542370 | 35 | #include <asm/io.h> |
6aa8b732 | 36 | |
18552672 JR |
37 | /* |
38 | * When setting this variable to true it enables Two-Dimensional-Paging | |
39 | * where the hardware walks 2 page tables: | |
40 | * 1. the guest-virtual to guest-physical | |
41 | * 2. while doing 1. it walks guest-physical to host-physical | |
42 | * If the hardware supports that we don't need to do shadow paging. | |
43 | */ | |
2f333bcb | 44 | bool tdp_enabled = false; |
18552672 | 45 | |
37a7d8b0 AK |
46 | #undef MMU_DEBUG |
47 | ||
48 | #undef AUDIT | |
49 | ||
50 | #ifdef AUDIT | |
51 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
52 | #else | |
53 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
54 | #endif | |
55 | ||
56 | #ifdef MMU_DEBUG | |
57 | ||
58 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
59 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
60 | ||
61 | #else | |
62 | ||
63 | #define pgprintk(x...) do { } while (0) | |
64 | #define rmap_printk(x...) do { } while (0) | |
65 | ||
66 | #endif | |
67 | ||
68 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
6ada8cca AK |
69 | static int dbg = 0; |
70 | module_param(dbg, bool, 0644); | |
37a7d8b0 | 71 | #endif |
6aa8b732 | 72 | |
d6c69ee9 YD |
73 | #ifndef MMU_DEBUG |
74 | #define ASSERT(x) do { } while (0) | |
75 | #else | |
6aa8b732 AK |
76 | #define ASSERT(x) \ |
77 | if (!(x)) { \ | |
78 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
79 | __FILE__, __LINE__, #x); \ | |
80 | } | |
d6c69ee9 | 81 | #endif |
6aa8b732 | 82 | |
6aa8b732 AK |
83 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
84 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
85 | ||
6aa8b732 AK |
86 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
87 | ||
88 | #define PT64_LEVEL_BITS 9 | |
89 | ||
90 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 91 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
92 | |
93 | #define PT64_LEVEL_MASK(level) \ | |
94 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
95 | ||
96 | #define PT64_INDEX(address, level)\ | |
97 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
98 | ||
99 | ||
100 | #define PT32_LEVEL_BITS 10 | |
101 | ||
102 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 103 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
104 | |
105 | #define PT32_LEVEL_MASK(level) \ | |
106 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
107 | ||
108 | #define PT32_INDEX(address, level)\ | |
109 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
110 | ||
111 | ||
27aba766 | 112 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
113 | #define PT64_DIR_BASE_ADDR_MASK \ |
114 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
115 | ||
116 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
117 | #define PT32_DIR_BASE_ADDR_MASK \ | |
118 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
119 | ||
79539cec AK |
120 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
121 | | PT64_NX_MASK) | |
6aa8b732 AK |
122 | |
123 | #define PFERR_PRESENT_MASK (1U << 0) | |
124 | #define PFERR_WRITE_MASK (1U << 1) | |
125 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 126 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 | 127 | |
6aa8b732 AK |
128 | #define PT_DIRECTORY_LEVEL 2 |
129 | #define PT_PAGE_TABLE_LEVEL 1 | |
130 | ||
cd4a4e53 AK |
131 | #define RMAP_EXT 4 |
132 | ||
fe135d2c AK |
133 | #define ACC_EXEC_MASK 1 |
134 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
135 | #define ACC_USER_MASK PT_USER_MASK | |
136 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
137 | ||
135f8c2b AK |
138 | #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) |
139 | ||
cd4a4e53 AK |
140 | struct kvm_rmap_desc { |
141 | u64 *shadow_ptes[RMAP_EXT]; | |
142 | struct kvm_rmap_desc *more; | |
143 | }; | |
144 | ||
3d000db5 AK |
145 | struct kvm_shadow_walk { |
146 | int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu, | |
d40a1ee4 | 147 | u64 addr, u64 *spte, int level); |
3d000db5 AK |
148 | }; |
149 | ||
ad8cfbe3 MT |
150 | typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp); |
151 | ||
b5a33a75 AK |
152 | static struct kmem_cache *pte_chain_cache; |
153 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 154 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 155 | |
c7addb90 AK |
156 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
157 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
7b52345e SY |
158 | static u64 __read_mostly shadow_base_present_pte; |
159 | static u64 __read_mostly shadow_nx_mask; | |
160 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ | |
161 | static u64 __read_mostly shadow_user_mask; | |
162 | static u64 __read_mostly shadow_accessed_mask; | |
163 | static u64 __read_mostly shadow_dirty_mask; | |
c7addb90 AK |
164 | |
165 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
166 | { | |
167 | shadow_trap_nonpresent_pte = trap_pte; | |
168 | shadow_notrap_nonpresent_pte = notrap_pte; | |
169 | } | |
170 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
171 | ||
7b52345e SY |
172 | void kvm_mmu_set_base_ptes(u64 base_pte) |
173 | { | |
174 | shadow_base_present_pte = base_pte; | |
175 | } | |
176 | EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes); | |
177 | ||
178 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
179 | u64 dirty_mask, u64 nx_mask, u64 x_mask) | |
180 | { | |
181 | shadow_user_mask = user_mask; | |
182 | shadow_accessed_mask = accessed_mask; | |
183 | shadow_dirty_mask = dirty_mask; | |
184 | shadow_nx_mask = nx_mask; | |
185 | shadow_x_mask = x_mask; | |
186 | } | |
187 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | |
188 | ||
6aa8b732 AK |
189 | static int is_write_protection(struct kvm_vcpu *vcpu) |
190 | { | |
ad312c7c | 191 | return vcpu->arch.cr0 & X86_CR0_WP; |
6aa8b732 AK |
192 | } |
193 | ||
194 | static int is_cpuid_PSE36(void) | |
195 | { | |
196 | return 1; | |
197 | } | |
198 | ||
73b1087e AK |
199 | static int is_nx(struct kvm_vcpu *vcpu) |
200 | { | |
ad312c7c | 201 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
202 | } |
203 | ||
6aa8b732 AK |
204 | static int is_present_pte(unsigned long pte) |
205 | { | |
206 | return pte & PT_PRESENT_MASK; | |
207 | } | |
208 | ||
c7addb90 AK |
209 | static int is_shadow_present_pte(u64 pte) |
210 | { | |
c7addb90 AK |
211 | return pte != shadow_trap_nonpresent_pte |
212 | && pte != shadow_notrap_nonpresent_pte; | |
213 | } | |
214 | ||
05da4558 MT |
215 | static int is_large_pte(u64 pte) |
216 | { | |
217 | return pte & PT_PAGE_SIZE_MASK; | |
218 | } | |
219 | ||
6aa8b732 AK |
220 | static int is_writeble_pte(unsigned long pte) |
221 | { | |
222 | return pte & PT_WRITABLE_MASK; | |
223 | } | |
224 | ||
e3c5e7ec AK |
225 | static int is_dirty_pte(unsigned long pte) |
226 | { | |
7b52345e | 227 | return pte & shadow_dirty_mask; |
e3c5e7ec AK |
228 | } |
229 | ||
cd4a4e53 AK |
230 | static int is_rmap_pte(u64 pte) |
231 | { | |
4b1a80fa | 232 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
233 | } |
234 | ||
35149e21 | 235 | static pfn_t spte_to_pfn(u64 pte) |
0b49ea86 | 236 | { |
35149e21 | 237 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
0b49ea86 AK |
238 | } |
239 | ||
da928521 AK |
240 | static gfn_t pse36_gfn_delta(u32 gpte) |
241 | { | |
242 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
243 | ||
244 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
245 | } | |
246 | ||
e663ee64 AK |
247 | static void set_shadow_pte(u64 *sptep, u64 spte) |
248 | { | |
249 | #ifdef CONFIG_X86_64 | |
250 | set_64bit((unsigned long *)sptep, spte); | |
251 | #else | |
252 | set_64bit((unsigned long long *)sptep, spte); | |
253 | #endif | |
254 | } | |
255 | ||
e2dec939 | 256 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 257 | struct kmem_cache *base_cache, int min) |
714b93da AK |
258 | { |
259 | void *obj; | |
260 | ||
261 | if (cache->nobjs >= min) | |
e2dec939 | 262 | return 0; |
714b93da | 263 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 264 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 265 | if (!obj) |
e2dec939 | 266 | return -ENOMEM; |
714b93da AK |
267 | cache->objects[cache->nobjs++] = obj; |
268 | } | |
e2dec939 | 269 | return 0; |
714b93da AK |
270 | } |
271 | ||
272 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
273 | { | |
274 | while (mc->nobjs) | |
275 | kfree(mc->objects[--mc->nobjs]); | |
276 | } | |
277 | ||
c1158e63 | 278 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 279 | int min) |
c1158e63 AK |
280 | { |
281 | struct page *page; | |
282 | ||
283 | if (cache->nobjs >= min) | |
284 | return 0; | |
285 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 286 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
287 | if (!page) |
288 | return -ENOMEM; | |
289 | set_page_private(page, 0); | |
290 | cache->objects[cache->nobjs++] = page_address(page); | |
291 | } | |
292 | return 0; | |
293 | } | |
294 | ||
295 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
296 | { | |
297 | while (mc->nobjs) | |
c4d198d5 | 298 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
299 | } |
300 | ||
2e3e5882 | 301 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 302 | { |
e2dec939 AK |
303 | int r; |
304 | ||
ad312c7c | 305 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 306 | pte_chain_cache, 4); |
e2dec939 AK |
307 | if (r) |
308 | goto out; | |
ad312c7c | 309 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
2e3e5882 | 310 | rmap_desc_cache, 1); |
d3d25b04 AK |
311 | if (r) |
312 | goto out; | |
ad312c7c | 313 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
314 | if (r) |
315 | goto out; | |
ad312c7c | 316 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 317 | mmu_page_header_cache, 4); |
e2dec939 AK |
318 | out: |
319 | return r; | |
714b93da AK |
320 | } |
321 | ||
322 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
323 | { | |
ad312c7c ZX |
324 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
325 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
326 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
327 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
328 | } |
329 | ||
330 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
331 | size_t size) | |
332 | { | |
333 | void *p; | |
334 | ||
335 | BUG_ON(!mc->nobjs); | |
336 | p = mc->objects[--mc->nobjs]; | |
337 | memset(p, 0, size); | |
338 | return p; | |
339 | } | |
340 | ||
714b93da AK |
341 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
342 | { | |
ad312c7c | 343 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
344 | sizeof(struct kvm_pte_chain)); |
345 | } | |
346 | ||
90cb0529 | 347 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 348 | { |
90cb0529 | 349 | kfree(pc); |
714b93da AK |
350 | } |
351 | ||
352 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
353 | { | |
ad312c7c | 354 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
355 | sizeof(struct kvm_rmap_desc)); |
356 | } | |
357 | ||
90cb0529 | 358 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 359 | { |
90cb0529 | 360 | kfree(rd); |
714b93da AK |
361 | } |
362 | ||
05da4558 MT |
363 | /* |
364 | * Return the pointer to the largepage write count for a given | |
365 | * gfn, handling slots that are not large page aligned. | |
366 | */ | |
367 | static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot) | |
368 | { | |
369 | unsigned long idx; | |
370 | ||
371 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
372 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
373 | return &slot->lpage_info[idx].write_count; | |
374 | } | |
375 | ||
376 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
377 | { | |
378 | int *write_count; | |
379 | ||
380 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
381 | *write_count += 1; | |
05da4558 MT |
382 | } |
383 | ||
384 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
385 | { | |
386 | int *write_count; | |
387 | ||
388 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
389 | *write_count -= 1; | |
390 | WARN_ON(*write_count < 0); | |
391 | } | |
392 | ||
393 | static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn) | |
394 | { | |
395 | struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn); | |
396 | int *largepage_idx; | |
397 | ||
398 | if (slot) { | |
399 | largepage_idx = slot_largepage_idx(gfn, slot); | |
400 | return *largepage_idx; | |
401 | } | |
402 | ||
403 | return 1; | |
404 | } | |
405 | ||
406 | static int host_largepage_backed(struct kvm *kvm, gfn_t gfn) | |
407 | { | |
408 | struct vm_area_struct *vma; | |
409 | unsigned long addr; | |
4c2155ce | 410 | int ret = 0; |
05da4558 MT |
411 | |
412 | addr = gfn_to_hva(kvm, gfn); | |
413 | if (kvm_is_error_hva(addr)) | |
4c2155ce | 414 | return ret; |
05da4558 | 415 | |
4c2155ce | 416 | down_read(¤t->mm->mmap_sem); |
05da4558 MT |
417 | vma = find_vma(current->mm, addr); |
418 | if (vma && is_vm_hugetlb_page(vma)) | |
4c2155ce MT |
419 | ret = 1; |
420 | up_read(¤t->mm->mmap_sem); | |
05da4558 | 421 | |
4c2155ce | 422 | return ret; |
05da4558 MT |
423 | } |
424 | ||
425 | static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn) | |
426 | { | |
427 | struct kvm_memory_slot *slot; | |
428 | ||
429 | if (has_wrprotected_page(vcpu->kvm, large_gfn)) | |
430 | return 0; | |
431 | ||
432 | if (!host_largepage_backed(vcpu->kvm, large_gfn)) | |
433 | return 0; | |
434 | ||
435 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
436 | if (slot && slot->dirty_bitmap) | |
437 | return 0; | |
438 | ||
439 | return 1; | |
440 | } | |
441 | ||
290fc38d IE |
442 | /* |
443 | * Take gfn and return the reverse mapping to it. | |
444 | * Note: gfn must be unaliased before this function get called | |
445 | */ | |
446 | ||
05da4558 | 447 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage) |
290fc38d IE |
448 | { |
449 | struct kvm_memory_slot *slot; | |
05da4558 | 450 | unsigned long idx; |
290fc38d IE |
451 | |
452 | slot = gfn_to_memslot(kvm, gfn); | |
05da4558 MT |
453 | if (!lpage) |
454 | return &slot->rmap[gfn - slot->base_gfn]; | |
455 | ||
456 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
457 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
458 | ||
459 | return &slot->lpage_info[idx].rmap_pde; | |
290fc38d IE |
460 | } |
461 | ||
cd4a4e53 AK |
462 | /* |
463 | * Reverse mapping data structures: | |
464 | * | |
290fc38d IE |
465 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
466 | * that points to page_address(page). | |
cd4a4e53 | 467 | * |
290fc38d IE |
468 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
469 | * containing more mappings. | |
cd4a4e53 | 470 | */ |
05da4558 | 471 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage) |
cd4a4e53 | 472 | { |
4db35314 | 473 | struct kvm_mmu_page *sp; |
cd4a4e53 | 474 | struct kvm_rmap_desc *desc; |
290fc38d | 475 | unsigned long *rmapp; |
cd4a4e53 AK |
476 | int i; |
477 | ||
478 | if (!is_rmap_pte(*spte)) | |
479 | return; | |
290fc38d | 480 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
481 | sp = page_header(__pa(spte)); |
482 | sp->gfns[spte - sp->spt] = gfn; | |
05da4558 | 483 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage); |
290fc38d | 484 | if (!*rmapp) { |
cd4a4e53 | 485 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
486 | *rmapp = (unsigned long)spte; |
487 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 488 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 489 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 490 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 491 | desc->shadow_ptes[1] = spte; |
290fc38d | 492 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
493 | } else { |
494 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 495 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
496 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
497 | desc = desc->more; | |
498 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 499 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
500 | desc = desc->more; |
501 | } | |
502 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
503 | ; | |
504 | desc->shadow_ptes[i] = spte; | |
505 | } | |
506 | } | |
507 | ||
290fc38d | 508 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
509 | struct kvm_rmap_desc *desc, |
510 | int i, | |
511 | struct kvm_rmap_desc *prev_desc) | |
512 | { | |
513 | int j; | |
514 | ||
515 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
516 | ; | |
517 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 518 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
519 | if (j != 0) |
520 | return; | |
521 | if (!prev_desc && !desc->more) | |
290fc38d | 522 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
523 | else |
524 | if (prev_desc) | |
525 | prev_desc->more = desc->more; | |
526 | else | |
290fc38d | 527 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 528 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
529 | } |
530 | ||
290fc38d | 531 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 532 | { |
cd4a4e53 AK |
533 | struct kvm_rmap_desc *desc; |
534 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 535 | struct kvm_mmu_page *sp; |
35149e21 | 536 | pfn_t pfn; |
290fc38d | 537 | unsigned long *rmapp; |
cd4a4e53 AK |
538 | int i; |
539 | ||
540 | if (!is_rmap_pte(*spte)) | |
541 | return; | |
4db35314 | 542 | sp = page_header(__pa(spte)); |
35149e21 | 543 | pfn = spte_to_pfn(*spte); |
7b52345e | 544 | if (*spte & shadow_accessed_mask) |
35149e21 | 545 | kvm_set_pfn_accessed(pfn); |
b4231d61 | 546 | if (is_writeble_pte(*spte)) |
35149e21 | 547 | kvm_release_pfn_dirty(pfn); |
b4231d61 | 548 | else |
35149e21 | 549 | kvm_release_pfn_clean(pfn); |
05da4558 | 550 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte)); |
290fc38d | 551 | if (!*rmapp) { |
cd4a4e53 AK |
552 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
553 | BUG(); | |
290fc38d | 554 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 555 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 556 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
557 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
558 | spte, *spte); | |
559 | BUG(); | |
560 | } | |
290fc38d | 561 | *rmapp = 0; |
cd4a4e53 AK |
562 | } else { |
563 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 564 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
565 | prev_desc = NULL; |
566 | while (desc) { | |
567 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
568 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 569 | rmap_desc_remove_entry(rmapp, |
714b93da | 570 | desc, i, |
cd4a4e53 AK |
571 | prev_desc); |
572 | return; | |
573 | } | |
574 | prev_desc = desc; | |
575 | desc = desc->more; | |
576 | } | |
577 | BUG(); | |
578 | } | |
579 | } | |
580 | ||
98348e95 | 581 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 582 | { |
374cbac0 | 583 | struct kvm_rmap_desc *desc; |
98348e95 IE |
584 | struct kvm_rmap_desc *prev_desc; |
585 | u64 *prev_spte; | |
586 | int i; | |
587 | ||
588 | if (!*rmapp) | |
589 | return NULL; | |
590 | else if (!(*rmapp & 1)) { | |
591 | if (!spte) | |
592 | return (u64 *)*rmapp; | |
593 | return NULL; | |
594 | } | |
595 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
596 | prev_desc = NULL; | |
597 | prev_spte = NULL; | |
598 | while (desc) { | |
599 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
600 | if (prev_spte == spte) | |
601 | return desc->shadow_ptes[i]; | |
602 | prev_spte = desc->shadow_ptes[i]; | |
603 | } | |
604 | desc = desc->more; | |
605 | } | |
606 | return NULL; | |
607 | } | |
608 | ||
609 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
610 | { | |
290fc38d | 611 | unsigned long *rmapp; |
374cbac0 | 612 | u64 *spte; |
caa5b8a5 | 613 | int write_protected = 0; |
374cbac0 | 614 | |
4a4c9924 | 615 | gfn = unalias_gfn(kvm, gfn); |
05da4558 | 616 | rmapp = gfn_to_rmap(kvm, gfn, 0); |
374cbac0 | 617 | |
98348e95 IE |
618 | spte = rmap_next(kvm, rmapp, NULL); |
619 | while (spte) { | |
374cbac0 | 620 | BUG_ON(!spte); |
374cbac0 | 621 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 622 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
caa5b8a5 | 623 | if (is_writeble_pte(*spte)) { |
9647c14c | 624 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
625 | write_protected = 1; |
626 | } | |
9647c14c | 627 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 628 | } |
855149aa | 629 | if (write_protected) { |
35149e21 | 630 | pfn_t pfn; |
855149aa IE |
631 | |
632 | spte = rmap_next(kvm, rmapp, NULL); | |
35149e21 AL |
633 | pfn = spte_to_pfn(*spte); |
634 | kvm_set_pfn_dirty(pfn); | |
855149aa IE |
635 | } |
636 | ||
05da4558 MT |
637 | /* check for huge page mappings */ |
638 | rmapp = gfn_to_rmap(kvm, gfn, 1); | |
639 | spte = rmap_next(kvm, rmapp, NULL); | |
640 | while (spte) { | |
641 | BUG_ON(!spte); | |
642 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
643 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
644 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
645 | if (is_writeble_pte(*spte)) { | |
646 | rmap_remove(kvm, spte); | |
647 | --kvm->stat.lpages; | |
648 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
6597ca09 | 649 | spte = NULL; |
05da4558 MT |
650 | write_protected = 1; |
651 | } | |
652 | spte = rmap_next(kvm, rmapp, spte); | |
653 | } | |
654 | ||
caa5b8a5 ED |
655 | if (write_protected) |
656 | kvm_flush_remote_tlbs(kvm); | |
05da4558 MT |
657 | |
658 | account_shadowed(kvm, gfn); | |
374cbac0 AK |
659 | } |
660 | ||
e930bffe AA |
661 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp) |
662 | { | |
663 | u64 *spte; | |
664 | int need_tlb_flush = 0; | |
665 | ||
666 | while ((spte = rmap_next(kvm, rmapp, NULL))) { | |
667 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
668 | rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte); | |
669 | rmap_remove(kvm, spte); | |
670 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
671 | need_tlb_flush = 1; | |
672 | } | |
673 | return need_tlb_flush; | |
674 | } | |
675 | ||
676 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, | |
677 | int (*handler)(struct kvm *kvm, unsigned long *rmapp)) | |
678 | { | |
679 | int i; | |
680 | int retval = 0; | |
681 | ||
682 | /* | |
683 | * If mmap_sem isn't taken, we can look the memslots with only | |
684 | * the mmu_lock by skipping over the slots with userspace_addr == 0. | |
685 | */ | |
686 | for (i = 0; i < kvm->nmemslots; i++) { | |
687 | struct kvm_memory_slot *memslot = &kvm->memslots[i]; | |
688 | unsigned long start = memslot->userspace_addr; | |
689 | unsigned long end; | |
690 | ||
691 | /* mmu_lock protects userspace_addr */ | |
692 | if (!start) | |
693 | continue; | |
694 | ||
695 | end = start + (memslot->npages << PAGE_SHIFT); | |
696 | if (hva >= start && hva < end) { | |
697 | gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT; | |
698 | retval |= handler(kvm, &memslot->rmap[gfn_offset]); | |
699 | retval |= handler(kvm, | |
700 | &memslot->lpage_info[ | |
701 | gfn_offset / | |
702 | KVM_PAGES_PER_HPAGE].rmap_pde); | |
703 | } | |
704 | } | |
705 | ||
706 | return retval; | |
707 | } | |
708 | ||
709 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
710 | { | |
711 | return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); | |
712 | } | |
713 | ||
714 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp) | |
715 | { | |
716 | u64 *spte; | |
717 | int young = 0; | |
718 | ||
534e38b4 SY |
719 | /* always return old for EPT */ |
720 | if (!shadow_accessed_mask) | |
721 | return 0; | |
722 | ||
e930bffe AA |
723 | spte = rmap_next(kvm, rmapp, NULL); |
724 | while (spte) { | |
725 | int _young; | |
726 | u64 _spte = *spte; | |
727 | BUG_ON(!(_spte & PT_PRESENT_MASK)); | |
728 | _young = _spte & PT_ACCESSED_MASK; | |
729 | if (_young) { | |
730 | young = 1; | |
731 | clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
732 | } | |
733 | spte = rmap_next(kvm, rmapp, spte); | |
734 | } | |
735 | return young; | |
736 | } | |
737 | ||
738 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
739 | { | |
740 | return kvm_handle_hva(kvm, hva, kvm_age_rmapp); | |
741 | } | |
742 | ||
d6c69ee9 | 743 | #ifdef MMU_DEBUG |
47ad8e68 | 744 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 745 | { |
139bdb2d AK |
746 | u64 *pos; |
747 | u64 *end; | |
748 | ||
47ad8e68 | 749 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
3c915510 | 750 | if (is_shadow_present_pte(*pos)) { |
b8688d51 | 751 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 752 | pos, *pos); |
6aa8b732 | 753 | return 0; |
139bdb2d | 754 | } |
6aa8b732 AK |
755 | return 1; |
756 | } | |
d6c69ee9 | 757 | #endif |
6aa8b732 | 758 | |
4db35314 | 759 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 760 | { |
4db35314 AK |
761 | ASSERT(is_empty_shadow_page(sp->spt)); |
762 | list_del(&sp->link); | |
763 | __free_page(virt_to_page(sp->spt)); | |
764 | __free_page(virt_to_page(sp->gfns)); | |
765 | kfree(sp); | |
f05e70ac | 766 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
767 | } |
768 | ||
cea0f0e7 AK |
769 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
770 | { | |
1ae0a13d | 771 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
772 | } |
773 | ||
25c0de2c AK |
774 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
775 | u64 *parent_pte) | |
6aa8b732 | 776 | { |
4db35314 | 777 | struct kvm_mmu_page *sp; |
6aa8b732 | 778 | |
ad312c7c ZX |
779 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
780 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
781 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 782 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 783 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
4db35314 AK |
784 | ASSERT(is_empty_shadow_page(sp->spt)); |
785 | sp->slot_bitmap = 0; | |
786 | sp->multimapped = 0; | |
787 | sp->parent_pte = parent_pte; | |
f05e70ac | 788 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 789 | return sp; |
6aa8b732 AK |
790 | } |
791 | ||
714b93da | 792 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 793 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
794 | { |
795 | struct kvm_pte_chain *pte_chain; | |
796 | struct hlist_node *node; | |
797 | int i; | |
798 | ||
799 | if (!parent_pte) | |
800 | return; | |
4db35314 AK |
801 | if (!sp->multimapped) { |
802 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
803 | |
804 | if (!old) { | |
4db35314 | 805 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
806 | return; |
807 | } | |
4db35314 | 808 | sp->multimapped = 1; |
714b93da | 809 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
810 | INIT_HLIST_HEAD(&sp->parent_ptes); |
811 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
812 | pte_chain->parent_ptes[0] = old; |
813 | } | |
4db35314 | 814 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
815 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
816 | continue; | |
817 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
818 | if (!pte_chain->parent_ptes[i]) { | |
819 | pte_chain->parent_ptes[i] = parent_pte; | |
820 | return; | |
821 | } | |
822 | } | |
714b93da | 823 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 824 | BUG_ON(!pte_chain); |
4db35314 | 825 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
826 | pte_chain->parent_ptes[0] = parent_pte; |
827 | } | |
828 | ||
4db35314 | 829 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
830 | u64 *parent_pte) |
831 | { | |
832 | struct kvm_pte_chain *pte_chain; | |
833 | struct hlist_node *node; | |
834 | int i; | |
835 | ||
4db35314 AK |
836 | if (!sp->multimapped) { |
837 | BUG_ON(sp->parent_pte != parent_pte); | |
838 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
839 | return; |
840 | } | |
4db35314 | 841 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
842 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
843 | if (!pte_chain->parent_ptes[i]) | |
844 | break; | |
845 | if (pte_chain->parent_ptes[i] != parent_pte) | |
846 | continue; | |
697fe2e2 AK |
847 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
848 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
849 | pte_chain->parent_ptes[i] |
850 | = pte_chain->parent_ptes[i + 1]; | |
851 | ++i; | |
852 | } | |
853 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
854 | if (i == 0) { |
855 | hlist_del(&pte_chain->link); | |
90cb0529 | 856 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
857 | if (hlist_empty(&sp->parent_ptes)) { |
858 | sp->multimapped = 0; | |
859 | sp->parent_pte = NULL; | |
697fe2e2 AK |
860 | } |
861 | } | |
cea0f0e7 AK |
862 | return; |
863 | } | |
864 | BUG(); | |
865 | } | |
866 | ||
ad8cfbe3 MT |
867 | |
868 | static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, | |
869 | mmu_parent_walk_fn fn) | |
870 | { | |
871 | struct kvm_pte_chain *pte_chain; | |
872 | struct hlist_node *node; | |
873 | struct kvm_mmu_page *parent_sp; | |
874 | int i; | |
875 | ||
876 | if (!sp->multimapped && sp->parent_pte) { | |
877 | parent_sp = page_header(__pa(sp->parent_pte)); | |
878 | fn(vcpu, parent_sp); | |
879 | mmu_parent_walk(vcpu, parent_sp, fn); | |
880 | return; | |
881 | } | |
882 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) | |
883 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
884 | if (!pte_chain->parent_ptes[i]) | |
885 | break; | |
886 | parent_sp = page_header(__pa(pte_chain->parent_ptes[i])); | |
887 | fn(vcpu, parent_sp); | |
888 | mmu_parent_walk(vcpu, parent_sp, fn); | |
889 | } | |
890 | } | |
891 | ||
d761a501 AK |
892 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
893 | struct kvm_mmu_page *sp) | |
894 | { | |
895 | int i; | |
896 | ||
897 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
898 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
899 | } | |
900 | ||
e8bc217a MT |
901 | static int nonpaging_sync_page(struct kvm_vcpu *vcpu, |
902 | struct kvm_mmu_page *sp) | |
903 | { | |
904 | return 1; | |
905 | } | |
906 | ||
a7052897 MT |
907 | static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
908 | { | |
909 | } | |
910 | ||
4db35314 | 911 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
912 | { |
913 | unsigned index; | |
914 | struct hlist_head *bucket; | |
4db35314 | 915 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
916 | struct hlist_node *node; |
917 | ||
b8688d51 | 918 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 919 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 920 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 921 | hlist_for_each_entry(sp, node, bucket, hash_link) |
2e53d63a MT |
922 | if (sp->gfn == gfn && !sp->role.metaphysical |
923 | && !sp->role.invalid) { | |
cea0f0e7 | 924 | pgprintk("%s: found role %x\n", |
b8688d51 | 925 | __func__, sp->role.word); |
4db35314 | 926 | return sp; |
cea0f0e7 AK |
927 | } |
928 | return NULL; | |
929 | } | |
930 | ||
931 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
932 | gfn_t gfn, | |
933 | gva_t gaddr, | |
934 | unsigned level, | |
935 | int metaphysical, | |
41074d07 | 936 | unsigned access, |
f7d9c7b7 | 937 | u64 *parent_pte) |
cea0f0e7 AK |
938 | { |
939 | union kvm_mmu_page_role role; | |
940 | unsigned index; | |
941 | unsigned quadrant; | |
942 | struct hlist_head *bucket; | |
4db35314 | 943 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
944 | struct hlist_node *node; |
945 | ||
946 | role.word = 0; | |
ad312c7c | 947 | role.glevels = vcpu->arch.mmu.root_level; |
cea0f0e7 AK |
948 | role.level = level; |
949 | role.metaphysical = metaphysical; | |
41074d07 | 950 | role.access = access; |
ad312c7c | 951 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
952 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
953 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
954 | role.quadrant = quadrant; | |
955 | } | |
b8688d51 | 956 | pgprintk("%s: looking gfn %lx role %x\n", __func__, |
cea0f0e7 | 957 | gfn, role.word); |
1ae0a13d | 958 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 959 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
960 | hlist_for_each_entry(sp, node, bucket, hash_link) |
961 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
962 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
b8688d51 | 963 | pgprintk("%s: found\n", __func__); |
4db35314 | 964 | return sp; |
cea0f0e7 | 965 | } |
dfc5aa00 | 966 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
967 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
968 | if (!sp) | |
969 | return sp; | |
b8688d51 | 970 | pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word); |
4db35314 AK |
971 | sp->gfn = gfn; |
972 | sp->role = role; | |
973 | hlist_add_head(&sp->hash_link, bucket); | |
374cbac0 | 974 | if (!metaphysical) |
4a4c9924 | 975 | rmap_write_protect(vcpu->kvm, gfn); |
131d8279 AK |
976 | if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) |
977 | vcpu->arch.mmu.prefetch_page(vcpu, sp); | |
978 | else | |
979 | nonpaging_prefetch_page(vcpu, sp); | |
4db35314 | 980 | return sp; |
cea0f0e7 AK |
981 | } |
982 | ||
3d000db5 | 983 | static int walk_shadow(struct kvm_shadow_walk *walker, |
d40a1ee4 | 984 | struct kvm_vcpu *vcpu, u64 addr) |
3d000db5 AK |
985 | { |
986 | hpa_t shadow_addr; | |
987 | int level; | |
988 | int r; | |
989 | u64 *sptep; | |
990 | unsigned index; | |
991 | ||
992 | shadow_addr = vcpu->arch.mmu.root_hpa; | |
993 | level = vcpu->arch.mmu.shadow_root_level; | |
994 | if (level == PT32E_ROOT_LEVEL) { | |
995 | shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3]; | |
996 | shadow_addr &= PT64_BASE_ADDR_MASK; | |
997 | --level; | |
998 | } | |
999 | ||
1000 | while (level >= PT_PAGE_TABLE_LEVEL) { | |
1001 | index = SHADOW_PT_INDEX(addr, level); | |
1002 | sptep = ((u64 *)__va(shadow_addr)) + index; | |
1003 | r = walker->entry(walker, vcpu, addr, sptep, level); | |
1004 | if (r) | |
1005 | return r; | |
1006 | shadow_addr = *sptep & PT64_BASE_ADDR_MASK; | |
1007 | --level; | |
1008 | } | |
1009 | return 0; | |
1010 | } | |
1011 | ||
90cb0529 | 1012 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 1013 | struct kvm_mmu_page *sp) |
a436036b | 1014 | { |
697fe2e2 AK |
1015 | unsigned i; |
1016 | u64 *pt; | |
1017 | u64 ent; | |
1018 | ||
4db35314 | 1019 | pt = sp->spt; |
697fe2e2 | 1020 | |
4db35314 | 1021 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 1022 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 1023 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 1024 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 1025 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 AK |
1026 | } |
1027 | return; | |
1028 | } | |
1029 | ||
1030 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1031 | ent = pt[i]; | |
1032 | ||
05da4558 MT |
1033 | if (is_shadow_present_pte(ent)) { |
1034 | if (!is_large_pte(ent)) { | |
1035 | ent &= PT64_BASE_ADDR_MASK; | |
1036 | mmu_page_remove_parent_pte(page_header(ent), | |
1037 | &pt[i]); | |
1038 | } else { | |
1039 | --kvm->stat.lpages; | |
1040 | rmap_remove(kvm, &pt[i]); | |
1041 | } | |
1042 | } | |
c7addb90 | 1043 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 1044 | } |
a436036b AK |
1045 | } |
1046 | ||
4db35314 | 1047 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 1048 | { |
4db35314 | 1049 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
1050 | } |
1051 | ||
12b7d28f AK |
1052 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
1053 | { | |
1054 | int i; | |
1055 | ||
1056 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
1057 | if (kvm->vcpus[i]) | |
ad312c7c | 1058 | kvm->vcpus[i]->arch.last_pte_updated = NULL; |
12b7d28f AK |
1059 | } |
1060 | ||
31aa2b44 | 1061 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
1062 | { |
1063 | u64 *parent_pte; | |
1064 | ||
4db35314 AK |
1065 | while (sp->multimapped || sp->parent_pte) { |
1066 | if (!sp->multimapped) | |
1067 | parent_pte = sp->parent_pte; | |
a436036b AK |
1068 | else { |
1069 | struct kvm_pte_chain *chain; | |
1070 | ||
4db35314 | 1071 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
1072 | struct kvm_pte_chain, link); |
1073 | parent_pte = chain->parent_ptes[0]; | |
1074 | } | |
697fe2e2 | 1075 | BUG_ON(!parent_pte); |
4db35314 | 1076 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 1077 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 1078 | } |
31aa2b44 AK |
1079 | } |
1080 | ||
07385413 | 1081 | static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
31aa2b44 AK |
1082 | { |
1083 | ++kvm->stat.mmu_shadow_zapped; | |
4db35314 | 1084 | kvm_mmu_page_unlink_children(kvm, sp); |
31aa2b44 | 1085 | kvm_mmu_unlink_parents(kvm, sp); |
5b5c6a5a AK |
1086 | kvm_flush_remote_tlbs(kvm); |
1087 | if (!sp->role.invalid && !sp->role.metaphysical) | |
1088 | unaccount_shadowed(kvm, sp->gfn); | |
4db35314 AK |
1089 | if (!sp->root_count) { |
1090 | hlist_del(&sp->hash_link); | |
1091 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 1092 | } else { |
2e53d63a | 1093 | sp->role.invalid = 1; |
5b5c6a5a | 1094 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
1095 | kvm_reload_remote_mmus(kvm); |
1096 | } | |
12b7d28f | 1097 | kvm_mmu_reset_last_pte_updated(kvm); |
07385413 | 1098 | return 0; |
a436036b AK |
1099 | } |
1100 | ||
82ce2c96 IE |
1101 | /* |
1102 | * Changing the number of mmu pages allocated to the vm | |
1103 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
1104 | */ | |
1105 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
1106 | { | |
1107 | /* | |
1108 | * If we set the number of mmu pages to be smaller be than the | |
1109 | * number of actived pages , we must to free some mmu pages before we | |
1110 | * change the value | |
1111 | */ | |
1112 | ||
f05e70ac | 1113 | if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) > |
82ce2c96 | 1114 | kvm_nr_mmu_pages) { |
f05e70ac ZX |
1115 | int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages |
1116 | - kvm->arch.n_free_mmu_pages; | |
82ce2c96 IE |
1117 | |
1118 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
1119 | struct kvm_mmu_page *page; | |
1120 | ||
f05e70ac | 1121 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
1122 | struct kvm_mmu_page, link); |
1123 | kvm_mmu_zap_page(kvm, page); | |
1124 | n_used_mmu_pages--; | |
1125 | } | |
f05e70ac | 1126 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
1127 | } |
1128 | else | |
f05e70ac ZX |
1129 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
1130 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 1131 | |
f05e70ac | 1132 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
1133 | } |
1134 | ||
f67a46f4 | 1135 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
1136 | { |
1137 | unsigned index; | |
1138 | struct hlist_head *bucket; | |
4db35314 | 1139 | struct kvm_mmu_page *sp; |
a436036b AK |
1140 | struct hlist_node *node, *n; |
1141 | int r; | |
1142 | ||
b8688d51 | 1143 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 1144 | r = 0; |
1ae0a13d | 1145 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1146 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
1147 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
1148 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
b8688d51 | 1149 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 | 1150 | sp->role.word); |
a436036b | 1151 | r = 1; |
07385413 MT |
1152 | if (kvm_mmu_zap_page(kvm, sp)) |
1153 | n = bucket->first; | |
a436036b AK |
1154 | } |
1155 | return r; | |
cea0f0e7 AK |
1156 | } |
1157 | ||
f67a46f4 | 1158 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1159 | { |
4db35314 | 1160 | struct kvm_mmu_page *sp; |
97a0a01e | 1161 | |
4db35314 | 1162 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
b8688d51 | 1163 | pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word); |
4db35314 | 1164 | kvm_mmu_zap_page(kvm, sp); |
97a0a01e AK |
1165 | } |
1166 | } | |
1167 | ||
38c335f1 | 1168 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1169 | { |
38c335f1 | 1170 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 1171 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1172 | |
4db35314 | 1173 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
1174 | } |
1175 | ||
6844dec6 MT |
1176 | static void mmu_convert_notrap(struct kvm_mmu_page *sp) |
1177 | { | |
1178 | int i; | |
1179 | u64 *pt = sp->spt; | |
1180 | ||
1181 | if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte) | |
1182 | return; | |
1183 | ||
1184 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1185 | if (pt[i] == shadow_notrap_nonpresent_pte) | |
1186 | set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte); | |
1187 | } | |
1188 | } | |
1189 | ||
039576c0 AK |
1190 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1191 | { | |
72dc67a6 IE |
1192 | struct page *page; |
1193 | ||
ad312c7c | 1194 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1195 | |
1196 | if (gpa == UNMAPPED_GVA) | |
1197 | return NULL; | |
72dc67a6 | 1198 | |
72dc67a6 | 1199 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
72dc67a6 IE |
1200 | |
1201 | return page; | |
039576c0 AK |
1202 | } |
1203 | ||
1e73f9dd MT |
1204 | static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, |
1205 | unsigned pte_access, int user_fault, | |
1206 | int write_fault, int dirty, int largepage, | |
1207 | gfn_t gfn, pfn_t pfn, bool speculative) | |
1c4f1fd6 AK |
1208 | { |
1209 | u64 spte; | |
1e73f9dd | 1210 | int ret = 0; |
1c4f1fd6 AK |
1211 | /* |
1212 | * We don't set the accessed bit, since we sometimes want to see | |
1213 | * whether the guest actually used the pte (in order to detect | |
1214 | * demand paging). | |
1215 | */ | |
7b52345e | 1216 | spte = shadow_base_present_pte | shadow_dirty_mask; |
947da538 | 1217 | if (!speculative) |
3201b5d9 | 1218 | spte |= shadow_accessed_mask; |
1c4f1fd6 AK |
1219 | if (!dirty) |
1220 | pte_access &= ~ACC_WRITE_MASK; | |
7b52345e SY |
1221 | if (pte_access & ACC_EXEC_MASK) |
1222 | spte |= shadow_x_mask; | |
1223 | else | |
1224 | spte |= shadow_nx_mask; | |
1c4f1fd6 | 1225 | if (pte_access & ACC_USER_MASK) |
7b52345e | 1226 | spte |= shadow_user_mask; |
05da4558 MT |
1227 | if (largepage) |
1228 | spte |= PT_PAGE_SIZE_MASK; | |
1c4f1fd6 | 1229 | |
35149e21 | 1230 | spte |= (u64)pfn << PAGE_SHIFT; |
1c4f1fd6 AK |
1231 | |
1232 | if ((pte_access & ACC_WRITE_MASK) | |
1233 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1234 | struct kvm_mmu_page *shadow; | |
1235 | ||
38187c83 MT |
1236 | if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) { |
1237 | ret = 1; | |
1238 | spte = shadow_trap_nonpresent_pte; | |
1239 | goto set_pte; | |
1240 | } | |
1241 | ||
1c4f1fd6 | 1242 | spte |= PT_WRITABLE_MASK; |
1c4f1fd6 AK |
1243 | |
1244 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
38187c83 | 1245 | if (shadow) { |
1c4f1fd6 | 1246 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1247 | __func__, gfn); |
1e73f9dd | 1248 | ret = 1; |
1c4f1fd6 | 1249 | pte_access &= ~ACC_WRITE_MASK; |
a378b4e6 | 1250 | if (is_writeble_pte(spte)) |
1c4f1fd6 | 1251 | spte &= ~PT_WRITABLE_MASK; |
1c4f1fd6 AK |
1252 | } |
1253 | } | |
1254 | ||
1c4f1fd6 AK |
1255 | if (pte_access & ACC_WRITE_MASK) |
1256 | mark_page_dirty(vcpu->kvm, gfn); | |
1257 | ||
38187c83 | 1258 | set_pte: |
1c4f1fd6 | 1259 | set_shadow_pte(shadow_pte, spte); |
1e73f9dd MT |
1260 | return ret; |
1261 | } | |
1262 | ||
1263 | ||
1264 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, | |
1265 | unsigned pt_access, unsigned pte_access, | |
1266 | int user_fault, int write_fault, int dirty, | |
1267 | int *ptwrite, int largepage, gfn_t gfn, | |
1268 | pfn_t pfn, bool speculative) | |
1269 | { | |
1270 | int was_rmapped = 0; | |
1271 | int was_writeble = is_writeble_pte(*shadow_pte); | |
1272 | ||
1273 | pgprintk("%s: spte %llx access %x write_fault %d" | |
1274 | " user_fault %d gfn %lx\n", | |
1275 | __func__, *shadow_pte, pt_access, | |
1276 | write_fault, user_fault, gfn); | |
1277 | ||
1278 | if (is_rmap_pte(*shadow_pte)) { | |
1279 | /* | |
1280 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1281 | * the parent of the now unreachable PTE. | |
1282 | */ | |
1283 | if (largepage && !is_large_pte(*shadow_pte)) { | |
1284 | struct kvm_mmu_page *child; | |
1285 | u64 pte = *shadow_pte; | |
1286 | ||
1287 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1288 | mmu_page_remove_parent_pte(child, shadow_pte); | |
1289 | } else if (pfn != spte_to_pfn(*shadow_pte)) { | |
1290 | pgprintk("hfn old %lx new %lx\n", | |
1291 | spte_to_pfn(*shadow_pte), pfn); | |
1292 | rmap_remove(vcpu->kvm, shadow_pte); | |
1293 | } else { | |
1294 | if (largepage) | |
1295 | was_rmapped = is_large_pte(*shadow_pte); | |
1296 | else | |
1297 | was_rmapped = 1; | |
1298 | } | |
1299 | } | |
1300 | if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault, | |
a378b4e6 | 1301 | dirty, largepage, gfn, pfn, speculative)) { |
1e73f9dd MT |
1302 | if (write_fault) |
1303 | *ptwrite = 1; | |
a378b4e6 MT |
1304 | kvm_x86_ops->tlb_flush(vcpu); |
1305 | } | |
1e73f9dd MT |
1306 | |
1307 | pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte); | |
1308 | pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n", | |
1309 | is_large_pte(*shadow_pte)? "2MB" : "4kB", | |
1310 | is_present_pte(*shadow_pte)?"RW":"R", gfn, | |
1311 | *shadow_pte, shadow_pte); | |
1312 | if (!was_rmapped && is_large_pte(*shadow_pte)) | |
05da4558 MT |
1313 | ++vcpu->kvm->stat.lpages; |
1314 | ||
1c4f1fd6 AK |
1315 | page_header_update_slot(vcpu->kvm, shadow_pte, gfn); |
1316 | if (!was_rmapped) { | |
05da4558 | 1317 | rmap_add(vcpu, shadow_pte, gfn, largepage); |
1c4f1fd6 | 1318 | if (!is_rmap_pte(*shadow_pte)) |
35149e21 | 1319 | kvm_release_pfn_clean(pfn); |
75e68e60 IE |
1320 | } else { |
1321 | if (was_writeble) | |
35149e21 | 1322 | kvm_release_pfn_dirty(pfn); |
75e68e60 | 1323 | else |
35149e21 | 1324 | kvm_release_pfn_clean(pfn); |
1c4f1fd6 | 1325 | } |
1b7fcd32 | 1326 | if (speculative) { |
ad312c7c | 1327 | vcpu->arch.last_pte_updated = shadow_pte; |
1b7fcd32 AK |
1328 | vcpu->arch.last_pte_gfn = gfn; |
1329 | } | |
1c4f1fd6 AK |
1330 | } |
1331 | ||
6aa8b732 AK |
1332 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1333 | { | |
1334 | } | |
1335 | ||
140754bc AK |
1336 | struct direct_shadow_walk { |
1337 | struct kvm_shadow_walk walker; | |
1338 | pfn_t pfn; | |
1339 | int write; | |
1340 | int largepage; | |
1341 | int pt_write; | |
1342 | }; | |
6aa8b732 | 1343 | |
140754bc AK |
1344 | static int direct_map_entry(struct kvm_shadow_walk *_walk, |
1345 | struct kvm_vcpu *vcpu, | |
d40a1ee4 | 1346 | u64 addr, u64 *sptep, int level) |
140754bc AK |
1347 | { |
1348 | struct direct_shadow_walk *walk = | |
1349 | container_of(_walk, struct direct_shadow_walk, walker); | |
1350 | struct kvm_mmu_page *sp; | |
1351 | gfn_t pseudo_gfn; | |
1352 | gfn_t gfn = addr >> PAGE_SHIFT; | |
1353 | ||
1354 | if (level == PT_PAGE_TABLE_LEVEL | |
1355 | || (walk->largepage && level == PT_DIRECTORY_LEVEL)) { | |
1356 | mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL, | |
1357 | 0, walk->write, 1, &walk->pt_write, | |
1358 | walk->largepage, gfn, walk->pfn, false); | |
bc2d4299 | 1359 | ++vcpu->stat.pf_fixed; |
140754bc AK |
1360 | return 1; |
1361 | } | |
6aa8b732 | 1362 | |
140754bc AK |
1363 | if (*sptep == shadow_trap_nonpresent_pte) { |
1364 | pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
d40a1ee4 | 1365 | sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1, |
140754bc AK |
1366 | 1, ACC_ALL, sptep); |
1367 | if (!sp) { | |
1368 | pgprintk("nonpaging_map: ENOMEM\n"); | |
1369 | kvm_release_pfn_clean(walk->pfn); | |
1370 | return -ENOMEM; | |
6aa8b732 AK |
1371 | } |
1372 | ||
140754bc AK |
1373 | set_shadow_pte(sptep, |
1374 | __pa(sp->spt) | |
1375 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
1376 | | shadow_user_mask | shadow_x_mask); | |
6aa8b732 | 1377 | } |
140754bc AK |
1378 | return 0; |
1379 | } | |
1380 | ||
1381 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, | |
1382 | int largepage, gfn_t gfn, pfn_t pfn) | |
1383 | { | |
1384 | int r; | |
1385 | struct direct_shadow_walk walker = { | |
1386 | .walker = { .entry = direct_map_entry, }, | |
1387 | .pfn = pfn, | |
1388 | .largepage = largepage, | |
1389 | .write = write, | |
1390 | .pt_write = 0, | |
1391 | }; | |
1392 | ||
d40a1ee4 | 1393 | r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT); |
140754bc AK |
1394 | if (r < 0) |
1395 | return r; | |
1396 | return walker.pt_write; | |
6aa8b732 AK |
1397 | } |
1398 | ||
10589a46 MT |
1399 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1400 | { | |
1401 | int r; | |
05da4558 | 1402 | int largepage = 0; |
35149e21 | 1403 | pfn_t pfn; |
e930bffe | 1404 | unsigned long mmu_seq; |
aaee2c94 | 1405 | |
05da4558 MT |
1406 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1407 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1408 | largepage = 1; | |
1409 | } | |
1410 | ||
e930bffe | 1411 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 1412 | smp_rmb(); |
35149e21 | 1413 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
aaee2c94 | 1414 | |
d196e343 | 1415 | /* mmio */ |
35149e21 AL |
1416 | if (is_error_pfn(pfn)) { |
1417 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1418 | return 1; |
1419 | } | |
1420 | ||
aaee2c94 | 1421 | spin_lock(&vcpu->kvm->mmu_lock); |
e930bffe AA |
1422 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1423 | goto out_unlock; | |
eb787d10 | 1424 | kvm_mmu_free_some_pages(vcpu); |
6c41f428 | 1425 | r = __direct_map(vcpu, v, write, largepage, gfn, pfn); |
aaee2c94 MT |
1426 | spin_unlock(&vcpu->kvm->mmu_lock); |
1427 | ||
aaee2c94 | 1428 | |
10589a46 | 1429 | return r; |
e930bffe AA |
1430 | |
1431 | out_unlock: | |
1432 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1433 | kvm_release_pfn_clean(pfn); | |
1434 | return 0; | |
10589a46 MT |
1435 | } |
1436 | ||
1437 | ||
17ac10ad AK |
1438 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
1439 | { | |
1440 | int i; | |
4db35314 | 1441 | struct kvm_mmu_page *sp; |
17ac10ad | 1442 | |
ad312c7c | 1443 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 1444 | return; |
aaee2c94 | 1445 | spin_lock(&vcpu->kvm->mmu_lock); |
ad312c7c ZX |
1446 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1447 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 1448 | |
4db35314 AK |
1449 | sp = page_header(root); |
1450 | --sp->root_count; | |
2e53d63a MT |
1451 | if (!sp->root_count && sp->role.invalid) |
1452 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 1453 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 1454 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
1455 | return; |
1456 | } | |
17ac10ad | 1457 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1458 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 1459 | |
417726a3 | 1460 | if (root) { |
417726a3 | 1461 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
1462 | sp = page_header(root); |
1463 | --sp->root_count; | |
2e53d63a MT |
1464 | if (!sp->root_count && sp->role.invalid) |
1465 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 1466 | } |
ad312c7c | 1467 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 1468 | } |
aaee2c94 | 1469 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1470 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
1471 | } |
1472 | ||
1473 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
1474 | { | |
1475 | int i; | |
cea0f0e7 | 1476 | gfn_t root_gfn; |
4db35314 | 1477 | struct kvm_mmu_page *sp; |
fb72d167 | 1478 | int metaphysical = 0; |
3bb65a22 | 1479 | |
ad312c7c | 1480 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad | 1481 | |
ad312c7c ZX |
1482 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1483 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
1484 | |
1485 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 JR |
1486 | if (tdp_enabled) |
1487 | metaphysical = 1; | |
4db35314 | 1488 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fb72d167 JR |
1489 | PT64_ROOT_LEVEL, metaphysical, |
1490 | ACC_ALL, NULL); | |
4db35314 AK |
1491 | root = __pa(sp->spt); |
1492 | ++sp->root_count; | |
ad312c7c | 1493 | vcpu->arch.mmu.root_hpa = root; |
17ac10ad AK |
1494 | return; |
1495 | } | |
fb72d167 JR |
1496 | metaphysical = !is_paging(vcpu); |
1497 | if (tdp_enabled) | |
1498 | metaphysical = 1; | |
17ac10ad | 1499 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1500 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
1501 | |
1502 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c ZX |
1503 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
1504 | if (!is_present_pte(vcpu->arch.pdptrs[i])) { | |
1505 | vcpu->arch.mmu.pae_root[i] = 0; | |
417726a3 AK |
1506 | continue; |
1507 | } | |
ad312c7c ZX |
1508 | root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT; |
1509 | } else if (vcpu->arch.mmu.root_level == 0) | |
cea0f0e7 | 1510 | root_gfn = 0; |
4db35314 | 1511 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
fb72d167 | 1512 | PT32_ROOT_LEVEL, metaphysical, |
f7d9c7b7 | 1513 | ACC_ALL, NULL); |
4db35314 AK |
1514 | root = __pa(sp->spt); |
1515 | ++sp->root_count; | |
ad312c7c | 1516 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 1517 | } |
ad312c7c | 1518 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
17ac10ad AK |
1519 | } |
1520 | ||
0ba73cda MT |
1521 | static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) |
1522 | { | |
1523 | } | |
1524 | ||
1525 | static void mmu_sync_roots(struct kvm_vcpu *vcpu) | |
1526 | { | |
1527 | int i; | |
1528 | struct kvm_mmu_page *sp; | |
1529 | ||
1530 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) | |
1531 | return; | |
1532 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
1533 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
1534 | sp = page_header(root); | |
1535 | mmu_sync_children(vcpu, sp); | |
1536 | return; | |
1537 | } | |
1538 | for (i = 0; i < 4; ++i) { | |
1539 | hpa_t root = vcpu->arch.mmu.pae_root[i]; | |
1540 | ||
1541 | if (root) { | |
1542 | root &= PT64_BASE_ADDR_MASK; | |
1543 | sp = page_header(root); | |
1544 | mmu_sync_children(vcpu, sp); | |
1545 | } | |
1546 | } | |
1547 | } | |
1548 | ||
1549 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) | |
1550 | { | |
1551 | spin_lock(&vcpu->kvm->mmu_lock); | |
1552 | mmu_sync_roots(vcpu); | |
1553 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1554 | } | |
1555 | ||
6aa8b732 AK |
1556 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1557 | { | |
1558 | return vaddr; | |
1559 | } | |
1560 | ||
1561 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1562 | u32 error_code) |
6aa8b732 | 1563 | { |
e833240f | 1564 | gfn_t gfn; |
e2dec939 | 1565 | int r; |
6aa8b732 | 1566 | |
b8688d51 | 1567 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
1568 | r = mmu_topup_memory_caches(vcpu); |
1569 | if (r) | |
1570 | return r; | |
714b93da | 1571 | |
6aa8b732 | 1572 | ASSERT(vcpu); |
ad312c7c | 1573 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 1574 | |
e833240f | 1575 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 1576 | |
e833240f AK |
1577 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
1578 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
1579 | } |
1580 | ||
fb72d167 JR |
1581 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
1582 | u32 error_code) | |
1583 | { | |
35149e21 | 1584 | pfn_t pfn; |
fb72d167 | 1585 | int r; |
05da4558 MT |
1586 | int largepage = 0; |
1587 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
e930bffe | 1588 | unsigned long mmu_seq; |
fb72d167 JR |
1589 | |
1590 | ASSERT(vcpu); | |
1591 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
1592 | ||
1593 | r = mmu_topup_memory_caches(vcpu); | |
1594 | if (r) | |
1595 | return r; | |
1596 | ||
05da4558 MT |
1597 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1598 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1599 | largepage = 1; | |
1600 | } | |
e930bffe | 1601 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 1602 | smp_rmb(); |
35149e21 | 1603 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
35149e21 AL |
1604 | if (is_error_pfn(pfn)) { |
1605 | kvm_release_pfn_clean(pfn); | |
fb72d167 JR |
1606 | return 1; |
1607 | } | |
1608 | spin_lock(&vcpu->kvm->mmu_lock); | |
e930bffe AA |
1609 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1610 | goto out_unlock; | |
fb72d167 JR |
1611 | kvm_mmu_free_some_pages(vcpu); |
1612 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
6c41f428 | 1613 | largepage, gfn, pfn); |
fb72d167 | 1614 | spin_unlock(&vcpu->kvm->mmu_lock); |
fb72d167 JR |
1615 | |
1616 | return r; | |
e930bffe AA |
1617 | |
1618 | out_unlock: | |
1619 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1620 | kvm_release_pfn_clean(pfn); | |
1621 | return 0; | |
fb72d167 JR |
1622 | } |
1623 | ||
6aa8b732 AK |
1624 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1625 | { | |
17ac10ad | 1626 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1627 | } |
1628 | ||
1629 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1630 | { | |
ad312c7c | 1631 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1632 | |
1633 | context->new_cr3 = nonpaging_new_cr3; | |
1634 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1635 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1636 | context->free = nonpaging_free; | |
c7addb90 | 1637 | context->prefetch_page = nonpaging_prefetch_page; |
e8bc217a | 1638 | context->sync_page = nonpaging_sync_page; |
a7052897 | 1639 | context->invlpg = nonpaging_invlpg; |
cea0f0e7 | 1640 | context->root_level = 0; |
6aa8b732 | 1641 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1642 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1643 | return 0; |
1644 | } | |
1645 | ||
d835dfec | 1646 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1647 | { |
1165f5fe | 1648 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1649 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1650 | } |
1651 | ||
1652 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1653 | { | |
b8688d51 | 1654 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 1655 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1656 | } |
1657 | ||
6aa8b732 AK |
1658 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1659 | u64 addr, | |
1660 | u32 err_code) | |
1661 | { | |
c3c91fee | 1662 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1663 | } |
1664 | ||
6aa8b732 AK |
1665 | static void paging_free(struct kvm_vcpu *vcpu) |
1666 | { | |
1667 | nonpaging_free(vcpu); | |
1668 | } | |
1669 | ||
1670 | #define PTTYPE 64 | |
1671 | #include "paging_tmpl.h" | |
1672 | #undef PTTYPE | |
1673 | ||
1674 | #define PTTYPE 32 | |
1675 | #include "paging_tmpl.h" | |
1676 | #undef PTTYPE | |
1677 | ||
17ac10ad | 1678 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 1679 | { |
ad312c7c | 1680 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1681 | |
1682 | ASSERT(is_pae(vcpu)); | |
1683 | context->new_cr3 = paging_new_cr3; | |
1684 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1685 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1686 | context->prefetch_page = paging64_prefetch_page; |
e8bc217a | 1687 | context->sync_page = paging64_sync_page; |
a7052897 | 1688 | context->invlpg = paging64_invlpg; |
6aa8b732 | 1689 | context->free = paging_free; |
17ac10ad AK |
1690 | context->root_level = level; |
1691 | context->shadow_root_level = level; | |
17c3ba9d | 1692 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1693 | return 0; |
1694 | } | |
1695 | ||
17ac10ad AK |
1696 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1697 | { | |
1698 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1699 | } | |
1700 | ||
6aa8b732 AK |
1701 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1702 | { | |
ad312c7c | 1703 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1704 | |
1705 | context->new_cr3 = paging_new_cr3; | |
1706 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1707 | context->gva_to_gpa = paging32_gva_to_gpa; |
1708 | context->free = paging_free; | |
c7addb90 | 1709 | context->prefetch_page = paging32_prefetch_page; |
e8bc217a | 1710 | context->sync_page = paging32_sync_page; |
a7052897 | 1711 | context->invlpg = paging32_invlpg; |
6aa8b732 AK |
1712 | context->root_level = PT32_ROOT_LEVEL; |
1713 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1714 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1715 | return 0; |
1716 | } | |
1717 | ||
1718 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1719 | { | |
17ac10ad | 1720 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1721 | } |
1722 | ||
fb72d167 JR |
1723 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
1724 | { | |
1725 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
1726 | ||
1727 | context->new_cr3 = nonpaging_new_cr3; | |
1728 | context->page_fault = tdp_page_fault; | |
1729 | context->free = nonpaging_free; | |
1730 | context->prefetch_page = nonpaging_prefetch_page; | |
e8bc217a | 1731 | context->sync_page = nonpaging_sync_page; |
a7052897 | 1732 | context->invlpg = nonpaging_invlpg; |
67253af5 | 1733 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
fb72d167 JR |
1734 | context->root_hpa = INVALID_PAGE; |
1735 | ||
1736 | if (!is_paging(vcpu)) { | |
1737 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
1738 | context->root_level = 0; | |
1739 | } else if (is_long_mode(vcpu)) { | |
1740 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1741 | context->root_level = PT64_ROOT_LEVEL; | |
1742 | } else if (is_pae(vcpu)) { | |
1743 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1744 | context->root_level = PT32E_ROOT_LEVEL; | |
1745 | } else { | |
1746 | context->gva_to_gpa = paging32_gva_to_gpa; | |
1747 | context->root_level = PT32_ROOT_LEVEL; | |
1748 | } | |
1749 | ||
1750 | return 0; | |
1751 | } | |
1752 | ||
1753 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 AK |
1754 | { |
1755 | ASSERT(vcpu); | |
ad312c7c | 1756 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
1757 | |
1758 | if (!is_paging(vcpu)) | |
1759 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1760 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1761 | return paging64_init_context(vcpu); |
1762 | else if (is_pae(vcpu)) | |
1763 | return paging32E_init_context(vcpu); | |
1764 | else | |
1765 | return paging32_init_context(vcpu); | |
1766 | } | |
1767 | ||
fb72d167 JR |
1768 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
1769 | { | |
35149e21 AL |
1770 | vcpu->arch.update_pte.pfn = bad_pfn; |
1771 | ||
fb72d167 JR |
1772 | if (tdp_enabled) |
1773 | return init_kvm_tdp_mmu(vcpu); | |
1774 | else | |
1775 | return init_kvm_softmmu(vcpu); | |
1776 | } | |
1777 | ||
6aa8b732 AK |
1778 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
1779 | { | |
1780 | ASSERT(vcpu); | |
ad312c7c ZX |
1781 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
1782 | vcpu->arch.mmu.free(vcpu); | |
1783 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
1784 | } |
1785 | } | |
1786 | ||
1787 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1788 | { |
1789 | destroy_kvm_mmu(vcpu); | |
1790 | return init_kvm_mmu(vcpu); | |
1791 | } | |
8668a3c4 | 1792 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1793 | |
1794 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1795 | { |
714b93da AK |
1796 | int r; |
1797 | ||
e2dec939 | 1798 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1799 | if (r) |
1800 | goto out; | |
aaee2c94 | 1801 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1802 | kvm_mmu_free_some_pages(vcpu); |
17c3ba9d | 1803 | mmu_alloc_roots(vcpu); |
0ba73cda | 1804 | mmu_sync_roots(vcpu); |
aaee2c94 | 1805 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1806 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
17c3ba9d | 1807 | kvm_mmu_flush_tlb(vcpu); |
714b93da AK |
1808 | out: |
1809 | return r; | |
6aa8b732 | 1810 | } |
17c3ba9d AK |
1811 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1812 | ||
1813 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1814 | { | |
1815 | mmu_free_roots(vcpu); | |
1816 | } | |
6aa8b732 | 1817 | |
09072daf | 1818 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1819 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1820 | u64 *spte) |
1821 | { | |
1822 | u64 pte; | |
1823 | struct kvm_mmu_page *child; | |
1824 | ||
1825 | pte = *spte; | |
c7addb90 | 1826 | if (is_shadow_present_pte(pte)) { |
05da4558 MT |
1827 | if (sp->role.level == PT_PAGE_TABLE_LEVEL || |
1828 | is_large_pte(pte)) | |
290fc38d | 1829 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1830 | else { |
1831 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1832 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1833 | } |
1834 | } | |
c7addb90 | 1835 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
1836 | if (is_large_pte(pte)) |
1837 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
1838 | } |
1839 | ||
0028425f | 1840 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1841 | struct kvm_mmu_page *sp, |
0028425f | 1842 | u64 *spte, |
489f1d65 | 1843 | const void *new) |
0028425f | 1844 | { |
30945387 MT |
1845 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
1846 | if (!vcpu->arch.update_pte.largepage || | |
1847 | sp->role.glevels == PT32_ROOT_LEVEL) { | |
1848 | ++vcpu->kvm->stat.mmu_pde_zapped; | |
1849 | return; | |
1850 | } | |
1851 | } | |
0028425f | 1852 | |
4cee5764 | 1853 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 1854 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 1855 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 1856 | else |
489f1d65 | 1857 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
1858 | } |
1859 | ||
79539cec AK |
1860 | static bool need_remote_flush(u64 old, u64 new) |
1861 | { | |
1862 | if (!is_shadow_present_pte(old)) | |
1863 | return false; | |
1864 | if (!is_shadow_present_pte(new)) | |
1865 | return true; | |
1866 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1867 | return true; | |
1868 | old ^= PT64_NX_MASK; | |
1869 | new ^= PT64_NX_MASK; | |
1870 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1871 | } | |
1872 | ||
1873 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1874 | { | |
1875 | if (need_remote_flush(old, new)) | |
1876 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1877 | else | |
1878 | kvm_mmu_flush_tlb(vcpu); | |
1879 | } | |
1880 | ||
12b7d28f AK |
1881 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1882 | { | |
ad312c7c | 1883 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f | 1884 | |
7b52345e | 1885 | return !!(spte && (*spte & shadow_accessed_mask)); |
12b7d28f AK |
1886 | } |
1887 | ||
d7824fff AK |
1888 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1889 | const u8 *new, int bytes) | |
1890 | { | |
1891 | gfn_t gfn; | |
1892 | int r; | |
1893 | u64 gpte = 0; | |
35149e21 | 1894 | pfn_t pfn; |
d7824fff | 1895 | |
05da4558 MT |
1896 | vcpu->arch.update_pte.largepage = 0; |
1897 | ||
d7824fff AK |
1898 | if (bytes != 4 && bytes != 8) |
1899 | return; | |
1900 | ||
1901 | /* | |
1902 | * Assume that the pte write on a page table of the same type | |
1903 | * as the current vcpu paging mode. This is nearly always true | |
1904 | * (might be false while changing modes). Note it is verified later | |
1905 | * by update_pte(). | |
1906 | */ | |
1907 | if (is_pae(vcpu)) { | |
1908 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
1909 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
1910 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
1911 | if (r) | |
1912 | return; | |
1913 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
1914 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
1915 | memcpy((void *)&gpte, new, 8); | |
1916 | } | |
1917 | } else { | |
1918 | if ((bytes == 4) && (gpa % 4 == 0)) | |
1919 | memcpy((void *)&gpte, new, 4); | |
1920 | } | |
1921 | if (!is_present_pte(gpte)) | |
1922 | return; | |
1923 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 1924 | |
05da4558 MT |
1925 | if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) { |
1926 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1927 | vcpu->arch.update_pte.largepage = 1; | |
1928 | } | |
e930bffe | 1929 | vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 1930 | smp_rmb(); |
35149e21 | 1931 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
72dc67a6 | 1932 | |
35149e21 AL |
1933 | if (is_error_pfn(pfn)) { |
1934 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1935 | return; |
1936 | } | |
d7824fff | 1937 | vcpu->arch.update_pte.gfn = gfn; |
35149e21 | 1938 | vcpu->arch.update_pte.pfn = pfn; |
d7824fff AK |
1939 | } |
1940 | ||
1b7fcd32 AK |
1941 | static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn) |
1942 | { | |
1943 | u64 *spte = vcpu->arch.last_pte_updated; | |
1944 | ||
1945 | if (spte | |
1946 | && vcpu->arch.last_pte_gfn == gfn | |
1947 | && shadow_accessed_mask | |
1948 | && !(*spte & shadow_accessed_mask) | |
1949 | && is_shadow_present_pte(*spte)) | |
1950 | set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
1951 | } | |
1952 | ||
09072daf | 1953 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1954 | const u8 *new, int bytes) |
da4a00f0 | 1955 | { |
9b7a0325 | 1956 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1957 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1958 | struct hlist_node *node, *n; |
9b7a0325 AK |
1959 | struct hlist_head *bucket; |
1960 | unsigned index; | |
489f1d65 | 1961 | u64 entry, gentry; |
9b7a0325 | 1962 | u64 *spte; |
9b7a0325 | 1963 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1964 | unsigned pte_size; |
9b7a0325 | 1965 | unsigned page_offset; |
0e7bc4b9 | 1966 | unsigned misaligned; |
fce0657f | 1967 | unsigned quadrant; |
9b7a0325 | 1968 | int level; |
86a5ba02 | 1969 | int flooded = 0; |
ac1b714e | 1970 | int npte; |
489f1d65 | 1971 | int r; |
9b7a0325 | 1972 | |
b8688d51 | 1973 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 1974 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 1975 | spin_lock(&vcpu->kvm->mmu_lock); |
1b7fcd32 | 1976 | kvm_mmu_access_page(vcpu, gfn); |
eb787d10 | 1977 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 1978 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1979 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad312c7c | 1980 | if (gfn == vcpu->arch.last_pt_write_gfn |
12b7d28f | 1981 | && !last_updated_pte_accessed(vcpu)) { |
ad312c7c ZX |
1982 | ++vcpu->arch.last_pt_write_count; |
1983 | if (vcpu->arch.last_pt_write_count >= 3) | |
86a5ba02 AK |
1984 | flooded = 1; |
1985 | } else { | |
ad312c7c ZX |
1986 | vcpu->arch.last_pt_write_gfn = gfn; |
1987 | vcpu->arch.last_pt_write_count = 1; | |
1988 | vcpu->arch.last_pte_updated = NULL; | |
86a5ba02 | 1989 | } |
1ae0a13d | 1990 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1991 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 | 1992 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
5b5c6a5a | 1993 | if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid) |
9b7a0325 | 1994 | continue; |
4db35314 | 1995 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1996 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1997 | misaligned |= bytes < 4; |
86a5ba02 | 1998 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1999 | /* |
2000 | * Misaligned accesses are too much trouble to fix | |
2001 | * up; also, they usually indicate a page is not used | |
2002 | * as a page table. | |
86a5ba02 AK |
2003 | * |
2004 | * If we're seeing too many writes to a page, | |
2005 | * it may no longer be a page table, or we may be | |
2006 | * forking, in which case it is better to unmap the | |
2007 | * page. | |
0e7bc4b9 AK |
2008 | */ |
2009 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 | 2010 | gpa, bytes, sp->role.word); |
07385413 MT |
2011 | if (kvm_mmu_zap_page(vcpu->kvm, sp)) |
2012 | n = bucket->first; | |
4cee5764 | 2013 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
2014 | continue; |
2015 | } | |
9b7a0325 | 2016 | page_offset = offset; |
4db35314 | 2017 | level = sp->role.level; |
ac1b714e | 2018 | npte = 1; |
4db35314 | 2019 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
2020 | page_offset <<= 1; /* 32->64 */ |
2021 | /* | |
2022 | * A 32-bit pde maps 4MB while the shadow pdes map | |
2023 | * only 2MB. So we need to double the offset again | |
2024 | * and zap two pdes instead of one. | |
2025 | */ | |
2026 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 2027 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
2028 | page_offset <<= 1; |
2029 | npte = 2; | |
2030 | } | |
fce0657f | 2031 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 2032 | page_offset &= ~PAGE_MASK; |
4db35314 | 2033 | if (quadrant != sp->role.quadrant) |
fce0657f | 2034 | continue; |
9b7a0325 | 2035 | } |
4db35314 | 2036 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
2037 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
2038 | gentry = 0; | |
2039 | r = kvm_read_guest_atomic(vcpu->kvm, | |
2040 | gpa & ~(u64)(pte_size - 1), | |
2041 | &gentry, pte_size); | |
2042 | new = (const void *)&gentry; | |
2043 | if (r < 0) | |
2044 | new = NULL; | |
2045 | } | |
ac1b714e | 2046 | while (npte--) { |
79539cec | 2047 | entry = *spte; |
4db35314 | 2048 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
2049 | if (new) |
2050 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 2051 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 2052 | ++spte; |
9b7a0325 | 2053 | } |
9b7a0325 | 2054 | } |
c7addb90 | 2055 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 2056 | spin_unlock(&vcpu->kvm->mmu_lock); |
35149e21 AL |
2057 | if (!is_error_pfn(vcpu->arch.update_pte.pfn)) { |
2058 | kvm_release_pfn_clean(vcpu->arch.update_pte.pfn); | |
2059 | vcpu->arch.update_pte.pfn = bad_pfn; | |
d7824fff | 2060 | } |
da4a00f0 AK |
2061 | } |
2062 | ||
a436036b AK |
2063 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
2064 | { | |
10589a46 MT |
2065 | gpa_t gpa; |
2066 | int r; | |
a436036b | 2067 | |
10589a46 | 2068 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
10589a46 | 2069 | |
aaee2c94 | 2070 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 2071 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 2072 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 2073 | return r; |
a436036b | 2074 | } |
577bdc49 | 2075 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
a436036b | 2076 | |
22d95b12 | 2077 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 2078 | { |
f05e70ac | 2079 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) { |
4db35314 | 2080 | struct kvm_mmu_page *sp; |
ebeace86 | 2081 | |
f05e70ac | 2082 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
2083 | struct kvm_mmu_page, link); |
2084 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 2085 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
2086 | } |
2087 | } | |
ebeace86 | 2088 | |
3067714c AK |
2089 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
2090 | { | |
2091 | int r; | |
2092 | enum emulation_result er; | |
2093 | ||
ad312c7c | 2094 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
2095 | if (r < 0) |
2096 | goto out; | |
2097 | ||
2098 | if (!r) { | |
2099 | r = 1; | |
2100 | goto out; | |
2101 | } | |
2102 | ||
b733bfb5 AK |
2103 | r = mmu_topup_memory_caches(vcpu); |
2104 | if (r) | |
2105 | goto out; | |
2106 | ||
3067714c | 2107 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
3067714c AK |
2108 | |
2109 | switch (er) { | |
2110 | case EMULATE_DONE: | |
2111 | return 1; | |
2112 | case EMULATE_DO_MMIO: | |
2113 | ++vcpu->stat.mmio_exits; | |
2114 | return 0; | |
2115 | case EMULATE_FAIL: | |
2116 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
2117 | return 1; | |
2118 | default: | |
2119 | BUG(); | |
2120 | } | |
2121 | out: | |
3067714c AK |
2122 | return r; |
2123 | } | |
2124 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
2125 | ||
a7052897 MT |
2126 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
2127 | { | |
2128 | spin_lock(&vcpu->kvm->mmu_lock); | |
2129 | vcpu->arch.mmu.invlpg(vcpu, gva); | |
2130 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2131 | kvm_mmu_flush_tlb(vcpu); | |
2132 | ++vcpu->stat.invlpg; | |
2133 | } | |
2134 | EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); | |
2135 | ||
18552672 JR |
2136 | void kvm_enable_tdp(void) |
2137 | { | |
2138 | tdp_enabled = true; | |
2139 | } | |
2140 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
2141 | ||
5f4cb662 JR |
2142 | void kvm_disable_tdp(void) |
2143 | { | |
2144 | tdp_enabled = false; | |
2145 | } | |
2146 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); | |
2147 | ||
6aa8b732 AK |
2148 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
2149 | { | |
4db35314 | 2150 | struct kvm_mmu_page *sp; |
6aa8b732 | 2151 | |
f05e70ac ZX |
2152 | while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) { |
2153 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.next, | |
4db35314 AK |
2154 | struct kvm_mmu_page, link); |
2155 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
8d2d73b9 | 2156 | cond_resched(); |
f51234c2 | 2157 | } |
ad312c7c | 2158 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
2159 | } |
2160 | ||
2161 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
2162 | { | |
17ac10ad | 2163 | struct page *page; |
6aa8b732 AK |
2164 | int i; |
2165 | ||
2166 | ASSERT(vcpu); | |
2167 | ||
f05e70ac ZX |
2168 | if (vcpu->kvm->arch.n_requested_mmu_pages) |
2169 | vcpu->kvm->arch.n_free_mmu_pages = | |
2170 | vcpu->kvm->arch.n_requested_mmu_pages; | |
82ce2c96 | 2171 | else |
f05e70ac ZX |
2172 | vcpu->kvm->arch.n_free_mmu_pages = |
2173 | vcpu->kvm->arch.n_alloc_mmu_pages; | |
17ac10ad AK |
2174 | /* |
2175 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
2176 | * Therefore we need to allocate shadow page tables in the first | |
2177 | * 4GB of memory, which happens to fit the DMA32 zone. | |
2178 | */ | |
2179 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
2180 | if (!page) | |
2181 | goto error_1; | |
ad312c7c | 2182 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 2183 | for (i = 0; i < 4; ++i) |
ad312c7c | 2184 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2185 | |
6aa8b732 AK |
2186 | return 0; |
2187 | ||
2188 | error_1: | |
2189 | free_mmu_pages(vcpu); | |
2190 | return -ENOMEM; | |
2191 | } | |
2192 | ||
8018c27b | 2193 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 2194 | { |
6aa8b732 | 2195 | ASSERT(vcpu); |
ad312c7c | 2196 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2197 | |
8018c27b IM |
2198 | return alloc_mmu_pages(vcpu); |
2199 | } | |
6aa8b732 | 2200 | |
8018c27b IM |
2201 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
2202 | { | |
2203 | ASSERT(vcpu); | |
ad312c7c | 2204 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 2205 | |
8018c27b | 2206 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
2207 | } |
2208 | ||
2209 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
2210 | { | |
2211 | ASSERT(vcpu); | |
2212 | ||
2213 | destroy_kvm_mmu(vcpu); | |
2214 | free_mmu_pages(vcpu); | |
714b93da | 2215 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
2216 | } |
2217 | ||
90cb0529 | 2218 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 2219 | { |
4db35314 | 2220 | struct kvm_mmu_page *sp; |
6aa8b732 | 2221 | |
2245a28f | 2222 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2223 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
2224 | int i; |
2225 | u64 *pt; | |
2226 | ||
4db35314 | 2227 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
2228 | continue; |
2229 | ||
4db35314 | 2230 | pt = sp->spt; |
6aa8b732 AK |
2231 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
2232 | /* avoid RMW */ | |
9647c14c | 2233 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 2234 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 | 2235 | } |
171d595d | 2236 | kvm_flush_remote_tlbs(kvm); |
2245a28f | 2237 | spin_unlock(&kvm->mmu_lock); |
6aa8b732 | 2238 | } |
37a7d8b0 | 2239 | |
90cb0529 | 2240 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 2241 | { |
4db35314 | 2242 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 2243 | |
aaee2c94 | 2244 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2245 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
07385413 MT |
2246 | if (kvm_mmu_zap_page(kvm, sp)) |
2247 | node = container_of(kvm->arch.active_mmu_pages.next, | |
2248 | struct kvm_mmu_page, link); | |
aaee2c94 | 2249 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 2250 | |
90cb0529 | 2251 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
2252 | } |
2253 | ||
8b2cf73c | 2254 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) |
3ee16c81 IE |
2255 | { |
2256 | struct kvm_mmu_page *page; | |
2257 | ||
2258 | page = container_of(kvm->arch.active_mmu_pages.prev, | |
2259 | struct kvm_mmu_page, link); | |
2260 | kvm_mmu_zap_page(kvm, page); | |
2261 | } | |
2262 | ||
2263 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |
2264 | { | |
2265 | struct kvm *kvm; | |
2266 | struct kvm *kvm_freed = NULL; | |
2267 | int cache_count = 0; | |
2268 | ||
2269 | spin_lock(&kvm_lock); | |
2270 | ||
2271 | list_for_each_entry(kvm, &vm_list, vm_list) { | |
2272 | int npages; | |
2273 | ||
5a4c9288 MT |
2274 | if (!down_read_trylock(&kvm->slots_lock)) |
2275 | continue; | |
3ee16c81 IE |
2276 | spin_lock(&kvm->mmu_lock); |
2277 | npages = kvm->arch.n_alloc_mmu_pages - | |
2278 | kvm->arch.n_free_mmu_pages; | |
2279 | cache_count += npages; | |
2280 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | |
2281 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | |
2282 | cache_count--; | |
2283 | kvm_freed = kvm; | |
2284 | } | |
2285 | nr_to_scan--; | |
2286 | ||
2287 | spin_unlock(&kvm->mmu_lock); | |
5a4c9288 | 2288 | up_read(&kvm->slots_lock); |
3ee16c81 IE |
2289 | } |
2290 | if (kvm_freed) | |
2291 | list_move_tail(&kvm_freed->vm_list, &vm_list); | |
2292 | ||
2293 | spin_unlock(&kvm_lock); | |
2294 | ||
2295 | return cache_count; | |
2296 | } | |
2297 | ||
2298 | static struct shrinker mmu_shrinker = { | |
2299 | .shrink = mmu_shrink, | |
2300 | .seeks = DEFAULT_SEEKS * 10, | |
2301 | }; | |
2302 | ||
2ddfd20e | 2303 | static void mmu_destroy_caches(void) |
b5a33a75 AK |
2304 | { |
2305 | if (pte_chain_cache) | |
2306 | kmem_cache_destroy(pte_chain_cache); | |
2307 | if (rmap_desc_cache) | |
2308 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
2309 | if (mmu_page_header_cache) |
2310 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
2311 | } |
2312 | ||
3ee16c81 IE |
2313 | void kvm_mmu_module_exit(void) |
2314 | { | |
2315 | mmu_destroy_caches(); | |
2316 | unregister_shrinker(&mmu_shrinker); | |
2317 | } | |
2318 | ||
b5a33a75 AK |
2319 | int kvm_mmu_module_init(void) |
2320 | { | |
2321 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
2322 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 2323 | 0, 0, NULL); |
b5a33a75 AK |
2324 | if (!pte_chain_cache) |
2325 | goto nomem; | |
2326 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
2327 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 2328 | 0, 0, NULL); |
b5a33a75 AK |
2329 | if (!rmap_desc_cache) |
2330 | goto nomem; | |
2331 | ||
d3d25b04 AK |
2332 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
2333 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 2334 | 0, 0, NULL); |
d3d25b04 AK |
2335 | if (!mmu_page_header_cache) |
2336 | goto nomem; | |
2337 | ||
3ee16c81 IE |
2338 | register_shrinker(&mmu_shrinker); |
2339 | ||
b5a33a75 AK |
2340 | return 0; |
2341 | ||
2342 | nomem: | |
3ee16c81 | 2343 | mmu_destroy_caches(); |
b5a33a75 AK |
2344 | return -ENOMEM; |
2345 | } | |
2346 | ||
3ad82a7e ZX |
2347 | /* |
2348 | * Caculate mmu pages needed for kvm. | |
2349 | */ | |
2350 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
2351 | { | |
2352 | int i; | |
2353 | unsigned int nr_mmu_pages; | |
2354 | unsigned int nr_pages = 0; | |
2355 | ||
2356 | for (i = 0; i < kvm->nmemslots; i++) | |
2357 | nr_pages += kvm->memslots[i].npages; | |
2358 | ||
2359 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
2360 | nr_mmu_pages = max(nr_mmu_pages, | |
2361 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
2362 | ||
2363 | return nr_mmu_pages; | |
2364 | } | |
2365 | ||
2f333bcb MT |
2366 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
2367 | unsigned len) | |
2368 | { | |
2369 | if (len > buffer->len) | |
2370 | return NULL; | |
2371 | return buffer->ptr; | |
2372 | } | |
2373 | ||
2374 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
2375 | unsigned len) | |
2376 | { | |
2377 | void *ret; | |
2378 | ||
2379 | ret = pv_mmu_peek_buffer(buffer, len); | |
2380 | if (!ret) | |
2381 | return ret; | |
2382 | buffer->ptr += len; | |
2383 | buffer->len -= len; | |
2384 | buffer->processed += len; | |
2385 | return ret; | |
2386 | } | |
2387 | ||
2388 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
2389 | gpa_t addr, gpa_t value) | |
2390 | { | |
2391 | int bytes = 8; | |
2392 | int r; | |
2393 | ||
2394 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
2395 | bytes = 4; | |
2396 | ||
2397 | r = mmu_topup_memory_caches(vcpu); | |
2398 | if (r) | |
2399 | return r; | |
2400 | ||
3200f405 | 2401 | if (!emulator_write_phys(vcpu, addr, &value, bytes)) |
2f333bcb MT |
2402 | return -EFAULT; |
2403 | ||
2404 | return 1; | |
2405 | } | |
2406 | ||
2407 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
2408 | { | |
2409 | kvm_x86_ops->tlb_flush(vcpu); | |
2410 | return 1; | |
2411 | } | |
2412 | ||
2413 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
2414 | { | |
2415 | spin_lock(&vcpu->kvm->mmu_lock); | |
2416 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
2417 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2418 | return 1; | |
2419 | } | |
2420 | ||
2421 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
2422 | struct kvm_pv_mmu_op_buffer *buffer) | |
2423 | { | |
2424 | struct kvm_mmu_op_header *header; | |
2425 | ||
2426 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
2427 | if (!header) | |
2428 | return 0; | |
2429 | switch (header->op) { | |
2430 | case KVM_MMU_OP_WRITE_PTE: { | |
2431 | struct kvm_mmu_op_write_pte *wpte; | |
2432 | ||
2433 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
2434 | if (!wpte) | |
2435 | return 0; | |
2436 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
2437 | wpte->pte_val); | |
2438 | } | |
2439 | case KVM_MMU_OP_FLUSH_TLB: { | |
2440 | struct kvm_mmu_op_flush_tlb *ftlb; | |
2441 | ||
2442 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
2443 | if (!ftlb) | |
2444 | return 0; | |
2445 | return kvm_pv_mmu_flush_tlb(vcpu); | |
2446 | } | |
2447 | case KVM_MMU_OP_RELEASE_PT: { | |
2448 | struct kvm_mmu_op_release_pt *rpt; | |
2449 | ||
2450 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
2451 | if (!rpt) | |
2452 | return 0; | |
2453 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
2454 | } | |
2455 | default: return 0; | |
2456 | } | |
2457 | } | |
2458 | ||
2459 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
2460 | gpa_t addr, unsigned long *ret) | |
2461 | { | |
2462 | int r; | |
6ad18fba | 2463 | struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer; |
2f333bcb | 2464 | |
6ad18fba DH |
2465 | buffer->ptr = buffer->buf; |
2466 | buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf); | |
2467 | buffer->processed = 0; | |
2f333bcb | 2468 | |
6ad18fba | 2469 | r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len); |
2f333bcb MT |
2470 | if (r) |
2471 | goto out; | |
2472 | ||
6ad18fba DH |
2473 | while (buffer->len) { |
2474 | r = kvm_pv_mmu_op_one(vcpu, buffer); | |
2f333bcb MT |
2475 | if (r < 0) |
2476 | goto out; | |
2477 | if (r == 0) | |
2478 | break; | |
2479 | } | |
2480 | ||
2481 | r = 1; | |
2482 | out: | |
6ad18fba | 2483 | *ret = buffer->processed; |
2f333bcb MT |
2484 | return r; |
2485 | } | |
2486 | ||
37a7d8b0 AK |
2487 | #ifdef AUDIT |
2488 | ||
2489 | static const char *audit_msg; | |
2490 | ||
2491 | static gva_t canonicalize(gva_t gva) | |
2492 | { | |
2493 | #ifdef CONFIG_X86_64 | |
2494 | gva = (long long)(gva << 16) >> 16; | |
2495 | #endif | |
2496 | return gva; | |
2497 | } | |
2498 | ||
2499 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
2500 | gva_t va, int level) | |
2501 | { | |
2502 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
2503 | int i; | |
2504 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
2505 | ||
2506 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
2507 | u64 ent = pt[i]; | |
2508 | ||
c7addb90 | 2509 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
2510 | continue; |
2511 | ||
2512 | va = canonicalize(va); | |
c7addb90 AK |
2513 | if (level > 1) { |
2514 | if (ent == shadow_notrap_nonpresent_pte) | |
2515 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
2516 | " in nonleaf level: levels %d gva %lx" | |
2517 | " level %d pte %llx\n", audit_msg, | |
ad312c7c | 2518 | vcpu->arch.mmu.root_level, va, level, ent); |
c7addb90 | 2519 | |
37a7d8b0 | 2520 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 2521 | } else { |
ad312c7c | 2522 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
35149e21 | 2523 | hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT; |
37a7d8b0 | 2524 | |
c7addb90 | 2525 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 2526 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
2527 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
2528 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 2529 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
2530 | va, gpa, hpa, ent, |
2531 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
2532 | else if (ent == shadow_notrap_nonpresent_pte |
2533 | && !is_error_hpa(hpa)) | |
2534 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
2535 | " valid guest gva %lx\n", audit_msg, va); | |
35149e21 | 2536 | kvm_release_pfn_clean(pfn); |
c7addb90 | 2537 | |
37a7d8b0 AK |
2538 | } |
2539 | } | |
2540 | } | |
2541 | ||
2542 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
2543 | { | |
1ea252af | 2544 | unsigned i; |
37a7d8b0 | 2545 | |
ad312c7c ZX |
2546 | if (vcpu->arch.mmu.root_level == 4) |
2547 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
2548 | else |
2549 | for (i = 0; i < 4; ++i) | |
ad312c7c | 2550 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 2551 | audit_mappings_page(vcpu, |
ad312c7c | 2552 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
2553 | i << 30, |
2554 | 2); | |
2555 | } | |
2556 | ||
2557 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
2558 | { | |
2559 | int nmaps = 0; | |
2560 | int i, j, k; | |
2561 | ||
2562 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
2563 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
2564 | struct kvm_rmap_desc *d; | |
2565 | ||
2566 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 2567 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 2568 | |
290fc38d | 2569 | if (!*rmapp) |
37a7d8b0 | 2570 | continue; |
290fc38d | 2571 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
2572 | ++nmaps; |
2573 | continue; | |
2574 | } | |
290fc38d | 2575 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
2576 | while (d) { |
2577 | for (k = 0; k < RMAP_EXT; ++k) | |
2578 | if (d->shadow_ptes[k]) | |
2579 | ++nmaps; | |
2580 | else | |
2581 | break; | |
2582 | d = d->more; | |
2583 | } | |
2584 | } | |
2585 | } | |
2586 | return nmaps; | |
2587 | } | |
2588 | ||
2589 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
2590 | { | |
2591 | int nmaps = 0; | |
4db35314 | 2592 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
2593 | int i; |
2594 | ||
f05e70ac | 2595 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2596 | u64 *pt = sp->spt; |
37a7d8b0 | 2597 | |
4db35314 | 2598 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
2599 | continue; |
2600 | ||
2601 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
2602 | u64 ent = pt[i]; | |
2603 | ||
2604 | if (!(ent & PT_PRESENT_MASK)) | |
2605 | continue; | |
2606 | if (!(ent & PT_WRITABLE_MASK)) | |
2607 | continue; | |
2608 | ++nmaps; | |
2609 | } | |
2610 | } | |
2611 | return nmaps; | |
2612 | } | |
2613 | ||
2614 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
2615 | { | |
2616 | int n_rmap = count_rmaps(vcpu); | |
2617 | int n_actual = count_writable_mappings(vcpu); | |
2618 | ||
2619 | if (n_rmap != n_actual) | |
2620 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
b8688d51 | 2621 | __func__, audit_msg, n_rmap, n_actual); |
37a7d8b0 AK |
2622 | } |
2623 | ||
2624 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
2625 | { | |
4db35314 | 2626 | struct kvm_mmu_page *sp; |
290fc38d IE |
2627 | struct kvm_memory_slot *slot; |
2628 | unsigned long *rmapp; | |
2629 | gfn_t gfn; | |
37a7d8b0 | 2630 | |
f05e70ac | 2631 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2632 | if (sp->role.metaphysical) |
37a7d8b0 AK |
2633 | continue; |
2634 | ||
4db35314 AK |
2635 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
2636 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
2637 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
2638 | if (*rmapp) | |
37a7d8b0 AK |
2639 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
2640 | " mappings: gfn %lx role %x\n", | |
b8688d51 | 2641 | __func__, audit_msg, sp->gfn, |
4db35314 | 2642 | sp->role.word); |
37a7d8b0 AK |
2643 | } |
2644 | } | |
2645 | ||
2646 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
2647 | { | |
2648 | int olddbg = dbg; | |
2649 | ||
2650 | dbg = 0; | |
2651 | audit_msg = msg; | |
2652 | audit_rmap(vcpu); | |
2653 | audit_write_protection(vcpu); | |
2654 | audit_mappings(vcpu); | |
2655 | dbg = olddbg; | |
2656 | } | |
2657 | ||
2658 | #endif |