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CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
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33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
69static int dbg = 1;
70#endif
6aa8b732 71
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72#ifndef MMU_DEBUG
73#define ASSERT(x) do { } while (0)
74#else
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75#define ASSERT(x) \
76 if (!(x)) { \
77 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
78 __FILE__, __LINE__, #x); \
79 }
d6c69ee9 80#endif
6aa8b732 81
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82#define PT64_PT_BITS 9
83#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
84#define PT32_PT_BITS 10
85#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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86
87#define PT_WRITABLE_SHIFT 1
88
89#define PT_PRESENT_MASK (1ULL << 0)
90#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
91#define PT_USER_MASK (1ULL << 2)
92#define PT_PWT_MASK (1ULL << 3)
93#define PT_PCD_MASK (1ULL << 4)
94#define PT_ACCESSED_MASK (1ULL << 5)
95#define PT_DIRTY_MASK (1ULL << 6)
96#define PT_PAGE_SIZE_MASK (1ULL << 7)
97#define PT_PAT_MASK (1ULL << 7)
98#define PT_GLOBAL_MASK (1ULL << 8)
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99#define PT64_NX_SHIFT 63
100#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
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101
102#define PT_PAT_SHIFT 7
103#define PT_DIR_PAT_SHIFT 12
104#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
105
106#define PT32_DIR_PSE36_SIZE 4
107#define PT32_DIR_PSE36_SHIFT 13
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108#define PT32_DIR_PSE36_MASK \
109 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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110
111
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112#define PT_FIRST_AVAIL_BITS_SHIFT 9
113#define PT64_SECOND_AVAIL_BITS_SHIFT 52
114
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115#define VALID_PAGE(x) ((x) != INVALID_PAGE)
116
117#define PT64_LEVEL_BITS 9
118
119#define PT64_LEVEL_SHIFT(level) \
d77c26fc 120 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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121
122#define PT64_LEVEL_MASK(level) \
123 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
124
125#define PT64_INDEX(address, level)\
126 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
127
128
129#define PT32_LEVEL_BITS 10
130
131#define PT32_LEVEL_SHIFT(level) \
d77c26fc 132 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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133
134#define PT32_LEVEL_MASK(level) \
135 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
136
137#define PT32_INDEX(address, level)\
138 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
139
140
27aba766 141#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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142#define PT64_DIR_BASE_ADDR_MASK \
143 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
144
145#define PT32_BASE_ADDR_MASK PAGE_MASK
146#define PT32_DIR_BASE_ADDR_MASK \
147 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
148
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149#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
150 | PT64_NX_MASK)
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151
152#define PFERR_PRESENT_MASK (1U << 0)
153#define PFERR_WRITE_MASK (1U << 1)
154#define PFERR_USER_MASK (1U << 2)
73b1087e 155#define PFERR_FETCH_MASK (1U << 4)
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156
157#define PT64_ROOT_LEVEL 4
158#define PT32_ROOT_LEVEL 2
159#define PT32E_ROOT_LEVEL 3
160
161#define PT_DIRECTORY_LEVEL 2
162#define PT_PAGE_TABLE_LEVEL 1
163
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164#define RMAP_EXT 4
165
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166#define ACC_EXEC_MASK 1
167#define ACC_WRITE_MASK PT_WRITABLE_MASK
168#define ACC_USER_MASK PT_USER_MASK
169#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
170
2f333bcb
MT
171struct kvm_pv_mmu_op_buffer {
172 void *ptr;
173 unsigned len;
174 unsigned processed;
175 char buf[512] __aligned(sizeof(long));
176};
177
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178struct kvm_rmap_desc {
179 u64 *shadow_ptes[RMAP_EXT];
180 struct kvm_rmap_desc *more;
181};
182
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183static struct kmem_cache *pte_chain_cache;
184static struct kmem_cache *rmap_desc_cache;
d3d25b04 185static struct kmem_cache *mmu_page_header_cache;
b5a33a75 186
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187static u64 __read_mostly shadow_trap_nonpresent_pte;
188static u64 __read_mostly shadow_notrap_nonpresent_pte;
189
190void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
191{
192 shadow_trap_nonpresent_pte = trap_pte;
193 shadow_notrap_nonpresent_pte = notrap_pte;
194}
195EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
196
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197static int is_write_protection(struct kvm_vcpu *vcpu)
198{
ad312c7c 199 return vcpu->arch.cr0 & X86_CR0_WP;
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200}
201
202static int is_cpuid_PSE36(void)
203{
204 return 1;
205}
206
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207static int is_nx(struct kvm_vcpu *vcpu)
208{
ad312c7c 209 return vcpu->arch.shadow_efer & EFER_NX;
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210}
211
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212static int is_present_pte(unsigned long pte)
213{
214 return pte & PT_PRESENT_MASK;
215}
216
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217static int is_shadow_present_pte(u64 pte)
218{
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219 return pte != shadow_trap_nonpresent_pte
220 && pte != shadow_notrap_nonpresent_pte;
221}
222
05da4558
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223static int is_large_pte(u64 pte)
224{
225 return pte & PT_PAGE_SIZE_MASK;
226}
227
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228static int is_writeble_pte(unsigned long pte)
229{
230 return pte & PT_WRITABLE_MASK;
231}
232
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233static int is_dirty_pte(unsigned long pte)
234{
235 return pte & PT_DIRTY_MASK;
236}
237
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238static int is_rmap_pte(u64 pte)
239{
4b1a80fa 240 return is_shadow_present_pte(pte);
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241}
242
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243static struct page *spte_to_page(u64 pte)
244{
245 hfn_t hfn = (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
246
247 return pfn_to_page(hfn);
248}
249
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250static gfn_t pse36_gfn_delta(u32 gpte)
251{
252 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
253
254 return (gpte & PT32_DIR_PSE36_MASK) << shift;
255}
256
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257static void set_shadow_pte(u64 *sptep, u64 spte)
258{
259#ifdef CONFIG_X86_64
260 set_64bit((unsigned long *)sptep, spte);
261#else
262 set_64bit((unsigned long long *)sptep, spte);
263#endif
264}
265
e2dec939 266static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 267 struct kmem_cache *base_cache, int min)
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268{
269 void *obj;
270
271 if (cache->nobjs >= min)
e2dec939 272 return 0;
714b93da 273 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 274 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 275 if (!obj)
e2dec939 276 return -ENOMEM;
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277 cache->objects[cache->nobjs++] = obj;
278 }
e2dec939 279 return 0;
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280}
281
282static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
283{
284 while (mc->nobjs)
285 kfree(mc->objects[--mc->nobjs]);
286}
287
c1158e63 288static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 289 int min)
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290{
291 struct page *page;
292
293 if (cache->nobjs >= min)
294 return 0;
295 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 296 page = alloc_page(GFP_KERNEL);
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297 if (!page)
298 return -ENOMEM;
299 set_page_private(page, 0);
300 cache->objects[cache->nobjs++] = page_address(page);
301 }
302 return 0;
303}
304
305static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
306{
307 while (mc->nobjs)
c4d198d5 308 free_page((unsigned long)mc->objects[--mc->nobjs]);
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309}
310
2e3e5882 311static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 312{
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313 int r;
314
ad312c7c 315 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 316 pte_chain_cache, 4);
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317 if (r)
318 goto out;
ad312c7c 319 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 320 rmap_desc_cache, 1);
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321 if (r)
322 goto out;
ad312c7c 323 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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324 if (r)
325 goto out;
ad312c7c 326 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 327 mmu_page_header_cache, 4);
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328out:
329 return r;
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330}
331
332static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
333{
ad312c7c
ZX
334 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
335 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
336 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
337 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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338}
339
340static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
341 size_t size)
342{
343 void *p;
344
345 BUG_ON(!mc->nobjs);
346 p = mc->objects[--mc->nobjs];
347 memset(p, 0, size);
348 return p;
349}
350
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351static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
352{
ad312c7c 353 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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354 sizeof(struct kvm_pte_chain));
355}
356
90cb0529 357static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 358{
90cb0529 359 kfree(pc);
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360}
361
362static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
363{
ad312c7c 364 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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365 sizeof(struct kvm_rmap_desc));
366}
367
90cb0529 368static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 369{
90cb0529 370 kfree(rd);
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371}
372
05da4558
MT
373/*
374 * Return the pointer to the largepage write count for a given
375 * gfn, handling slots that are not large page aligned.
376 */
377static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
378{
379 unsigned long idx;
380
381 idx = (gfn / KVM_PAGES_PER_HPAGE) -
382 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
383 return &slot->lpage_info[idx].write_count;
384}
385
386static void account_shadowed(struct kvm *kvm, gfn_t gfn)
387{
388 int *write_count;
389
390 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
391 *write_count += 1;
392 WARN_ON(*write_count > KVM_PAGES_PER_HPAGE);
393}
394
395static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396{
397 int *write_count;
398
399 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
400 *write_count -= 1;
401 WARN_ON(*write_count < 0);
402}
403
404static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
405{
406 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
407 int *largepage_idx;
408
409 if (slot) {
410 largepage_idx = slot_largepage_idx(gfn, slot);
411 return *largepage_idx;
412 }
413
414 return 1;
415}
416
417static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
418{
419 struct vm_area_struct *vma;
420 unsigned long addr;
421
422 addr = gfn_to_hva(kvm, gfn);
423 if (kvm_is_error_hva(addr))
424 return 0;
425
426 vma = find_vma(current->mm, addr);
427 if (vma && is_vm_hugetlb_page(vma))
428 return 1;
429
430 return 0;
431}
432
433static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
434{
435 struct kvm_memory_slot *slot;
436
437 if (has_wrprotected_page(vcpu->kvm, large_gfn))
438 return 0;
439
440 if (!host_largepage_backed(vcpu->kvm, large_gfn))
441 return 0;
442
443 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
444 if (slot && slot->dirty_bitmap)
445 return 0;
446
447 return 1;
448}
449
290fc38d
IE
450/*
451 * Take gfn and return the reverse mapping to it.
452 * Note: gfn must be unaliased before this function get called
453 */
454
05da4558 455static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
456{
457 struct kvm_memory_slot *slot;
05da4558 458 unsigned long idx;
290fc38d
IE
459
460 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
461 if (!lpage)
462 return &slot->rmap[gfn - slot->base_gfn];
463
464 idx = (gfn / KVM_PAGES_PER_HPAGE) -
465 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
466
467 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
468}
469
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470/*
471 * Reverse mapping data structures:
472 *
290fc38d
IE
473 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
474 * that points to page_address(page).
cd4a4e53 475 *
290fc38d
IE
476 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
477 * containing more mappings.
cd4a4e53 478 */
05da4558 479static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 480{
4db35314 481 struct kvm_mmu_page *sp;
cd4a4e53 482 struct kvm_rmap_desc *desc;
290fc38d 483 unsigned long *rmapp;
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484 int i;
485
486 if (!is_rmap_pte(*spte))
487 return;
290fc38d 488 gfn = unalias_gfn(vcpu->kvm, gfn);
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489 sp = page_header(__pa(spte));
490 sp->gfns[spte - sp->spt] = gfn;
05da4558 491 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 492 if (!*rmapp) {
cd4a4e53 493 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
494 *rmapp = (unsigned long)spte;
495 } else if (!(*rmapp & 1)) {
cd4a4e53 496 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 497 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 498 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 499 desc->shadow_ptes[1] = spte;
290fc38d 500 *rmapp = (unsigned long)desc | 1;
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501 } else {
502 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 503 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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504 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
505 desc = desc->more;
506 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 507 desc->more = mmu_alloc_rmap_desc(vcpu);
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508 desc = desc->more;
509 }
510 for (i = 0; desc->shadow_ptes[i]; ++i)
511 ;
512 desc->shadow_ptes[i] = spte;
513 }
514}
515
290fc38d 516static void rmap_desc_remove_entry(unsigned long *rmapp,
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517 struct kvm_rmap_desc *desc,
518 int i,
519 struct kvm_rmap_desc *prev_desc)
520{
521 int j;
522
523 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
524 ;
525 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 526 desc->shadow_ptes[j] = NULL;
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527 if (j != 0)
528 return;
529 if (!prev_desc && !desc->more)
290fc38d 530 *rmapp = (unsigned long)desc->shadow_ptes[0];
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531 else
532 if (prev_desc)
533 prev_desc->more = desc->more;
534 else
290fc38d 535 *rmapp = (unsigned long)desc->more | 1;
90cb0529 536 mmu_free_rmap_desc(desc);
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537}
538
290fc38d 539static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 540{
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541 struct kvm_rmap_desc *desc;
542 struct kvm_rmap_desc *prev_desc;
4db35314 543 struct kvm_mmu_page *sp;
76c35c6e 544 struct page *page;
290fc38d 545 unsigned long *rmapp;
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546 int i;
547
548 if (!is_rmap_pte(*spte))
549 return;
4db35314 550 sp = page_header(__pa(spte));
0b49ea86 551 page = spte_to_page(*spte);
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552 if (*spte & PT_ACCESSED_MASK)
553 mark_page_accessed(page);
b4231d61 554 if (is_writeble_pte(*spte))
76c35c6e 555 kvm_release_page_dirty(page);
b4231d61 556 else
76c35c6e 557 kvm_release_page_clean(page);
05da4558 558 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 559 if (!*rmapp) {
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560 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
561 BUG();
290fc38d 562 } else if (!(*rmapp & 1)) {
cd4a4e53 563 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 564 if ((u64 *)*rmapp != spte) {
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565 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
566 spte, *spte);
567 BUG();
568 }
290fc38d 569 *rmapp = 0;
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570 } else {
571 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 572 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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573 prev_desc = NULL;
574 while (desc) {
575 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
576 if (desc->shadow_ptes[i] == spte) {
290fc38d 577 rmap_desc_remove_entry(rmapp,
714b93da 578 desc, i,
cd4a4e53
AK
579 prev_desc);
580 return;
581 }
582 prev_desc = desc;
583 desc = desc->more;
584 }
585 BUG();
586 }
587}
588
98348e95 589static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 590{
374cbac0 591 struct kvm_rmap_desc *desc;
98348e95
IE
592 struct kvm_rmap_desc *prev_desc;
593 u64 *prev_spte;
594 int i;
595
596 if (!*rmapp)
597 return NULL;
598 else if (!(*rmapp & 1)) {
599 if (!spte)
600 return (u64 *)*rmapp;
601 return NULL;
602 }
603 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
604 prev_desc = NULL;
605 prev_spte = NULL;
606 while (desc) {
607 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
608 if (prev_spte == spte)
609 return desc->shadow_ptes[i];
610 prev_spte = desc->shadow_ptes[i];
611 }
612 desc = desc->more;
613 }
614 return NULL;
615}
616
617static void rmap_write_protect(struct kvm *kvm, u64 gfn)
618{
290fc38d 619 unsigned long *rmapp;
374cbac0 620 u64 *spte;
caa5b8a5 621 int write_protected = 0;
374cbac0 622
4a4c9924 623 gfn = unalias_gfn(kvm, gfn);
05da4558 624 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 625
98348e95
IE
626 spte = rmap_next(kvm, rmapp, NULL);
627 while (spte) {
374cbac0 628 BUG_ON(!spte);
374cbac0 629 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 630 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 631 if (is_writeble_pte(*spte)) {
9647c14c 632 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
633 write_protected = 1;
634 }
9647c14c 635 spte = rmap_next(kvm, rmapp, spte);
374cbac0 636 }
855149aa
IE
637 if (write_protected) {
638 struct page *page;
639
640 spte = rmap_next(kvm, rmapp, NULL);
0b49ea86 641 page = spte_to_page(*spte);
855149aa
IE
642 SetPageDirty(page);
643 }
644
05da4558
MT
645 /* check for huge page mappings */
646 rmapp = gfn_to_rmap(kvm, gfn, 1);
647 spte = rmap_next(kvm, rmapp, NULL);
648 while (spte) {
649 BUG_ON(!spte);
650 BUG_ON(!(*spte & PT_PRESENT_MASK));
651 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
652 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
653 if (is_writeble_pte(*spte)) {
654 rmap_remove(kvm, spte);
655 --kvm->stat.lpages;
656 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
657 write_protected = 1;
658 }
659 spte = rmap_next(kvm, rmapp, spte);
660 }
661
caa5b8a5
ED
662 if (write_protected)
663 kvm_flush_remote_tlbs(kvm);
05da4558
MT
664
665 account_shadowed(kvm, gfn);
374cbac0
AK
666}
667
d6c69ee9 668#ifdef MMU_DEBUG
47ad8e68 669static int is_empty_shadow_page(u64 *spt)
6aa8b732 670{
139bdb2d
AK
671 u64 *pos;
672 u64 *end;
673
47ad8e68 674 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
d196e343 675 if (*pos != shadow_trap_nonpresent_pte) {
b8688d51 676 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 677 pos, *pos);
6aa8b732 678 return 0;
139bdb2d 679 }
6aa8b732
AK
680 return 1;
681}
d6c69ee9 682#endif
6aa8b732 683
4db35314 684static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 685{
4db35314
AK
686 ASSERT(is_empty_shadow_page(sp->spt));
687 list_del(&sp->link);
688 __free_page(virt_to_page(sp->spt));
689 __free_page(virt_to_page(sp->gfns));
690 kfree(sp);
f05e70ac 691 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
692}
693
cea0f0e7
AK
694static unsigned kvm_page_table_hashfn(gfn_t gfn)
695{
1ae0a13d 696 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
697}
698
25c0de2c
AK
699static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
700 u64 *parent_pte)
6aa8b732 701{
4db35314 702 struct kvm_mmu_page *sp;
6aa8b732 703
ad312c7c
ZX
704 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
705 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
706 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 707 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 708 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
709 ASSERT(is_empty_shadow_page(sp->spt));
710 sp->slot_bitmap = 0;
711 sp->multimapped = 0;
712 sp->parent_pte = parent_pte;
f05e70ac 713 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 714 return sp;
6aa8b732
AK
715}
716
714b93da 717static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 718 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
719{
720 struct kvm_pte_chain *pte_chain;
721 struct hlist_node *node;
722 int i;
723
724 if (!parent_pte)
725 return;
4db35314
AK
726 if (!sp->multimapped) {
727 u64 *old = sp->parent_pte;
cea0f0e7
AK
728
729 if (!old) {
4db35314 730 sp->parent_pte = parent_pte;
cea0f0e7
AK
731 return;
732 }
4db35314 733 sp->multimapped = 1;
714b93da 734 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
735 INIT_HLIST_HEAD(&sp->parent_ptes);
736 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
737 pte_chain->parent_ptes[0] = old;
738 }
4db35314 739 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
740 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
741 continue;
742 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
743 if (!pte_chain->parent_ptes[i]) {
744 pte_chain->parent_ptes[i] = parent_pte;
745 return;
746 }
747 }
714b93da 748 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 749 BUG_ON(!pte_chain);
4db35314 750 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
751 pte_chain->parent_ptes[0] = parent_pte;
752}
753
4db35314 754static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
755 u64 *parent_pte)
756{
757 struct kvm_pte_chain *pte_chain;
758 struct hlist_node *node;
759 int i;
760
4db35314
AK
761 if (!sp->multimapped) {
762 BUG_ON(sp->parent_pte != parent_pte);
763 sp->parent_pte = NULL;
cea0f0e7
AK
764 return;
765 }
4db35314 766 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
767 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
768 if (!pte_chain->parent_ptes[i])
769 break;
770 if (pte_chain->parent_ptes[i] != parent_pte)
771 continue;
697fe2e2
AK
772 while (i + 1 < NR_PTE_CHAIN_ENTRIES
773 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
774 pte_chain->parent_ptes[i]
775 = pte_chain->parent_ptes[i + 1];
776 ++i;
777 }
778 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
779 if (i == 0) {
780 hlist_del(&pte_chain->link);
90cb0529 781 mmu_free_pte_chain(pte_chain);
4db35314
AK
782 if (hlist_empty(&sp->parent_ptes)) {
783 sp->multimapped = 0;
784 sp->parent_pte = NULL;
697fe2e2
AK
785 }
786 }
cea0f0e7
AK
787 return;
788 }
789 BUG();
790}
791
4db35314 792static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
793{
794 unsigned index;
795 struct hlist_head *bucket;
4db35314 796 struct kvm_mmu_page *sp;
cea0f0e7
AK
797 struct hlist_node *node;
798
b8688d51 799 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 800 index = kvm_page_table_hashfn(gfn);
f05e70ac 801 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 802 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
803 if (sp->gfn == gfn && !sp->role.metaphysical
804 && !sp->role.invalid) {
cea0f0e7 805 pgprintk("%s: found role %x\n",
b8688d51 806 __func__, sp->role.word);
4db35314 807 return sp;
cea0f0e7
AK
808 }
809 return NULL;
810}
811
812static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
813 gfn_t gfn,
814 gva_t gaddr,
815 unsigned level,
816 int metaphysical,
41074d07 817 unsigned access,
f7d9c7b7 818 u64 *parent_pte)
cea0f0e7
AK
819{
820 union kvm_mmu_page_role role;
821 unsigned index;
822 unsigned quadrant;
823 struct hlist_head *bucket;
4db35314 824 struct kvm_mmu_page *sp;
cea0f0e7
AK
825 struct hlist_node *node;
826
827 role.word = 0;
ad312c7c 828 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
829 role.level = level;
830 role.metaphysical = metaphysical;
41074d07 831 role.access = access;
ad312c7c 832 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
833 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
834 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
835 role.quadrant = quadrant;
836 }
b8688d51 837 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 838 gfn, role.word);
1ae0a13d 839 index = kvm_page_table_hashfn(gfn);
f05e70ac 840 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
841 hlist_for_each_entry(sp, node, bucket, hash_link)
842 if (sp->gfn == gfn && sp->role.word == role.word) {
843 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
b8688d51 844 pgprintk("%s: found\n", __func__);
4db35314 845 return sp;
cea0f0e7 846 }
dfc5aa00 847 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
848 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
849 if (!sp)
850 return sp;
b8688d51 851 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
852 sp->gfn = gfn;
853 sp->role = role;
854 hlist_add_head(&sp->hash_link, bucket);
374cbac0 855 if (!metaphysical)
4a4c9924 856 rmap_write_protect(vcpu->kvm, gfn);
bed1d1df 857 vcpu->arch.mmu.prefetch_page(vcpu, sp);
4db35314 858 return sp;
cea0f0e7
AK
859}
860
90cb0529 861static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 862 struct kvm_mmu_page *sp)
a436036b 863{
697fe2e2
AK
864 unsigned i;
865 u64 *pt;
866 u64 ent;
867
4db35314 868 pt = sp->spt;
697fe2e2 869
4db35314 870 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 871 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 872 if (is_shadow_present_pte(pt[i]))
290fc38d 873 rmap_remove(kvm, &pt[i]);
c7addb90 874 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 875 }
90cb0529 876 kvm_flush_remote_tlbs(kvm);
697fe2e2
AK
877 return;
878 }
879
880 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
881 ent = pt[i];
882
05da4558
MT
883 if (is_shadow_present_pte(ent)) {
884 if (!is_large_pte(ent)) {
885 ent &= PT64_BASE_ADDR_MASK;
886 mmu_page_remove_parent_pte(page_header(ent),
887 &pt[i]);
888 } else {
889 --kvm->stat.lpages;
890 rmap_remove(kvm, &pt[i]);
891 }
892 }
c7addb90 893 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 894 }
90cb0529 895 kvm_flush_remote_tlbs(kvm);
a436036b
AK
896}
897
4db35314 898static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 899{
4db35314 900 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
901}
902
12b7d28f
AK
903static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
904{
905 int i;
906
907 for (i = 0; i < KVM_MAX_VCPUS; ++i)
908 if (kvm->vcpus[i])
ad312c7c 909 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
910}
911
4db35314 912static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
913{
914 u64 *parent_pte;
915
4cee5764 916 ++kvm->stat.mmu_shadow_zapped;
4db35314
AK
917 while (sp->multimapped || sp->parent_pte) {
918 if (!sp->multimapped)
919 parent_pte = sp->parent_pte;
a436036b
AK
920 else {
921 struct kvm_pte_chain *chain;
922
4db35314 923 chain = container_of(sp->parent_ptes.first,
a436036b
AK
924 struct kvm_pte_chain, link);
925 parent_pte = chain->parent_ptes[0];
926 }
697fe2e2 927 BUG_ON(!parent_pte);
4db35314 928 kvm_mmu_put_page(sp, parent_pte);
c7addb90 929 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 930 }
4db35314
AK
931 kvm_mmu_page_unlink_children(kvm, sp);
932 if (!sp->root_count) {
05da4558
MT
933 if (!sp->role.metaphysical)
934 unaccount_shadowed(kvm, sp->gfn);
4db35314
AK
935 hlist_del(&sp->hash_link);
936 kvm_mmu_free_page(kvm, sp);
2e53d63a 937 } else {
f05e70ac 938 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
939 sp->role.invalid = 1;
940 kvm_reload_remote_mmus(kvm);
941 }
12b7d28f 942 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
943}
944
82ce2c96
IE
945/*
946 * Changing the number of mmu pages allocated to the vm
947 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
948 */
949void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
950{
951 /*
952 * If we set the number of mmu pages to be smaller be than the
953 * number of actived pages , we must to free some mmu pages before we
954 * change the value
955 */
956
f05e70ac 957 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 958 kvm_nr_mmu_pages) {
f05e70ac
ZX
959 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
960 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
961
962 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
963 struct kvm_mmu_page *page;
964
f05e70ac 965 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
966 struct kvm_mmu_page, link);
967 kvm_mmu_zap_page(kvm, page);
968 n_used_mmu_pages--;
969 }
f05e70ac 970 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
971 }
972 else
f05e70ac
ZX
973 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
974 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 975
f05e70ac 976 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
977}
978
f67a46f4 979static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
980{
981 unsigned index;
982 struct hlist_head *bucket;
4db35314 983 struct kvm_mmu_page *sp;
a436036b
AK
984 struct hlist_node *node, *n;
985 int r;
986
b8688d51 987 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 988 r = 0;
1ae0a13d 989 index = kvm_page_table_hashfn(gfn);
f05e70ac 990 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
991 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
992 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 993 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314
AK
994 sp->role.word);
995 kvm_mmu_zap_page(kvm, sp);
a436036b
AK
996 r = 1;
997 }
998 return r;
cea0f0e7
AK
999}
1000
f67a46f4 1001static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1002{
4db35314 1003 struct kvm_mmu_page *sp;
97a0a01e 1004
4db35314 1005 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1006 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1007 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1008 }
1009}
1010
38c335f1 1011static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1012{
38c335f1 1013 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1014 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1015
4db35314 1016 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1017}
1018
039576c0
AK
1019struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1020{
72dc67a6
IE
1021 struct page *page;
1022
ad312c7c 1023 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1024
1025 if (gpa == UNMAPPED_GVA)
1026 return NULL;
72dc67a6
IE
1027
1028 down_read(&current->mm->mmap_sem);
1029 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1030 up_read(&current->mm->mmap_sem);
1031
1032 return page;
039576c0
AK
1033}
1034
1c4f1fd6
AK
1035static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1036 unsigned pt_access, unsigned pte_access,
1037 int user_fault, int write_fault, int dirty,
05da4558 1038 int *ptwrite, int largepage, gfn_t gfn,
947da538 1039 struct page *page, bool speculative)
1c4f1fd6
AK
1040{
1041 u64 spte;
15aaa819 1042 int was_rmapped = 0;
75e68e60 1043 int was_writeble = is_writeble_pte(*shadow_pte);
1c4f1fd6 1044
bc750ba8 1045 pgprintk("%s: spte %llx access %x write_fault %d"
1c4f1fd6 1046 " user_fault %d gfn %lx\n",
b8688d51 1047 __func__, *shadow_pte, pt_access,
1c4f1fd6
AK
1048 write_fault, user_fault, gfn);
1049
15aaa819 1050 if (is_rmap_pte(*shadow_pte)) {
05da4558
MT
1051 /*
1052 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1053 * the parent of the now unreachable PTE.
1054 */
1055 if (largepage && !is_large_pte(*shadow_pte)) {
1056 struct kvm_mmu_page *child;
1057 u64 pte = *shadow_pte;
1058
1059 child = page_header(pte & PT64_BASE_ADDR_MASK);
1060 mmu_page_remove_parent_pte(child, shadow_pte);
0b49ea86 1061 } else if (page != spte_to_page(*shadow_pte)) {
15aaa819 1062 pgprintk("hfn old %lx new %lx\n",
0b49ea86
AK
1063 page_to_pfn(spte_to_page(*shadow_pte)),
1064 page_to_pfn(page));
15aaa819 1065 rmap_remove(vcpu->kvm, shadow_pte);
05da4558
MT
1066 } else {
1067 if (largepage)
1068 was_rmapped = is_large_pte(*shadow_pte);
1069 else
1070 was_rmapped = 1;
15aaa819 1071 }
15aaa819
MT
1072 }
1073
1c4f1fd6
AK
1074 /*
1075 * We don't set the accessed bit, since we sometimes want to see
1076 * whether the guest actually used the pte (in order to detect
1077 * demand paging).
1078 */
1079 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
947da538
AK
1080 if (!speculative)
1081 pte_access |= PT_ACCESSED_MASK;
1c4f1fd6
AK
1082 if (!dirty)
1083 pte_access &= ~ACC_WRITE_MASK;
1084 if (!(pte_access & ACC_EXEC_MASK))
1085 spte |= PT64_NX_MASK;
1086
1c4f1fd6
AK
1087 spte |= PT_PRESENT_MASK;
1088 if (pte_access & ACC_USER_MASK)
1089 spte |= PT_USER_MASK;
05da4558
MT
1090 if (largepage)
1091 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1092
1c4f1fd6
AK
1093 spte |= page_to_phys(page);
1094
1095 if ((pte_access & ACC_WRITE_MASK)
1096 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1097 struct kvm_mmu_page *shadow;
1098
1099 spte |= PT_WRITABLE_MASK;
1100 if (user_fault) {
1101 mmu_unshadow(vcpu->kvm, gfn);
1102 goto unshadowed;
1103 }
1104
1105 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
05da4558
MT
1106 if (shadow ||
1107 (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
1c4f1fd6 1108 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1109 __func__, gfn);
1c4f1fd6
AK
1110 pte_access &= ~ACC_WRITE_MASK;
1111 if (is_writeble_pte(spte)) {
1112 spte &= ~PT_WRITABLE_MASK;
1113 kvm_x86_ops->tlb_flush(vcpu);
1114 }
1115 if (write_fault)
1116 *ptwrite = 1;
1117 }
1118 }
1119
1120unshadowed:
1121
1122 if (pte_access & ACC_WRITE_MASK)
1123 mark_page_dirty(vcpu->kvm, gfn);
1124
b8688d51 1125 pgprintk("%s: setting spte %llx\n", __func__, spte);
05da4558
MT
1126 pgprintk("instantiating %s PTE (%s) at %d (%llx) addr %llx\n",
1127 (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
1128 (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
1c4f1fd6 1129 set_shadow_pte(shadow_pte, spte);
05da4558
MT
1130 if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
1131 && (spte & PT_PRESENT_MASK))
1132 ++vcpu->kvm->stat.lpages;
1133
1c4f1fd6
AK
1134 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1135 if (!was_rmapped) {
05da4558 1136 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6
AK
1137 if (!is_rmap_pte(*shadow_pte))
1138 kvm_release_page_clean(page);
75e68e60
IE
1139 } else {
1140 if (was_writeble)
1141 kvm_release_page_dirty(page);
1142 else
1143 kvm_release_page_clean(page);
1c4f1fd6 1144 }
1c4f1fd6 1145 if (!ptwrite || !*ptwrite)
ad312c7c 1146 vcpu->arch.last_pte_updated = shadow_pte;
1c4f1fd6
AK
1147}
1148
6aa8b732
AK
1149static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1150{
1151}
1152
4d9976bb 1153static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
05da4558
MT
1154 int largepage, gfn_t gfn, struct page *page,
1155 int level)
6aa8b732 1156{
ad312c7c 1157 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
e833240f 1158 int pt_write = 0;
6aa8b732
AK
1159
1160 for (; ; level--) {
1161 u32 index = PT64_INDEX(v, level);
1162 u64 *table;
1163
1164 ASSERT(VALID_PAGE(table_addr));
1165 table = __va(table_addr);
1166
1167 if (level == 1) {
e833240f 1168 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
947da538 1169 0, write, 1, &pt_write, 0, gfn, page, false);
05da4558
MT
1170 return pt_write;
1171 }
1172
1173 if (largepage && level == 2) {
1174 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
947da538 1175 0, write, 1, &pt_write, 1, gfn, page, false);
d196e343 1176 return pt_write;
6aa8b732
AK
1177 }
1178
c7addb90 1179 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 1180 struct kvm_mmu_page *new_table;
cea0f0e7 1181 gfn_t pseudo_gfn;
6aa8b732 1182
cea0f0e7
AK
1183 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1184 >> PAGE_SHIFT;
1185 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1186 v, level - 1,
f7d9c7b7 1187 1, ACC_ALL, &table[index]);
25c0de2c 1188 if (!new_table) {
6aa8b732 1189 pgprintk("nonpaging_map: ENOMEM\n");
d7824fff 1190 kvm_release_page_clean(page);
6aa8b732
AK
1191 return -ENOMEM;
1192 }
1193
47ad8e68 1194 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 1195 | PT_WRITABLE_MASK | PT_USER_MASK;
6aa8b732
AK
1196 }
1197 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1198 }
1199}
1200
10589a46
MT
1201static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1202{
1203 int r;
05da4558 1204 int largepage = 0;
10589a46 1205
aaee2c94
MT
1206 struct page *page;
1207
1208 down_read(&current->mm->mmap_sem);
05da4558
MT
1209 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1210 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1211 largepage = 1;
1212 }
1213
aaee2c94 1214 page = gfn_to_page(vcpu->kvm, gfn);
72dc67a6 1215 up_read(&current->mm->mmap_sem);
aaee2c94 1216
d196e343
AK
1217 /* mmio */
1218 if (is_error_page(page)) {
1219 kvm_release_page_clean(page);
d196e343
AK
1220 return 1;
1221 }
1222
aaee2c94 1223 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1224 kvm_mmu_free_some_pages(vcpu);
05da4558
MT
1225 r = __direct_map(vcpu, v, write, largepage, gfn, page,
1226 PT32E_ROOT_LEVEL);
aaee2c94
MT
1227 spin_unlock(&vcpu->kvm->mmu_lock);
1228
aaee2c94 1229
10589a46
MT
1230 return r;
1231}
1232
1233
c7addb90
AK
1234static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1235 struct kvm_mmu_page *sp)
1236{
1237 int i;
1238
1239 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1240 sp->spt[i] = shadow_trap_nonpresent_pte;
1241}
1242
17ac10ad
AK
1243static void mmu_free_roots(struct kvm_vcpu *vcpu)
1244{
1245 int i;
4db35314 1246 struct kvm_mmu_page *sp;
17ac10ad 1247
ad312c7c 1248 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1249 return;
aaee2c94 1250 spin_lock(&vcpu->kvm->mmu_lock);
17ac10ad 1251#ifdef CONFIG_X86_64
ad312c7c
ZX
1252 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1253 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1254
4db35314
AK
1255 sp = page_header(root);
1256 --sp->root_count;
2e53d63a
MT
1257 if (!sp->root_count && sp->role.invalid)
1258 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1259 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1260 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1261 return;
1262 }
1263#endif
1264 for (i = 0; i < 4; ++i) {
ad312c7c 1265 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1266
417726a3 1267 if (root) {
417726a3 1268 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1269 sp = page_header(root);
1270 --sp->root_count;
2e53d63a
MT
1271 if (!sp->root_count && sp->role.invalid)
1272 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1273 }
ad312c7c 1274 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1275 }
aaee2c94 1276 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1277 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1278}
1279
1280static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1281{
1282 int i;
cea0f0e7 1283 gfn_t root_gfn;
4db35314 1284 struct kvm_mmu_page *sp;
fb72d167 1285 int metaphysical = 0;
3bb65a22 1286
ad312c7c 1287 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad
AK
1288
1289#ifdef CONFIG_X86_64
ad312c7c
ZX
1290 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1291 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1292
1293 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1294 if (tdp_enabled)
1295 metaphysical = 1;
4db35314 1296 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1297 PT64_ROOT_LEVEL, metaphysical,
1298 ACC_ALL, NULL);
4db35314
AK
1299 root = __pa(sp->spt);
1300 ++sp->root_count;
ad312c7c 1301 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1302 return;
1303 }
1304#endif
fb72d167
JR
1305 metaphysical = !is_paging(vcpu);
1306 if (tdp_enabled)
1307 metaphysical = 1;
17ac10ad 1308 for (i = 0; i < 4; ++i) {
ad312c7c 1309 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1310
1311 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1312 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1313 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1314 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1315 continue;
1316 }
ad312c7c
ZX
1317 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1318 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1319 root_gfn = 0;
4db35314 1320 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1321 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1322 ACC_ALL, NULL);
4db35314
AK
1323 root = __pa(sp->spt);
1324 ++sp->root_count;
ad312c7c 1325 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1326 }
ad312c7c 1327 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1328}
1329
6aa8b732
AK
1330static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1331{
1332 return vaddr;
1333}
1334
1335static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1336 u32 error_code)
6aa8b732 1337{
e833240f 1338 gfn_t gfn;
e2dec939 1339 int r;
6aa8b732 1340
b8688d51 1341 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1342 r = mmu_topup_memory_caches(vcpu);
1343 if (r)
1344 return r;
714b93da 1345
6aa8b732 1346 ASSERT(vcpu);
ad312c7c 1347 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1348
e833240f 1349 gfn = gva >> PAGE_SHIFT;
6aa8b732 1350
e833240f
AK
1351 return nonpaging_map(vcpu, gva & PAGE_MASK,
1352 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1353}
1354
fb72d167
JR
1355static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1356 u32 error_code)
1357{
1358 struct page *page;
1359 int r;
05da4558
MT
1360 int largepage = 0;
1361 gfn_t gfn = gpa >> PAGE_SHIFT;
fb72d167
JR
1362
1363 ASSERT(vcpu);
1364 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1365
1366 r = mmu_topup_memory_caches(vcpu);
1367 if (r)
1368 return r;
1369
1370 down_read(&current->mm->mmap_sem);
05da4558
MT
1371 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1372 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1373 largepage = 1;
1374 }
1375 page = gfn_to_page(vcpu->kvm, gfn);
3200f405 1376 up_read(&current->mm->mmap_sem);
fb72d167
JR
1377 if (is_error_page(page)) {
1378 kvm_release_page_clean(page);
fb72d167
JR
1379 return 1;
1380 }
1381 spin_lock(&vcpu->kvm->mmu_lock);
1382 kvm_mmu_free_some_pages(vcpu);
1383 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
05da4558 1384 largepage, gfn, page, TDP_ROOT_LEVEL);
fb72d167 1385 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1386
1387 return r;
1388}
1389
6aa8b732
AK
1390static void nonpaging_free(struct kvm_vcpu *vcpu)
1391{
17ac10ad 1392 mmu_free_roots(vcpu);
6aa8b732
AK
1393}
1394
1395static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1396{
ad312c7c 1397 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1398
1399 context->new_cr3 = nonpaging_new_cr3;
1400 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1401 context->gva_to_gpa = nonpaging_gva_to_gpa;
1402 context->free = nonpaging_free;
c7addb90 1403 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1404 context->root_level = 0;
6aa8b732 1405 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1406 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1407 return 0;
1408}
1409
d835dfec 1410void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1411{
1165f5fe 1412 ++vcpu->stat.tlb_flush;
cbdd1bea 1413 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1414}
1415
1416static void paging_new_cr3(struct kvm_vcpu *vcpu)
1417{
b8688d51 1418 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1419 mmu_free_roots(vcpu);
6aa8b732
AK
1420}
1421
6aa8b732
AK
1422static void inject_page_fault(struct kvm_vcpu *vcpu,
1423 u64 addr,
1424 u32 err_code)
1425{
c3c91fee 1426 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1427}
1428
6aa8b732
AK
1429static void paging_free(struct kvm_vcpu *vcpu)
1430{
1431 nonpaging_free(vcpu);
1432}
1433
1434#define PTTYPE 64
1435#include "paging_tmpl.h"
1436#undef PTTYPE
1437
1438#define PTTYPE 32
1439#include "paging_tmpl.h"
1440#undef PTTYPE
1441
17ac10ad 1442static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1443{
ad312c7c 1444 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1445
1446 ASSERT(is_pae(vcpu));
1447 context->new_cr3 = paging_new_cr3;
1448 context->page_fault = paging64_page_fault;
6aa8b732 1449 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1450 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1451 context->free = paging_free;
17ac10ad
AK
1452 context->root_level = level;
1453 context->shadow_root_level = level;
17c3ba9d 1454 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1455 return 0;
1456}
1457
17ac10ad
AK
1458static int paging64_init_context(struct kvm_vcpu *vcpu)
1459{
1460 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1461}
1462
6aa8b732
AK
1463static int paging32_init_context(struct kvm_vcpu *vcpu)
1464{
ad312c7c 1465 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1466
1467 context->new_cr3 = paging_new_cr3;
1468 context->page_fault = paging32_page_fault;
6aa8b732
AK
1469 context->gva_to_gpa = paging32_gva_to_gpa;
1470 context->free = paging_free;
c7addb90 1471 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1472 context->root_level = PT32_ROOT_LEVEL;
1473 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1474 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1475 return 0;
1476}
1477
1478static int paging32E_init_context(struct kvm_vcpu *vcpu)
1479{
17ac10ad 1480 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1481}
1482
fb72d167
JR
1483static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1484{
1485 struct kvm_mmu *context = &vcpu->arch.mmu;
1486
1487 context->new_cr3 = nonpaging_new_cr3;
1488 context->page_fault = tdp_page_fault;
1489 context->free = nonpaging_free;
1490 context->prefetch_page = nonpaging_prefetch_page;
1491 context->shadow_root_level = TDP_ROOT_LEVEL;
1492 context->root_hpa = INVALID_PAGE;
1493
1494 if (!is_paging(vcpu)) {
1495 context->gva_to_gpa = nonpaging_gva_to_gpa;
1496 context->root_level = 0;
1497 } else if (is_long_mode(vcpu)) {
1498 context->gva_to_gpa = paging64_gva_to_gpa;
1499 context->root_level = PT64_ROOT_LEVEL;
1500 } else if (is_pae(vcpu)) {
1501 context->gva_to_gpa = paging64_gva_to_gpa;
1502 context->root_level = PT32E_ROOT_LEVEL;
1503 } else {
1504 context->gva_to_gpa = paging32_gva_to_gpa;
1505 context->root_level = PT32_ROOT_LEVEL;
1506 }
1507
1508 return 0;
1509}
1510
1511static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1512{
1513 ASSERT(vcpu);
ad312c7c 1514 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1515
1516 if (!is_paging(vcpu))
1517 return nonpaging_init_context(vcpu);
a9058ecd 1518 else if (is_long_mode(vcpu))
6aa8b732
AK
1519 return paging64_init_context(vcpu);
1520 else if (is_pae(vcpu))
1521 return paging32E_init_context(vcpu);
1522 else
1523 return paging32_init_context(vcpu);
1524}
1525
fb72d167
JR
1526static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1527{
1528 if (tdp_enabled)
1529 return init_kvm_tdp_mmu(vcpu);
1530 else
1531 return init_kvm_softmmu(vcpu);
1532}
1533
6aa8b732
AK
1534static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1535{
1536 ASSERT(vcpu);
ad312c7c
ZX
1537 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1538 vcpu->arch.mmu.free(vcpu);
1539 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1540 }
1541}
1542
1543int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1544{
1545 destroy_kvm_mmu(vcpu);
1546 return init_kvm_mmu(vcpu);
1547}
8668a3c4 1548EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1549
1550int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1551{
714b93da
AK
1552 int r;
1553
e2dec939 1554 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1555 if (r)
1556 goto out;
aaee2c94 1557 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1558 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1559 mmu_alloc_roots(vcpu);
aaee2c94 1560 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1561 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1562 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1563out:
1564 return r;
6aa8b732 1565}
17c3ba9d
AK
1566EXPORT_SYMBOL_GPL(kvm_mmu_load);
1567
1568void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1569{
1570 mmu_free_roots(vcpu);
1571}
6aa8b732 1572
09072daf 1573static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1574 struct kvm_mmu_page *sp,
ac1b714e
AK
1575 u64 *spte)
1576{
1577 u64 pte;
1578 struct kvm_mmu_page *child;
1579
1580 pte = *spte;
c7addb90 1581 if (is_shadow_present_pte(pte)) {
05da4558
MT
1582 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
1583 is_large_pte(pte))
290fc38d 1584 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1585 else {
1586 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1587 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1588 }
1589 }
c7addb90 1590 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
1591 if (is_large_pte(pte))
1592 --vcpu->kvm->stat.lpages;
ac1b714e
AK
1593}
1594
0028425f 1595static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1596 struct kvm_mmu_page *sp,
0028425f 1597 u64 *spte,
489f1d65 1598 const void *new)
0028425f 1599{
05da4558
MT
1600 if ((sp->role.level != PT_PAGE_TABLE_LEVEL)
1601 && !vcpu->arch.update_pte.largepage) {
4cee5764 1602 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1603 return;
4cee5764 1604 }
0028425f 1605
4cee5764 1606 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 1607 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 1608 paging32_update_pte(vcpu, sp, spte, new);
0028425f 1609 else
489f1d65 1610 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
1611}
1612
79539cec
AK
1613static bool need_remote_flush(u64 old, u64 new)
1614{
1615 if (!is_shadow_present_pte(old))
1616 return false;
1617 if (!is_shadow_present_pte(new))
1618 return true;
1619 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1620 return true;
1621 old ^= PT64_NX_MASK;
1622 new ^= PT64_NX_MASK;
1623 return (old & ~new & PT64_PERM_MASK) != 0;
1624}
1625
1626static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1627{
1628 if (need_remote_flush(old, new))
1629 kvm_flush_remote_tlbs(vcpu->kvm);
1630 else
1631 kvm_mmu_flush_tlb(vcpu);
1632}
1633
12b7d28f
AK
1634static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1635{
ad312c7c 1636 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f
AK
1637
1638 return !!(spte && (*spte & PT_ACCESSED_MASK));
1639}
1640
d7824fff
AK
1641static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1642 const u8 *new, int bytes)
1643{
1644 gfn_t gfn;
1645 int r;
1646 u64 gpte = 0;
72dc67a6 1647 struct page *page;
d7824fff 1648
05da4558
MT
1649 vcpu->arch.update_pte.largepage = 0;
1650
d7824fff
AK
1651 if (bytes != 4 && bytes != 8)
1652 return;
1653
1654 /*
1655 * Assume that the pte write on a page table of the same type
1656 * as the current vcpu paging mode. This is nearly always true
1657 * (might be false while changing modes). Note it is verified later
1658 * by update_pte().
1659 */
1660 if (is_pae(vcpu)) {
1661 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1662 if ((bytes == 4) && (gpa % 4 == 0)) {
1663 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1664 if (r)
1665 return;
1666 memcpy((void *)&gpte + (gpa % 8), new, 4);
1667 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1668 memcpy((void *)&gpte, new, 8);
1669 }
1670 } else {
1671 if ((bytes == 4) && (gpa % 4 == 0))
1672 memcpy((void *)&gpte, new, 4);
1673 }
1674 if (!is_present_pte(gpte))
1675 return;
1676 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 1677
05da4558
MT
1678 down_read(&current->mm->mmap_sem);
1679 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1680 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1681 vcpu->arch.update_pte.largepage = 1;
1682 }
72dc67a6 1683 page = gfn_to_page(vcpu->kvm, gfn);
05da4558 1684 up_read(&current->mm->mmap_sem);
72dc67a6 1685
d196e343
AK
1686 if (is_error_page(page)) {
1687 kvm_release_page_clean(page);
1688 return;
1689 }
d7824fff 1690 vcpu->arch.update_pte.gfn = gfn;
e48bb497 1691 vcpu->arch.update_pte.page = page;
d7824fff
AK
1692}
1693
09072daf 1694void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1695 const u8 *new, int bytes)
da4a00f0 1696{
9b7a0325 1697 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1698 struct kvm_mmu_page *sp;
0e7bc4b9 1699 struct hlist_node *node, *n;
9b7a0325
AK
1700 struct hlist_head *bucket;
1701 unsigned index;
489f1d65 1702 u64 entry, gentry;
9b7a0325 1703 u64 *spte;
9b7a0325 1704 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1705 unsigned pte_size;
9b7a0325 1706 unsigned page_offset;
0e7bc4b9 1707 unsigned misaligned;
fce0657f 1708 unsigned quadrant;
9b7a0325 1709 int level;
86a5ba02 1710 int flooded = 0;
ac1b714e 1711 int npte;
489f1d65 1712 int r;
9b7a0325 1713
b8688d51 1714 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 1715 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1716 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1717 kvm_mmu_free_some_pages(vcpu);
4cee5764 1718 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1719 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1720 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1721 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1722 ++vcpu->arch.last_pt_write_count;
1723 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1724 flooded = 1;
1725 } else {
ad312c7c
ZX
1726 vcpu->arch.last_pt_write_gfn = gfn;
1727 vcpu->arch.last_pt_write_count = 1;
1728 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1729 }
1ae0a13d 1730 index = kvm_page_table_hashfn(gfn);
f05e70ac 1731 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
1732 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1733 if (sp->gfn != gfn || sp->role.metaphysical)
9b7a0325 1734 continue;
4db35314 1735 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1736 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1737 misaligned |= bytes < 4;
86a5ba02 1738 if (misaligned || flooded) {
0e7bc4b9
AK
1739 /*
1740 * Misaligned accesses are too much trouble to fix
1741 * up; also, they usually indicate a page is not used
1742 * as a page table.
86a5ba02
AK
1743 *
1744 * If we're seeing too many writes to a page,
1745 * it may no longer be a page table, or we may be
1746 * forking, in which case it is better to unmap the
1747 * page.
0e7bc4b9
AK
1748 */
1749 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1750 gpa, bytes, sp->role.word);
1751 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1752 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1753 continue;
1754 }
9b7a0325 1755 page_offset = offset;
4db35314 1756 level = sp->role.level;
ac1b714e 1757 npte = 1;
4db35314 1758 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1759 page_offset <<= 1; /* 32->64 */
1760 /*
1761 * A 32-bit pde maps 4MB while the shadow pdes map
1762 * only 2MB. So we need to double the offset again
1763 * and zap two pdes instead of one.
1764 */
1765 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1766 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1767 page_offset <<= 1;
1768 npte = 2;
1769 }
fce0657f 1770 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1771 page_offset &= ~PAGE_MASK;
4db35314 1772 if (quadrant != sp->role.quadrant)
fce0657f 1773 continue;
9b7a0325 1774 }
4db35314 1775 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
1776 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1777 gentry = 0;
1778 r = kvm_read_guest_atomic(vcpu->kvm,
1779 gpa & ~(u64)(pte_size - 1),
1780 &gentry, pte_size);
1781 new = (const void *)&gentry;
1782 if (r < 0)
1783 new = NULL;
1784 }
ac1b714e 1785 while (npte--) {
79539cec 1786 entry = *spte;
4db35314 1787 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
1788 if (new)
1789 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 1790 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1791 ++spte;
9b7a0325 1792 }
9b7a0325 1793 }
c7addb90 1794 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 1795 spin_unlock(&vcpu->kvm->mmu_lock);
d7824fff
AK
1796 if (vcpu->arch.update_pte.page) {
1797 kvm_release_page_clean(vcpu->arch.update_pte.page);
1798 vcpu->arch.update_pte.page = NULL;
1799 }
da4a00f0
AK
1800}
1801
a436036b
AK
1802int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1803{
10589a46
MT
1804 gpa_t gpa;
1805 int r;
a436036b 1806
10589a46 1807 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 1808
aaee2c94 1809 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 1810 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 1811 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 1812 return r;
a436036b
AK
1813}
1814
22d95b12 1815void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 1816{
f05e70ac 1817 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1818 struct kvm_mmu_page *sp;
ebeace86 1819
f05e70ac 1820 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
1821 struct kvm_mmu_page, link);
1822 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1823 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1824 }
1825}
ebeace86 1826
3067714c
AK
1827int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1828{
1829 int r;
1830 enum emulation_result er;
1831
ad312c7c 1832 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1833 if (r < 0)
1834 goto out;
1835
1836 if (!r) {
1837 r = 1;
1838 goto out;
1839 }
1840
b733bfb5
AK
1841 r = mmu_topup_memory_caches(vcpu);
1842 if (r)
1843 goto out;
1844
3067714c 1845 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
1846
1847 switch (er) {
1848 case EMULATE_DONE:
1849 return 1;
1850 case EMULATE_DO_MMIO:
1851 ++vcpu->stat.mmio_exits;
1852 return 0;
1853 case EMULATE_FAIL:
1854 kvm_report_emulation_failure(vcpu, "pagetable");
1855 return 1;
1856 default:
1857 BUG();
1858 }
1859out:
3067714c
AK
1860 return r;
1861}
1862EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1863
18552672
JR
1864void kvm_enable_tdp(void)
1865{
1866 tdp_enabled = true;
1867}
1868EXPORT_SYMBOL_GPL(kvm_enable_tdp);
1869
6aa8b732
AK
1870static void free_mmu_pages(struct kvm_vcpu *vcpu)
1871{
4db35314 1872 struct kvm_mmu_page *sp;
6aa8b732 1873
f05e70ac
ZX
1874 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1875 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
1876 struct kvm_mmu_page, link);
1877 kvm_mmu_zap_page(vcpu->kvm, sp);
f51234c2 1878 }
ad312c7c 1879 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
1880}
1881
1882static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1883{
17ac10ad 1884 struct page *page;
6aa8b732
AK
1885 int i;
1886
1887 ASSERT(vcpu);
1888
f05e70ac
ZX
1889 if (vcpu->kvm->arch.n_requested_mmu_pages)
1890 vcpu->kvm->arch.n_free_mmu_pages =
1891 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 1892 else
f05e70ac
ZX
1893 vcpu->kvm->arch.n_free_mmu_pages =
1894 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
1895 /*
1896 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1897 * Therefore we need to allocate shadow page tables in the first
1898 * 4GB of memory, which happens to fit the DMA32 zone.
1899 */
1900 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1901 if (!page)
1902 goto error_1;
ad312c7c 1903 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 1904 for (i = 0; i < 4; ++i)
ad312c7c 1905 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1906
6aa8b732
AK
1907 return 0;
1908
1909error_1:
1910 free_mmu_pages(vcpu);
1911 return -ENOMEM;
1912}
1913
8018c27b 1914int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1915{
6aa8b732 1916 ASSERT(vcpu);
ad312c7c 1917 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1918
8018c27b
IM
1919 return alloc_mmu_pages(vcpu);
1920}
6aa8b732 1921
8018c27b
IM
1922int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1923{
1924 ASSERT(vcpu);
ad312c7c 1925 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 1926
8018c27b 1927 return init_kvm_mmu(vcpu);
6aa8b732
AK
1928}
1929
1930void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1931{
1932 ASSERT(vcpu);
1933
1934 destroy_kvm_mmu(vcpu);
1935 free_mmu_pages(vcpu);
714b93da 1936 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1937}
1938
90cb0529 1939void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 1940{
4db35314 1941 struct kvm_mmu_page *sp;
6aa8b732 1942
f05e70ac 1943 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
1944 int i;
1945 u64 *pt;
1946
4db35314 1947 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
1948 continue;
1949
4db35314 1950 pt = sp->spt;
6aa8b732
AK
1951 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1952 /* avoid RMW */
9647c14c 1953 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1954 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1955 }
1956}
37a7d8b0 1957
90cb0529 1958void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1959{
4db35314 1960 struct kvm_mmu_page *sp, *node;
e0fa826f 1961
aaee2c94 1962 spin_lock(&kvm->mmu_lock);
f05e70ac 1963 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 1964 kvm_mmu_zap_page(kvm, sp);
aaee2c94 1965 spin_unlock(&kvm->mmu_lock);
e0fa826f 1966
90cb0529 1967 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1968}
1969
3ee16c81
IE
1970void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
1971{
1972 struct kvm_mmu_page *page;
1973
1974 page = container_of(kvm->arch.active_mmu_pages.prev,
1975 struct kvm_mmu_page, link);
1976 kvm_mmu_zap_page(kvm, page);
1977}
1978
1979static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
1980{
1981 struct kvm *kvm;
1982 struct kvm *kvm_freed = NULL;
1983 int cache_count = 0;
1984
1985 spin_lock(&kvm_lock);
1986
1987 list_for_each_entry(kvm, &vm_list, vm_list) {
1988 int npages;
1989
1990 spin_lock(&kvm->mmu_lock);
1991 npages = kvm->arch.n_alloc_mmu_pages -
1992 kvm->arch.n_free_mmu_pages;
1993 cache_count += npages;
1994 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
1995 kvm_mmu_remove_one_alloc_mmu_page(kvm);
1996 cache_count--;
1997 kvm_freed = kvm;
1998 }
1999 nr_to_scan--;
2000
2001 spin_unlock(&kvm->mmu_lock);
2002 }
2003 if (kvm_freed)
2004 list_move_tail(&kvm_freed->vm_list, &vm_list);
2005
2006 spin_unlock(&kvm_lock);
2007
2008 return cache_count;
2009}
2010
2011static struct shrinker mmu_shrinker = {
2012 .shrink = mmu_shrink,
2013 .seeks = DEFAULT_SEEKS * 10,
2014};
2015
2016void mmu_destroy_caches(void)
b5a33a75
AK
2017{
2018 if (pte_chain_cache)
2019 kmem_cache_destroy(pte_chain_cache);
2020 if (rmap_desc_cache)
2021 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2022 if (mmu_page_header_cache)
2023 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2024}
2025
3ee16c81
IE
2026void kvm_mmu_module_exit(void)
2027{
2028 mmu_destroy_caches();
2029 unregister_shrinker(&mmu_shrinker);
2030}
2031
b5a33a75
AK
2032int kvm_mmu_module_init(void)
2033{
2034 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2035 sizeof(struct kvm_pte_chain),
20c2df83 2036 0, 0, NULL);
b5a33a75
AK
2037 if (!pte_chain_cache)
2038 goto nomem;
2039 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2040 sizeof(struct kvm_rmap_desc),
20c2df83 2041 0, 0, NULL);
b5a33a75
AK
2042 if (!rmap_desc_cache)
2043 goto nomem;
2044
d3d25b04
AK
2045 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2046 sizeof(struct kvm_mmu_page),
20c2df83 2047 0, 0, NULL);
d3d25b04
AK
2048 if (!mmu_page_header_cache)
2049 goto nomem;
2050
3ee16c81
IE
2051 register_shrinker(&mmu_shrinker);
2052
b5a33a75
AK
2053 return 0;
2054
2055nomem:
3ee16c81 2056 mmu_destroy_caches();
b5a33a75
AK
2057 return -ENOMEM;
2058}
2059
3ad82a7e
ZX
2060/*
2061 * Caculate mmu pages needed for kvm.
2062 */
2063unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2064{
2065 int i;
2066 unsigned int nr_mmu_pages;
2067 unsigned int nr_pages = 0;
2068
2069 for (i = 0; i < kvm->nmemslots; i++)
2070 nr_pages += kvm->memslots[i].npages;
2071
2072 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2073 nr_mmu_pages = max(nr_mmu_pages,
2074 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2075
2076 return nr_mmu_pages;
2077}
2078
2f333bcb
MT
2079static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2080 unsigned len)
2081{
2082 if (len > buffer->len)
2083 return NULL;
2084 return buffer->ptr;
2085}
2086
2087static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2088 unsigned len)
2089{
2090 void *ret;
2091
2092 ret = pv_mmu_peek_buffer(buffer, len);
2093 if (!ret)
2094 return ret;
2095 buffer->ptr += len;
2096 buffer->len -= len;
2097 buffer->processed += len;
2098 return ret;
2099}
2100
2101static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2102 gpa_t addr, gpa_t value)
2103{
2104 int bytes = 8;
2105 int r;
2106
2107 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2108 bytes = 4;
2109
2110 r = mmu_topup_memory_caches(vcpu);
2111 if (r)
2112 return r;
2113
3200f405 2114 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2115 return -EFAULT;
2116
2117 return 1;
2118}
2119
2120static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2121{
2122 kvm_x86_ops->tlb_flush(vcpu);
2123 return 1;
2124}
2125
2126static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2127{
2128 spin_lock(&vcpu->kvm->mmu_lock);
2129 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2130 spin_unlock(&vcpu->kvm->mmu_lock);
2131 return 1;
2132}
2133
2134static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2135 struct kvm_pv_mmu_op_buffer *buffer)
2136{
2137 struct kvm_mmu_op_header *header;
2138
2139 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2140 if (!header)
2141 return 0;
2142 switch (header->op) {
2143 case KVM_MMU_OP_WRITE_PTE: {
2144 struct kvm_mmu_op_write_pte *wpte;
2145
2146 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2147 if (!wpte)
2148 return 0;
2149 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2150 wpte->pte_val);
2151 }
2152 case KVM_MMU_OP_FLUSH_TLB: {
2153 struct kvm_mmu_op_flush_tlb *ftlb;
2154
2155 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2156 if (!ftlb)
2157 return 0;
2158 return kvm_pv_mmu_flush_tlb(vcpu);
2159 }
2160 case KVM_MMU_OP_RELEASE_PT: {
2161 struct kvm_mmu_op_release_pt *rpt;
2162
2163 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2164 if (!rpt)
2165 return 0;
2166 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2167 }
2168 default: return 0;
2169 }
2170}
2171
2172int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2173 gpa_t addr, unsigned long *ret)
2174{
2175 int r;
2176 struct kvm_pv_mmu_op_buffer buffer;
2177
2f333bcb
MT
2178 down_read(&current->mm->mmap_sem);
2179
2180 buffer.ptr = buffer.buf;
2181 buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
2182 buffer.processed = 0;
2183
2184 r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
2185 if (r)
2186 goto out;
2187
2188 while (buffer.len) {
2189 r = kvm_pv_mmu_op_one(vcpu, &buffer);
2190 if (r < 0)
2191 goto out;
2192 if (r == 0)
2193 break;
2194 }
2195
2196 r = 1;
2197out:
2198 *ret = buffer.processed;
2199 up_read(&current->mm->mmap_sem);
2f333bcb
MT
2200 return r;
2201}
2202
37a7d8b0
AK
2203#ifdef AUDIT
2204
2205static const char *audit_msg;
2206
2207static gva_t canonicalize(gva_t gva)
2208{
2209#ifdef CONFIG_X86_64
2210 gva = (long long)(gva << 16) >> 16;
2211#endif
2212 return gva;
2213}
2214
2215static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2216 gva_t va, int level)
2217{
2218 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2219 int i;
2220 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2221
2222 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2223 u64 ent = pt[i];
2224
c7addb90 2225 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2226 continue;
2227
2228 va = canonicalize(va);
c7addb90
AK
2229 if (level > 1) {
2230 if (ent == shadow_notrap_nonpresent_pte)
2231 printk(KERN_ERR "audit: (%s) nontrapping pte"
2232 " in nonleaf level: levels %d gva %lx"
2233 " level %d pte %llx\n", audit_msg,
ad312c7c 2234 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2235
37a7d8b0 2236 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2237 } else {
ad312c7c 2238 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
1d28f5f4
AK
2239 struct page *page = gpa_to_page(vcpu, gpa);
2240 hpa_t hpa = page_to_phys(page);
37a7d8b0 2241
c7addb90 2242 if (is_shadow_present_pte(ent)
37a7d8b0 2243 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2244 printk(KERN_ERR "xx audit error: (%s) levels %d"
2245 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2246 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2247 va, gpa, hpa, ent,
2248 is_shadow_present_pte(ent));
c7addb90
AK
2249 else if (ent == shadow_notrap_nonpresent_pte
2250 && !is_error_hpa(hpa))
2251 printk(KERN_ERR "audit: (%s) notrap shadow,"
2252 " valid guest gva %lx\n", audit_msg, va);
b4231d61 2253 kvm_release_page_clean(page);
c7addb90 2254
37a7d8b0
AK
2255 }
2256 }
2257}
2258
2259static void audit_mappings(struct kvm_vcpu *vcpu)
2260{
1ea252af 2261 unsigned i;
37a7d8b0 2262
ad312c7c
ZX
2263 if (vcpu->arch.mmu.root_level == 4)
2264 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2265 else
2266 for (i = 0; i < 4; ++i)
ad312c7c 2267 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2268 audit_mappings_page(vcpu,
ad312c7c 2269 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2270 i << 30,
2271 2);
2272}
2273
2274static int count_rmaps(struct kvm_vcpu *vcpu)
2275{
2276 int nmaps = 0;
2277 int i, j, k;
2278
2279 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2280 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2281 struct kvm_rmap_desc *d;
2282
2283 for (j = 0; j < m->npages; ++j) {
290fc38d 2284 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2285
290fc38d 2286 if (!*rmapp)
37a7d8b0 2287 continue;
290fc38d 2288 if (!(*rmapp & 1)) {
37a7d8b0
AK
2289 ++nmaps;
2290 continue;
2291 }
290fc38d 2292 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2293 while (d) {
2294 for (k = 0; k < RMAP_EXT; ++k)
2295 if (d->shadow_ptes[k])
2296 ++nmaps;
2297 else
2298 break;
2299 d = d->more;
2300 }
2301 }
2302 }
2303 return nmaps;
2304}
2305
2306static int count_writable_mappings(struct kvm_vcpu *vcpu)
2307{
2308 int nmaps = 0;
4db35314 2309 struct kvm_mmu_page *sp;
37a7d8b0
AK
2310 int i;
2311
f05e70ac 2312 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2313 u64 *pt = sp->spt;
37a7d8b0 2314
4db35314 2315 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2316 continue;
2317
2318 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2319 u64 ent = pt[i];
2320
2321 if (!(ent & PT_PRESENT_MASK))
2322 continue;
2323 if (!(ent & PT_WRITABLE_MASK))
2324 continue;
2325 ++nmaps;
2326 }
2327 }
2328 return nmaps;
2329}
2330
2331static void audit_rmap(struct kvm_vcpu *vcpu)
2332{
2333 int n_rmap = count_rmaps(vcpu);
2334 int n_actual = count_writable_mappings(vcpu);
2335
2336 if (n_rmap != n_actual)
2337 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2338 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2339}
2340
2341static void audit_write_protection(struct kvm_vcpu *vcpu)
2342{
4db35314 2343 struct kvm_mmu_page *sp;
290fc38d
IE
2344 struct kvm_memory_slot *slot;
2345 unsigned long *rmapp;
2346 gfn_t gfn;
37a7d8b0 2347
f05e70ac 2348 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2349 if (sp->role.metaphysical)
37a7d8b0
AK
2350 continue;
2351
4db35314
AK
2352 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2353 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2354 rmapp = &slot->rmap[gfn - slot->base_gfn];
2355 if (*rmapp)
37a7d8b0
AK
2356 printk(KERN_ERR "%s: (%s) shadow page has writable"
2357 " mappings: gfn %lx role %x\n",
b8688d51 2358 __func__, audit_msg, sp->gfn,
4db35314 2359 sp->role.word);
37a7d8b0
AK
2360 }
2361}
2362
2363static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2364{
2365 int olddbg = dbg;
2366
2367 dbg = 0;
2368 audit_msg = msg;
2369 audit_rmap(vcpu);
2370 audit_write_protection(vcpu);
2371 audit_mappings(vcpu);
2372 dbg = olddbg;
2373}
2374
2375#endif