[mirror_ubuntu-bionic-kernel.git] / arch / x86 / kvm / pmu.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __KVM_X86_PMU_H
#define __KVM_X86_PMU_H

#include <linux/nospec.h>

#define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu)
#define pmu_to_vcpu(pmu)  (container_of((pmu), struct kvm_vcpu, arch.pmu))
#define pmc_to_pmu(pmc)   (&(pmc)->vcpu->arch.pmu)

/* retrieve the 4 bits for EN and PMI out of IA32_FIXED_CTR_CTRL */
#define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf)

struct kvm_event_hw_type_mapping {
	u8 eventsel;
	u8 unit_mask;
	unsigned event_type;
};

struct kvm_pmu_ops {
	unsigned (*find_arch_event)(struct kvm_pmu *pmu, u8 event_select,
				    u8 unit_mask);
	unsigned (*find_fixed_event)(int idx);
	bool (*pmc_is_enabled)(struct kvm_pmc *pmc);
	struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx);
	struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx,
					  u64 *mask);
	int (*is_valid_msr_idx)(struct kvm_vcpu *vcpu, unsigned idx);
	bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr);
	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
	void (*refresh)(struct kvm_vcpu *vcpu);
	void (*init)(struct kvm_vcpu *vcpu);
	void (*reset)(struct kvm_vcpu *vcpu);
};

static inline u64 pmc_bitmask(struct kvm_pmc *pmc)
{
	struct kvm_pmu *pmu = pmc_to_pmu(pmc);

	return pmu->counter_bitmask[pmc->type];
}

static inline u64 pmc_read_counter(struct kvm_pmc *pmc)
{
	u64 counter, enabled, running;

	counter = pmc->counter;
	if (pmc->perf_event)
		counter += perf_event_read_value(pmc->perf_event,
						 &enabled, &running);
	/* FIXME: Scaling needed? */
	return counter & pmc_bitmask(pmc);
}

static inline void pmc_stop_counter(struct kvm_pmc *pmc)
{
	if (pmc->perf_event) {
		pmc->counter = pmc_read_counter(pmc);
		perf_event_release_kernel(pmc->perf_event);
		pmc->perf_event = NULL;
	}
}

static inline bool pmc_is_gp(struct kvm_pmc *pmc)
{
	return pmc->type == KVM_PMC_GP;
}

static inline bool pmc_is_fixed(struct kvm_pmc *pmc)
{
	return pmc->type == KVM_PMC_FIXED;
}

static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
{
	return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc);
}

/* returns general purpose PMC with the specified MSR. Note that it can be
 * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a
 * paramenter to tell them apart.
 */
static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr,
					 u32 base)
{
	if (msr >= base && msr < base + pmu->nr_arch_gp_counters) {
		u32 index = array_index_nospec(msr - base,
					       pmu->nr_arch_gp_counters);

		return &pmu->gp_counters[index];
	}

	return NULL;
}

/* returns fixed PMC with the specified MSR */
static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr)
{
	int base = MSR_CORE_PERF_FIXED_CTR0;

	if (msr >= base && msr < base + pmu->nr_arch_fixed_counters) {
		u32 index = array_index_nospec(msr - base,
					       pmu->nr_arch_fixed_counters);

		return &pmu->fixed_counters[index];
	}

	return NULL;
}

void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);

void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu);
void kvm_pmu_handle_event(struct kvm_vcpu *vcpu);
int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
int kvm_pmu_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx);
bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr);
int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
void kvm_pmu_refresh(struct kvm_vcpu *vcpu);
void kvm_pmu_reset(struct kvm_vcpu *vcpu);
void kvm_pmu_init(struct kvm_vcpu *vcpu);
void kvm_pmu_destroy(struct kvm_vcpu *vcpu);

extern struct kvm_pmu_ops intel_pmu_ops;
extern struct kvm_pmu_ops amd_pmu_ops;
#endif /* __KVM_X86_PMU_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
474a5bb9 WH	2	#ifndef __KVM_X86_PMU_H
	3	#define __KVM_X86_PMU_H
	4
4d5ee703 MP	5	#include <linux/nospec.h>
4d5ee703 MP	6
474a5bb9 WH	7	#define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu)
	8	#define pmu_to_vcpu(pmu) (container_of((pmu), struct kvm_vcpu, arch.pmu))
	9	#define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu)
	10
25462f7f WH	11	/* retrieve the 4 bits for EN and PMI out of IA32_FIXED_CTR_CTRL */
	12	#define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf)
	13
474a5bb9 WH	14	struct kvm_event_hw_type_mapping {
	15	u8 eventsel;
	16	u8 unit_mask;
	17	unsigned event_type;
	18	};
	19
25462f7f WH	20	struct kvm_pmu_ops {
	21	unsigned (find_arch_event)(struct kvm_pmu pmu, u8 event_select,
	22	u8 unit_mask);
	23	unsigned (*find_fixed_event)(int idx);
	24	bool (pmc_is_enabled)(struct kvm_pmc pmc);
	25	struct kvm_pmc (pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx);
c1b6466b PB	26	struct kvm_pmc (msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx,
c1b6466b PB	27	u64 *mask);
25462f7f WH	28	int (is_valid_msr_idx)(struct kvm_vcpu vcpu, unsigned idx);
	29	bool (is_valid_msr)(struct kvm_vcpu vcpu, u32 msr);
	30	int (get_msr)(struct kvm_vcpu vcpu, u32 msr, u64 *data);
	31	int (set_msr)(struct kvm_vcpu vcpu, struct msr_data *msr_info);
	32	void (refresh)(struct kvm_vcpu vcpu);
	33	void (init)(struct kvm_vcpu vcpu);
	34	void (reset)(struct kvm_vcpu vcpu);
	35	};
	36
	37	static inline u64 pmc_bitmask(struct kvm_pmc *pmc)
	38	{
	39	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
	40
	41	return pmu->counter_bitmask[pmc->type];
	42	}
	43
	44	static inline u64 pmc_read_counter(struct kvm_pmc *pmc)
	45	{
	46	u64 counter, enabled, running;
	47
	48	counter = pmc->counter;
	49	if (pmc->perf_event)
	50	counter += perf_event_read_value(pmc->perf_event,
	51	&enabled, &running);
	52	/* FIXME: Scaling needed? */
	53	return counter & pmc_bitmask(pmc);
	54	}
	55
	56	static inline void pmc_stop_counter(struct kvm_pmc *pmc)
	57	{
	58	if (pmc->perf_event) {
	59	pmc->counter = pmc_read_counter(pmc);
	60	perf_event_release_kernel(pmc->perf_event);
	61	pmc->perf_event = NULL;
	62	}
	63	}
	64
	65	static inline bool pmc_is_gp(struct kvm_pmc *pmc)
	66	{
	67	return pmc->type == KVM_PMC_GP;
	68	}
	69
	70	static inline bool pmc_is_fixed(struct kvm_pmc *pmc)
	71	{
	72	return pmc->type == KVM_PMC_FIXED;
	73	}
	74
	75	static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
	76	{
	77	return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc);
	78	}
	79
	80	/* returns general purpose PMC with the specified MSR. Note that it can be
	81	* used for both PERFCTRn and EVNTSELn; that is why it accepts base as a
	82	* paramenter to tell them apart.
	83	*/
	84	static inline struct kvm_pmc get_gp_pmc(struct kvm_pmu pmu, u32 msr,
	85	u32 base)
	86	{
4d5ee703 MP	87	if (msr >= base && msr < base + pmu->nr_arch_gp_counters) {
	88	u32 index = array_index_nospec(msr - base,
	89	pmu->nr_arch_gp_counters);
	90
	91	return &pmu->gp_counters[index];
	92	}
25462f7f WH	93
	94	return NULL;
	95	}
	96
	97	/* returns fixed PMC with the specified MSR */
	98	static inline struct kvm_pmc get_fixed_pmc(struct kvm_pmu pmu, u32 msr)
	99	{
	100	int base = MSR_CORE_PERF_FIXED_CTR0;
	101
4d5ee703 MP	102	if (msr >= base && msr < base + pmu->nr_arch_fixed_counters) {
	103	u32 index = array_index_nospec(msr - base,
	104	pmu->nr_arch_fixed_counters);
	105
	106	return &pmu->fixed_counters[index];
	107	}
25462f7f WH	108
	109	return NULL;
	110	}
	111
	112	void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
	113	void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
	114	void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);
	115
474a5bb9 WH	116	void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu);
	117	void kvm_pmu_handle_event(struct kvm_vcpu *vcpu);
	118	int kvm_pmu_rdpmc(struct kvm_vcpu vcpu, unsigned pmc, u64 data);
	119	int kvm_pmu_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx);
	120	bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr);
	121	int kvm_pmu_get_msr(struct kvm_vcpu vcpu, u32 msr, u64 data);
	122	int kvm_pmu_set_msr(struct kvm_vcpu vcpu, struct msr_data msr_info);
	123	void kvm_pmu_refresh(struct kvm_vcpu *vcpu);
	124	void kvm_pmu_reset(struct kvm_vcpu *vcpu);
	125	void kvm_pmu_init(struct kvm_vcpu *vcpu);
	126	void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
	127
25462f7f WH	128	extern struct kvm_pmu_ops intel_pmu_ops;
25462f7f WH	129	extern struct kvm_pmu_ops amd_pmu_ops;
474a5bb9	130	#endif /* __KVM_X86_PMU_H */