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KVM: Disable pagefaults during copy_from_user_inatomic()
[mirror_ubuntu-jammy-kernel.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
edf88417 17#include <linux/kvm_host.h>
5fb76f9b 18#include "segment_descriptor.h"
313a3dc7 19#include "irq.h"
1d737c8a 20#include "mmu.h"
313a3dc7
CO		 21
22#include <linux/kvm.h>
23#include <linux/fs.h>
24#include <linux/vmalloc.h>
5fb76f9b 25#include <linux/module.h>
0de10343 26#include <linux/mman.h>
2bacc55c 27#include <linux/highmem.h>
043405e1
CO		 28
29#include <asm/uaccess.h>
d825ed0a 30#include <asm/msr.h>
043405e1 31
313a3dc7 32#define MAX_IO_MSRS 256
a03490ed
CO		 33#define CR0_RESERVED_BITS \
34 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
35 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
36 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
37#define CR4_RESERVED_BITS \
38 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
39 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
40 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
41 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
42
43#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 44#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 45
ba1389b7
AK		 46#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 48
674eea0f
AK		 49static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
50 struct kvm_cpuid_entry2 __user *entries);
51
97896d04
ZX		 52struct kvm_x86_ops *kvm_x86_ops;
53
417bc304 54struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 55 { "pf_fixed", VCPU_STAT(pf_fixed) },
56 { "pf_guest", VCPU_STAT(pf_guest) },
57 { "tlb_flush", VCPU_STAT(tlb_flush) },
58 { "invlpg", VCPU_STAT(invlpg) },
59 { "exits", VCPU_STAT(exits) },
60 { "io_exits", VCPU_STAT(io_exits) },
61 { "mmio_exits", VCPU_STAT(mmio_exits) },
62 { "signal_exits", VCPU_STAT(signal_exits) },
63 { "irq_window", VCPU_STAT(irq_window_exits) },
64 { "halt_exits", VCPU_STAT(halt_exits) },
65 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
66 { "request_irq", VCPU_STAT(request_irq_exits) },
67 { "irq_exits", VCPU_STAT(irq_exits) },
68 { "host_state_reload", VCPU_STAT(host_state_reload) },
69 { "efer_reload", VCPU_STAT(efer_reload) },
70 { "fpu_reload", VCPU_STAT(fpu_reload) },
71 { "insn_emulation", VCPU_STAT(insn_emulation) },
72 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 73 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
74 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
75 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
76 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
77 { "mmu_flooded", VM_STAT(mmu_flooded) },
78 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 79 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 80 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
417bc304
HB		 81 { NULL }
82};
83
84
5fb76f9b
CO		 85unsigned long segment_base(u16 selector)
86{
87 struct descriptor_table gdt;
88 struct segment_descriptor *d;
89 unsigned long table_base;
90 unsigned long v;
91
92 if (selector == 0)
93 return 0;
94
95 asm("sgdt %0" : "=m"(gdt));
96 table_base = gdt.base;
97
98 if (selector & 4) { /* from ldt */
99 u16 ldt_selector;
100
101 asm("sldt %0" : "=g"(ldt_selector));
102 table_base = segment_base(ldt_selector);
103 }
104 d = (struct segment_descriptor *)(table_base + (selector & ~7));
105 v = d->base_low | ((unsigned long)d->base_mid << 16) |
106 ((unsigned long)d->base_high << 24);
107#ifdef CONFIG_X86_64
108 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
109 v |= ((unsigned long) \
110 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
111#endif
112 return v;
113}
114EXPORT_SYMBOL_GPL(segment_base);
115
6866b83e
CO		 116u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
117{
118 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 119 return vcpu->arch.apic_base;
6866b83e 120 else
ad312c7c 121 return vcpu->arch.apic_base;
6866b83e
CO		 122}
123EXPORT_SYMBOL_GPL(kvm_get_apic_base);
124
125void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
126{
127 /* TODO: reserve bits check */
128 if (irqchip_in_kernel(vcpu->kvm))
129 kvm_lapic_set_base(vcpu, data);
130 else
ad312c7c 131 vcpu->arch.apic_base = data;
6866b83e
CO		 132}
133EXPORT_SYMBOL_GPL(kvm_set_apic_base);
134
298101da
AK		 135void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
136{
ad312c7c
ZX		 137 WARN_ON(vcpu->arch.exception.pending);
138 vcpu->arch.exception.pending = true;
139 vcpu->arch.exception.has_error_code = false;
140 vcpu->arch.exception.nr = nr;
298101da
AK		 141}
142EXPORT_SYMBOL_GPL(kvm_queue_exception);
143
c3c91fee
AK		 144void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
145 u32 error_code)
146{
147 ++vcpu->stat.pf_guest;
ad312c7c 148 if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
c3c91fee
AK		 149 printk(KERN_DEBUG "kvm: inject_page_fault:"
150 " double fault 0x%lx\n", addr);
ad312c7c
ZX		 151 vcpu->arch.exception.nr = DF_VECTOR;
152 vcpu->arch.exception.error_code = 0;
c3c91fee
AK		 153 return;
154 }
ad312c7c 155 vcpu->arch.cr2 = addr;
c3c91fee
AK		 156 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
157}
158
298101da
AK		 159void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
160{
ad312c7c
ZX		 161 WARN_ON(vcpu->arch.exception.pending);
162 vcpu->arch.exception.pending = true;
163 vcpu->arch.exception.has_error_code = true;
164 vcpu->arch.exception.nr = nr;
165 vcpu->arch.exception.error_code = error_code;
298101da
AK		 166}
167EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
168
169static void __queue_exception(struct kvm_vcpu *vcpu)
170{
ad312c7c
ZX		 171 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
172 vcpu->arch.exception.has_error_code,
173 vcpu->arch.exception.error_code);
298101da
AK		 174}
175
a03490ed
CO		 176/*
177 * Load the pae pdptrs. Return true is they are all valid.
178 */
179int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
180{
181 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
182 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
183 int i;
184 int ret;
ad312c7c 185 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed 186
72dc67a6 187 down_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 188 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
189 offset * sizeof(u64), sizeof(pdpte));
190 if (ret < 0) {
191 ret = 0;
192 goto out;
193 }
194 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
195 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
196 ret = 0;
197 goto out;
198 }
199 }
200 ret = 1;
201
ad312c7c 202 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed 203out:
72dc67a6 204 up_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 205
206 return ret;
207}
208
d835dfec
AK		 209static bool pdptrs_changed(struct kvm_vcpu *vcpu)
210{
ad312c7c 211 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 212 bool changed = true;
213 int r;
214
215 if (is_long_mode(vcpu) || !is_pae(vcpu))
216 return false;
217
72dc67a6 218 down_read(&vcpu->kvm->slots_lock);
ad312c7c 219 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 220 if (r < 0)
221 goto out;
ad312c7c 222 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec 223out:
72dc67a6 224 up_read(&vcpu->kvm->slots_lock);
d835dfec
AK		 225
226 return changed;
227}
228
a03490ed
CO		 229void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
230{
231 if (cr0 & CR0_RESERVED_BITS) {
232 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 233 cr0, vcpu->arch.cr0);
c1a5d4f9 234 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 235 return;
236 }
237
238 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
239 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 240 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 241 return;
242 }
243
244 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
245 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
246 "and a clear PE flag\n");
c1a5d4f9 247 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 248 return;
249 }
250
251 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
252#ifdef CONFIG_X86_64
ad312c7c 253 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 254 int cs_db, cs_l;
255
256 if (!is_pae(vcpu)) {
257 printk(KERN_DEBUG "set_cr0: #GP, start paging "
258 "in long mode while PAE is disabled\n");
c1a5d4f9 259 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 260 return;
261 }
262 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
263 if (cs_l) {
264 printk(KERN_DEBUG "set_cr0: #GP, start paging "
265 "in long mode while CS.L == 1\n");
c1a5d4f9 266 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 267 return;
268
269 }
270 } else
271#endif
ad312c7c 272 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 273 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
274 "reserved bits\n");
c1a5d4f9 275 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 276 return;
277 }
278
279 }
280
281 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 282 vcpu->arch.cr0 = cr0;
a03490ed 283
a03490ed 284 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 285 return;
286}
287EXPORT_SYMBOL_GPL(set_cr0);
288
289void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
290{
ad312c7c 291 set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
a03490ed
CO		 292}
293EXPORT_SYMBOL_GPL(lmsw);
294
295void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
296{
297 if (cr4 & CR4_RESERVED_BITS) {
298 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 299 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 300 return;
301 }
302
303 if (is_long_mode(vcpu)) {
304 if (!(cr4 & X86_CR4_PAE)) {
305 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
306 "in long mode\n");
c1a5d4f9 307 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 308 return;
309 }
310 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 311 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 312 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 313 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 314 return;
315 }
316
317 if (cr4 & X86_CR4_VMXE) {
318 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 319 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 320 return;
321 }
322 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 323 vcpu->arch.cr4 = cr4;
a03490ed 324 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 325}
326EXPORT_SYMBOL_GPL(set_cr4);
327
328void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
329{
ad312c7c 330 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 331 kvm_mmu_flush_tlb(vcpu);
332 return;
333 }
334
a03490ed
CO		 335 if (is_long_mode(vcpu)) {
336 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
337 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 338 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 339 return;
340 }
341 } else {
342 if (is_pae(vcpu)) {
343 if (cr3 & CR3_PAE_RESERVED_BITS) {
344 printk(KERN_DEBUG
345 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 346 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 347 return;
348 }
349 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
350 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
351 "reserved bits\n");
c1a5d4f9 352 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 353 return;
354 }
355 }
356 /*
357 * We don't check reserved bits in nonpae mode, because
358 * this isn't enforced, and VMware depends on this.
359 */
360 }
361
72dc67a6 362 down_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 363 /*
364 * Does the new cr3 value map to physical memory? (Note, we
365 * catch an invalid cr3 even in real-mode, because it would
366 * cause trouble later on when we turn on paging anyway.)
367 *
368 * A real CPU would silently accept an invalid cr3 and would
369 * attempt to use it - with largely undefined (and often hard
370 * to debug) behavior on the guest side.
371 */
372 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 373 kvm_inject_gp(vcpu, 0);
a03490ed 374 else {
ad312c7c
ZX		 375 vcpu->arch.cr3 = cr3;
376 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed 377 }
72dc67a6 378 up_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 379}
380EXPORT_SYMBOL_GPL(set_cr3);
381
382void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
383{
384 if (cr8 & CR8_RESERVED_BITS) {
385 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 386 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 387 return;
388 }
389 if (irqchip_in_kernel(vcpu->kvm))
390 kvm_lapic_set_tpr(vcpu, cr8);
391 else
ad312c7c 392 vcpu->arch.cr8 = cr8;
a03490ed
CO		 393}
394EXPORT_SYMBOL_GPL(set_cr8);
395
396unsigned long get_cr8(struct kvm_vcpu *vcpu)
397{
398 if (irqchip_in_kernel(vcpu->kvm))
399 return kvm_lapic_get_cr8(vcpu);
400 else
ad312c7c 401 return vcpu->arch.cr8;
a03490ed
CO		 402}
403EXPORT_SYMBOL_GPL(get_cr8);
404
043405e1
CO		 405/*
406 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
407 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
408 *
409 * This list is modified at module load time to reflect the
410 * capabilities of the host cpu.
411 */
412static u32 msrs_to_save[] = {
413 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
414 MSR_K6_STAR,
415#ifdef CONFIG_X86_64
416 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
417#endif
418 MSR_IA32_TIME_STAMP_COUNTER,
419};
420
421static unsigned num_msrs_to_save;
422
423static u32 emulated_msrs[] = {
424 MSR_IA32_MISC_ENABLE,
425};
426
15c4a640
CO		 427#ifdef CONFIG_X86_64
428
429static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
430{
431 if (efer & EFER_RESERVED_BITS) {
432 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
433 efer);
c1a5d4f9 434 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 435 return;
436 }
437
438 if (is_paging(vcpu)
ad312c7c 439 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 440 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 441 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 442 return;
443 }
444
445 kvm_x86_ops->set_efer(vcpu, efer);
446
447 efer &= ~EFER_LMA;
ad312c7c 448 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 449
ad312c7c 450 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 451}
452
453#endif
454
455/*
456 * Writes msr value into into the appropriate "register".
457 * Returns 0 on success, non-0 otherwise.
458 * Assumes vcpu_load() was already called.
459 */
460int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
461{
462 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
463}
464
313a3dc7
CO		 465/*
466 * Adapt set_msr() to msr_io()'s calling convention
467 */
468static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
469{
470 return kvm_set_msr(vcpu, index, *data);
471}
472
15c4a640
CO		 473
474int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
475{
476 switch (msr) {
477#ifdef CONFIG_X86_64
478 case MSR_EFER:
479 set_efer(vcpu, data);
480 break;
481#endif
482 case MSR_IA32_MC0_STATUS:
483 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
484 __FUNCTION__, data);
485 break;
486 case MSR_IA32_MCG_STATUS:
487 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
488 __FUNCTION__, data);
489 break;
c7ac679c
JR		 490 case MSR_IA32_MCG_CTL:
491 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
492 __FUNCTION__, data);
493 break;
15c4a640
CO		 494 case MSR_IA32_UCODE_REV:
495 case MSR_IA32_UCODE_WRITE:
496 case 0x200 ... 0x2ff: /* MTRRs */
497 break;
498 case MSR_IA32_APICBASE:
499 kvm_set_apic_base(vcpu, data);
500 break;
501 case MSR_IA32_MISC_ENABLE:
ad312c7c 502 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640
CO		 503 break;
504 default:
565f1fbd 505 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 506 return 1;
507 }
508 return 0;
509}
510EXPORT_SYMBOL_GPL(kvm_set_msr_common);
511
512
513/*
514 * Reads an msr value (of 'msr_index') into 'pdata'.
515 * Returns 0 on success, non-0 otherwise.
516 * Assumes vcpu_load() was already called.
517 */
518int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
519{
520 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
521}
522
523int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
524{
525 u64 data;
526
527 switch (msr) {
528 case 0xc0010010: /* SYSCFG */
529 case 0xc0010015: /* HWCR */
530 case MSR_IA32_PLATFORM_ID:
531 case MSR_IA32_P5_MC_ADDR:
532 case MSR_IA32_P5_MC_TYPE:
533 case MSR_IA32_MC0_CTL:
534 case MSR_IA32_MCG_STATUS:
535 case MSR_IA32_MCG_CAP:
c7ac679c 536 case MSR_IA32_MCG_CTL:
15c4a640
CO		 537 case MSR_IA32_MC0_MISC:
538 case MSR_IA32_MC0_MISC+4:
539 case MSR_IA32_MC0_MISC+8:
540 case MSR_IA32_MC0_MISC+12:
541 case MSR_IA32_MC0_MISC+16:
542 case MSR_IA32_UCODE_REV:
543 case MSR_IA32_PERF_STATUS:
544 case MSR_IA32_EBL_CR_POWERON:
545 /* MTRR registers */
546 case 0xfe:
547 case 0x200 ... 0x2ff:
548 data = 0;
549 break;
550 case 0xcd: /* fsb frequency */
551 data = 3;
552 break;
553 case MSR_IA32_APICBASE:
554 data = kvm_get_apic_base(vcpu);
555 break;
556 case MSR_IA32_MISC_ENABLE:
ad312c7c 557 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640
CO		 558 break;
559#ifdef CONFIG_X86_64
560 case MSR_EFER:
ad312c7c 561 data = vcpu->arch.shadow_efer;
15c4a640
CO		 562 break;
563#endif
564 default:
565 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
566 return 1;
567 }
568 *pdata = data;
569 return 0;
570}
571EXPORT_SYMBOL_GPL(kvm_get_msr_common);
572
313a3dc7
CO		 573/*
574 * Read or write a bunch of msrs. All parameters are kernel addresses.
575 *
576 * @return number of msrs set successfully.
577 */
578static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
579 struct kvm_msr_entry *entries,
580 int (*do_msr)(struct kvm_vcpu *vcpu,
581 unsigned index, u64 *data))
582{
583 int i;
584
585 vcpu_load(vcpu);
586
587 for (i = 0; i < msrs->nmsrs; ++i)
588 if (do_msr(vcpu, entries[i].index, &entries[i].data))
589 break;
590
591 vcpu_put(vcpu);
592
593 return i;
594}
595
596/*
597 * Read or write a bunch of msrs. Parameters are user addresses.
598 *
599 * @return number of msrs set successfully.
600 */
601static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
602 int (*do_msr)(struct kvm_vcpu *vcpu,
603 unsigned index, u64 *data),
604 int writeback)
605{
606 struct kvm_msrs msrs;
607 struct kvm_msr_entry *entries;
608 int r, n;
609 unsigned size;
610
611 r = -EFAULT;
612 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
613 goto out;
614
615 r = -E2BIG;
616 if (msrs.nmsrs >= MAX_IO_MSRS)
617 goto out;
618
619 r = -ENOMEM;
620 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
621 entries = vmalloc(size);
622 if (!entries)
623 goto out;
624
625 r = -EFAULT;
626 if (copy_from_user(entries, user_msrs->entries, size))
627 goto out_free;
628
629 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
630 if (r < 0)
631 goto out_free;
632
633 r = -EFAULT;
634 if (writeback && copy_to_user(user_msrs->entries, entries, size))
635 goto out_free;
636
637 r = n;
638
639out_free:
640 vfree(entries);
641out:
642 return r;
643}
644
e9b11c17
ZX		 645/*
646 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
647 * cached on it.
648 */
649void decache_vcpus_on_cpu(int cpu)
650{
651 struct kvm *vm;
652 struct kvm_vcpu *vcpu;
653 int i;
654
655 spin_lock(&kvm_lock);
656 list_for_each_entry(vm, &vm_list, vm_list)
657 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
658 vcpu = vm->vcpus[i];
659 if (!vcpu)
660 continue;
661 /*
662 * If the vcpu is locked, then it is running on some
663 * other cpu and therefore it is not cached on the
664 * cpu in question.
665 *
666 * If it's not locked, check the last cpu it executed
667 * on.
668 */
669 if (mutex_trylock(&vcpu->mutex)) {
670 if (vcpu->cpu == cpu) {
671 kvm_x86_ops->vcpu_decache(vcpu);
672 vcpu->cpu = -1;
673 }
674 mutex_unlock(&vcpu->mutex);
675 }
676 }
677 spin_unlock(&kvm_lock);
678}
679
018d00d2
ZX		 680int kvm_dev_ioctl_check_extension(long ext)
681{
682 int r;
683
684 switch (ext) {
685 case KVM_CAP_IRQCHIP:
686 case KVM_CAP_HLT:
687 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
688 case KVM_CAP_USER_MEMORY:
689 case KVM_CAP_SET_TSS_ADDR:
07716717 690 case KVM_CAP_EXT_CPUID:
018d00d2
ZX		 691 r = 1;
692 break;
774ead3a
AK		 693 case KVM_CAP_VAPIC:
694 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
695 break;
018d00d2
ZX		 696 default:
697 r = 0;
698 break;
699 }
700 return r;
701
702}
703
043405e1
CO		 704long kvm_arch_dev_ioctl(struct file *filp,
705 unsigned int ioctl, unsigned long arg)
706{
707 void __user *argp = (void __user *)arg;
708 long r;
709
710 switch (ioctl) {
711 case KVM_GET_MSR_INDEX_LIST: {
712 struct kvm_msr_list __user *user_msr_list = argp;
713 struct kvm_msr_list msr_list;
714 unsigned n;
715
716 r = -EFAULT;
717 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
718 goto out;
719 n = msr_list.nmsrs;
720 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
721 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
722 goto out;
723 r = -E2BIG;
724 if (n < num_msrs_to_save)
725 goto out;
726 r = -EFAULT;
727 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
728 num_msrs_to_save * sizeof(u32)))
729 goto out;
730 if (copy_to_user(user_msr_list->indices
731 + num_msrs_to_save * sizeof(u32),
732 &emulated_msrs,
733 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
734 goto out;
735 r = 0;
736 break;
737 }
674eea0f
AK		 738 case KVM_GET_SUPPORTED_CPUID: {
739 struct kvm_cpuid2 __user *cpuid_arg = argp;
740 struct kvm_cpuid2 cpuid;
741
742 r = -EFAULT;
743 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
744 goto out;
745 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
746 cpuid_arg->entries);
747 if (r)
748 goto out;
749
750 r = -EFAULT;
751 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
752 goto out;
753 r = 0;
754 break;
755 }
043405e1
CO		 756 default:
757 r = -EINVAL;
758 }
759out:
760 return r;
761}
762
313a3dc7
CO		 763void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
764{
765 kvm_x86_ops->vcpu_load(vcpu, cpu);
766}
767
768void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
769{
770 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 771 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 772}
773
07716717 774static int is_efer_nx(void)
313a3dc7
CO		 775{
776 u64 efer;
313a3dc7
CO		 777
778 rdmsrl(MSR_EFER, efer);
07716717
DK		 779 return efer & EFER_NX;
780}
781
782static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
783{
784 int i;
785 struct kvm_cpuid_entry2 *e, *entry;
786
313a3dc7 787 entry = NULL;
ad312c7c
ZX		 788 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
789 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 790 if (e->function == 0x80000001) {
791 entry = e;
792 break;
793 }
794 }
07716717 795 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 796 entry->edx &= ~(1 << 20);
797 printk(KERN_INFO "kvm: guest NX capability removed\n");
798 }
799}
800
07716717 801/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 802static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
803 struct kvm_cpuid *cpuid,
804 struct kvm_cpuid_entry __user *entries)
07716717
DK		 805{
806 int r, i;
807 struct kvm_cpuid_entry *cpuid_entries;
808
809 r = -E2BIG;
810 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
811 goto out;
812 r = -ENOMEM;
813 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
814 if (!cpuid_entries)
815 goto out;
816 r = -EFAULT;
817 if (copy_from_user(cpuid_entries, entries,
818 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
819 goto out_free;
820 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 821 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
822 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
823 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
824 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
825 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
826 vcpu->arch.cpuid_entries[i].index = 0;
827 vcpu->arch.cpuid_entries[i].flags = 0;
828 vcpu->arch.cpuid_entries[i].padding[0] = 0;
829 vcpu->arch.cpuid_entries[i].padding[1] = 0;
830 vcpu->arch.cpuid_entries[i].padding[2] = 0;
831 }
832 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 833 cpuid_fix_nx_cap(vcpu);
834 r = 0;
835
836out_free:
837 vfree(cpuid_entries);
838out:
839 return r;
840}
841
842static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
843 struct kvm_cpuid2 *cpuid,
844 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 845{
846 int r;
847
848 r = -E2BIG;
849 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
850 goto out;
851 r = -EFAULT;
ad312c7c 852 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 853 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 854 goto out;
ad312c7c 855 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 856 return 0;
857
858out:
859 return r;
860}
861
07716717
DK		 862static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
863 struct kvm_cpuid2 *cpuid,
864 struct kvm_cpuid_entry2 __user *entries)
865{
866 int r;
867
868 r = -E2BIG;
ad312c7c 869 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 870 goto out;
871 r = -EFAULT;
ad312c7c
ZX		 872 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
873 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 874 goto out;
875 return 0;
876
877out:
ad312c7c 878 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 879 return r;
880}
881
882static inline u32 bit(int bitno)
883{
884 return 1 << (bitno & 31);
885}
886
887static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
888 u32 index)
889{
890 entry->function = function;
891 entry->index = index;
892 cpuid_count(entry->function, entry->index,
893 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
894 entry->flags = 0;
895}
896
897static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
898 u32 index, int *nent, int maxnent)
899{
900 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
901 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
902 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
903 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
904 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
905 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
906 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
907 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
908 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
909 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
910 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
911 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
912 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
913 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
914 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
915 bit(X86_FEATURE_PGE) |
916 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
917 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
918 bit(X86_FEATURE_SYSCALL) |
919 (bit(X86_FEATURE_NX) && is_efer_nx()) |
920#ifdef CONFIG_X86_64
921 bit(X86_FEATURE_LM) |
922#endif
923 bit(X86_FEATURE_MMXEXT) |
924 bit(X86_FEATURE_3DNOWEXT) |
925 bit(X86_FEATURE_3DNOW);
926 const u32 kvm_supported_word3_x86_features =
927 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
928 const u32 kvm_supported_word6_x86_features =
929 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
930
931 /* all func 2 cpuid_count() should be called on the same cpu */
932 get_cpu();
933 do_cpuid_1_ent(entry, function, index);
934 ++*nent;
935
936 switch (function) {
937 case 0:
938 entry->eax = min(entry->eax, (u32)0xb);
939 break;
940 case 1:
941 entry->edx &= kvm_supported_word0_x86_features;
942 entry->ecx &= kvm_supported_word3_x86_features;
943 break;
944 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
945 * may return different values. This forces us to get_cpu() before
946 * issuing the first command, and also to emulate this annoying behavior
947 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
948 case 2: {
949 int t, times = entry->eax & 0xff;
950
951 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
952 for (t = 1; t < times && *nent < maxnent; ++t) {
953 do_cpuid_1_ent(&entry[t], function, 0);
954 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
955 ++*nent;
956 }
957 break;
958 }
959 /* function 4 and 0xb have additional index. */
960 case 4: {
961 int index, cache_type;
962
963 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
964 /* read more entries until cache_type is zero */
965 for (index = 1; *nent < maxnent; ++index) {
966 cache_type = entry[index - 1].eax & 0x1f;
967 if (!cache_type)
968 break;
969 do_cpuid_1_ent(&entry[index], function, index);
970 entry[index].flags |=
971 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
972 ++*nent;
973 }
974 break;
975 }
976 case 0xb: {
977 int index, level_type;
978
979 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
980 /* read more entries until level_type is zero */
981 for (index = 1; *nent < maxnent; ++index) {
982 level_type = entry[index - 1].ecx & 0xff;
983 if (!level_type)
984 break;
985 do_cpuid_1_ent(&entry[index], function, index);
986 entry[index].flags |=
987 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
988 ++*nent;
989 }
990 break;
991 }
992 case 0x80000000:
993 entry->eax = min(entry->eax, 0x8000001a);
994 break;
995 case 0x80000001:
996 entry->edx &= kvm_supported_word1_x86_features;
997 entry->ecx &= kvm_supported_word6_x86_features;
998 break;
999 }
1000 put_cpu();
1001}
1002
674eea0f 1003static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
07716717
DK		 1004 struct kvm_cpuid_entry2 __user *entries)
1005{
1006 struct kvm_cpuid_entry2 *cpuid_entries;
1007 int limit, nent = 0, r = -E2BIG;
1008 u32 func;
1009
1010 if (cpuid->nent < 1)
1011 goto out;
1012 r = -ENOMEM;
1013 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1014 if (!cpuid_entries)
1015 goto out;
1016
1017 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1018 limit = cpuid_entries[0].eax;
1019 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1020 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1021 &nent, cpuid->nent);
1022 r = -E2BIG;
1023 if (nent >= cpuid->nent)
1024 goto out_free;
1025
1026 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1027 limit = cpuid_entries[nent - 1].eax;
1028 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1029 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1030 &nent, cpuid->nent);
1031 r = -EFAULT;
1032 if (copy_to_user(entries, cpuid_entries,
1033 nent * sizeof(struct kvm_cpuid_entry2)))
1034 goto out_free;
1035 cpuid->nent = nent;
1036 r = 0;
1037
1038out_free:
1039 vfree(cpuid_entries);
1040out:
1041 return r;
1042}
1043
313a3dc7
CO		 1044static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1045 struct kvm_lapic_state *s)
1046{
1047 vcpu_load(vcpu);
ad312c7c 1048 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1049 vcpu_put(vcpu);
1050
1051 return 0;
1052}
1053
1054static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1055 struct kvm_lapic_state *s)
1056{
1057 vcpu_load(vcpu);
ad312c7c 1058 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1059 kvm_apic_post_state_restore(vcpu);
1060 vcpu_put(vcpu);
1061
1062 return 0;
1063}
1064
f77bc6a4
ZX		 1065static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1066 struct kvm_interrupt *irq)
1067{
1068 if (irq->irq < 0 || irq->irq >= 256)
1069 return -EINVAL;
1070 if (irqchip_in_kernel(vcpu->kvm))
1071 return -ENXIO;
1072 vcpu_load(vcpu);
1073
ad312c7c
ZX		 1074 set_bit(irq->irq, vcpu->arch.irq_pending);
1075 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1076
1077 vcpu_put(vcpu);
1078
1079 return 0;
1080}
1081
b209749f
AK		 1082static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1083 struct kvm_tpr_access_ctl *tac)
1084{
1085 if (tac->flags)
1086 return -EINVAL;
1087 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1088 return 0;
1089}
1090
313a3dc7
CO		 1091long kvm_arch_vcpu_ioctl(struct file *filp,
1092 unsigned int ioctl, unsigned long arg)
1093{
1094 struct kvm_vcpu *vcpu = filp->private_data;
1095 void __user *argp = (void __user *)arg;
1096 int r;
1097
1098 switch (ioctl) {
1099 case KVM_GET_LAPIC: {
1100 struct kvm_lapic_state lapic;
1101
1102 memset(&lapic, 0, sizeof lapic);
1103 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
1104 if (r)
1105 goto out;
1106 r = -EFAULT;
1107 if (copy_to_user(argp, &lapic, sizeof lapic))
1108 goto out;
1109 r = 0;
1110 break;
1111 }
1112 case KVM_SET_LAPIC: {
1113 struct kvm_lapic_state lapic;
1114
1115 r = -EFAULT;
1116 if (copy_from_user(&lapic, argp, sizeof lapic))
1117 goto out;
1118 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
1119 if (r)
1120 goto out;
1121 r = 0;
1122 break;
1123 }
f77bc6a4
ZX		 1124 case KVM_INTERRUPT: {
1125 struct kvm_interrupt irq;
1126
1127 r = -EFAULT;
1128 if (copy_from_user(&irq, argp, sizeof irq))
1129 goto out;
1130 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1131 if (r)
1132 goto out;
1133 r = 0;
1134 break;
1135 }
313a3dc7
CO		 1136 case KVM_SET_CPUID: {
1137 struct kvm_cpuid __user *cpuid_arg = argp;
1138 struct kvm_cpuid cpuid;
1139
1140 r = -EFAULT;
1141 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1142 goto out;
1143 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1144 if (r)
1145 goto out;
1146 break;
1147 }
07716717
DK		 1148 case KVM_SET_CPUID2: {
1149 struct kvm_cpuid2 __user *cpuid_arg = argp;
1150 struct kvm_cpuid2 cpuid;
1151
1152 r = -EFAULT;
1153 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1154 goto out;
1155 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1156 cpuid_arg->entries);
1157 if (r)
1158 goto out;
1159 break;
1160 }
1161 case KVM_GET_CPUID2: {
1162 struct kvm_cpuid2 __user *cpuid_arg = argp;
1163 struct kvm_cpuid2 cpuid;
1164
1165 r = -EFAULT;
1166 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1167 goto out;
1168 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1169 cpuid_arg->entries);
1170 if (r)
1171 goto out;
1172 r = -EFAULT;
1173 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1174 goto out;
1175 r = 0;
1176 break;
1177 }
313a3dc7
CO		 1178 case KVM_GET_MSRS:
1179 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1180 break;
1181 case KVM_SET_MSRS:
1182 r = msr_io(vcpu, argp, do_set_msr, 0);
1183 break;
b209749f
AK		 1184 case KVM_TPR_ACCESS_REPORTING: {
1185 struct kvm_tpr_access_ctl tac;
1186
1187 r = -EFAULT;
1188 if (copy_from_user(&tac, argp, sizeof tac))
1189 goto out;
1190 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1191 if (r)
1192 goto out;
1193 r = -EFAULT;
1194 if (copy_to_user(argp, &tac, sizeof tac))
1195 goto out;
1196 r = 0;
1197 break;
1198 };
b93463aa
AK		 1199 case KVM_SET_VAPIC_ADDR: {
1200 struct kvm_vapic_addr va;
1201
1202 r = -EINVAL;
1203 if (!irqchip_in_kernel(vcpu->kvm))
1204 goto out;
1205 r = -EFAULT;
1206 if (copy_from_user(&va, argp, sizeof va))
1207 goto out;
1208 r = 0;
1209 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1210 break;
1211 }
313a3dc7
CO		 1212 default:
1213 r = -EINVAL;
1214 }
1215out:
1216 return r;
1217}
1218
1fe779f8
CO		 1219static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1220{
1221 int ret;
1222
1223 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1224 return -1;
1225 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1226 return ret;
1227}
1228
1229static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1230 u32 kvm_nr_mmu_pages)
1231{
1232 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1233 return -EINVAL;
1234
72dc67a6 1235 down_write(&kvm->slots_lock);
1fe779f8
CO		 1236
1237 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1238 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8 1239
72dc67a6 1240 up_write(&kvm->slots_lock);
1fe779f8
CO		 1241 return 0;
1242}
1243
1244static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1245{
f05e70ac 1246 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1247}
1248
e9f85cde
ZX		 1249gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1250{
1251 int i;
1252 struct kvm_mem_alias *alias;
1253
d69fb81f
ZX		 1254 for (i = 0; i < kvm->arch.naliases; ++i) {
1255 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1256 if (gfn >= alias->base_gfn
1257 && gfn < alias->base_gfn + alias->npages)
1258 return alias->target_gfn + gfn - alias->base_gfn;
1259 }
1260 return gfn;
1261}
1262
1fe779f8
CO		 1263/*
1264 * Set a new alias region. Aliases map a portion of physical memory into
1265 * another portion. This is useful for memory windows, for example the PC
1266 * VGA region.
1267 */
1268static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1269 struct kvm_memory_alias *alias)
1270{
1271 int r, n;
1272 struct kvm_mem_alias *p;
1273
1274 r = -EINVAL;
1275 /* General sanity checks */
1276 if (alias->memory_size & (PAGE_SIZE - 1))
1277 goto out;
1278 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1279 goto out;
1280 if (alias->slot >= KVM_ALIAS_SLOTS)
1281 goto out;
1282 if (alias->guest_phys_addr + alias->memory_size
1283 < alias->guest_phys_addr)
1284 goto out;
1285 if (alias->target_phys_addr + alias->memory_size
1286 < alias->target_phys_addr)
1287 goto out;
1288
72dc67a6 1289 down_write(&kvm->slots_lock);
1fe779f8 1290
d69fb81f 1291 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1292 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1293 p->npages = alias->memory_size >> PAGE_SHIFT;
1294 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1295
1296 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1297 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1298 break;
d69fb81f 1299 kvm->arch.naliases = n;
1fe779f8
CO		 1300
1301 kvm_mmu_zap_all(kvm);
1302
72dc67a6 1303 up_write(&kvm->slots_lock);
1fe779f8
CO		 1304
1305 return 0;
1306
1307out:
1308 return r;
1309}
1310
1311static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1312{
1313 int r;
1314
1315 r = 0;
1316 switch (chip->chip_id) {
1317 case KVM_IRQCHIP_PIC_MASTER:
1318 memcpy(&chip->chip.pic,
1319 &pic_irqchip(kvm)->pics[0],
1320 sizeof(struct kvm_pic_state));
1321 break;
1322 case KVM_IRQCHIP_PIC_SLAVE:
1323 memcpy(&chip->chip.pic,
1324 &pic_irqchip(kvm)->pics[1],
1325 sizeof(struct kvm_pic_state));
1326 break;
1327 case KVM_IRQCHIP_IOAPIC:
1328 memcpy(&chip->chip.ioapic,
1329 ioapic_irqchip(kvm),
1330 sizeof(struct kvm_ioapic_state));
1331 break;
1332 default:
1333 r = -EINVAL;
1334 break;
1335 }
1336 return r;
1337}
1338
1339static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1340{
1341 int r;
1342
1343 r = 0;
1344 switch (chip->chip_id) {
1345 case KVM_IRQCHIP_PIC_MASTER:
1346 memcpy(&pic_irqchip(kvm)->pics[0],
1347 &chip->chip.pic,
1348 sizeof(struct kvm_pic_state));
1349 break;
1350 case KVM_IRQCHIP_PIC_SLAVE:
1351 memcpy(&pic_irqchip(kvm)->pics[1],
1352 &chip->chip.pic,
1353 sizeof(struct kvm_pic_state));
1354 break;
1355 case KVM_IRQCHIP_IOAPIC:
1356 memcpy(ioapic_irqchip(kvm),
1357 &chip->chip.ioapic,
1358 sizeof(struct kvm_ioapic_state));
1359 break;
1360 default:
1361 r = -EINVAL;
1362 break;
1363 }
1364 kvm_pic_update_irq(pic_irqchip(kvm));
1365 return r;
1366}
1367
5bb064dc
ZX		 1368/*
1369 * Get (and clear) the dirty memory log for a memory slot.
1370 */
1371int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1372 struct kvm_dirty_log *log)
1373{
1374 int r;
1375 int n;
1376 struct kvm_memory_slot *memslot;
1377 int is_dirty = 0;
1378
72dc67a6 1379 down_write(&kvm->slots_lock);
5bb064dc
ZX		 1380
1381 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1382 if (r)
1383 goto out;
1384
1385 /* If nothing is dirty, don't bother messing with page tables. */
1386 if (is_dirty) {
1387 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1388 kvm_flush_remote_tlbs(kvm);
1389 memslot = &kvm->memslots[log->slot];
1390 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1391 memset(memslot->dirty_bitmap, 0, n);
1392 }
1393 r = 0;
1394out:
72dc67a6 1395 up_write(&kvm->slots_lock);
5bb064dc
ZX		 1396 return r;
1397}
1398
1fe779f8
CO		 1399long kvm_arch_vm_ioctl(struct file *filp,
1400 unsigned int ioctl, unsigned long arg)
1401{
1402 struct kvm *kvm = filp->private_data;
1403 void __user *argp = (void __user *)arg;
1404 int r = -EINVAL;
1405
1406 switch (ioctl) {
1407 case KVM_SET_TSS_ADDR:
1408 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1409 if (r < 0)
1410 goto out;
1411 break;
1412 case KVM_SET_MEMORY_REGION: {
1413 struct kvm_memory_region kvm_mem;
1414 struct kvm_userspace_memory_region kvm_userspace_mem;
1415
1416 r = -EFAULT;
1417 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1418 goto out;
1419 kvm_userspace_mem.slot = kvm_mem.slot;
1420 kvm_userspace_mem.flags = kvm_mem.flags;
1421 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1422 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1423 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1424 if (r)
1425 goto out;
1426 break;
1427 }
1428 case KVM_SET_NR_MMU_PAGES:
1429 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1430 if (r)
1431 goto out;
1432 break;
1433 case KVM_GET_NR_MMU_PAGES:
1434 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1435 break;
1436 case KVM_SET_MEMORY_ALIAS: {
1437 struct kvm_memory_alias alias;
1438
1439 r = -EFAULT;
1440 if (copy_from_user(&alias, argp, sizeof alias))
1441 goto out;
1442 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1443 if (r)
1444 goto out;
1445 break;
1446 }
1447 case KVM_CREATE_IRQCHIP:
1448 r = -ENOMEM;
d7deeeb0
ZX		 1449 kvm->arch.vpic = kvm_create_pic(kvm);
1450 if (kvm->arch.vpic) {
1fe779f8
CO		 1451 r = kvm_ioapic_init(kvm);
1452 if (r) {
d7deeeb0
ZX		 1453 kfree(kvm->arch.vpic);
1454 kvm->arch.vpic = NULL;
1fe779f8
CO		 1455 goto out;
1456 }
1457 } else
1458 goto out;
1459 break;
1460 case KVM_IRQ_LINE: {
1461 struct kvm_irq_level irq_event;
1462
1463 r = -EFAULT;
1464 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1465 goto out;
1466 if (irqchip_in_kernel(kvm)) {
1467 mutex_lock(&kvm->lock);
1468 if (irq_event.irq < 16)
1469 kvm_pic_set_irq(pic_irqchip(kvm),
1470 irq_event.irq,
1471 irq_event.level);
d7deeeb0 1472 kvm_ioapic_set_irq(kvm->arch.vioapic,
1fe779f8
CO		 1473 irq_event.irq,
1474 irq_event.level);
1475 mutex_unlock(&kvm->lock);
1476 r = 0;
1477 }
1478 break;
1479 }
1480 case KVM_GET_IRQCHIP: {
1481 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1482 struct kvm_irqchip chip;
1483
1484 r = -EFAULT;
1485 if (copy_from_user(&chip, argp, sizeof chip))
1486 goto out;
1487 r = -ENXIO;
1488 if (!irqchip_in_kernel(kvm))
1489 goto out;
1490 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1491 if (r)
1492 goto out;
1493 r = -EFAULT;
1494 if (copy_to_user(argp, &chip, sizeof chip))
1495 goto out;
1496 r = 0;
1497 break;
1498 }
1499 case KVM_SET_IRQCHIP: {
1500 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1501 struct kvm_irqchip chip;
1502
1503 r = -EFAULT;
1504 if (copy_from_user(&chip, argp, sizeof chip))
1505 goto out;
1506 r = -ENXIO;
1507 if (!irqchip_in_kernel(kvm))
1508 goto out;
1509 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1510 if (r)
1511 goto out;
1512 r = 0;
1513 break;
1514 }
1515 default:
1516 ;
1517 }
1518out:
1519 return r;
1520}
1521
a16b043c 1522static void kvm_init_msr_list(void)
043405e1
CO		 1523{
1524 u32 dummy[2];
1525 unsigned i, j;
1526
1527 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1528 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1529 continue;
1530 if (j < i)
1531 msrs_to_save[j] = msrs_to_save[i];
1532 j++;
1533 }
1534 num_msrs_to_save = j;
1535}
1536
bbd9b64e
CO		 1537/*
1538 * Only apic need an MMIO device hook, so shortcut now..
1539 */
1540static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1541 gpa_t addr)
1542{
1543 struct kvm_io_device *dev;
1544
ad312c7c
ZX		 1545 if (vcpu->arch.apic) {
1546 dev = &vcpu->arch.apic->dev;
bbd9b64e
CO		 1547 if (dev->in_range(dev, addr))
1548 return dev;
1549 }
1550 return NULL;
1551}
1552
1553
1554static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1555 gpa_t addr)
1556{
1557 struct kvm_io_device *dev;
1558
1559 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1560 if (dev == NULL)
1561 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1562 return dev;
1563}
1564
1565int emulator_read_std(unsigned long addr,
1566 void *val,
1567 unsigned int bytes,
1568 struct kvm_vcpu *vcpu)
1569{
1570 void *data = val;
10589a46 1571 int r = X86EMUL_CONTINUE;
bbd9b64e 1572
72dc67a6 1573 down_read(&vcpu->kvm->slots_lock);
bbd9b64e 1574 while (bytes) {
ad312c7c 1575 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 1576 unsigned offset = addr & (PAGE_SIZE-1);
1577 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1578 int ret;
1579
10589a46
MT		 1580 if (gpa == UNMAPPED_GVA) {
1581 r = X86EMUL_PROPAGATE_FAULT;
1582 goto out;
1583 }
bbd9b64e 1584 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
10589a46
MT		 1585 if (ret < 0) {
1586 r = X86EMUL_UNHANDLEABLE;
1587 goto out;
1588 }
bbd9b64e
CO		 1589
1590 bytes -= tocopy;
1591 data += tocopy;
1592 addr += tocopy;
1593 }
10589a46 1594out:
72dc67a6 1595 up_read(&vcpu->kvm->slots_lock);
10589a46 1596 return r;
bbd9b64e
CO		 1597}
1598EXPORT_SYMBOL_GPL(emulator_read_std);
1599
bbd9b64e
CO		 1600static int emulator_read_emulated(unsigned long addr,
1601 void *val,
1602 unsigned int bytes,
1603 struct kvm_vcpu *vcpu)
1604{
1605 struct kvm_io_device *mmio_dev;
1606 gpa_t gpa;
1607
1608 if (vcpu->mmio_read_completed) {
1609 memcpy(val, vcpu->mmio_data, bytes);
1610 vcpu->mmio_read_completed = 0;
1611 return X86EMUL_CONTINUE;
1612 }
1613
72dc67a6 1614 down_read(&vcpu->kvm->slots_lock);
ad312c7c 1615 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
72dc67a6 1616 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1617
1618 /* For APIC access vmexit */
1619 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1620 goto mmio;
1621
1622 if (emulator_read_std(addr, val, bytes, vcpu)
1623 == X86EMUL_CONTINUE)
1624 return X86EMUL_CONTINUE;
1625 if (gpa == UNMAPPED_GVA)
1626 return X86EMUL_PROPAGATE_FAULT;
1627
1628mmio:
1629 /*
1630 * Is this MMIO handled locally?
1631 */
10589a46 1632 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1633 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1634 if (mmio_dev) {
1635 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
10589a46 1636 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1637 return X86EMUL_CONTINUE;
1638 }
10589a46 1639 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1640
1641 vcpu->mmio_needed = 1;
1642 vcpu->mmio_phys_addr = gpa;
1643 vcpu->mmio_size = bytes;
1644 vcpu->mmio_is_write = 0;
1645
1646 return X86EMUL_UNHANDLEABLE;
1647}
1648
1649static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1650 const void *val, int bytes)
1651{
1652 int ret;
1653
72dc67a6 1654 down_read(&vcpu->kvm->slots_lock);
bbd9b64e 1655 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
10589a46 1656 if (ret < 0) {
72dc67a6 1657 up_read(&vcpu->kvm->slots_lock);
bbd9b64e 1658 return 0;
10589a46 1659 }
bbd9b64e 1660 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
72dc67a6 1661 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1662 return 1;
1663}
1664
1665static int emulator_write_emulated_onepage(unsigned long addr,
1666 const void *val,
1667 unsigned int bytes,
1668 struct kvm_vcpu *vcpu)
1669{
1670 struct kvm_io_device *mmio_dev;
10589a46
MT		 1671 gpa_t gpa;
1672
72dc67a6 1673 down_read(&vcpu->kvm->slots_lock);
10589a46 1674 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
72dc67a6 1675 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1676
1677 if (gpa == UNMAPPED_GVA) {
c3c91fee 1678 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 1679 return X86EMUL_PROPAGATE_FAULT;
1680 }
1681
1682 /* For APIC access vmexit */
1683 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1684 goto mmio;
1685
1686 if (emulator_write_phys(vcpu, gpa, val, bytes))
1687 return X86EMUL_CONTINUE;
1688
1689mmio:
1690 /*
1691 * Is this MMIO handled locally?
1692 */
10589a46 1693 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1694 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1695 if (mmio_dev) {
1696 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
10589a46 1697 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1698 return X86EMUL_CONTINUE;
1699 }
10589a46 1700 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1701
1702 vcpu->mmio_needed = 1;
1703 vcpu->mmio_phys_addr = gpa;
1704 vcpu->mmio_size = bytes;
1705 vcpu->mmio_is_write = 1;
1706 memcpy(vcpu->mmio_data, val, bytes);
1707
1708 return X86EMUL_CONTINUE;
1709}
1710
1711int emulator_write_emulated(unsigned long addr,
1712 const void *val,
1713 unsigned int bytes,
1714 struct kvm_vcpu *vcpu)
1715{
1716 /* Crossing a page boundary? */
1717 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1718 int rc, now;
1719
1720 now = -addr & ~PAGE_MASK;
1721 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1722 if (rc != X86EMUL_CONTINUE)
1723 return rc;
1724 addr += now;
1725 val += now;
1726 bytes -= now;
1727 }
1728 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1729}
1730EXPORT_SYMBOL_GPL(emulator_write_emulated);
1731
1732static int emulator_cmpxchg_emulated(unsigned long addr,
1733 const void *old,
1734 const void *new,
1735 unsigned int bytes,
1736 struct kvm_vcpu *vcpu)
1737{
1738 static int reported;
1739
1740 if (!reported) {
1741 reported = 1;
1742 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1743 }
2bacc55c
MT		 1744#ifndef CONFIG_X86_64
1745 /* guests cmpxchg8b have to be emulated atomically */
1746 if (bytes == 8) {
10589a46 1747 gpa_t gpa;
2bacc55c 1748 struct page *page;
c0b49b0d 1749 char *kaddr;
2bacc55c
MT		 1750 u64 val;
1751
72dc67a6 1752 down_read(&vcpu->kvm->slots_lock);
10589a46
MT		 1753 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1754
2bacc55c
MT		 1755 if (gpa == UNMAPPED_GVA ||
1756 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1757 goto emul_write;
1758
1759 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
1760 goto emul_write;
1761
1762 val = *(u64 *)new;
72dc67a6
IE		 1763
1764 down_read(&current->mm->mmap_sem);
2bacc55c 1765 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1766 up_read(&current->mm->mmap_sem);
1767
c0b49b0d
AM		 1768 kaddr = kmap_atomic(page, KM_USER0);
1769 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
1770 kunmap_atomic(kaddr, KM_USER0);
2bacc55c 1771 kvm_release_page_dirty(page);
10589a46 1772 emul_write:
72dc67a6 1773 up_read(&vcpu->kvm->slots_lock);
2bacc55c 1774 }
2bacc55c
MT		 1775#endif
1776
bbd9b64e
CO		 1777 return emulator_write_emulated(addr, new, bytes, vcpu);
1778}
1779
1780static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1781{
1782 return kvm_x86_ops->get_segment_base(vcpu, seg);
1783}
1784
1785int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1786{
1787 return X86EMUL_CONTINUE;
1788}
1789
1790int emulate_clts(struct kvm_vcpu *vcpu)
1791{
ad312c7c 1792 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 1793 return X86EMUL_CONTINUE;
1794}
1795
1796int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1797{
1798 struct kvm_vcpu *vcpu = ctxt->vcpu;
1799
1800 switch (dr) {
1801 case 0 ... 3:
1802 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1803 return X86EMUL_CONTINUE;
1804 default:
1805 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1806 return X86EMUL_UNHANDLEABLE;
1807 }
1808}
1809
1810int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1811{
1812 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1813 int exception;
1814
1815 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1816 if (exception) {
1817 /* FIXME: better handling */
1818 return X86EMUL_UNHANDLEABLE;
1819 }
1820 return X86EMUL_CONTINUE;
1821}
1822
1823void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1824{
1825 static int reported;
1826 u8 opcodes[4];
ad312c7c 1827 unsigned long rip = vcpu->arch.rip;
bbd9b64e
CO		 1828 unsigned long rip_linear;
1829
1830 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1831
1832 if (reported)
1833 return;
1834
1835 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1836
1837 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1838 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1839 reported = 1;
1840}
1841EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1842
1843struct x86_emulate_ops emulate_ops = {
1844 .read_std = emulator_read_std,
bbd9b64e
CO		 1845 .read_emulated = emulator_read_emulated,
1846 .write_emulated = emulator_write_emulated,
1847 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1848};
1849
1850int emulate_instruction(struct kvm_vcpu *vcpu,
1851 struct kvm_run *run,
1852 unsigned long cr2,
1853 u16 error_code,
571008da 1854 int emulation_type)
bbd9b64e
CO		 1855{
1856 int r;
571008da 1857 struct decode_cache *c;
bbd9b64e 1858
ad312c7c 1859 vcpu->arch.mmio_fault_cr2 = cr2;
bbd9b64e
CO		 1860 kvm_x86_ops->cache_regs(vcpu);
1861
1862 vcpu->mmio_is_write = 0;
ad312c7c 1863 vcpu->arch.pio.string = 0;
bbd9b64e 1864
571008da 1865 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
bbd9b64e
CO		 1866 int cs_db, cs_l;
1867 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1868
ad312c7c
ZX		 1869 vcpu->arch.emulate_ctxt.vcpu = vcpu;
1870 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1871 vcpu->arch.emulate_ctxt.mode =
1872 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 1873 ? X86EMUL_MODE_REAL : cs_l
1874 ? X86EMUL_MODE_PROT64 : cs_db
1875 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1876
ad312c7c
ZX		 1877 if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1878 vcpu->arch.emulate_ctxt.cs_base = 0;
1879 vcpu->arch.emulate_ctxt.ds_base = 0;
1880 vcpu->arch.emulate_ctxt.es_base = 0;
1881 vcpu->arch.emulate_ctxt.ss_base = 0;
bbd9b64e 1882 } else {
ad312c7c 1883 vcpu->arch.emulate_ctxt.cs_base =
bbd9b64e 1884 get_segment_base(vcpu, VCPU_SREG_CS);
ad312c7c 1885 vcpu->arch.emulate_ctxt.ds_base =
bbd9b64e 1886 get_segment_base(vcpu, VCPU_SREG_DS);
ad312c7c 1887 vcpu->arch.emulate_ctxt.es_base =
bbd9b64e 1888 get_segment_base(vcpu, VCPU_SREG_ES);
ad312c7c 1889 vcpu->arch.emulate_ctxt.ss_base =
bbd9b64e
CO		 1890 get_segment_base(vcpu, VCPU_SREG_SS);
1891 }
1892
ad312c7c 1893 vcpu->arch.emulate_ctxt.gs_base =
bbd9b64e 1894 get_segment_base(vcpu, VCPU_SREG_GS);
ad312c7c 1895 vcpu->arch.emulate_ctxt.fs_base =
bbd9b64e
CO		 1896 get_segment_base(vcpu, VCPU_SREG_FS);
1897
ad312c7c 1898 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
571008da
SY		 1899
1900 /* Reject the instructions other than VMCALL/VMMCALL when
1901 * try to emulate invalid opcode */
1902 c = &vcpu->arch.emulate_ctxt.decode;
1903 if ((emulation_type & EMULTYPE_TRAP_UD) &&
1904 (!(c->twobyte && c->b == 0x01 &&
1905 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
1906 c->modrm_mod == 3 && c->modrm_rm == 1)))
1907 return EMULATE_FAIL;
1908
f2b5756b 1909 ++vcpu->stat.insn_emulation;
bbd9b64e 1910 if (r) {
f2b5756b 1911 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1912 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1913 return EMULATE_DONE;
1914 return EMULATE_FAIL;
1915 }
1916 }
1917
ad312c7c 1918 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 1919
ad312c7c 1920 if (vcpu->arch.pio.string)
bbd9b64e
CO		 1921 return EMULATE_DO_MMIO;
1922
1923 if ((r || vcpu->mmio_is_write) && run) {
1924 run->exit_reason = KVM_EXIT_MMIO;
1925 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1926 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1927 run->mmio.len = vcpu->mmio_size;
1928 run->mmio.is_write = vcpu->mmio_is_write;
1929 }
1930
1931 if (r) {
1932 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1933 return EMULATE_DONE;
1934 if (!vcpu->mmio_needed) {
1935 kvm_report_emulation_failure(vcpu, "mmio");
1936 return EMULATE_FAIL;
1937 }
1938 return EMULATE_DO_MMIO;
1939 }
1940
1941 kvm_x86_ops->decache_regs(vcpu);
ad312c7c 1942 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 1943
1944 if (vcpu->mmio_is_write) {
1945 vcpu->mmio_needed = 0;
1946 return EMULATE_DO_MMIO;
1947 }
1948
1949 return EMULATE_DONE;
1950}
1951EXPORT_SYMBOL_GPL(emulate_instruction);
1952
de7d789a
CO		 1953static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1954{
1955 int i;
1956
ad312c7c
ZX		 1957 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
1958 if (vcpu->arch.pio.guest_pages[i]) {
1959 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
1960 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 1961 }
1962}
1963
1964static int pio_copy_data(struct kvm_vcpu *vcpu)
1965{
ad312c7c 1966 void *p = vcpu->arch.pio_data;
de7d789a
CO		 1967 void *q;
1968 unsigned bytes;
ad312c7c 1969 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 1970
ad312c7c 1971 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 1972 PAGE_KERNEL);
1973 if (!q) {
1974 free_pio_guest_pages(vcpu);
1975 return -ENOMEM;
1976 }
ad312c7c
ZX		 1977 q += vcpu->arch.pio.guest_page_offset;
1978 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
1979 if (vcpu->arch.pio.in)
de7d789a
CO		 1980 memcpy(q, p, bytes);
1981 else
1982 memcpy(p, q, bytes);
ad312c7c 1983 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 1984 vunmap(q);
1985 free_pio_guest_pages(vcpu);
1986 return 0;
1987}
1988
1989int complete_pio(struct kvm_vcpu *vcpu)
1990{
ad312c7c 1991 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 1992 long delta;
1993 int r;
1994
1995 kvm_x86_ops->cache_regs(vcpu);
1996
1997 if (!io->string) {
1998 if (io->in)
ad312c7c 1999 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
de7d789a
CO		 2000 io->size);
2001 } else {
2002 if (io->in) {
2003 r = pio_copy_data(vcpu);
2004 if (r) {
2005 kvm_x86_ops->cache_regs(vcpu);
2006 return r;
2007 }
2008 }
2009
2010 delta = 1;
2011 if (io->rep) {
2012 delta *= io->cur_count;
2013 /*
2014 * The size of the register should really depend on
2015 * current address size.
2016 */
ad312c7c 2017 vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
de7d789a
CO		 2018 }
2019 if (io->down)
2020 delta = -delta;
2021 delta *= io->size;
2022 if (io->in)
ad312c7c 2023 vcpu->arch.regs[VCPU_REGS_RDI] += delta;
de7d789a 2024 else
ad312c7c 2025 vcpu->arch.regs[VCPU_REGS_RSI] += delta;
de7d789a
CO		 2026 }
2027
2028 kvm_x86_ops->decache_regs(vcpu);
2029
2030 io->count -= io->cur_count;
2031 io->cur_count = 0;
2032
2033 return 0;
2034}
2035
2036static void kernel_pio(struct kvm_io_device *pio_dev,
2037 struct kvm_vcpu *vcpu,
2038 void *pd)
2039{
2040 /* TODO: String I/O for in kernel device */
2041
2042 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 2043 if (vcpu->arch.pio.in)
2044 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2045 vcpu->arch.pio.size,
de7d789a
CO		 2046 pd);
2047 else
ad312c7c
ZX		 2048 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2049 vcpu->arch.pio.size,
de7d789a
CO		 2050 pd);
2051 mutex_unlock(&vcpu->kvm->lock);
2052}
2053
2054static void pio_string_write(struct kvm_io_device *pio_dev,
2055 struct kvm_vcpu *vcpu)
2056{
ad312c7c
ZX		 2057 struct kvm_pio_request *io = &vcpu->arch.pio;
2058 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2059 int i;
2060
2061 mutex_lock(&vcpu->kvm->lock);
2062 for (i = 0; i < io->cur_count; i++) {
2063 kvm_iodevice_write(pio_dev, io->port,
2064 io->size,
2065 pd);
2066 pd += io->size;
2067 }
2068 mutex_unlock(&vcpu->kvm->lock);
2069}
2070
2071static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2072 gpa_t addr)
2073{
2074 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
2075}
2076
2077int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2078 int size, unsigned port)
2079{
2080 struct kvm_io_device *pio_dev;
2081
2082 vcpu->run->exit_reason = KVM_EXIT_IO;
2083 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2084 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2085 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2086 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2087 vcpu->run->io.port = vcpu->arch.pio.port = port;
2088 vcpu->arch.pio.in = in;
2089 vcpu->arch.pio.string = 0;
2090 vcpu->arch.pio.down = 0;
2091 vcpu->arch.pio.guest_page_offset = 0;
2092 vcpu->arch.pio.rep = 0;
de7d789a
CO		 2093
2094 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2095 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
de7d789a
CO		 2096 kvm_x86_ops->decache_regs(vcpu);
2097
2098 kvm_x86_ops->skip_emulated_instruction(vcpu);
2099
2100 pio_dev = vcpu_find_pio_dev(vcpu, port);
2101 if (pio_dev) {
ad312c7c 2102 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2103 complete_pio(vcpu);
2104 return 1;
2105 }
2106 return 0;
2107}
2108EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2109
2110int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2111 int size, unsigned long count, int down,
2112 gva_t address, int rep, unsigned port)
2113{
2114 unsigned now, in_page;
2115 int i, ret = 0;
2116 int nr_pages = 1;
2117 struct page *page;
2118 struct kvm_io_device *pio_dev;
2119
2120 vcpu->run->exit_reason = KVM_EXIT_IO;
2121 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2122 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2123 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2124 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2125 vcpu->run->io.port = vcpu->arch.pio.port = port;
2126 vcpu->arch.pio.in = in;
2127 vcpu->arch.pio.string = 1;
2128 vcpu->arch.pio.down = down;
2129 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2130 vcpu->arch.pio.rep = rep;
de7d789a
CO		 2131
2132 if (!count) {
2133 kvm_x86_ops->skip_emulated_instruction(vcpu);
2134 return 1;
2135 }
2136
2137 if (!down)
2138 in_page = PAGE_SIZE - offset_in_page(address);
2139 else
2140 in_page = offset_in_page(address) + size;
2141 now = min(count, (unsigned long)in_page / size);
2142 if (!now) {
2143 /*
2144 * String I/O straddles page boundary. Pin two guest pages
2145 * so that we satisfy atomicity constraints. Do just one
2146 * transaction to avoid complexity.
2147 */
2148 nr_pages = 2;
2149 now = 1;
2150 }
2151 if (down) {
2152 /*
2153 * String I/O in reverse. Yuck. Kill the guest, fix later.
2154 */
2155 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2156 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2157 return 1;
2158 }
2159 vcpu->run->io.count = now;
ad312c7c 2160 vcpu->arch.pio.cur_count = now;
de7d789a 2161
ad312c7c 2162 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2163 kvm_x86_ops->skip_emulated_instruction(vcpu);
2164
2165 for (i = 0; i < nr_pages; ++i) {
72dc67a6 2166 down_read(&vcpu->kvm->slots_lock);
de7d789a 2167 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2168 vcpu->arch.pio.guest_pages[i] = page;
72dc67a6 2169 up_read(&vcpu->kvm->slots_lock);
de7d789a 2170 if (!page) {
c1a5d4f9 2171 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2172 free_pio_guest_pages(vcpu);
2173 return 1;
2174 }
2175 }
2176
2177 pio_dev = vcpu_find_pio_dev(vcpu, port);
ad312c7c 2178 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2179 /* string PIO write */
2180 ret = pio_copy_data(vcpu);
2181 if (ret >= 0 && pio_dev) {
2182 pio_string_write(pio_dev, vcpu);
2183 complete_pio(vcpu);
ad312c7c 2184 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2185 ret = 1;
2186 }
2187 } else if (pio_dev)
2188 pr_unimpl(vcpu, "no string pio read support yet, "
2189 "port %x size %d count %ld\n",
2190 port, size, count);
2191
2192 return ret;
2193}
2194EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2195
f8c16bba 2196int kvm_arch_init(void *opaque)
043405e1 2197{
56c6d28a 2198 int r;
f8c16bba
ZX		 2199 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2200
f8c16bba
ZX		 2201 if (kvm_x86_ops) {
2202 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2203 r = -EEXIST;
2204 goto out;
f8c16bba
ZX		 2205 }
2206
2207 if (!ops->cpu_has_kvm_support()) {
2208 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2209 r = -EOPNOTSUPP;
2210 goto out;
f8c16bba
ZX		 2211 }
2212 if (ops->disabled_by_bios()) {
2213 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2214 r = -EOPNOTSUPP;
2215 goto out;
f8c16bba
ZX		 2216 }
2217
97db56ce
AK		 2218 r = kvm_mmu_module_init();
2219 if (r)
2220 goto out;
2221
2222 kvm_init_msr_list();
2223
f8c16bba 2224 kvm_x86_ops = ops;
56c6d28a 2225 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 2226 return 0;
56c6d28a
ZX		 2227
2228out:
56c6d28a 2229 return r;
043405e1 2230}
8776e519 2231
f8c16bba
ZX		 2232void kvm_arch_exit(void)
2233{
2234 kvm_x86_ops = NULL;
56c6d28a
ZX		 2235 kvm_mmu_module_exit();
2236}
f8c16bba 2237
8776e519
HB		 2238int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2239{
2240 ++vcpu->stat.halt_exits;
2241 if (irqchip_in_kernel(vcpu->kvm)) {
ad312c7c 2242 vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
8776e519 2243 kvm_vcpu_block(vcpu);
ad312c7c 2244 if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
8776e519
HB		 2245 return -EINTR;
2246 return 1;
2247 } else {
2248 vcpu->run->exit_reason = KVM_EXIT_HLT;
2249 return 0;
2250 }
2251}
2252EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2253
2254int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2255{
2256 unsigned long nr, a0, a1, a2, a3, ret;
2257
2258 kvm_x86_ops->cache_regs(vcpu);
2259
ad312c7c
ZX		 2260 nr = vcpu->arch.regs[VCPU_REGS_RAX];
2261 a0 = vcpu->arch.regs[VCPU_REGS_RBX];
2262 a1 = vcpu->arch.regs[VCPU_REGS_RCX];
2263 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2264 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
8776e519
HB		 2265
2266 if (!is_long_mode(vcpu)) {
2267 nr &= 0xFFFFFFFF;
2268 a0 &= 0xFFFFFFFF;
2269 a1 &= 0xFFFFFFFF;
2270 a2 &= 0xFFFFFFFF;
2271 a3 &= 0xFFFFFFFF;
2272 }
2273
2274 switch (nr) {
b93463aa
AK		 2275 case KVM_HC_VAPIC_POLL_IRQ:
2276 ret = 0;
2277 break;
8776e519
HB		 2278 default:
2279 ret = -KVM_ENOSYS;
2280 break;
2281 }
ad312c7c 2282 vcpu->arch.regs[VCPU_REGS_RAX] = ret;
8776e519
HB		 2283 kvm_x86_ops->decache_regs(vcpu);
2284 return 0;
2285}
2286EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2287
2288int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2289{
2290 char instruction[3];
2291 int ret = 0;
2292
8776e519
HB		 2293
2294 /*
2295 * Blow out the MMU to ensure that no other VCPU has an active mapping
2296 * to ensure that the updated hypercall appears atomically across all
2297 * VCPUs.
2298 */
2299 kvm_mmu_zap_all(vcpu->kvm);
2300
2301 kvm_x86_ops->cache_regs(vcpu);
2302 kvm_x86_ops->patch_hypercall(vcpu, instruction);
ad312c7c 2303 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
8776e519
HB		 2304 != X86EMUL_CONTINUE)
2305 ret = -EFAULT;
2306
8776e519
HB		 2307 return ret;
2308}
2309
2310static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2311{
2312 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2313}
2314
2315void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2316{
2317 struct descriptor_table dt = { limit, base };
2318
2319 kvm_x86_ops->set_gdt(vcpu, &dt);
2320}
2321
2322void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2323{
2324 struct descriptor_table dt = { limit, base };
2325
2326 kvm_x86_ops->set_idt(vcpu, &dt);
2327}
2328
2329void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2330 unsigned long *rflags)
2331{
2332 lmsw(vcpu, msw);
2333 *rflags = kvm_x86_ops->get_rflags(vcpu);
2334}
2335
2336unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2337{
2338 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2339 switch (cr) {
2340 case 0:
ad312c7c 2341 return vcpu->arch.cr0;
8776e519 2342 case 2:
ad312c7c 2343 return vcpu->arch.cr2;
8776e519 2344 case 3:
ad312c7c 2345 return vcpu->arch.cr3;
8776e519 2346 case 4:
ad312c7c 2347 return vcpu->arch.cr4;
152ff9be
JR		 2348 case 8:
2349 return get_cr8(vcpu);
8776e519
HB		 2350 default:
2351 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2352 return 0;
2353 }
2354}
2355
2356void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2357 unsigned long *rflags)
2358{
2359 switch (cr) {
2360 case 0:
ad312c7c 2361 set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2362 *rflags = kvm_x86_ops->get_rflags(vcpu);
2363 break;
2364 case 2:
ad312c7c 2365 vcpu->arch.cr2 = val;
8776e519
HB		 2366 break;
2367 case 3:
2368 set_cr3(vcpu, val);
2369 break;
2370 case 4:
ad312c7c 2371 set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2372 break;
152ff9be
JR		 2373 case 8:
2374 set_cr8(vcpu, val & 0xfUL);
2375 break;
8776e519
HB		 2376 default:
2377 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2378 }
2379}
2380
07716717
DK		 2381static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2382{
ad312c7c
ZX		 2383 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2384 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2385
2386 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2387 /* when no next entry is found, the current entry[i] is reselected */
2388 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2389 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2390 if (ej->function == e->function) {
2391 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2392 return j;
2393 }
2394 }
2395 return 0; /* silence gcc, even though control never reaches here */
2396}
2397
2398/* find an entry with matching function, matching index (if needed), and that
2399 * should be read next (if it's stateful) */
2400static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2401 u32 function, u32 index)
2402{
2403 if (e->function != function)
2404 return 0;
2405 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2406 return 0;
2407 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2408 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2409 return 0;
2410 return 1;
2411}
2412
8776e519
HB		 2413void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2414{
2415 int i;
07716717
DK		 2416 u32 function, index;
2417 struct kvm_cpuid_entry2 *e, *best;
8776e519
HB		 2418
2419 kvm_x86_ops->cache_regs(vcpu);
ad312c7c
ZX		 2420 function = vcpu->arch.regs[VCPU_REGS_RAX];
2421 index = vcpu->arch.regs[VCPU_REGS_RCX];
2422 vcpu->arch.regs[VCPU_REGS_RAX] = 0;
2423 vcpu->arch.regs[VCPU_REGS_RBX] = 0;
2424 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
2425 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
8776e519 2426 best = NULL;
ad312c7c
ZX		 2427 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2428 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 2429 if (is_matching_cpuid_entry(e, function, index)) {
2430 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2431 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 2432 best = e;
2433 break;
2434 }
2435 /*
2436 * Both basic or both extended?
2437 */
2438 if (((e->function ^ function) & 0x80000000) == 0)
2439 if (!best || e->function > best->function)
2440 best = e;
2441 }
2442 if (best) {
ad312c7c
ZX		 2443 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
2444 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
2445 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
2446 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
8776e519
HB		 2447 }
2448 kvm_x86_ops->decache_regs(vcpu);
2449 kvm_x86_ops->skip_emulated_instruction(vcpu);
2450}
2451EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 2452
b6c7a5dc
HB		 2453/*
2454 * Check if userspace requested an interrupt window, and that the
2455 * interrupt window is open.
2456 *
2457 * No need to exit to userspace if we already have an interrupt queued.
2458 */
2459static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2460 struct kvm_run *kvm_run)
2461{
ad312c7c 2462 return (!vcpu->arch.irq_summary &&
b6c7a5dc 2463 kvm_run->request_interrupt_window &&
ad312c7c 2464 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 2465 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2466}
2467
2468static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2469 struct kvm_run *kvm_run)
2470{
2471 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2472 kvm_run->cr8 = get_cr8(vcpu);
2473 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2474 if (irqchip_in_kernel(vcpu->kvm))
2475 kvm_run->ready_for_interrupt_injection = 1;
2476 else
2477 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 2478 (vcpu->arch.interrupt_window_open &&
2479 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 2480}
2481
b93463aa
AK		 2482static void vapic_enter(struct kvm_vcpu *vcpu)
2483{
2484 struct kvm_lapic *apic = vcpu->arch.apic;
2485 struct page *page;
2486
2487 if (!apic || !apic->vapic_addr)
2488 return;
2489
10589a46 2490 down_read(&current->mm->mmap_sem);
b93463aa 2491 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
10589a46 2492 up_read(&current->mm->mmap_sem);
72dc67a6
IE		 2493
2494 vcpu->arch.apic->vapic_page = page;
b93463aa
AK		 2495}
2496
2497static void vapic_exit(struct kvm_vcpu *vcpu)
2498{
2499 struct kvm_lapic *apic = vcpu->arch.apic;
2500
2501 if (!apic || !apic->vapic_addr)
2502 return;
2503
2504 kvm_release_page_dirty(apic->vapic_page);
2505 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2506}
2507
b6c7a5dc
HB		 2508static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2509{
2510 int r;
2511
ad312c7c 2512 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 2513 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 2514 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 2515 kvm_lapic_reset(vcpu);
2516 r = kvm_x86_ops->vcpu_reset(vcpu);
2517 if (r)
2518 return r;
ad312c7c 2519 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 2520 }
2521
b93463aa
AK		 2522 vapic_enter(vcpu);
2523
b6c7a5dc
HB		 2524preempted:
2525 if (vcpu->guest_debug.enabled)
2526 kvm_x86_ops->guest_debug_pre(vcpu);
2527
2528again:
2529 r = kvm_mmu_reload(vcpu);
2530 if (unlikely(r))
2531 goto out;
2532
2f52d58c
AK		 2533 if (vcpu->requests) {
2534 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2535 __kvm_migrate_apic_timer(vcpu);
b93463aa
AK		 2536 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2537 &vcpu->requests)) {
2538 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2539 r = 0;
2540 goto out;
2541 }
2f52d58c 2542 }
b93463aa 2543
b6c7a5dc
HB		 2544 kvm_inject_pending_timer_irqs(vcpu);
2545
2546 preempt_disable();
2547
2548 kvm_x86_ops->prepare_guest_switch(vcpu);
2549 kvm_load_guest_fpu(vcpu);
2550
2551 local_irq_disable();
2552
6c142801
AK		 2553 if (need_resched()) {
2554 local_irq_enable();
2555 preempt_enable();
2556 r = 1;
2557 goto out;
2558 }
2559
b6c7a5dc
HB		 2560 if (signal_pending(current)) {
2561 local_irq_enable();
2562 preempt_enable();
2563 r = -EINTR;
2564 kvm_run->exit_reason = KVM_EXIT_INTR;
2565 ++vcpu->stat.signal_exits;
2566 goto out;
2567 }
2568
ad312c7c 2569 if (vcpu->arch.exception.pending)
298101da
AK		 2570 __queue_exception(vcpu);
2571 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 2572 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 2573 else
b6c7a5dc
HB		 2574 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2575
b93463aa
AK		 2576 kvm_lapic_sync_to_vapic(vcpu);
2577
b6c7a5dc
HB		 2578 vcpu->guest_mode = 1;
2579 kvm_guest_enter();
2580
2581 if (vcpu->requests)
2582 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2583 kvm_x86_ops->tlb_flush(vcpu);
2584
2585 kvm_x86_ops->run(vcpu, kvm_run);
2586
2587 vcpu->guest_mode = 0;
2588 local_irq_enable();
2589
2590 ++vcpu->stat.exits;
2591
2592 /*
2593 * We must have an instruction between local_irq_enable() and
2594 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2595 * the interrupt shadow. The stat.exits increment will do nicely.
2596 * But we need to prevent reordering, hence this barrier():
2597 */
2598 barrier();
2599
2600 kvm_guest_exit();
2601
2602 preempt_enable();
2603
2604 /*
2605 * Profile KVM exit RIPs:
2606 */
2607 if (unlikely(prof_on == KVM_PROFILING)) {
2608 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2609 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
b6c7a5dc
HB		 2610 }
2611
ad312c7c
ZX		 2612 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
2613 vcpu->arch.exception.pending = false;
298101da 2614
b93463aa
AK		 2615 kvm_lapic_sync_from_vapic(vcpu);
2616
b6c7a5dc
HB		 2617 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2618
2619 if (r > 0) {
2620 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2621 r = -EINTR;
2622 kvm_run->exit_reason = KVM_EXIT_INTR;
2623 ++vcpu->stat.request_irq_exits;
2624 goto out;
2625 }
e1beb1d3 2626 if (!need_resched())
b6c7a5dc 2627 goto again;
b6c7a5dc
HB		 2628 }
2629
2630out:
2631 if (r > 0) {
2632 kvm_resched(vcpu);
2633 goto preempted;
2634 }
2635
2636 post_kvm_run_save(vcpu, kvm_run);
2637
b93463aa
AK		 2638 vapic_exit(vcpu);
2639
b6c7a5dc
HB		 2640 return r;
2641}
2642
2643int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2644{
2645 int r;
2646 sigset_t sigsaved;
2647
2648 vcpu_load(vcpu);
2649
ad312c7c 2650 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
b6c7a5dc
HB		 2651 kvm_vcpu_block(vcpu);
2652 vcpu_put(vcpu);
2653 return -EAGAIN;
2654 }
2655
2656 if (vcpu->sigset_active)
2657 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2658
2659 /* re-sync apic's tpr */
2660 if (!irqchip_in_kernel(vcpu->kvm))
2661 set_cr8(vcpu, kvm_run->cr8);
2662
ad312c7c 2663 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 2664 r = complete_pio(vcpu);
2665 if (r)
2666 goto out;
2667 }
2668#if CONFIG_HAS_IOMEM
2669 if (vcpu->mmio_needed) {
2670 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2671 vcpu->mmio_read_completed = 1;
2672 vcpu->mmio_needed = 0;
2673 r = emulate_instruction(vcpu, kvm_run,
571008da
SY		 2674 vcpu->arch.mmio_fault_cr2, 0,
2675 EMULTYPE_NO_DECODE);
b6c7a5dc
HB		 2676 if (r == EMULATE_DO_MMIO) {
2677 /*
2678 * Read-modify-write. Back to userspace.
2679 */
2680 r = 0;
2681 goto out;
2682 }
2683 }
2684#endif
2685 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2686 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2687 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
b6c7a5dc
HB		 2688 kvm_x86_ops->decache_regs(vcpu);
2689 }
2690
2691 r = __vcpu_run(vcpu, kvm_run);
2692
2693out:
2694 if (vcpu->sigset_active)
2695 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2696
2697 vcpu_put(vcpu);
2698 return r;
2699}
2700
2701int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2702{
2703 vcpu_load(vcpu);
2704
2705 kvm_x86_ops->cache_regs(vcpu);
2706
ad312c7c
ZX		 2707 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
2708 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
2709 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
2710 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
2711 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
2712 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
2713 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
2714 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
b6c7a5dc 2715#ifdef CONFIG_X86_64
ad312c7c
ZX		 2716 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
2717 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
2718 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
2719 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
2720 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
2721 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
2722 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
2723 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
b6c7a5dc
HB		 2724#endif
2725
ad312c7c 2726 regs->rip = vcpu->arch.rip;
b6c7a5dc
HB		 2727 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2728
2729 /*
2730 * Don't leak debug flags in case they were set for guest debugging
2731 */
2732 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2733 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2734
2735 vcpu_put(vcpu);
2736
2737 return 0;
2738}
2739
2740int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2741{
2742 vcpu_load(vcpu);
2743
ad312c7c
ZX		 2744 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
2745 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
2746 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
2747 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
2748 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
2749 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
2750 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
2751 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
b6c7a5dc 2752#ifdef CONFIG_X86_64
ad312c7c
ZX		 2753 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
2754 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
2755 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
2756 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
2757 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
2758 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
2759 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
2760 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
b6c7a5dc
HB		 2761#endif
2762
ad312c7c 2763 vcpu->arch.rip = regs->rip;
b6c7a5dc
HB		 2764 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2765
2766 kvm_x86_ops->decache_regs(vcpu);
2767
2768 vcpu_put(vcpu);
2769
2770 return 0;
2771}
2772
2773static void get_segment(struct kvm_vcpu *vcpu,
2774 struct kvm_segment *var, int seg)
2775{
2776 return kvm_x86_ops->get_segment(vcpu, var, seg);
2777}
2778
2779void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2780{
2781 struct kvm_segment cs;
2782
2783 get_segment(vcpu, &cs, VCPU_SREG_CS);
2784 *db = cs.db;
2785 *l = cs.l;
2786}
2787EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2788
2789int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2790 struct kvm_sregs *sregs)
2791{
2792 struct descriptor_table dt;
2793 int pending_vec;
2794
2795 vcpu_load(vcpu);
2796
2797 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2798 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2799 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2800 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2801 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2802 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2803
2804 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2805 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2806
2807 kvm_x86_ops->get_idt(vcpu, &dt);
2808 sregs->idt.limit = dt.limit;
2809 sregs->idt.base = dt.base;
2810 kvm_x86_ops->get_gdt(vcpu, &dt);
2811 sregs->gdt.limit = dt.limit;
2812 sregs->gdt.base = dt.base;
2813
2814 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 2815 sregs->cr0 = vcpu->arch.cr0;
2816 sregs->cr2 = vcpu->arch.cr2;
2817 sregs->cr3 = vcpu->arch.cr3;
2818 sregs->cr4 = vcpu->arch.cr4;
b6c7a5dc 2819 sregs->cr8 = get_cr8(vcpu);
ad312c7c 2820 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 2821 sregs->apic_base = kvm_get_apic_base(vcpu);
2822
2823 if (irqchip_in_kernel(vcpu->kvm)) {
2824 memset(sregs->interrupt_bitmap, 0,
2825 sizeof sregs->interrupt_bitmap);
2826 pending_vec = kvm_x86_ops->get_irq(vcpu);
2827 if (pending_vec >= 0)
2828 set_bit(pending_vec,
2829 (unsigned long *)sregs->interrupt_bitmap);
2830 } else
ad312c7c 2831 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 2832 sizeof sregs->interrupt_bitmap);
2833
2834 vcpu_put(vcpu);
2835
2836 return 0;
2837}
2838
2839static void set_segment(struct kvm_vcpu *vcpu,
2840 struct kvm_segment *var, int seg)
2841{
2842 return kvm_x86_ops->set_segment(vcpu, var, seg);
2843}
2844
2845int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2846 struct kvm_sregs *sregs)
2847{
2848 int mmu_reset_needed = 0;
2849 int i, pending_vec, max_bits;
2850 struct descriptor_table dt;
2851
2852 vcpu_load(vcpu);
2853
2854 dt.limit = sregs->idt.limit;
2855 dt.base = sregs->idt.base;
2856 kvm_x86_ops->set_idt(vcpu, &dt);
2857 dt.limit = sregs->gdt.limit;
2858 dt.base = sregs->gdt.base;
2859 kvm_x86_ops->set_gdt(vcpu, &dt);
2860
ad312c7c
ZX		 2861 vcpu->arch.cr2 = sregs->cr2;
2862 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
2863 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc
HB		 2864
2865 set_cr8(vcpu, sregs->cr8);
2866
ad312c7c 2867 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc
HB		 2868#ifdef CONFIG_X86_64
2869 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2870#endif
2871 kvm_set_apic_base(vcpu, sregs->apic_base);
2872
2873 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2874
ad312c7c 2875 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
b6c7a5dc 2876 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
d7306163 2877 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc 2878
ad312c7c 2879 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 2880 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2881 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 2882 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 2883
2884 if (mmu_reset_needed)
2885 kvm_mmu_reset_context(vcpu);
2886
2887 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 2888 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
2889 sizeof vcpu->arch.irq_pending);
2890 vcpu->arch.irq_summary = 0;
2891 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
2892 if (vcpu->arch.irq_pending[i])
2893 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 2894 } else {
2895 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2896 pending_vec = find_first_bit(
2897 (const unsigned long *)sregs->interrupt_bitmap,
2898 max_bits);
2899 /* Only pending external irq is handled here */
2900 if (pending_vec < max_bits) {
2901 kvm_x86_ops->set_irq(vcpu, pending_vec);
2902 pr_debug("Set back pending irq %d\n",
2903 pending_vec);
2904 }
2905 }
2906
2907 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2908 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2909 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2910 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2911 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2912 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2913
2914 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2915 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2916
2917 vcpu_put(vcpu);
2918
2919 return 0;
2920}
2921
2922int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2923 struct kvm_debug_guest *dbg)
2924{
2925 int r;
2926
2927 vcpu_load(vcpu);
2928
2929 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2930
2931 vcpu_put(vcpu);
2932
2933 return r;
2934}
2935
d0752060
HB		 2936/*
2937 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2938 * we have asm/x86/processor.h
2939 */
2940struct fxsave {
2941 u16 cwd;
2942 u16 swd;
2943 u16 twd;
2944 u16 fop;
2945 u64 rip;
2946 u64 rdp;
2947 u32 mxcsr;
2948 u32 mxcsr_mask;
2949 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2950#ifdef CONFIG_X86_64
2951 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2952#else
2953 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2954#endif
2955};
2956
8b006791
ZX		 2957/*
2958 * Translate a guest virtual address to a guest physical address.
2959 */
2960int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2961 struct kvm_translation *tr)
2962{
2963 unsigned long vaddr = tr->linear_address;
2964 gpa_t gpa;
2965
2966 vcpu_load(vcpu);
72dc67a6 2967 down_read(&vcpu->kvm->slots_lock);
ad312c7c 2968 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
72dc67a6 2969 up_read(&vcpu->kvm->slots_lock);
8b006791
ZX		 2970 tr->physical_address = gpa;
2971 tr->valid = gpa != UNMAPPED_GVA;
2972 tr->writeable = 1;
2973 tr->usermode = 0;
8b006791
ZX		 2974 vcpu_put(vcpu);
2975
2976 return 0;
2977}
2978
d0752060
HB		 2979int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2980{
ad312c7c 2981 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 2982
2983 vcpu_load(vcpu);
2984
2985 memcpy(fpu->fpr, fxsave->st_space, 128);
2986 fpu->fcw = fxsave->cwd;
2987 fpu->fsw = fxsave->swd;
2988 fpu->ftwx = fxsave->twd;
2989 fpu->last_opcode = fxsave->fop;
2990 fpu->last_ip = fxsave->rip;
2991 fpu->last_dp = fxsave->rdp;
2992 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2993
2994 vcpu_put(vcpu);
2995
2996 return 0;
2997}
2998
2999int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3000{
ad312c7c 3001 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 3002
3003 vcpu_load(vcpu);
3004
3005 memcpy(fxsave->st_space, fpu->fpr, 128);
3006 fxsave->cwd = fpu->fcw;
3007 fxsave->swd = fpu->fsw;
3008 fxsave->twd = fpu->ftwx;
3009 fxsave->fop = fpu->last_opcode;
3010 fxsave->rip = fpu->last_ip;
3011 fxsave->rdp = fpu->last_dp;
3012 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3013
3014 vcpu_put(vcpu);
3015
3016 return 0;
3017}
3018
3019void fx_init(struct kvm_vcpu *vcpu)
3020{
3021 unsigned after_mxcsr_mask;
3022
3023 /* Initialize guest FPU by resetting ours and saving into guest's */
3024 preempt_disable();
ad312c7c 3025 fx_save(&vcpu->arch.host_fx_image);
d0752060 3026 fpu_init();
ad312c7c
ZX		 3027 fx_save(&vcpu->arch.guest_fx_image);
3028 fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 3029 preempt_enable();
3030
ad312c7c 3031 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 3032 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 3033 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3034 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 3035 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3036}
3037EXPORT_SYMBOL_GPL(fx_init);
3038
3039void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3040{
3041 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3042 return;
3043
3044 vcpu->guest_fpu_loaded = 1;
ad312c7c
ZX		 3045 fx_save(&vcpu->arch.host_fx_image);
3046 fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 3047}
3048EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3049
3050void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3051{
3052 if (!vcpu->guest_fpu_loaded)
3053 return;
3054
3055 vcpu->guest_fpu_loaded = 0;
ad312c7c
ZX		 3056 fx_save(&vcpu->arch.guest_fx_image);
3057 fx_restore(&vcpu->arch.host_fx_image);
f096ed85 3058 ++vcpu->stat.fpu_reload;
d0752060
HB		 3059}
3060EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 3061
3062void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3063{
3064 kvm_x86_ops->vcpu_free(vcpu);
3065}
3066
3067struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3068 unsigned int id)
3069{
26e5215f
AK		 3070 return kvm_x86_ops->vcpu_create(kvm, id);
3071}
e9b11c17 3072
26e5215f
AK		 3073int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3074{
3075 int r;
e9b11c17
ZX		 3076
3077 /* We do fxsave: this must be aligned. */
ad312c7c 3078 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 3079
3080 vcpu_load(vcpu);
3081 r = kvm_arch_vcpu_reset(vcpu);
3082 if (r == 0)
3083 r = kvm_mmu_setup(vcpu);
3084 vcpu_put(vcpu);
3085 if (r < 0)
3086 goto free_vcpu;
3087
26e5215f 3088 return 0;
e9b11c17
ZX		 3089free_vcpu:
3090 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 3091 return r;
e9b11c17
ZX		 3092}
3093
d40ccc62 3094void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 3095{
3096 vcpu_load(vcpu);
3097 kvm_mmu_unload(vcpu);
3098 vcpu_put(vcpu);
3099
3100 kvm_x86_ops->vcpu_free(vcpu);
3101}
3102
3103int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
3104{
3105 return kvm_x86_ops->vcpu_reset(vcpu);
3106}
3107
3108void kvm_arch_hardware_enable(void *garbage)
3109{
3110 kvm_x86_ops->hardware_enable(garbage);
3111}
3112
3113void kvm_arch_hardware_disable(void *garbage)
3114{
3115 kvm_x86_ops->hardware_disable(garbage);
3116}
3117
3118int kvm_arch_hardware_setup(void)
3119{
3120 return kvm_x86_ops->hardware_setup();
3121}
3122
3123void kvm_arch_hardware_unsetup(void)
3124{
3125 kvm_x86_ops->hardware_unsetup();
3126}
3127
3128void kvm_arch_check_processor_compat(void *rtn)
3129{
3130 kvm_x86_ops->check_processor_compatibility(rtn);
3131}
3132
3133int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
3134{
3135 struct page *page;
3136 struct kvm *kvm;
3137 int r;
3138
3139 BUG_ON(vcpu->kvm == NULL);
3140 kvm = vcpu->kvm;
3141
ad312c7c 3142 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 3143 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
ad312c7c 3144 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
e9b11c17 3145 else
ad312c7c 3146 vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 3147
3148 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
3149 if (!page) {
3150 r = -ENOMEM;
3151 goto fail;
3152 }
ad312c7c 3153 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 3154
3155 r = kvm_mmu_create(vcpu);
3156 if (r < 0)
3157 goto fail_free_pio_data;
3158
3159 if (irqchip_in_kernel(kvm)) {
3160 r = kvm_create_lapic(vcpu);
3161 if (r < 0)
3162 goto fail_mmu_destroy;
3163 }
3164
3165 return 0;
3166
3167fail_mmu_destroy:
3168 kvm_mmu_destroy(vcpu);
3169fail_free_pio_data:
ad312c7c 3170 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 3171fail:
3172 return r;
3173}
3174
3175void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
3176{
3177 kvm_free_lapic(vcpu);
3178 kvm_mmu_destroy(vcpu);
ad312c7c 3179 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 3180}
d19a9cd2
ZX		 3181
3182struct kvm *kvm_arch_create_vm(void)
3183{
3184 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
3185
3186 if (!kvm)
3187 return ERR_PTR(-ENOMEM);
3188
f05e70ac 3189 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
d19a9cd2
ZX		 3190
3191 return kvm;
3192}
3193
3194static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
3195{
3196 vcpu_load(vcpu);
3197 kvm_mmu_unload(vcpu);
3198 vcpu_put(vcpu);
3199}
3200
3201static void kvm_free_vcpus(struct kvm *kvm)
3202{
3203 unsigned int i;
3204
3205 /*
3206 * Unpin any mmu pages first.
3207 */
3208 for (i = 0; i < KVM_MAX_VCPUS; ++i)
3209 if (kvm->vcpus[i])
3210 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
3211 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
3212 if (kvm->vcpus[i]) {
3213 kvm_arch_vcpu_free(kvm->vcpus[i]);
3214 kvm->vcpus[i] = NULL;
3215 }
3216 }
3217
3218}
3219
3220void kvm_arch_destroy_vm(struct kvm *kvm)
3221{
d7deeeb0
ZX		 3222 kfree(kvm->arch.vpic);
3223 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 3224 kvm_free_vcpus(kvm);
3225 kvm_free_physmem(kvm);
3226 kfree(kvm);
3227}
0de10343
ZX		 3228
3229int kvm_arch_set_memory_region(struct kvm *kvm,
3230 struct kvm_userspace_memory_region *mem,
3231 struct kvm_memory_slot old,
3232 int user_alloc)
3233{
3234 int npages = mem->memory_size >> PAGE_SHIFT;
3235 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
3236
3237 /*To keep backward compatibility with older userspace,
3238 *x86 needs to hanlde !user_alloc case.
3239 */
3240 if (!user_alloc) {
3241 if (npages && !old.rmap) {
72dc67a6 3242 down_write(&current->mm->mmap_sem);
0de10343
ZX		 3243 memslot->userspace_addr = do_mmap(NULL, 0,
3244 npages * PAGE_SIZE,
3245 PROT_READ | PROT_WRITE,
3246 MAP_SHARED | MAP_ANONYMOUS,
3247 0);
72dc67a6 3248 up_write(&current->mm->mmap_sem);
0de10343
ZX		 3249
3250 if (IS_ERR((void *)memslot->userspace_addr))
3251 return PTR_ERR((void *)memslot->userspace_addr);
3252 } else {
3253 if (!old.user_alloc && old.rmap) {
3254 int ret;
3255
72dc67a6 3256 down_write(&current->mm->mmap_sem);
0de10343
ZX		 3257 ret = do_munmap(current->mm, old.userspace_addr,
3258 old.npages * PAGE_SIZE);
72dc67a6 3259 up_write(&current->mm->mmap_sem);
0de10343
ZX		 3260 if (ret < 0)
3261 printk(KERN_WARNING
3262 "kvm_vm_ioctl_set_memory_region: "
3263 "failed to munmap memory\n");
3264 }
3265 }
3266 }
3267
f05e70ac 3268 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 3269 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
3270 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
3271 }
3272
3273 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
3274 kvm_flush_remote_tlbs(kvm);
3275
3276 return 0;
3277}
1d737c8a
ZX		 3278
3279int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
3280{
3281 return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
3282 || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
3283}
5736199a
ZX		 3284
3285static void vcpu_kick_intr(void *info)
3286{
3287#ifdef DEBUG
3288 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
3289 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
3290#endif
3291}
3292
3293void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
3294{
3295 int ipi_pcpu = vcpu->cpu;
3296
3297 if (waitqueue_active(&vcpu->wq)) {
3298 wake_up_interruptible(&vcpu->wq);
3299 ++vcpu->stat.halt_wakeup;
3300 }
3301 if (vcpu->guest_mode)
3302 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
3303}
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