]>
Commit | Line | Data |
---|---|---|
043405e1 CO |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * derived from drivers/kvm/kvm_main.c | |
5 | * | |
6 | * Copyright (C) 2006 Qumranet, Inc. | |
7 | * | |
8 | * Authors: | |
9 | * Avi Kivity <avi@qumranet.com> | |
10 | * Yaniv Kamay <yaniv@qumranet.com> | |
11 | * | |
12 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
13 | * the COPYING file in the top-level directory. | |
14 | * | |
15 | */ | |
16 | ||
edf88417 | 17 | #include <linux/kvm_host.h> |
5fb76f9b | 18 | #include "segment_descriptor.h" |
313a3dc7 | 19 | #include "irq.h" |
1d737c8a | 20 | #include "mmu.h" |
313a3dc7 CO |
21 | |
22 | #include <linux/kvm.h> | |
23 | #include <linux/fs.h> | |
24 | #include <linux/vmalloc.h> | |
5fb76f9b | 25 | #include <linux/module.h> |
0de10343 | 26 | #include <linux/mman.h> |
2bacc55c | 27 | #include <linux/highmem.h> |
043405e1 CO |
28 | |
29 | #include <asm/uaccess.h> | |
d825ed0a | 30 | #include <asm/msr.h> |
043405e1 | 31 | |
313a3dc7 | 32 | #define MAX_IO_MSRS 256 |
a03490ed CO |
33 | #define CR0_RESERVED_BITS \ |
34 | (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ | |
35 | | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ | |
36 | | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) | |
37 | #define CR4_RESERVED_BITS \ | |
38 | (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ | |
39 | | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ | |
40 | | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \ | |
41 | | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) | |
42 | ||
43 | #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) | |
15c4a640 | 44 | #define EFER_RESERVED_BITS 0xfffffffffffff2fe |
313a3dc7 | 45 | |
ba1389b7 AK |
46 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM |
47 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU | |
417bc304 | 48 | |
97896d04 ZX |
49 | struct kvm_x86_ops *kvm_x86_ops; |
50 | ||
417bc304 | 51 | struct kvm_stats_debugfs_item debugfs_entries[] = { |
ba1389b7 AK |
52 | { "pf_fixed", VCPU_STAT(pf_fixed) }, |
53 | { "pf_guest", VCPU_STAT(pf_guest) }, | |
54 | { "tlb_flush", VCPU_STAT(tlb_flush) }, | |
55 | { "invlpg", VCPU_STAT(invlpg) }, | |
56 | { "exits", VCPU_STAT(exits) }, | |
57 | { "io_exits", VCPU_STAT(io_exits) }, | |
58 | { "mmio_exits", VCPU_STAT(mmio_exits) }, | |
59 | { "signal_exits", VCPU_STAT(signal_exits) }, | |
60 | { "irq_window", VCPU_STAT(irq_window_exits) }, | |
61 | { "halt_exits", VCPU_STAT(halt_exits) }, | |
62 | { "halt_wakeup", VCPU_STAT(halt_wakeup) }, | |
63 | { "request_irq", VCPU_STAT(request_irq_exits) }, | |
64 | { "irq_exits", VCPU_STAT(irq_exits) }, | |
65 | { "host_state_reload", VCPU_STAT(host_state_reload) }, | |
66 | { "efer_reload", VCPU_STAT(efer_reload) }, | |
67 | { "fpu_reload", VCPU_STAT(fpu_reload) }, | |
68 | { "insn_emulation", VCPU_STAT(insn_emulation) }, | |
69 | { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) }, | |
4cee5764 AK |
70 | { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) }, |
71 | { "mmu_pte_write", VM_STAT(mmu_pte_write) }, | |
72 | { "mmu_pte_updated", VM_STAT(mmu_pte_updated) }, | |
73 | { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) }, | |
74 | { "mmu_flooded", VM_STAT(mmu_flooded) }, | |
75 | { "mmu_recycled", VM_STAT(mmu_recycled) }, | |
dfc5aa00 | 76 | { "mmu_cache_miss", VM_STAT(mmu_cache_miss) }, |
0f74a24c | 77 | { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, |
417bc304 HB |
78 | { NULL } |
79 | }; | |
80 | ||
81 | ||
5fb76f9b CO |
82 | unsigned long segment_base(u16 selector) |
83 | { | |
84 | struct descriptor_table gdt; | |
85 | struct segment_descriptor *d; | |
86 | unsigned long table_base; | |
87 | unsigned long v; | |
88 | ||
89 | if (selector == 0) | |
90 | return 0; | |
91 | ||
92 | asm("sgdt %0" : "=m"(gdt)); | |
93 | table_base = gdt.base; | |
94 | ||
95 | if (selector & 4) { /* from ldt */ | |
96 | u16 ldt_selector; | |
97 | ||
98 | asm("sldt %0" : "=g"(ldt_selector)); | |
99 | table_base = segment_base(ldt_selector); | |
100 | } | |
101 | d = (struct segment_descriptor *)(table_base + (selector & ~7)); | |
102 | v = d->base_low | ((unsigned long)d->base_mid << 16) | | |
103 | ((unsigned long)d->base_high << 24); | |
104 | #ifdef CONFIG_X86_64 | |
105 | if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11)) | |
106 | v |= ((unsigned long) \ | |
107 | ((struct segment_descriptor_64 *)d)->base_higher) << 32; | |
108 | #endif | |
109 | return v; | |
110 | } | |
111 | EXPORT_SYMBOL_GPL(segment_base); | |
112 | ||
6866b83e CO |
113 | u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) |
114 | { | |
115 | if (irqchip_in_kernel(vcpu->kvm)) | |
ad312c7c | 116 | return vcpu->arch.apic_base; |
6866b83e | 117 | else |
ad312c7c | 118 | return vcpu->arch.apic_base; |
6866b83e CO |
119 | } |
120 | EXPORT_SYMBOL_GPL(kvm_get_apic_base); | |
121 | ||
122 | void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data) | |
123 | { | |
124 | /* TODO: reserve bits check */ | |
125 | if (irqchip_in_kernel(vcpu->kvm)) | |
126 | kvm_lapic_set_base(vcpu, data); | |
127 | else | |
ad312c7c | 128 | vcpu->arch.apic_base = data; |
6866b83e CO |
129 | } |
130 | EXPORT_SYMBOL_GPL(kvm_set_apic_base); | |
131 | ||
298101da AK |
132 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr) |
133 | { | |
ad312c7c ZX |
134 | WARN_ON(vcpu->arch.exception.pending); |
135 | vcpu->arch.exception.pending = true; | |
136 | vcpu->arch.exception.has_error_code = false; | |
137 | vcpu->arch.exception.nr = nr; | |
298101da AK |
138 | } |
139 | EXPORT_SYMBOL_GPL(kvm_queue_exception); | |
140 | ||
c3c91fee AK |
141 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr, |
142 | u32 error_code) | |
143 | { | |
144 | ++vcpu->stat.pf_guest; | |
ad312c7c | 145 | if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) { |
c3c91fee AK |
146 | printk(KERN_DEBUG "kvm: inject_page_fault:" |
147 | " double fault 0x%lx\n", addr); | |
ad312c7c ZX |
148 | vcpu->arch.exception.nr = DF_VECTOR; |
149 | vcpu->arch.exception.error_code = 0; | |
c3c91fee AK |
150 | return; |
151 | } | |
ad312c7c | 152 | vcpu->arch.cr2 = addr; |
c3c91fee AK |
153 | kvm_queue_exception_e(vcpu, PF_VECTOR, error_code); |
154 | } | |
155 | ||
298101da AK |
156 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code) |
157 | { | |
ad312c7c ZX |
158 | WARN_ON(vcpu->arch.exception.pending); |
159 | vcpu->arch.exception.pending = true; | |
160 | vcpu->arch.exception.has_error_code = true; | |
161 | vcpu->arch.exception.nr = nr; | |
162 | vcpu->arch.exception.error_code = error_code; | |
298101da AK |
163 | } |
164 | EXPORT_SYMBOL_GPL(kvm_queue_exception_e); | |
165 | ||
166 | static void __queue_exception(struct kvm_vcpu *vcpu) | |
167 | { | |
ad312c7c ZX |
168 | kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr, |
169 | vcpu->arch.exception.has_error_code, | |
170 | vcpu->arch.exception.error_code); | |
298101da AK |
171 | } |
172 | ||
a03490ed CO |
173 | /* |
174 | * Load the pae pdptrs. Return true is they are all valid. | |
175 | */ | |
176 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3) | |
177 | { | |
178 | gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT; | |
179 | unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2; | |
180 | int i; | |
181 | int ret; | |
ad312c7c | 182 | u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)]; |
a03490ed | 183 | |
10589a46 | 184 | down_read(¤t->mm->mmap_sem); |
a03490ed CO |
185 | ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte, |
186 | offset * sizeof(u64), sizeof(pdpte)); | |
187 | if (ret < 0) { | |
188 | ret = 0; | |
189 | goto out; | |
190 | } | |
191 | for (i = 0; i < ARRAY_SIZE(pdpte); ++i) { | |
192 | if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) { | |
193 | ret = 0; | |
194 | goto out; | |
195 | } | |
196 | } | |
197 | ret = 1; | |
198 | ||
ad312c7c | 199 | memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs)); |
a03490ed | 200 | out: |
10589a46 | 201 | up_read(¤t->mm->mmap_sem); |
a03490ed CO |
202 | |
203 | return ret; | |
204 | } | |
205 | ||
d835dfec AK |
206 | static bool pdptrs_changed(struct kvm_vcpu *vcpu) |
207 | { | |
ad312c7c | 208 | u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)]; |
d835dfec AK |
209 | bool changed = true; |
210 | int r; | |
211 | ||
212 | if (is_long_mode(vcpu) || !is_pae(vcpu)) | |
213 | return false; | |
214 | ||
10589a46 | 215 | down_read(¤t->mm->mmap_sem); |
ad312c7c | 216 | r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte)); |
d835dfec AK |
217 | if (r < 0) |
218 | goto out; | |
ad312c7c | 219 | changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0; |
d835dfec | 220 | out: |
10589a46 | 221 | up_read(¤t->mm->mmap_sem); |
d835dfec AK |
222 | |
223 | return changed; | |
224 | } | |
225 | ||
a03490ed CO |
226 | void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) |
227 | { | |
228 | if (cr0 & CR0_RESERVED_BITS) { | |
229 | printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n", | |
ad312c7c | 230 | cr0, vcpu->arch.cr0); |
c1a5d4f9 | 231 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
232 | return; |
233 | } | |
234 | ||
235 | if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) { | |
236 | printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n"); | |
c1a5d4f9 | 237 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
238 | return; |
239 | } | |
240 | ||
241 | if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) { | |
242 | printk(KERN_DEBUG "set_cr0: #GP, set PG flag " | |
243 | "and a clear PE flag\n"); | |
c1a5d4f9 | 244 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
245 | return; |
246 | } | |
247 | ||
248 | if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { | |
249 | #ifdef CONFIG_X86_64 | |
ad312c7c | 250 | if ((vcpu->arch.shadow_efer & EFER_LME)) { |
a03490ed CO |
251 | int cs_db, cs_l; |
252 | ||
253 | if (!is_pae(vcpu)) { | |
254 | printk(KERN_DEBUG "set_cr0: #GP, start paging " | |
255 | "in long mode while PAE is disabled\n"); | |
c1a5d4f9 | 256 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
257 | return; |
258 | } | |
259 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); | |
260 | if (cs_l) { | |
261 | printk(KERN_DEBUG "set_cr0: #GP, start paging " | |
262 | "in long mode while CS.L == 1\n"); | |
c1a5d4f9 | 263 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
264 | return; |
265 | ||
266 | } | |
267 | } else | |
268 | #endif | |
ad312c7c | 269 | if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) { |
a03490ed CO |
270 | printk(KERN_DEBUG "set_cr0: #GP, pdptrs " |
271 | "reserved bits\n"); | |
c1a5d4f9 | 272 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
273 | return; |
274 | } | |
275 | ||
276 | } | |
277 | ||
278 | kvm_x86_ops->set_cr0(vcpu, cr0); | |
ad312c7c | 279 | vcpu->arch.cr0 = cr0; |
a03490ed | 280 | |
a03490ed | 281 | kvm_mmu_reset_context(vcpu); |
a03490ed CO |
282 | return; |
283 | } | |
284 | EXPORT_SYMBOL_GPL(set_cr0); | |
285 | ||
286 | void lmsw(struct kvm_vcpu *vcpu, unsigned long msw) | |
287 | { | |
ad312c7c | 288 | set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)); |
a03490ed CO |
289 | } |
290 | EXPORT_SYMBOL_GPL(lmsw); | |
291 | ||
292 | void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | |
293 | { | |
294 | if (cr4 & CR4_RESERVED_BITS) { | |
295 | printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n"); | |
c1a5d4f9 | 296 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
297 | return; |
298 | } | |
299 | ||
300 | if (is_long_mode(vcpu)) { | |
301 | if (!(cr4 & X86_CR4_PAE)) { | |
302 | printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while " | |
303 | "in long mode\n"); | |
c1a5d4f9 | 304 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
305 | return; |
306 | } | |
307 | } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE) | |
ad312c7c | 308 | && !load_pdptrs(vcpu, vcpu->arch.cr3)) { |
a03490ed | 309 | printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n"); |
c1a5d4f9 | 310 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
311 | return; |
312 | } | |
313 | ||
314 | if (cr4 & X86_CR4_VMXE) { | |
315 | printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n"); | |
c1a5d4f9 | 316 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
317 | return; |
318 | } | |
319 | kvm_x86_ops->set_cr4(vcpu, cr4); | |
ad312c7c | 320 | vcpu->arch.cr4 = cr4; |
a03490ed | 321 | kvm_mmu_reset_context(vcpu); |
a03490ed CO |
322 | } |
323 | EXPORT_SYMBOL_GPL(set_cr4); | |
324 | ||
325 | void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) | |
326 | { | |
ad312c7c | 327 | if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) { |
d835dfec AK |
328 | kvm_mmu_flush_tlb(vcpu); |
329 | return; | |
330 | } | |
331 | ||
a03490ed CO |
332 | if (is_long_mode(vcpu)) { |
333 | if (cr3 & CR3_L_MODE_RESERVED_BITS) { | |
334 | printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n"); | |
c1a5d4f9 | 335 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
336 | return; |
337 | } | |
338 | } else { | |
339 | if (is_pae(vcpu)) { | |
340 | if (cr3 & CR3_PAE_RESERVED_BITS) { | |
341 | printk(KERN_DEBUG | |
342 | "set_cr3: #GP, reserved bits\n"); | |
c1a5d4f9 | 343 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
344 | return; |
345 | } | |
346 | if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) { | |
347 | printk(KERN_DEBUG "set_cr3: #GP, pdptrs " | |
348 | "reserved bits\n"); | |
c1a5d4f9 | 349 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
350 | return; |
351 | } | |
352 | } | |
353 | /* | |
354 | * We don't check reserved bits in nonpae mode, because | |
355 | * this isn't enforced, and VMware depends on this. | |
356 | */ | |
357 | } | |
358 | ||
10589a46 | 359 | down_read(¤t->mm->mmap_sem); |
a03490ed CO |
360 | /* |
361 | * Does the new cr3 value map to physical memory? (Note, we | |
362 | * catch an invalid cr3 even in real-mode, because it would | |
363 | * cause trouble later on when we turn on paging anyway.) | |
364 | * | |
365 | * A real CPU would silently accept an invalid cr3 and would | |
366 | * attempt to use it - with largely undefined (and often hard | |
367 | * to debug) behavior on the guest side. | |
368 | */ | |
369 | if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT))) | |
c1a5d4f9 | 370 | kvm_inject_gp(vcpu, 0); |
a03490ed | 371 | else { |
ad312c7c ZX |
372 | vcpu->arch.cr3 = cr3; |
373 | vcpu->arch.mmu.new_cr3(vcpu); | |
a03490ed | 374 | } |
10589a46 | 375 | up_read(¤t->mm->mmap_sem); |
a03490ed CO |
376 | } |
377 | EXPORT_SYMBOL_GPL(set_cr3); | |
378 | ||
379 | void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8) | |
380 | { | |
381 | if (cr8 & CR8_RESERVED_BITS) { | |
382 | printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8); | |
c1a5d4f9 | 383 | kvm_inject_gp(vcpu, 0); |
a03490ed CO |
384 | return; |
385 | } | |
386 | if (irqchip_in_kernel(vcpu->kvm)) | |
387 | kvm_lapic_set_tpr(vcpu, cr8); | |
388 | else | |
ad312c7c | 389 | vcpu->arch.cr8 = cr8; |
a03490ed CO |
390 | } |
391 | EXPORT_SYMBOL_GPL(set_cr8); | |
392 | ||
393 | unsigned long get_cr8(struct kvm_vcpu *vcpu) | |
394 | { | |
395 | if (irqchip_in_kernel(vcpu->kvm)) | |
396 | return kvm_lapic_get_cr8(vcpu); | |
397 | else | |
ad312c7c | 398 | return vcpu->arch.cr8; |
a03490ed CO |
399 | } |
400 | EXPORT_SYMBOL_GPL(get_cr8); | |
401 | ||
043405e1 CO |
402 | /* |
403 | * List of msr numbers which we expose to userspace through KVM_GET_MSRS | |
404 | * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST. | |
405 | * | |
406 | * This list is modified at module load time to reflect the | |
407 | * capabilities of the host cpu. | |
408 | */ | |
409 | static u32 msrs_to_save[] = { | |
410 | MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, | |
411 | MSR_K6_STAR, | |
412 | #ifdef CONFIG_X86_64 | |
413 | MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR, | |
414 | #endif | |
415 | MSR_IA32_TIME_STAMP_COUNTER, | |
416 | }; | |
417 | ||
418 | static unsigned num_msrs_to_save; | |
419 | ||
420 | static u32 emulated_msrs[] = { | |
421 | MSR_IA32_MISC_ENABLE, | |
422 | }; | |
423 | ||
15c4a640 CO |
424 | #ifdef CONFIG_X86_64 |
425 | ||
426 | static void set_efer(struct kvm_vcpu *vcpu, u64 efer) | |
427 | { | |
428 | if (efer & EFER_RESERVED_BITS) { | |
429 | printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n", | |
430 | efer); | |
c1a5d4f9 | 431 | kvm_inject_gp(vcpu, 0); |
15c4a640 CO |
432 | return; |
433 | } | |
434 | ||
435 | if (is_paging(vcpu) | |
ad312c7c | 436 | && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) { |
15c4a640 | 437 | printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n"); |
c1a5d4f9 | 438 | kvm_inject_gp(vcpu, 0); |
15c4a640 CO |
439 | return; |
440 | } | |
441 | ||
442 | kvm_x86_ops->set_efer(vcpu, efer); | |
443 | ||
444 | efer &= ~EFER_LMA; | |
ad312c7c | 445 | efer |= vcpu->arch.shadow_efer & EFER_LMA; |
15c4a640 | 446 | |
ad312c7c | 447 | vcpu->arch.shadow_efer = efer; |
15c4a640 CO |
448 | } |
449 | ||
450 | #endif | |
451 | ||
452 | /* | |
453 | * Writes msr value into into the appropriate "register". | |
454 | * Returns 0 on success, non-0 otherwise. | |
455 | * Assumes vcpu_load() was already called. | |
456 | */ | |
457 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data) | |
458 | { | |
459 | return kvm_x86_ops->set_msr(vcpu, msr_index, data); | |
460 | } | |
461 | ||
313a3dc7 CO |
462 | /* |
463 | * Adapt set_msr() to msr_io()'s calling convention | |
464 | */ | |
465 | static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data) | |
466 | { | |
467 | return kvm_set_msr(vcpu, index, *data); | |
468 | } | |
469 | ||
15c4a640 CO |
470 | |
471 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |
472 | { | |
473 | switch (msr) { | |
474 | #ifdef CONFIG_X86_64 | |
475 | case MSR_EFER: | |
476 | set_efer(vcpu, data); | |
477 | break; | |
478 | #endif | |
479 | case MSR_IA32_MC0_STATUS: | |
480 | pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n", | |
481 | __FUNCTION__, data); | |
482 | break; | |
483 | case MSR_IA32_MCG_STATUS: | |
484 | pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n", | |
485 | __FUNCTION__, data); | |
486 | break; | |
487 | case MSR_IA32_UCODE_REV: | |
488 | case MSR_IA32_UCODE_WRITE: | |
489 | case 0x200 ... 0x2ff: /* MTRRs */ | |
490 | break; | |
491 | case MSR_IA32_APICBASE: | |
492 | kvm_set_apic_base(vcpu, data); | |
493 | break; | |
494 | case MSR_IA32_MISC_ENABLE: | |
ad312c7c | 495 | vcpu->arch.ia32_misc_enable_msr = data; |
15c4a640 CO |
496 | break; |
497 | default: | |
565f1fbd | 498 | pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data); |
15c4a640 CO |
499 | return 1; |
500 | } | |
501 | return 0; | |
502 | } | |
503 | EXPORT_SYMBOL_GPL(kvm_set_msr_common); | |
504 | ||
505 | ||
506 | /* | |
507 | * Reads an msr value (of 'msr_index') into 'pdata'. | |
508 | * Returns 0 on success, non-0 otherwise. | |
509 | * Assumes vcpu_load() was already called. | |
510 | */ | |
511 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) | |
512 | { | |
513 | return kvm_x86_ops->get_msr(vcpu, msr_index, pdata); | |
514 | } | |
515 | ||
516 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
517 | { | |
518 | u64 data; | |
519 | ||
520 | switch (msr) { | |
521 | case 0xc0010010: /* SYSCFG */ | |
522 | case 0xc0010015: /* HWCR */ | |
523 | case MSR_IA32_PLATFORM_ID: | |
524 | case MSR_IA32_P5_MC_ADDR: | |
525 | case MSR_IA32_P5_MC_TYPE: | |
526 | case MSR_IA32_MC0_CTL: | |
527 | case MSR_IA32_MCG_STATUS: | |
528 | case MSR_IA32_MCG_CAP: | |
529 | case MSR_IA32_MC0_MISC: | |
530 | case MSR_IA32_MC0_MISC+4: | |
531 | case MSR_IA32_MC0_MISC+8: | |
532 | case MSR_IA32_MC0_MISC+12: | |
533 | case MSR_IA32_MC0_MISC+16: | |
534 | case MSR_IA32_UCODE_REV: | |
535 | case MSR_IA32_PERF_STATUS: | |
536 | case MSR_IA32_EBL_CR_POWERON: | |
537 | /* MTRR registers */ | |
538 | case 0xfe: | |
539 | case 0x200 ... 0x2ff: | |
540 | data = 0; | |
541 | break; | |
542 | case 0xcd: /* fsb frequency */ | |
543 | data = 3; | |
544 | break; | |
545 | case MSR_IA32_APICBASE: | |
546 | data = kvm_get_apic_base(vcpu); | |
547 | break; | |
548 | case MSR_IA32_MISC_ENABLE: | |
ad312c7c | 549 | data = vcpu->arch.ia32_misc_enable_msr; |
15c4a640 CO |
550 | break; |
551 | #ifdef CONFIG_X86_64 | |
552 | case MSR_EFER: | |
ad312c7c | 553 | data = vcpu->arch.shadow_efer; |
15c4a640 CO |
554 | break; |
555 | #endif | |
556 | default: | |
557 | pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr); | |
558 | return 1; | |
559 | } | |
560 | *pdata = data; | |
561 | return 0; | |
562 | } | |
563 | EXPORT_SYMBOL_GPL(kvm_get_msr_common); | |
564 | ||
313a3dc7 CO |
565 | /* |
566 | * Read or write a bunch of msrs. All parameters are kernel addresses. | |
567 | * | |
568 | * @return number of msrs set successfully. | |
569 | */ | |
570 | static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs, | |
571 | struct kvm_msr_entry *entries, | |
572 | int (*do_msr)(struct kvm_vcpu *vcpu, | |
573 | unsigned index, u64 *data)) | |
574 | { | |
575 | int i; | |
576 | ||
577 | vcpu_load(vcpu); | |
578 | ||
579 | for (i = 0; i < msrs->nmsrs; ++i) | |
580 | if (do_msr(vcpu, entries[i].index, &entries[i].data)) | |
581 | break; | |
582 | ||
583 | vcpu_put(vcpu); | |
584 | ||
585 | return i; | |
586 | } | |
587 | ||
588 | /* | |
589 | * Read or write a bunch of msrs. Parameters are user addresses. | |
590 | * | |
591 | * @return number of msrs set successfully. | |
592 | */ | |
593 | static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs, | |
594 | int (*do_msr)(struct kvm_vcpu *vcpu, | |
595 | unsigned index, u64 *data), | |
596 | int writeback) | |
597 | { | |
598 | struct kvm_msrs msrs; | |
599 | struct kvm_msr_entry *entries; | |
600 | int r, n; | |
601 | unsigned size; | |
602 | ||
603 | r = -EFAULT; | |
604 | if (copy_from_user(&msrs, user_msrs, sizeof msrs)) | |
605 | goto out; | |
606 | ||
607 | r = -E2BIG; | |
608 | if (msrs.nmsrs >= MAX_IO_MSRS) | |
609 | goto out; | |
610 | ||
611 | r = -ENOMEM; | |
612 | size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; | |
613 | entries = vmalloc(size); | |
614 | if (!entries) | |
615 | goto out; | |
616 | ||
617 | r = -EFAULT; | |
618 | if (copy_from_user(entries, user_msrs->entries, size)) | |
619 | goto out_free; | |
620 | ||
621 | r = n = __msr_io(vcpu, &msrs, entries, do_msr); | |
622 | if (r < 0) | |
623 | goto out_free; | |
624 | ||
625 | r = -EFAULT; | |
626 | if (writeback && copy_to_user(user_msrs->entries, entries, size)) | |
627 | goto out_free; | |
628 | ||
629 | r = n; | |
630 | ||
631 | out_free: | |
632 | vfree(entries); | |
633 | out: | |
634 | return r; | |
635 | } | |
636 | ||
e9b11c17 ZX |
637 | /* |
638 | * Make sure that a cpu that is being hot-unplugged does not have any vcpus | |
639 | * cached on it. | |
640 | */ | |
641 | void decache_vcpus_on_cpu(int cpu) | |
642 | { | |
643 | struct kvm *vm; | |
644 | struct kvm_vcpu *vcpu; | |
645 | int i; | |
646 | ||
647 | spin_lock(&kvm_lock); | |
648 | list_for_each_entry(vm, &vm_list, vm_list) | |
649 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | |
650 | vcpu = vm->vcpus[i]; | |
651 | if (!vcpu) | |
652 | continue; | |
653 | /* | |
654 | * If the vcpu is locked, then it is running on some | |
655 | * other cpu and therefore it is not cached on the | |
656 | * cpu in question. | |
657 | * | |
658 | * If it's not locked, check the last cpu it executed | |
659 | * on. | |
660 | */ | |
661 | if (mutex_trylock(&vcpu->mutex)) { | |
662 | if (vcpu->cpu == cpu) { | |
663 | kvm_x86_ops->vcpu_decache(vcpu); | |
664 | vcpu->cpu = -1; | |
665 | } | |
666 | mutex_unlock(&vcpu->mutex); | |
667 | } | |
668 | } | |
669 | spin_unlock(&kvm_lock); | |
670 | } | |
671 | ||
018d00d2 ZX |
672 | int kvm_dev_ioctl_check_extension(long ext) |
673 | { | |
674 | int r; | |
675 | ||
676 | switch (ext) { | |
677 | case KVM_CAP_IRQCHIP: | |
678 | case KVM_CAP_HLT: | |
679 | case KVM_CAP_MMU_SHADOW_CACHE_CONTROL: | |
680 | case KVM_CAP_USER_MEMORY: | |
681 | case KVM_CAP_SET_TSS_ADDR: | |
07716717 | 682 | case KVM_CAP_EXT_CPUID: |
018d00d2 ZX |
683 | r = 1; |
684 | break; | |
774ead3a AK |
685 | case KVM_CAP_VAPIC: |
686 | r = !kvm_x86_ops->cpu_has_accelerated_tpr(); | |
687 | break; | |
018d00d2 ZX |
688 | default: |
689 | r = 0; | |
690 | break; | |
691 | } | |
692 | return r; | |
693 | ||
694 | } | |
695 | ||
043405e1 CO |
696 | long kvm_arch_dev_ioctl(struct file *filp, |
697 | unsigned int ioctl, unsigned long arg) | |
698 | { | |
699 | void __user *argp = (void __user *)arg; | |
700 | long r; | |
701 | ||
702 | switch (ioctl) { | |
703 | case KVM_GET_MSR_INDEX_LIST: { | |
704 | struct kvm_msr_list __user *user_msr_list = argp; | |
705 | struct kvm_msr_list msr_list; | |
706 | unsigned n; | |
707 | ||
708 | r = -EFAULT; | |
709 | if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list)) | |
710 | goto out; | |
711 | n = msr_list.nmsrs; | |
712 | msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs); | |
713 | if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list)) | |
714 | goto out; | |
715 | r = -E2BIG; | |
716 | if (n < num_msrs_to_save) | |
717 | goto out; | |
718 | r = -EFAULT; | |
719 | if (copy_to_user(user_msr_list->indices, &msrs_to_save, | |
720 | num_msrs_to_save * sizeof(u32))) | |
721 | goto out; | |
722 | if (copy_to_user(user_msr_list->indices | |
723 | + num_msrs_to_save * sizeof(u32), | |
724 | &emulated_msrs, | |
725 | ARRAY_SIZE(emulated_msrs) * sizeof(u32))) | |
726 | goto out; | |
727 | r = 0; | |
728 | break; | |
729 | } | |
730 | default: | |
731 | r = -EINVAL; | |
732 | } | |
733 | out: | |
734 | return r; | |
735 | } | |
736 | ||
313a3dc7 CO |
737 | void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
738 | { | |
739 | kvm_x86_ops->vcpu_load(vcpu, cpu); | |
740 | } | |
741 | ||
742 | void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) | |
743 | { | |
744 | kvm_x86_ops->vcpu_put(vcpu); | |
9327fd11 | 745 | kvm_put_guest_fpu(vcpu); |
313a3dc7 CO |
746 | } |
747 | ||
07716717 | 748 | static int is_efer_nx(void) |
313a3dc7 CO |
749 | { |
750 | u64 efer; | |
313a3dc7 CO |
751 | |
752 | rdmsrl(MSR_EFER, efer); | |
07716717 DK |
753 | return efer & EFER_NX; |
754 | } | |
755 | ||
756 | static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu) | |
757 | { | |
758 | int i; | |
759 | struct kvm_cpuid_entry2 *e, *entry; | |
760 | ||
313a3dc7 | 761 | entry = NULL; |
ad312c7c ZX |
762 | for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { |
763 | e = &vcpu->arch.cpuid_entries[i]; | |
313a3dc7 CO |
764 | if (e->function == 0x80000001) { |
765 | entry = e; | |
766 | break; | |
767 | } | |
768 | } | |
07716717 | 769 | if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) { |
313a3dc7 CO |
770 | entry->edx &= ~(1 << 20); |
771 | printk(KERN_INFO "kvm: guest NX capability removed\n"); | |
772 | } | |
773 | } | |
774 | ||
07716717 | 775 | /* when an old userspace process fills a new kernel module */ |
313a3dc7 CO |
776 | static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu, |
777 | struct kvm_cpuid *cpuid, | |
778 | struct kvm_cpuid_entry __user *entries) | |
07716717 DK |
779 | { |
780 | int r, i; | |
781 | struct kvm_cpuid_entry *cpuid_entries; | |
782 | ||
783 | r = -E2BIG; | |
784 | if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) | |
785 | goto out; | |
786 | r = -ENOMEM; | |
787 | cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent); | |
788 | if (!cpuid_entries) | |
789 | goto out; | |
790 | r = -EFAULT; | |
791 | if (copy_from_user(cpuid_entries, entries, | |
792 | cpuid->nent * sizeof(struct kvm_cpuid_entry))) | |
793 | goto out_free; | |
794 | for (i = 0; i < cpuid->nent; i++) { | |
ad312c7c ZX |
795 | vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function; |
796 | vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax; | |
797 | vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx; | |
798 | vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx; | |
799 | vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx; | |
800 | vcpu->arch.cpuid_entries[i].index = 0; | |
801 | vcpu->arch.cpuid_entries[i].flags = 0; | |
802 | vcpu->arch.cpuid_entries[i].padding[0] = 0; | |
803 | vcpu->arch.cpuid_entries[i].padding[1] = 0; | |
804 | vcpu->arch.cpuid_entries[i].padding[2] = 0; | |
805 | } | |
806 | vcpu->arch.cpuid_nent = cpuid->nent; | |
07716717 DK |
807 | cpuid_fix_nx_cap(vcpu); |
808 | r = 0; | |
809 | ||
810 | out_free: | |
811 | vfree(cpuid_entries); | |
812 | out: | |
813 | return r; | |
814 | } | |
815 | ||
816 | static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu, | |
817 | struct kvm_cpuid2 *cpuid, | |
818 | struct kvm_cpuid_entry2 __user *entries) | |
313a3dc7 CO |
819 | { |
820 | int r; | |
821 | ||
822 | r = -E2BIG; | |
823 | if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) | |
824 | goto out; | |
825 | r = -EFAULT; | |
ad312c7c | 826 | if (copy_from_user(&vcpu->arch.cpuid_entries, entries, |
07716717 | 827 | cpuid->nent * sizeof(struct kvm_cpuid_entry2))) |
313a3dc7 | 828 | goto out; |
ad312c7c | 829 | vcpu->arch.cpuid_nent = cpuid->nent; |
313a3dc7 CO |
830 | return 0; |
831 | ||
832 | out: | |
833 | return r; | |
834 | } | |
835 | ||
07716717 DK |
836 | static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, |
837 | struct kvm_cpuid2 *cpuid, | |
838 | struct kvm_cpuid_entry2 __user *entries) | |
839 | { | |
840 | int r; | |
841 | ||
842 | r = -E2BIG; | |
ad312c7c | 843 | if (cpuid->nent < vcpu->arch.cpuid_nent) |
07716717 DK |
844 | goto out; |
845 | r = -EFAULT; | |
ad312c7c ZX |
846 | if (copy_to_user(entries, &vcpu->arch.cpuid_entries, |
847 | vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2))) | |
07716717 DK |
848 | goto out; |
849 | return 0; | |
850 | ||
851 | out: | |
ad312c7c | 852 | cpuid->nent = vcpu->arch.cpuid_nent; |
07716717 DK |
853 | return r; |
854 | } | |
855 | ||
856 | static inline u32 bit(int bitno) | |
857 | { | |
858 | return 1 << (bitno & 31); | |
859 | } | |
860 | ||
861 | static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function, | |
862 | u32 index) | |
863 | { | |
864 | entry->function = function; | |
865 | entry->index = index; | |
866 | cpuid_count(entry->function, entry->index, | |
867 | &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); | |
868 | entry->flags = 0; | |
869 | } | |
870 | ||
871 | static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, | |
872 | u32 index, int *nent, int maxnent) | |
873 | { | |
874 | const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) | | |
875 | bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) | | |
876 | bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) | | |
877 | bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) | | |
878 | bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) | | |
879 | bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) | | |
880 | bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) | | |
881 | bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) | | |
882 | bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) | | |
883 | bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP); | |
884 | const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) | | |
885 | bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) | | |
886 | bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) | | |
887 | bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) | | |
888 | bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) | | |
889 | bit(X86_FEATURE_PGE) | | |
890 | bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) | | |
891 | bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) | | |
892 | bit(X86_FEATURE_SYSCALL) | | |
893 | (bit(X86_FEATURE_NX) && is_efer_nx()) | | |
894 | #ifdef CONFIG_X86_64 | |
895 | bit(X86_FEATURE_LM) | | |
896 | #endif | |
897 | bit(X86_FEATURE_MMXEXT) | | |
898 | bit(X86_FEATURE_3DNOWEXT) | | |
899 | bit(X86_FEATURE_3DNOW); | |
900 | const u32 kvm_supported_word3_x86_features = | |
901 | bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16); | |
902 | const u32 kvm_supported_word6_x86_features = | |
903 | bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY); | |
904 | ||
905 | /* all func 2 cpuid_count() should be called on the same cpu */ | |
906 | get_cpu(); | |
907 | do_cpuid_1_ent(entry, function, index); | |
908 | ++*nent; | |
909 | ||
910 | switch (function) { | |
911 | case 0: | |
912 | entry->eax = min(entry->eax, (u32)0xb); | |
913 | break; | |
914 | case 1: | |
915 | entry->edx &= kvm_supported_word0_x86_features; | |
916 | entry->ecx &= kvm_supported_word3_x86_features; | |
917 | break; | |
918 | /* function 2 entries are STATEFUL. That is, repeated cpuid commands | |
919 | * may return different values. This forces us to get_cpu() before | |
920 | * issuing the first command, and also to emulate this annoying behavior | |
921 | * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */ | |
922 | case 2: { | |
923 | int t, times = entry->eax & 0xff; | |
924 | ||
925 | entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; | |
926 | for (t = 1; t < times && *nent < maxnent; ++t) { | |
927 | do_cpuid_1_ent(&entry[t], function, 0); | |
928 | entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; | |
929 | ++*nent; | |
930 | } | |
931 | break; | |
932 | } | |
933 | /* function 4 and 0xb have additional index. */ | |
934 | case 4: { | |
935 | int index, cache_type; | |
936 | ||
937 | entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
938 | /* read more entries until cache_type is zero */ | |
939 | for (index = 1; *nent < maxnent; ++index) { | |
940 | cache_type = entry[index - 1].eax & 0x1f; | |
941 | if (!cache_type) | |
942 | break; | |
943 | do_cpuid_1_ent(&entry[index], function, index); | |
944 | entry[index].flags |= | |
945 | KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
946 | ++*nent; | |
947 | } | |
948 | break; | |
949 | } | |
950 | case 0xb: { | |
951 | int index, level_type; | |
952 | ||
953 | entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
954 | /* read more entries until level_type is zero */ | |
955 | for (index = 1; *nent < maxnent; ++index) { | |
956 | level_type = entry[index - 1].ecx & 0xff; | |
957 | if (!level_type) | |
958 | break; | |
959 | do_cpuid_1_ent(&entry[index], function, index); | |
960 | entry[index].flags |= | |
961 | KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
962 | ++*nent; | |
963 | } | |
964 | break; | |
965 | } | |
966 | case 0x80000000: | |
967 | entry->eax = min(entry->eax, 0x8000001a); | |
968 | break; | |
969 | case 0x80000001: | |
970 | entry->edx &= kvm_supported_word1_x86_features; | |
971 | entry->ecx &= kvm_supported_word6_x86_features; | |
972 | break; | |
973 | } | |
974 | put_cpu(); | |
975 | } | |
976 | ||
977 | static int kvm_vm_ioctl_get_supported_cpuid(struct kvm *kvm, | |
978 | struct kvm_cpuid2 *cpuid, | |
979 | struct kvm_cpuid_entry2 __user *entries) | |
980 | { | |
981 | struct kvm_cpuid_entry2 *cpuid_entries; | |
982 | int limit, nent = 0, r = -E2BIG; | |
983 | u32 func; | |
984 | ||
985 | if (cpuid->nent < 1) | |
986 | goto out; | |
987 | r = -ENOMEM; | |
988 | cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent); | |
989 | if (!cpuid_entries) | |
990 | goto out; | |
991 | ||
992 | do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent); | |
993 | limit = cpuid_entries[0].eax; | |
994 | for (func = 1; func <= limit && nent < cpuid->nent; ++func) | |
995 | do_cpuid_ent(&cpuid_entries[nent], func, 0, | |
996 | &nent, cpuid->nent); | |
997 | r = -E2BIG; | |
998 | if (nent >= cpuid->nent) | |
999 | goto out_free; | |
1000 | ||
1001 | do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent); | |
1002 | limit = cpuid_entries[nent - 1].eax; | |
1003 | for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func) | |
1004 | do_cpuid_ent(&cpuid_entries[nent], func, 0, | |
1005 | &nent, cpuid->nent); | |
1006 | r = -EFAULT; | |
1007 | if (copy_to_user(entries, cpuid_entries, | |
1008 | nent * sizeof(struct kvm_cpuid_entry2))) | |
1009 | goto out_free; | |
1010 | cpuid->nent = nent; | |
1011 | r = 0; | |
1012 | ||
1013 | out_free: | |
1014 | vfree(cpuid_entries); | |
1015 | out: | |
1016 | return r; | |
1017 | } | |
1018 | ||
313a3dc7 CO |
1019 | static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu, |
1020 | struct kvm_lapic_state *s) | |
1021 | { | |
1022 | vcpu_load(vcpu); | |
ad312c7c | 1023 | memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s); |
313a3dc7 CO |
1024 | vcpu_put(vcpu); |
1025 | ||
1026 | return 0; | |
1027 | } | |
1028 | ||
1029 | static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu, | |
1030 | struct kvm_lapic_state *s) | |
1031 | { | |
1032 | vcpu_load(vcpu); | |
ad312c7c | 1033 | memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s); |
313a3dc7 CO |
1034 | kvm_apic_post_state_restore(vcpu); |
1035 | vcpu_put(vcpu); | |
1036 | ||
1037 | return 0; | |
1038 | } | |
1039 | ||
f77bc6a4 ZX |
1040 | static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, |
1041 | struct kvm_interrupt *irq) | |
1042 | { | |
1043 | if (irq->irq < 0 || irq->irq >= 256) | |
1044 | return -EINVAL; | |
1045 | if (irqchip_in_kernel(vcpu->kvm)) | |
1046 | return -ENXIO; | |
1047 | vcpu_load(vcpu); | |
1048 | ||
ad312c7c ZX |
1049 | set_bit(irq->irq, vcpu->arch.irq_pending); |
1050 | set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary); | |
f77bc6a4 ZX |
1051 | |
1052 | vcpu_put(vcpu); | |
1053 | ||
1054 | return 0; | |
1055 | } | |
1056 | ||
b209749f AK |
1057 | static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu, |
1058 | struct kvm_tpr_access_ctl *tac) | |
1059 | { | |
1060 | if (tac->flags) | |
1061 | return -EINVAL; | |
1062 | vcpu->arch.tpr_access_reporting = !!tac->enabled; | |
1063 | return 0; | |
1064 | } | |
1065 | ||
313a3dc7 CO |
1066 | long kvm_arch_vcpu_ioctl(struct file *filp, |
1067 | unsigned int ioctl, unsigned long arg) | |
1068 | { | |
1069 | struct kvm_vcpu *vcpu = filp->private_data; | |
1070 | void __user *argp = (void __user *)arg; | |
1071 | int r; | |
1072 | ||
1073 | switch (ioctl) { | |
1074 | case KVM_GET_LAPIC: { | |
1075 | struct kvm_lapic_state lapic; | |
1076 | ||
1077 | memset(&lapic, 0, sizeof lapic); | |
1078 | r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic); | |
1079 | if (r) | |
1080 | goto out; | |
1081 | r = -EFAULT; | |
1082 | if (copy_to_user(argp, &lapic, sizeof lapic)) | |
1083 | goto out; | |
1084 | r = 0; | |
1085 | break; | |
1086 | } | |
1087 | case KVM_SET_LAPIC: { | |
1088 | struct kvm_lapic_state lapic; | |
1089 | ||
1090 | r = -EFAULT; | |
1091 | if (copy_from_user(&lapic, argp, sizeof lapic)) | |
1092 | goto out; | |
1093 | r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);; | |
1094 | if (r) | |
1095 | goto out; | |
1096 | r = 0; | |
1097 | break; | |
1098 | } | |
f77bc6a4 ZX |
1099 | case KVM_INTERRUPT: { |
1100 | struct kvm_interrupt irq; | |
1101 | ||
1102 | r = -EFAULT; | |
1103 | if (copy_from_user(&irq, argp, sizeof irq)) | |
1104 | goto out; | |
1105 | r = kvm_vcpu_ioctl_interrupt(vcpu, &irq); | |
1106 | if (r) | |
1107 | goto out; | |
1108 | r = 0; | |
1109 | break; | |
1110 | } | |
313a3dc7 CO |
1111 | case KVM_SET_CPUID: { |
1112 | struct kvm_cpuid __user *cpuid_arg = argp; | |
1113 | struct kvm_cpuid cpuid; | |
1114 | ||
1115 | r = -EFAULT; | |
1116 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
1117 | goto out; | |
1118 | r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries); | |
1119 | if (r) | |
1120 | goto out; | |
1121 | break; | |
1122 | } | |
07716717 DK |
1123 | case KVM_SET_CPUID2: { |
1124 | struct kvm_cpuid2 __user *cpuid_arg = argp; | |
1125 | struct kvm_cpuid2 cpuid; | |
1126 | ||
1127 | r = -EFAULT; | |
1128 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
1129 | goto out; | |
1130 | r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid, | |
1131 | cpuid_arg->entries); | |
1132 | if (r) | |
1133 | goto out; | |
1134 | break; | |
1135 | } | |
1136 | case KVM_GET_CPUID2: { | |
1137 | struct kvm_cpuid2 __user *cpuid_arg = argp; | |
1138 | struct kvm_cpuid2 cpuid; | |
1139 | ||
1140 | r = -EFAULT; | |
1141 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
1142 | goto out; | |
1143 | r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid, | |
1144 | cpuid_arg->entries); | |
1145 | if (r) | |
1146 | goto out; | |
1147 | r = -EFAULT; | |
1148 | if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid)) | |
1149 | goto out; | |
1150 | r = 0; | |
1151 | break; | |
1152 | } | |
313a3dc7 CO |
1153 | case KVM_GET_MSRS: |
1154 | r = msr_io(vcpu, argp, kvm_get_msr, 1); | |
1155 | break; | |
1156 | case KVM_SET_MSRS: | |
1157 | r = msr_io(vcpu, argp, do_set_msr, 0); | |
1158 | break; | |
b209749f AK |
1159 | case KVM_TPR_ACCESS_REPORTING: { |
1160 | struct kvm_tpr_access_ctl tac; | |
1161 | ||
1162 | r = -EFAULT; | |
1163 | if (copy_from_user(&tac, argp, sizeof tac)) | |
1164 | goto out; | |
1165 | r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac); | |
1166 | if (r) | |
1167 | goto out; | |
1168 | r = -EFAULT; | |
1169 | if (copy_to_user(argp, &tac, sizeof tac)) | |
1170 | goto out; | |
1171 | r = 0; | |
1172 | break; | |
1173 | }; | |
b93463aa AK |
1174 | case KVM_SET_VAPIC_ADDR: { |
1175 | struct kvm_vapic_addr va; | |
1176 | ||
1177 | r = -EINVAL; | |
1178 | if (!irqchip_in_kernel(vcpu->kvm)) | |
1179 | goto out; | |
1180 | r = -EFAULT; | |
1181 | if (copy_from_user(&va, argp, sizeof va)) | |
1182 | goto out; | |
1183 | r = 0; | |
1184 | kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr); | |
1185 | break; | |
1186 | } | |
313a3dc7 CO |
1187 | default: |
1188 | r = -EINVAL; | |
1189 | } | |
1190 | out: | |
1191 | return r; | |
1192 | } | |
1193 | ||
1fe779f8 CO |
1194 | static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr) |
1195 | { | |
1196 | int ret; | |
1197 | ||
1198 | if (addr > (unsigned int)(-3 * PAGE_SIZE)) | |
1199 | return -1; | |
1200 | ret = kvm_x86_ops->set_tss_addr(kvm, addr); | |
1201 | return ret; | |
1202 | } | |
1203 | ||
1204 | static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm, | |
1205 | u32 kvm_nr_mmu_pages) | |
1206 | { | |
1207 | if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES) | |
1208 | return -EINVAL; | |
1209 | ||
10589a46 | 1210 | down_write(¤t->mm->mmap_sem); |
1fe779f8 CO |
1211 | |
1212 | kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages); | |
f05e70ac | 1213 | kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages; |
1fe779f8 | 1214 | |
10589a46 | 1215 | up_write(¤t->mm->mmap_sem); |
1fe779f8 CO |
1216 | return 0; |
1217 | } | |
1218 | ||
1219 | static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm) | |
1220 | { | |
f05e70ac | 1221 | return kvm->arch.n_alloc_mmu_pages; |
1fe779f8 CO |
1222 | } |
1223 | ||
e9f85cde ZX |
1224 | gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) |
1225 | { | |
1226 | int i; | |
1227 | struct kvm_mem_alias *alias; | |
1228 | ||
d69fb81f ZX |
1229 | for (i = 0; i < kvm->arch.naliases; ++i) { |
1230 | alias = &kvm->arch.aliases[i]; | |
e9f85cde ZX |
1231 | if (gfn >= alias->base_gfn |
1232 | && gfn < alias->base_gfn + alias->npages) | |
1233 | return alias->target_gfn + gfn - alias->base_gfn; | |
1234 | } | |
1235 | return gfn; | |
1236 | } | |
1237 | ||
1fe779f8 CO |
1238 | /* |
1239 | * Set a new alias region. Aliases map a portion of physical memory into | |
1240 | * another portion. This is useful for memory windows, for example the PC | |
1241 | * VGA region. | |
1242 | */ | |
1243 | static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm, | |
1244 | struct kvm_memory_alias *alias) | |
1245 | { | |
1246 | int r, n; | |
1247 | struct kvm_mem_alias *p; | |
1248 | ||
1249 | r = -EINVAL; | |
1250 | /* General sanity checks */ | |
1251 | if (alias->memory_size & (PAGE_SIZE - 1)) | |
1252 | goto out; | |
1253 | if (alias->guest_phys_addr & (PAGE_SIZE - 1)) | |
1254 | goto out; | |
1255 | if (alias->slot >= KVM_ALIAS_SLOTS) | |
1256 | goto out; | |
1257 | if (alias->guest_phys_addr + alias->memory_size | |
1258 | < alias->guest_phys_addr) | |
1259 | goto out; | |
1260 | if (alias->target_phys_addr + alias->memory_size | |
1261 | < alias->target_phys_addr) | |
1262 | goto out; | |
1263 | ||
10589a46 | 1264 | down_write(¤t->mm->mmap_sem); |
1fe779f8 | 1265 | |
d69fb81f | 1266 | p = &kvm->arch.aliases[alias->slot]; |
1fe779f8 CO |
1267 | p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT; |
1268 | p->npages = alias->memory_size >> PAGE_SHIFT; | |
1269 | p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT; | |
1270 | ||
1271 | for (n = KVM_ALIAS_SLOTS; n > 0; --n) | |
d69fb81f | 1272 | if (kvm->arch.aliases[n - 1].npages) |
1fe779f8 | 1273 | break; |
d69fb81f | 1274 | kvm->arch.naliases = n; |
1fe779f8 CO |
1275 | |
1276 | kvm_mmu_zap_all(kvm); | |
1277 | ||
10589a46 | 1278 | up_write(¤t->mm->mmap_sem); |
1fe779f8 CO |
1279 | |
1280 | return 0; | |
1281 | ||
1282 | out: | |
1283 | return r; | |
1284 | } | |
1285 | ||
1286 | static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) | |
1287 | { | |
1288 | int r; | |
1289 | ||
1290 | r = 0; | |
1291 | switch (chip->chip_id) { | |
1292 | case KVM_IRQCHIP_PIC_MASTER: | |
1293 | memcpy(&chip->chip.pic, | |
1294 | &pic_irqchip(kvm)->pics[0], | |
1295 | sizeof(struct kvm_pic_state)); | |
1296 | break; | |
1297 | case KVM_IRQCHIP_PIC_SLAVE: | |
1298 | memcpy(&chip->chip.pic, | |
1299 | &pic_irqchip(kvm)->pics[1], | |
1300 | sizeof(struct kvm_pic_state)); | |
1301 | break; | |
1302 | case KVM_IRQCHIP_IOAPIC: | |
1303 | memcpy(&chip->chip.ioapic, | |
1304 | ioapic_irqchip(kvm), | |
1305 | sizeof(struct kvm_ioapic_state)); | |
1306 | break; | |
1307 | default: | |
1308 | r = -EINVAL; | |
1309 | break; | |
1310 | } | |
1311 | return r; | |
1312 | } | |
1313 | ||
1314 | static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) | |
1315 | { | |
1316 | int r; | |
1317 | ||
1318 | r = 0; | |
1319 | switch (chip->chip_id) { | |
1320 | case KVM_IRQCHIP_PIC_MASTER: | |
1321 | memcpy(&pic_irqchip(kvm)->pics[0], | |
1322 | &chip->chip.pic, | |
1323 | sizeof(struct kvm_pic_state)); | |
1324 | break; | |
1325 | case KVM_IRQCHIP_PIC_SLAVE: | |
1326 | memcpy(&pic_irqchip(kvm)->pics[1], | |
1327 | &chip->chip.pic, | |
1328 | sizeof(struct kvm_pic_state)); | |
1329 | break; | |
1330 | case KVM_IRQCHIP_IOAPIC: | |
1331 | memcpy(ioapic_irqchip(kvm), | |
1332 | &chip->chip.ioapic, | |
1333 | sizeof(struct kvm_ioapic_state)); | |
1334 | break; | |
1335 | default: | |
1336 | r = -EINVAL; | |
1337 | break; | |
1338 | } | |
1339 | kvm_pic_update_irq(pic_irqchip(kvm)); | |
1340 | return r; | |
1341 | } | |
1342 | ||
5bb064dc ZX |
1343 | /* |
1344 | * Get (and clear) the dirty memory log for a memory slot. | |
1345 | */ | |
1346 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, | |
1347 | struct kvm_dirty_log *log) | |
1348 | { | |
1349 | int r; | |
1350 | int n; | |
1351 | struct kvm_memory_slot *memslot; | |
1352 | int is_dirty = 0; | |
1353 | ||
10589a46 | 1354 | down_write(¤t->mm->mmap_sem); |
5bb064dc ZX |
1355 | |
1356 | r = kvm_get_dirty_log(kvm, log, &is_dirty); | |
1357 | if (r) | |
1358 | goto out; | |
1359 | ||
1360 | /* If nothing is dirty, don't bother messing with page tables. */ | |
1361 | if (is_dirty) { | |
1362 | kvm_mmu_slot_remove_write_access(kvm, log->slot); | |
1363 | kvm_flush_remote_tlbs(kvm); | |
1364 | memslot = &kvm->memslots[log->slot]; | |
1365 | n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; | |
1366 | memset(memslot->dirty_bitmap, 0, n); | |
1367 | } | |
1368 | r = 0; | |
1369 | out: | |
10589a46 | 1370 | up_write(¤t->mm->mmap_sem); |
5bb064dc ZX |
1371 | return r; |
1372 | } | |
1373 | ||
1fe779f8 CO |
1374 | long kvm_arch_vm_ioctl(struct file *filp, |
1375 | unsigned int ioctl, unsigned long arg) | |
1376 | { | |
1377 | struct kvm *kvm = filp->private_data; | |
1378 | void __user *argp = (void __user *)arg; | |
1379 | int r = -EINVAL; | |
1380 | ||
1381 | switch (ioctl) { | |
1382 | case KVM_SET_TSS_ADDR: | |
1383 | r = kvm_vm_ioctl_set_tss_addr(kvm, arg); | |
1384 | if (r < 0) | |
1385 | goto out; | |
1386 | break; | |
1387 | case KVM_SET_MEMORY_REGION: { | |
1388 | struct kvm_memory_region kvm_mem; | |
1389 | struct kvm_userspace_memory_region kvm_userspace_mem; | |
1390 | ||
1391 | r = -EFAULT; | |
1392 | if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem)) | |
1393 | goto out; | |
1394 | kvm_userspace_mem.slot = kvm_mem.slot; | |
1395 | kvm_userspace_mem.flags = kvm_mem.flags; | |
1396 | kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr; | |
1397 | kvm_userspace_mem.memory_size = kvm_mem.memory_size; | |
1398 | r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0); | |
1399 | if (r) | |
1400 | goto out; | |
1401 | break; | |
1402 | } | |
1403 | case KVM_SET_NR_MMU_PAGES: | |
1404 | r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg); | |
1405 | if (r) | |
1406 | goto out; | |
1407 | break; | |
1408 | case KVM_GET_NR_MMU_PAGES: | |
1409 | r = kvm_vm_ioctl_get_nr_mmu_pages(kvm); | |
1410 | break; | |
1411 | case KVM_SET_MEMORY_ALIAS: { | |
1412 | struct kvm_memory_alias alias; | |
1413 | ||
1414 | r = -EFAULT; | |
1415 | if (copy_from_user(&alias, argp, sizeof alias)) | |
1416 | goto out; | |
1417 | r = kvm_vm_ioctl_set_memory_alias(kvm, &alias); | |
1418 | if (r) | |
1419 | goto out; | |
1420 | break; | |
1421 | } | |
1422 | case KVM_CREATE_IRQCHIP: | |
1423 | r = -ENOMEM; | |
d7deeeb0 ZX |
1424 | kvm->arch.vpic = kvm_create_pic(kvm); |
1425 | if (kvm->arch.vpic) { | |
1fe779f8 CO |
1426 | r = kvm_ioapic_init(kvm); |
1427 | if (r) { | |
d7deeeb0 ZX |
1428 | kfree(kvm->arch.vpic); |
1429 | kvm->arch.vpic = NULL; | |
1fe779f8 CO |
1430 | goto out; |
1431 | } | |
1432 | } else | |
1433 | goto out; | |
1434 | break; | |
1435 | case KVM_IRQ_LINE: { | |
1436 | struct kvm_irq_level irq_event; | |
1437 | ||
1438 | r = -EFAULT; | |
1439 | if (copy_from_user(&irq_event, argp, sizeof irq_event)) | |
1440 | goto out; | |
1441 | if (irqchip_in_kernel(kvm)) { | |
1442 | mutex_lock(&kvm->lock); | |
1443 | if (irq_event.irq < 16) | |
1444 | kvm_pic_set_irq(pic_irqchip(kvm), | |
1445 | irq_event.irq, | |
1446 | irq_event.level); | |
d7deeeb0 | 1447 | kvm_ioapic_set_irq(kvm->arch.vioapic, |
1fe779f8 CO |
1448 | irq_event.irq, |
1449 | irq_event.level); | |
1450 | mutex_unlock(&kvm->lock); | |
1451 | r = 0; | |
1452 | } | |
1453 | break; | |
1454 | } | |
1455 | case KVM_GET_IRQCHIP: { | |
1456 | /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ | |
1457 | struct kvm_irqchip chip; | |
1458 | ||
1459 | r = -EFAULT; | |
1460 | if (copy_from_user(&chip, argp, sizeof chip)) | |
1461 | goto out; | |
1462 | r = -ENXIO; | |
1463 | if (!irqchip_in_kernel(kvm)) | |
1464 | goto out; | |
1465 | r = kvm_vm_ioctl_get_irqchip(kvm, &chip); | |
1466 | if (r) | |
1467 | goto out; | |
1468 | r = -EFAULT; | |
1469 | if (copy_to_user(argp, &chip, sizeof chip)) | |
1470 | goto out; | |
1471 | r = 0; | |
1472 | break; | |
1473 | } | |
1474 | case KVM_SET_IRQCHIP: { | |
1475 | /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ | |
1476 | struct kvm_irqchip chip; | |
1477 | ||
1478 | r = -EFAULT; | |
1479 | if (copy_from_user(&chip, argp, sizeof chip)) | |
1480 | goto out; | |
1481 | r = -ENXIO; | |
1482 | if (!irqchip_in_kernel(kvm)) | |
1483 | goto out; | |
1484 | r = kvm_vm_ioctl_set_irqchip(kvm, &chip); | |
1485 | if (r) | |
1486 | goto out; | |
1487 | r = 0; | |
1488 | break; | |
1489 | } | |
07716717 DK |
1490 | case KVM_GET_SUPPORTED_CPUID: { |
1491 | struct kvm_cpuid2 __user *cpuid_arg = argp; | |
1492 | struct kvm_cpuid2 cpuid; | |
1493 | ||
1494 | r = -EFAULT; | |
1495 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
1496 | goto out; | |
1497 | r = kvm_vm_ioctl_get_supported_cpuid(kvm, &cpuid, | |
1498 | cpuid_arg->entries); | |
1499 | if (r) | |
1500 | goto out; | |
1501 | ||
1502 | r = -EFAULT; | |
1503 | if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid)) | |
1504 | goto out; | |
1505 | r = 0; | |
1506 | break; | |
1507 | } | |
1fe779f8 CO |
1508 | default: |
1509 | ; | |
1510 | } | |
1511 | out: | |
1512 | return r; | |
1513 | } | |
1514 | ||
a16b043c | 1515 | static void kvm_init_msr_list(void) |
043405e1 CO |
1516 | { |
1517 | u32 dummy[2]; | |
1518 | unsigned i, j; | |
1519 | ||
1520 | for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) { | |
1521 | if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0) | |
1522 | continue; | |
1523 | if (j < i) | |
1524 | msrs_to_save[j] = msrs_to_save[i]; | |
1525 | j++; | |
1526 | } | |
1527 | num_msrs_to_save = j; | |
1528 | } | |
1529 | ||
bbd9b64e CO |
1530 | /* |
1531 | * Only apic need an MMIO device hook, so shortcut now.. | |
1532 | */ | |
1533 | static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu, | |
1534 | gpa_t addr) | |
1535 | { | |
1536 | struct kvm_io_device *dev; | |
1537 | ||
ad312c7c ZX |
1538 | if (vcpu->arch.apic) { |
1539 | dev = &vcpu->arch.apic->dev; | |
bbd9b64e CO |
1540 | if (dev->in_range(dev, addr)) |
1541 | return dev; | |
1542 | } | |
1543 | return NULL; | |
1544 | } | |
1545 | ||
1546 | ||
1547 | static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu, | |
1548 | gpa_t addr) | |
1549 | { | |
1550 | struct kvm_io_device *dev; | |
1551 | ||
1552 | dev = vcpu_find_pervcpu_dev(vcpu, addr); | |
1553 | if (dev == NULL) | |
1554 | dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr); | |
1555 | return dev; | |
1556 | } | |
1557 | ||
1558 | int emulator_read_std(unsigned long addr, | |
1559 | void *val, | |
1560 | unsigned int bytes, | |
1561 | struct kvm_vcpu *vcpu) | |
1562 | { | |
1563 | void *data = val; | |
10589a46 | 1564 | int r = X86EMUL_CONTINUE; |
bbd9b64e | 1565 | |
10589a46 | 1566 | down_read(¤t->mm->mmap_sem); |
bbd9b64e | 1567 | while (bytes) { |
ad312c7c | 1568 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); |
bbd9b64e CO |
1569 | unsigned offset = addr & (PAGE_SIZE-1); |
1570 | unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset); | |
1571 | int ret; | |
1572 | ||
10589a46 MT |
1573 | if (gpa == UNMAPPED_GVA) { |
1574 | r = X86EMUL_PROPAGATE_FAULT; | |
1575 | goto out; | |
1576 | } | |
bbd9b64e | 1577 | ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy); |
10589a46 MT |
1578 | if (ret < 0) { |
1579 | r = X86EMUL_UNHANDLEABLE; | |
1580 | goto out; | |
1581 | } | |
bbd9b64e CO |
1582 | |
1583 | bytes -= tocopy; | |
1584 | data += tocopy; | |
1585 | addr += tocopy; | |
1586 | } | |
10589a46 MT |
1587 | out: |
1588 | up_read(¤t->mm->mmap_sem); | |
1589 | return r; | |
bbd9b64e CO |
1590 | } |
1591 | EXPORT_SYMBOL_GPL(emulator_read_std); | |
1592 | ||
bbd9b64e CO |
1593 | static int emulator_read_emulated(unsigned long addr, |
1594 | void *val, | |
1595 | unsigned int bytes, | |
1596 | struct kvm_vcpu *vcpu) | |
1597 | { | |
1598 | struct kvm_io_device *mmio_dev; | |
1599 | gpa_t gpa; | |
1600 | ||
1601 | if (vcpu->mmio_read_completed) { | |
1602 | memcpy(val, vcpu->mmio_data, bytes); | |
1603 | vcpu->mmio_read_completed = 0; | |
1604 | return X86EMUL_CONTINUE; | |
1605 | } | |
1606 | ||
10589a46 | 1607 | down_read(¤t->mm->mmap_sem); |
ad312c7c | 1608 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); |
10589a46 | 1609 | up_read(¤t->mm->mmap_sem); |
bbd9b64e CO |
1610 | |
1611 | /* For APIC access vmexit */ | |
1612 | if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1613 | goto mmio; | |
1614 | ||
1615 | if (emulator_read_std(addr, val, bytes, vcpu) | |
1616 | == X86EMUL_CONTINUE) | |
1617 | return X86EMUL_CONTINUE; | |
1618 | if (gpa == UNMAPPED_GVA) | |
1619 | return X86EMUL_PROPAGATE_FAULT; | |
1620 | ||
1621 | mmio: | |
1622 | /* | |
1623 | * Is this MMIO handled locally? | |
1624 | */ | |
10589a46 | 1625 | mutex_lock(&vcpu->kvm->lock); |
bbd9b64e CO |
1626 | mmio_dev = vcpu_find_mmio_dev(vcpu, gpa); |
1627 | if (mmio_dev) { | |
1628 | kvm_iodevice_read(mmio_dev, gpa, bytes, val); | |
10589a46 | 1629 | mutex_unlock(&vcpu->kvm->lock); |
bbd9b64e CO |
1630 | return X86EMUL_CONTINUE; |
1631 | } | |
10589a46 | 1632 | mutex_unlock(&vcpu->kvm->lock); |
bbd9b64e CO |
1633 | |
1634 | vcpu->mmio_needed = 1; | |
1635 | vcpu->mmio_phys_addr = gpa; | |
1636 | vcpu->mmio_size = bytes; | |
1637 | vcpu->mmio_is_write = 0; | |
1638 | ||
1639 | return X86EMUL_UNHANDLEABLE; | |
1640 | } | |
1641 | ||
1642 | static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, | |
1643 | const void *val, int bytes) | |
1644 | { | |
1645 | int ret; | |
1646 | ||
10589a46 | 1647 | down_read(¤t->mm->mmap_sem); |
bbd9b64e | 1648 | ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes); |
10589a46 MT |
1649 | if (ret < 0) { |
1650 | up_read(¤t->mm->mmap_sem); | |
bbd9b64e | 1651 | return 0; |
10589a46 | 1652 | } |
bbd9b64e | 1653 | kvm_mmu_pte_write(vcpu, gpa, val, bytes); |
10589a46 | 1654 | up_read(¤t->mm->mmap_sem); |
bbd9b64e CO |
1655 | return 1; |
1656 | } | |
1657 | ||
1658 | static int emulator_write_emulated_onepage(unsigned long addr, | |
1659 | const void *val, | |
1660 | unsigned int bytes, | |
1661 | struct kvm_vcpu *vcpu) | |
1662 | { | |
1663 | struct kvm_io_device *mmio_dev; | |
10589a46 MT |
1664 | gpa_t gpa; |
1665 | ||
1666 | down_read(¤t->mm->mmap_sem); | |
1667 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); | |
1668 | up_read(¤t->mm->mmap_sem); | |
bbd9b64e CO |
1669 | |
1670 | if (gpa == UNMAPPED_GVA) { | |
c3c91fee | 1671 | kvm_inject_page_fault(vcpu, addr, 2); |
bbd9b64e CO |
1672 | return X86EMUL_PROPAGATE_FAULT; |
1673 | } | |
1674 | ||
1675 | /* For APIC access vmexit */ | |
1676 | if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1677 | goto mmio; | |
1678 | ||
1679 | if (emulator_write_phys(vcpu, gpa, val, bytes)) | |
1680 | return X86EMUL_CONTINUE; | |
1681 | ||
1682 | mmio: | |
1683 | /* | |
1684 | * Is this MMIO handled locally? | |
1685 | */ | |
10589a46 | 1686 | mutex_lock(&vcpu->kvm->lock); |
bbd9b64e CO |
1687 | mmio_dev = vcpu_find_mmio_dev(vcpu, gpa); |
1688 | if (mmio_dev) { | |
1689 | kvm_iodevice_write(mmio_dev, gpa, bytes, val); | |
10589a46 | 1690 | mutex_unlock(&vcpu->kvm->lock); |
bbd9b64e CO |
1691 | return X86EMUL_CONTINUE; |
1692 | } | |
10589a46 | 1693 | mutex_unlock(&vcpu->kvm->lock); |
bbd9b64e CO |
1694 | |
1695 | vcpu->mmio_needed = 1; | |
1696 | vcpu->mmio_phys_addr = gpa; | |
1697 | vcpu->mmio_size = bytes; | |
1698 | vcpu->mmio_is_write = 1; | |
1699 | memcpy(vcpu->mmio_data, val, bytes); | |
1700 | ||
1701 | return X86EMUL_CONTINUE; | |
1702 | } | |
1703 | ||
1704 | int emulator_write_emulated(unsigned long addr, | |
1705 | const void *val, | |
1706 | unsigned int bytes, | |
1707 | struct kvm_vcpu *vcpu) | |
1708 | { | |
1709 | /* Crossing a page boundary? */ | |
1710 | if (((addr + bytes - 1) ^ addr) & PAGE_MASK) { | |
1711 | int rc, now; | |
1712 | ||
1713 | now = -addr & ~PAGE_MASK; | |
1714 | rc = emulator_write_emulated_onepage(addr, val, now, vcpu); | |
1715 | if (rc != X86EMUL_CONTINUE) | |
1716 | return rc; | |
1717 | addr += now; | |
1718 | val += now; | |
1719 | bytes -= now; | |
1720 | } | |
1721 | return emulator_write_emulated_onepage(addr, val, bytes, vcpu); | |
1722 | } | |
1723 | EXPORT_SYMBOL_GPL(emulator_write_emulated); | |
1724 | ||
1725 | static int emulator_cmpxchg_emulated(unsigned long addr, | |
1726 | const void *old, | |
1727 | const void *new, | |
1728 | unsigned int bytes, | |
1729 | struct kvm_vcpu *vcpu) | |
1730 | { | |
1731 | static int reported; | |
1732 | ||
1733 | if (!reported) { | |
1734 | reported = 1; | |
1735 | printk(KERN_WARNING "kvm: emulating exchange as write\n"); | |
1736 | } | |
2bacc55c MT |
1737 | #ifndef CONFIG_X86_64 |
1738 | /* guests cmpxchg8b have to be emulated atomically */ | |
1739 | if (bytes == 8) { | |
10589a46 | 1740 | gpa_t gpa; |
2bacc55c MT |
1741 | struct page *page; |
1742 | char *addr; | |
1743 | u64 val; | |
1744 | ||
10589a46 MT |
1745 | down_read(¤t->mm->mmap_sem); |
1746 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); | |
1747 | ||
2bacc55c MT |
1748 | if (gpa == UNMAPPED_GVA || |
1749 | (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1750 | goto emul_write; | |
1751 | ||
1752 | if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK)) | |
1753 | goto emul_write; | |
1754 | ||
1755 | val = *(u64 *)new; | |
1756 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | |
1757 | addr = kmap_atomic(page, KM_USER0); | |
1758 | set_64bit((u64 *)(addr + offset_in_page(gpa)), val); | |
1759 | kunmap_atomic(addr, KM_USER0); | |
1760 | kvm_release_page_dirty(page); | |
10589a46 MT |
1761 | emul_write: |
1762 | up_read(¤t->mm->mmap_sem); | |
2bacc55c | 1763 | } |
2bacc55c MT |
1764 | #endif |
1765 | ||
bbd9b64e CO |
1766 | return emulator_write_emulated(addr, new, bytes, vcpu); |
1767 | } | |
1768 | ||
1769 | static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg) | |
1770 | { | |
1771 | return kvm_x86_ops->get_segment_base(vcpu, seg); | |
1772 | } | |
1773 | ||
1774 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address) | |
1775 | { | |
1776 | return X86EMUL_CONTINUE; | |
1777 | } | |
1778 | ||
1779 | int emulate_clts(struct kvm_vcpu *vcpu) | |
1780 | { | |
ad312c7c | 1781 | kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS); |
bbd9b64e CO |
1782 | return X86EMUL_CONTINUE; |
1783 | } | |
1784 | ||
1785 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest) | |
1786 | { | |
1787 | struct kvm_vcpu *vcpu = ctxt->vcpu; | |
1788 | ||
1789 | switch (dr) { | |
1790 | case 0 ... 3: | |
1791 | *dest = kvm_x86_ops->get_dr(vcpu, dr); | |
1792 | return X86EMUL_CONTINUE; | |
1793 | default: | |
1794 | pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr); | |
1795 | return X86EMUL_UNHANDLEABLE; | |
1796 | } | |
1797 | } | |
1798 | ||
1799 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value) | |
1800 | { | |
1801 | unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U; | |
1802 | int exception; | |
1803 | ||
1804 | kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception); | |
1805 | if (exception) { | |
1806 | /* FIXME: better handling */ | |
1807 | return X86EMUL_UNHANDLEABLE; | |
1808 | } | |
1809 | return X86EMUL_CONTINUE; | |
1810 | } | |
1811 | ||
1812 | void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) | |
1813 | { | |
1814 | static int reported; | |
1815 | u8 opcodes[4]; | |
ad312c7c | 1816 | unsigned long rip = vcpu->arch.rip; |
bbd9b64e CO |
1817 | unsigned long rip_linear; |
1818 | ||
1819 | rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS); | |
1820 | ||
1821 | if (reported) | |
1822 | return; | |
1823 | ||
1824 | emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu); | |
1825 | ||
1826 | printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n", | |
1827 | context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]); | |
1828 | reported = 1; | |
1829 | } | |
1830 | EXPORT_SYMBOL_GPL(kvm_report_emulation_failure); | |
1831 | ||
1832 | struct x86_emulate_ops emulate_ops = { | |
1833 | .read_std = emulator_read_std, | |
bbd9b64e CO |
1834 | .read_emulated = emulator_read_emulated, |
1835 | .write_emulated = emulator_write_emulated, | |
1836 | .cmpxchg_emulated = emulator_cmpxchg_emulated, | |
1837 | }; | |
1838 | ||
1839 | int emulate_instruction(struct kvm_vcpu *vcpu, | |
1840 | struct kvm_run *run, | |
1841 | unsigned long cr2, | |
1842 | u16 error_code, | |
571008da | 1843 | int emulation_type) |
bbd9b64e CO |
1844 | { |
1845 | int r; | |
571008da | 1846 | struct decode_cache *c; |
bbd9b64e | 1847 | |
ad312c7c | 1848 | vcpu->arch.mmio_fault_cr2 = cr2; |
bbd9b64e CO |
1849 | kvm_x86_ops->cache_regs(vcpu); |
1850 | ||
1851 | vcpu->mmio_is_write = 0; | |
ad312c7c | 1852 | vcpu->arch.pio.string = 0; |
bbd9b64e | 1853 | |
571008da | 1854 | if (!(emulation_type & EMULTYPE_NO_DECODE)) { |
bbd9b64e CO |
1855 | int cs_db, cs_l; |
1856 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); | |
1857 | ||
ad312c7c ZX |
1858 | vcpu->arch.emulate_ctxt.vcpu = vcpu; |
1859 | vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu); | |
1860 | vcpu->arch.emulate_ctxt.mode = | |
1861 | (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM) | |
bbd9b64e CO |
1862 | ? X86EMUL_MODE_REAL : cs_l |
1863 | ? X86EMUL_MODE_PROT64 : cs_db | |
1864 | ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; | |
1865 | ||
ad312c7c ZX |
1866 | if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) { |
1867 | vcpu->arch.emulate_ctxt.cs_base = 0; | |
1868 | vcpu->arch.emulate_ctxt.ds_base = 0; | |
1869 | vcpu->arch.emulate_ctxt.es_base = 0; | |
1870 | vcpu->arch.emulate_ctxt.ss_base = 0; | |
bbd9b64e | 1871 | } else { |
ad312c7c | 1872 | vcpu->arch.emulate_ctxt.cs_base = |
bbd9b64e | 1873 | get_segment_base(vcpu, VCPU_SREG_CS); |
ad312c7c | 1874 | vcpu->arch.emulate_ctxt.ds_base = |
bbd9b64e | 1875 | get_segment_base(vcpu, VCPU_SREG_DS); |
ad312c7c | 1876 | vcpu->arch.emulate_ctxt.es_base = |
bbd9b64e | 1877 | get_segment_base(vcpu, VCPU_SREG_ES); |
ad312c7c | 1878 | vcpu->arch.emulate_ctxt.ss_base = |
bbd9b64e CO |
1879 | get_segment_base(vcpu, VCPU_SREG_SS); |
1880 | } | |
1881 | ||
ad312c7c | 1882 | vcpu->arch.emulate_ctxt.gs_base = |
bbd9b64e | 1883 | get_segment_base(vcpu, VCPU_SREG_GS); |
ad312c7c | 1884 | vcpu->arch.emulate_ctxt.fs_base = |
bbd9b64e CO |
1885 | get_segment_base(vcpu, VCPU_SREG_FS); |
1886 | ||
ad312c7c | 1887 | r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); |
571008da SY |
1888 | |
1889 | /* Reject the instructions other than VMCALL/VMMCALL when | |
1890 | * try to emulate invalid opcode */ | |
1891 | c = &vcpu->arch.emulate_ctxt.decode; | |
1892 | if ((emulation_type & EMULTYPE_TRAP_UD) && | |
1893 | (!(c->twobyte && c->b == 0x01 && | |
1894 | (c->modrm_reg == 0 || c->modrm_reg == 3) && | |
1895 | c->modrm_mod == 3 && c->modrm_rm == 1))) | |
1896 | return EMULATE_FAIL; | |
1897 | ||
f2b5756b | 1898 | ++vcpu->stat.insn_emulation; |
bbd9b64e | 1899 | if (r) { |
f2b5756b | 1900 | ++vcpu->stat.insn_emulation_fail; |
bbd9b64e CO |
1901 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) |
1902 | return EMULATE_DONE; | |
1903 | return EMULATE_FAIL; | |
1904 | } | |
1905 | } | |
1906 | ||
ad312c7c | 1907 | r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); |
bbd9b64e | 1908 | |
ad312c7c | 1909 | if (vcpu->arch.pio.string) |
bbd9b64e CO |
1910 | return EMULATE_DO_MMIO; |
1911 | ||
1912 | if ((r || vcpu->mmio_is_write) && run) { | |
1913 | run->exit_reason = KVM_EXIT_MMIO; | |
1914 | run->mmio.phys_addr = vcpu->mmio_phys_addr; | |
1915 | memcpy(run->mmio.data, vcpu->mmio_data, 8); | |
1916 | run->mmio.len = vcpu->mmio_size; | |
1917 | run->mmio.is_write = vcpu->mmio_is_write; | |
1918 | } | |
1919 | ||
1920 | if (r) { | |
1921 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) | |
1922 | return EMULATE_DONE; | |
1923 | if (!vcpu->mmio_needed) { | |
1924 | kvm_report_emulation_failure(vcpu, "mmio"); | |
1925 | return EMULATE_FAIL; | |
1926 | } | |
1927 | return EMULATE_DO_MMIO; | |
1928 | } | |
1929 | ||
1930 | kvm_x86_ops->decache_regs(vcpu); | |
ad312c7c | 1931 | kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags); |
bbd9b64e CO |
1932 | |
1933 | if (vcpu->mmio_is_write) { | |
1934 | vcpu->mmio_needed = 0; | |
1935 | return EMULATE_DO_MMIO; | |
1936 | } | |
1937 | ||
1938 | return EMULATE_DONE; | |
1939 | } | |
1940 | EXPORT_SYMBOL_GPL(emulate_instruction); | |
1941 | ||
de7d789a CO |
1942 | static void free_pio_guest_pages(struct kvm_vcpu *vcpu) |
1943 | { | |
1944 | int i; | |
1945 | ||
ad312c7c ZX |
1946 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i) |
1947 | if (vcpu->arch.pio.guest_pages[i]) { | |
1948 | kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]); | |
1949 | vcpu->arch.pio.guest_pages[i] = NULL; | |
de7d789a CO |
1950 | } |
1951 | } | |
1952 | ||
1953 | static int pio_copy_data(struct kvm_vcpu *vcpu) | |
1954 | { | |
ad312c7c | 1955 | void *p = vcpu->arch.pio_data; |
de7d789a CO |
1956 | void *q; |
1957 | unsigned bytes; | |
ad312c7c | 1958 | int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1; |
de7d789a | 1959 | |
ad312c7c | 1960 | q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE, |
de7d789a CO |
1961 | PAGE_KERNEL); |
1962 | if (!q) { | |
1963 | free_pio_guest_pages(vcpu); | |
1964 | return -ENOMEM; | |
1965 | } | |
ad312c7c ZX |
1966 | q += vcpu->arch.pio.guest_page_offset; |
1967 | bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count; | |
1968 | if (vcpu->arch.pio.in) | |
de7d789a CO |
1969 | memcpy(q, p, bytes); |
1970 | else | |
1971 | memcpy(p, q, bytes); | |
ad312c7c | 1972 | q -= vcpu->arch.pio.guest_page_offset; |
de7d789a CO |
1973 | vunmap(q); |
1974 | free_pio_guest_pages(vcpu); | |
1975 | return 0; | |
1976 | } | |
1977 | ||
1978 | int complete_pio(struct kvm_vcpu *vcpu) | |
1979 | { | |
ad312c7c | 1980 | struct kvm_pio_request *io = &vcpu->arch.pio; |
de7d789a CO |
1981 | long delta; |
1982 | int r; | |
1983 | ||
1984 | kvm_x86_ops->cache_regs(vcpu); | |
1985 | ||
1986 | if (!io->string) { | |
1987 | if (io->in) | |
ad312c7c | 1988 | memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data, |
de7d789a CO |
1989 | io->size); |
1990 | } else { | |
1991 | if (io->in) { | |
1992 | r = pio_copy_data(vcpu); | |
1993 | if (r) { | |
1994 | kvm_x86_ops->cache_regs(vcpu); | |
1995 | return r; | |
1996 | } | |
1997 | } | |
1998 | ||
1999 | delta = 1; | |
2000 | if (io->rep) { | |
2001 | delta *= io->cur_count; | |
2002 | /* | |
2003 | * The size of the register should really depend on | |
2004 | * current address size. | |
2005 | */ | |
ad312c7c | 2006 | vcpu->arch.regs[VCPU_REGS_RCX] -= delta; |
de7d789a CO |
2007 | } |
2008 | if (io->down) | |
2009 | delta = -delta; | |
2010 | delta *= io->size; | |
2011 | if (io->in) | |
ad312c7c | 2012 | vcpu->arch.regs[VCPU_REGS_RDI] += delta; |
de7d789a | 2013 | else |
ad312c7c | 2014 | vcpu->arch.regs[VCPU_REGS_RSI] += delta; |
de7d789a CO |
2015 | } |
2016 | ||
2017 | kvm_x86_ops->decache_regs(vcpu); | |
2018 | ||
2019 | io->count -= io->cur_count; | |
2020 | io->cur_count = 0; | |
2021 | ||
2022 | return 0; | |
2023 | } | |
2024 | ||
2025 | static void kernel_pio(struct kvm_io_device *pio_dev, | |
2026 | struct kvm_vcpu *vcpu, | |
2027 | void *pd) | |
2028 | { | |
2029 | /* TODO: String I/O for in kernel device */ | |
2030 | ||
2031 | mutex_lock(&vcpu->kvm->lock); | |
ad312c7c ZX |
2032 | if (vcpu->arch.pio.in) |
2033 | kvm_iodevice_read(pio_dev, vcpu->arch.pio.port, | |
2034 | vcpu->arch.pio.size, | |
de7d789a CO |
2035 | pd); |
2036 | else | |
ad312c7c ZX |
2037 | kvm_iodevice_write(pio_dev, vcpu->arch.pio.port, |
2038 | vcpu->arch.pio.size, | |
de7d789a CO |
2039 | pd); |
2040 | mutex_unlock(&vcpu->kvm->lock); | |
2041 | } | |
2042 | ||
2043 | static void pio_string_write(struct kvm_io_device *pio_dev, | |
2044 | struct kvm_vcpu *vcpu) | |
2045 | { | |
ad312c7c ZX |
2046 | struct kvm_pio_request *io = &vcpu->arch.pio; |
2047 | void *pd = vcpu->arch.pio_data; | |
de7d789a CO |
2048 | int i; |
2049 | ||
2050 | mutex_lock(&vcpu->kvm->lock); | |
2051 | for (i = 0; i < io->cur_count; i++) { | |
2052 | kvm_iodevice_write(pio_dev, io->port, | |
2053 | io->size, | |
2054 | pd); | |
2055 | pd += io->size; | |
2056 | } | |
2057 | mutex_unlock(&vcpu->kvm->lock); | |
2058 | } | |
2059 | ||
2060 | static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu, | |
2061 | gpa_t addr) | |
2062 | { | |
2063 | return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr); | |
2064 | } | |
2065 | ||
2066 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
2067 | int size, unsigned port) | |
2068 | { | |
2069 | struct kvm_io_device *pio_dev; | |
2070 | ||
2071 | vcpu->run->exit_reason = KVM_EXIT_IO; | |
2072 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | |
ad312c7c | 2073 | vcpu->run->io.size = vcpu->arch.pio.size = size; |
de7d789a | 2074 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; |
ad312c7c ZX |
2075 | vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1; |
2076 | vcpu->run->io.port = vcpu->arch.pio.port = port; | |
2077 | vcpu->arch.pio.in = in; | |
2078 | vcpu->arch.pio.string = 0; | |
2079 | vcpu->arch.pio.down = 0; | |
2080 | vcpu->arch.pio.guest_page_offset = 0; | |
2081 | vcpu->arch.pio.rep = 0; | |
de7d789a CO |
2082 | |
2083 | kvm_x86_ops->cache_regs(vcpu); | |
ad312c7c | 2084 | memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4); |
de7d789a CO |
2085 | kvm_x86_ops->decache_regs(vcpu); |
2086 | ||
2087 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
2088 | ||
2089 | pio_dev = vcpu_find_pio_dev(vcpu, port); | |
2090 | if (pio_dev) { | |
ad312c7c | 2091 | kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data); |
de7d789a CO |
2092 | complete_pio(vcpu); |
2093 | return 1; | |
2094 | } | |
2095 | return 0; | |
2096 | } | |
2097 | EXPORT_SYMBOL_GPL(kvm_emulate_pio); | |
2098 | ||
2099 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
2100 | int size, unsigned long count, int down, | |
2101 | gva_t address, int rep, unsigned port) | |
2102 | { | |
2103 | unsigned now, in_page; | |
2104 | int i, ret = 0; | |
2105 | int nr_pages = 1; | |
2106 | struct page *page; | |
2107 | struct kvm_io_device *pio_dev; | |
2108 | ||
2109 | vcpu->run->exit_reason = KVM_EXIT_IO; | |
2110 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | |
ad312c7c | 2111 | vcpu->run->io.size = vcpu->arch.pio.size = size; |
de7d789a | 2112 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; |
ad312c7c ZX |
2113 | vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count; |
2114 | vcpu->run->io.port = vcpu->arch.pio.port = port; | |
2115 | vcpu->arch.pio.in = in; | |
2116 | vcpu->arch.pio.string = 1; | |
2117 | vcpu->arch.pio.down = down; | |
2118 | vcpu->arch.pio.guest_page_offset = offset_in_page(address); | |
2119 | vcpu->arch.pio.rep = rep; | |
de7d789a CO |
2120 | |
2121 | if (!count) { | |
2122 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
2123 | return 1; | |
2124 | } | |
2125 | ||
2126 | if (!down) | |
2127 | in_page = PAGE_SIZE - offset_in_page(address); | |
2128 | else | |
2129 | in_page = offset_in_page(address) + size; | |
2130 | now = min(count, (unsigned long)in_page / size); | |
2131 | if (!now) { | |
2132 | /* | |
2133 | * String I/O straddles page boundary. Pin two guest pages | |
2134 | * so that we satisfy atomicity constraints. Do just one | |
2135 | * transaction to avoid complexity. | |
2136 | */ | |
2137 | nr_pages = 2; | |
2138 | now = 1; | |
2139 | } | |
2140 | if (down) { | |
2141 | /* | |
2142 | * String I/O in reverse. Yuck. Kill the guest, fix later. | |
2143 | */ | |
2144 | pr_unimpl(vcpu, "guest string pio down\n"); | |
c1a5d4f9 | 2145 | kvm_inject_gp(vcpu, 0); |
de7d789a CO |
2146 | return 1; |
2147 | } | |
2148 | vcpu->run->io.count = now; | |
ad312c7c | 2149 | vcpu->arch.pio.cur_count = now; |
de7d789a | 2150 | |
ad312c7c | 2151 | if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count) |
de7d789a CO |
2152 | kvm_x86_ops->skip_emulated_instruction(vcpu); |
2153 | ||
2154 | for (i = 0; i < nr_pages; ++i) { | |
10589a46 | 2155 | down_read(¤t->mm->mmap_sem); |
de7d789a | 2156 | page = gva_to_page(vcpu, address + i * PAGE_SIZE); |
ad312c7c | 2157 | vcpu->arch.pio.guest_pages[i] = page; |
10589a46 | 2158 | up_read(¤t->mm->mmap_sem); |
de7d789a | 2159 | if (!page) { |
c1a5d4f9 | 2160 | kvm_inject_gp(vcpu, 0); |
de7d789a CO |
2161 | free_pio_guest_pages(vcpu); |
2162 | return 1; | |
2163 | } | |
2164 | } | |
2165 | ||
2166 | pio_dev = vcpu_find_pio_dev(vcpu, port); | |
ad312c7c | 2167 | if (!vcpu->arch.pio.in) { |
de7d789a CO |
2168 | /* string PIO write */ |
2169 | ret = pio_copy_data(vcpu); | |
2170 | if (ret >= 0 && pio_dev) { | |
2171 | pio_string_write(pio_dev, vcpu); | |
2172 | complete_pio(vcpu); | |
ad312c7c | 2173 | if (vcpu->arch.pio.count == 0) |
de7d789a CO |
2174 | ret = 1; |
2175 | } | |
2176 | } else if (pio_dev) | |
2177 | pr_unimpl(vcpu, "no string pio read support yet, " | |
2178 | "port %x size %d count %ld\n", | |
2179 | port, size, count); | |
2180 | ||
2181 | return ret; | |
2182 | } | |
2183 | EXPORT_SYMBOL_GPL(kvm_emulate_pio_string); | |
2184 | ||
f8c16bba | 2185 | int kvm_arch_init(void *opaque) |
043405e1 | 2186 | { |
56c6d28a | 2187 | int r; |
f8c16bba ZX |
2188 | struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque; |
2189 | ||
f8c16bba ZX |
2190 | if (kvm_x86_ops) { |
2191 | printk(KERN_ERR "kvm: already loaded the other module\n"); | |
56c6d28a ZX |
2192 | r = -EEXIST; |
2193 | goto out; | |
f8c16bba ZX |
2194 | } |
2195 | ||
2196 | if (!ops->cpu_has_kvm_support()) { | |
2197 | printk(KERN_ERR "kvm: no hardware support\n"); | |
56c6d28a ZX |
2198 | r = -EOPNOTSUPP; |
2199 | goto out; | |
f8c16bba ZX |
2200 | } |
2201 | if (ops->disabled_by_bios()) { | |
2202 | printk(KERN_ERR "kvm: disabled by bios\n"); | |
56c6d28a ZX |
2203 | r = -EOPNOTSUPP; |
2204 | goto out; | |
f8c16bba ZX |
2205 | } |
2206 | ||
97db56ce AK |
2207 | r = kvm_mmu_module_init(); |
2208 | if (r) | |
2209 | goto out; | |
2210 | ||
2211 | kvm_init_msr_list(); | |
2212 | ||
f8c16bba | 2213 | kvm_x86_ops = ops; |
56c6d28a | 2214 | kvm_mmu_set_nonpresent_ptes(0ull, 0ull); |
f8c16bba | 2215 | return 0; |
56c6d28a ZX |
2216 | |
2217 | out: | |
56c6d28a | 2218 | return r; |
043405e1 | 2219 | } |
8776e519 | 2220 | |
f8c16bba ZX |
2221 | void kvm_arch_exit(void) |
2222 | { | |
2223 | kvm_x86_ops = NULL; | |
56c6d28a ZX |
2224 | kvm_mmu_module_exit(); |
2225 | } | |
f8c16bba | 2226 | |
8776e519 HB |
2227 | int kvm_emulate_halt(struct kvm_vcpu *vcpu) |
2228 | { | |
2229 | ++vcpu->stat.halt_exits; | |
2230 | if (irqchip_in_kernel(vcpu->kvm)) { | |
ad312c7c | 2231 | vcpu->arch.mp_state = VCPU_MP_STATE_HALTED; |
8776e519 | 2232 | kvm_vcpu_block(vcpu); |
ad312c7c | 2233 | if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE) |
8776e519 HB |
2234 | return -EINTR; |
2235 | return 1; | |
2236 | } else { | |
2237 | vcpu->run->exit_reason = KVM_EXIT_HLT; | |
2238 | return 0; | |
2239 | } | |
2240 | } | |
2241 | EXPORT_SYMBOL_GPL(kvm_emulate_halt); | |
2242 | ||
2243 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) | |
2244 | { | |
2245 | unsigned long nr, a0, a1, a2, a3, ret; | |
2246 | ||
2247 | kvm_x86_ops->cache_regs(vcpu); | |
2248 | ||
ad312c7c ZX |
2249 | nr = vcpu->arch.regs[VCPU_REGS_RAX]; |
2250 | a0 = vcpu->arch.regs[VCPU_REGS_RBX]; | |
2251 | a1 = vcpu->arch.regs[VCPU_REGS_RCX]; | |
2252 | a2 = vcpu->arch.regs[VCPU_REGS_RDX]; | |
2253 | a3 = vcpu->arch.regs[VCPU_REGS_RSI]; | |
8776e519 HB |
2254 | |
2255 | if (!is_long_mode(vcpu)) { | |
2256 | nr &= 0xFFFFFFFF; | |
2257 | a0 &= 0xFFFFFFFF; | |
2258 | a1 &= 0xFFFFFFFF; | |
2259 | a2 &= 0xFFFFFFFF; | |
2260 | a3 &= 0xFFFFFFFF; | |
2261 | } | |
2262 | ||
2263 | switch (nr) { | |
b93463aa AK |
2264 | case KVM_HC_VAPIC_POLL_IRQ: |
2265 | ret = 0; | |
2266 | break; | |
8776e519 HB |
2267 | default: |
2268 | ret = -KVM_ENOSYS; | |
2269 | break; | |
2270 | } | |
ad312c7c | 2271 | vcpu->arch.regs[VCPU_REGS_RAX] = ret; |
8776e519 HB |
2272 | kvm_x86_ops->decache_regs(vcpu); |
2273 | return 0; | |
2274 | } | |
2275 | EXPORT_SYMBOL_GPL(kvm_emulate_hypercall); | |
2276 | ||
2277 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu) | |
2278 | { | |
2279 | char instruction[3]; | |
2280 | int ret = 0; | |
2281 | ||
8776e519 HB |
2282 | |
2283 | /* | |
2284 | * Blow out the MMU to ensure that no other VCPU has an active mapping | |
2285 | * to ensure that the updated hypercall appears atomically across all | |
2286 | * VCPUs. | |
2287 | */ | |
2288 | kvm_mmu_zap_all(vcpu->kvm); | |
2289 | ||
2290 | kvm_x86_ops->cache_regs(vcpu); | |
2291 | kvm_x86_ops->patch_hypercall(vcpu, instruction); | |
ad312c7c | 2292 | if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu) |
8776e519 HB |
2293 | != X86EMUL_CONTINUE) |
2294 | ret = -EFAULT; | |
2295 | ||
8776e519 HB |
2296 | return ret; |
2297 | } | |
2298 | ||
2299 | static u64 mk_cr_64(u64 curr_cr, u32 new_val) | |
2300 | { | |
2301 | return (curr_cr & ~((1ULL << 32) - 1)) | new_val; | |
2302 | } | |
2303 | ||
2304 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | |
2305 | { | |
2306 | struct descriptor_table dt = { limit, base }; | |
2307 | ||
2308 | kvm_x86_ops->set_gdt(vcpu, &dt); | |
2309 | } | |
2310 | ||
2311 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | |
2312 | { | |
2313 | struct descriptor_table dt = { limit, base }; | |
2314 | ||
2315 | kvm_x86_ops->set_idt(vcpu, &dt); | |
2316 | } | |
2317 | ||
2318 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
2319 | unsigned long *rflags) | |
2320 | { | |
2321 | lmsw(vcpu, msw); | |
2322 | *rflags = kvm_x86_ops->get_rflags(vcpu); | |
2323 | } | |
2324 | ||
2325 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr) | |
2326 | { | |
2327 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
2328 | switch (cr) { | |
2329 | case 0: | |
ad312c7c | 2330 | return vcpu->arch.cr0; |
8776e519 | 2331 | case 2: |
ad312c7c | 2332 | return vcpu->arch.cr2; |
8776e519 | 2333 | case 3: |
ad312c7c | 2334 | return vcpu->arch.cr3; |
8776e519 | 2335 | case 4: |
ad312c7c | 2336 | return vcpu->arch.cr4; |
152ff9be JR |
2337 | case 8: |
2338 | return get_cr8(vcpu); | |
8776e519 HB |
2339 | default: |
2340 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr); | |
2341 | return 0; | |
2342 | } | |
2343 | } | |
2344 | ||
2345 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val, | |
2346 | unsigned long *rflags) | |
2347 | { | |
2348 | switch (cr) { | |
2349 | case 0: | |
ad312c7c | 2350 | set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val)); |
8776e519 HB |
2351 | *rflags = kvm_x86_ops->get_rflags(vcpu); |
2352 | break; | |
2353 | case 2: | |
ad312c7c | 2354 | vcpu->arch.cr2 = val; |
8776e519 HB |
2355 | break; |
2356 | case 3: | |
2357 | set_cr3(vcpu, val); | |
2358 | break; | |
2359 | case 4: | |
ad312c7c | 2360 | set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val)); |
8776e519 | 2361 | break; |
152ff9be JR |
2362 | case 8: |
2363 | set_cr8(vcpu, val & 0xfUL); | |
2364 | break; | |
8776e519 HB |
2365 | default: |
2366 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr); | |
2367 | } | |
2368 | } | |
2369 | ||
07716717 DK |
2370 | static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) |
2371 | { | |
ad312c7c ZX |
2372 | struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; |
2373 | int j, nent = vcpu->arch.cpuid_nent; | |
07716717 DK |
2374 | |
2375 | e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT; | |
2376 | /* when no next entry is found, the current entry[i] is reselected */ | |
2377 | for (j = i + 1; j == i; j = (j + 1) % nent) { | |
ad312c7c | 2378 | struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j]; |
07716717 DK |
2379 | if (ej->function == e->function) { |
2380 | ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; | |
2381 | return j; | |
2382 | } | |
2383 | } | |
2384 | return 0; /* silence gcc, even though control never reaches here */ | |
2385 | } | |
2386 | ||
2387 | /* find an entry with matching function, matching index (if needed), and that | |
2388 | * should be read next (if it's stateful) */ | |
2389 | static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e, | |
2390 | u32 function, u32 index) | |
2391 | { | |
2392 | if (e->function != function) | |
2393 | return 0; | |
2394 | if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index) | |
2395 | return 0; | |
2396 | if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) && | |
2397 | !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT)) | |
2398 | return 0; | |
2399 | return 1; | |
2400 | } | |
2401 | ||
8776e519 HB |
2402 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu) |
2403 | { | |
2404 | int i; | |
07716717 DK |
2405 | u32 function, index; |
2406 | struct kvm_cpuid_entry2 *e, *best; | |
8776e519 HB |
2407 | |
2408 | kvm_x86_ops->cache_regs(vcpu); | |
ad312c7c ZX |
2409 | function = vcpu->arch.regs[VCPU_REGS_RAX]; |
2410 | index = vcpu->arch.regs[VCPU_REGS_RCX]; | |
2411 | vcpu->arch.regs[VCPU_REGS_RAX] = 0; | |
2412 | vcpu->arch.regs[VCPU_REGS_RBX] = 0; | |
2413 | vcpu->arch.regs[VCPU_REGS_RCX] = 0; | |
2414 | vcpu->arch.regs[VCPU_REGS_RDX] = 0; | |
8776e519 | 2415 | best = NULL; |
ad312c7c ZX |
2416 | for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { |
2417 | e = &vcpu->arch.cpuid_entries[i]; | |
07716717 DK |
2418 | if (is_matching_cpuid_entry(e, function, index)) { |
2419 | if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) | |
2420 | move_to_next_stateful_cpuid_entry(vcpu, i); | |
8776e519 HB |
2421 | best = e; |
2422 | break; | |
2423 | } | |
2424 | /* | |
2425 | * Both basic or both extended? | |
2426 | */ | |
2427 | if (((e->function ^ function) & 0x80000000) == 0) | |
2428 | if (!best || e->function > best->function) | |
2429 | best = e; | |
2430 | } | |
2431 | if (best) { | |
ad312c7c ZX |
2432 | vcpu->arch.regs[VCPU_REGS_RAX] = best->eax; |
2433 | vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx; | |
2434 | vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx; | |
2435 | vcpu->arch.regs[VCPU_REGS_RDX] = best->edx; | |
8776e519 HB |
2436 | } |
2437 | kvm_x86_ops->decache_regs(vcpu); | |
2438 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
2439 | } | |
2440 | EXPORT_SYMBOL_GPL(kvm_emulate_cpuid); | |
d0752060 | 2441 | |
b6c7a5dc HB |
2442 | /* |
2443 | * Check if userspace requested an interrupt window, and that the | |
2444 | * interrupt window is open. | |
2445 | * | |
2446 | * No need to exit to userspace if we already have an interrupt queued. | |
2447 | */ | |
2448 | static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu, | |
2449 | struct kvm_run *kvm_run) | |
2450 | { | |
ad312c7c | 2451 | return (!vcpu->arch.irq_summary && |
b6c7a5dc | 2452 | kvm_run->request_interrupt_window && |
ad312c7c | 2453 | vcpu->arch.interrupt_window_open && |
b6c7a5dc HB |
2454 | (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF)); |
2455 | } | |
2456 | ||
2457 | static void post_kvm_run_save(struct kvm_vcpu *vcpu, | |
2458 | struct kvm_run *kvm_run) | |
2459 | { | |
2460 | kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0; | |
2461 | kvm_run->cr8 = get_cr8(vcpu); | |
2462 | kvm_run->apic_base = kvm_get_apic_base(vcpu); | |
2463 | if (irqchip_in_kernel(vcpu->kvm)) | |
2464 | kvm_run->ready_for_interrupt_injection = 1; | |
2465 | else | |
2466 | kvm_run->ready_for_interrupt_injection = | |
ad312c7c ZX |
2467 | (vcpu->arch.interrupt_window_open && |
2468 | vcpu->arch.irq_summary == 0); | |
b6c7a5dc HB |
2469 | } |
2470 | ||
b93463aa AK |
2471 | static void vapic_enter(struct kvm_vcpu *vcpu) |
2472 | { | |
2473 | struct kvm_lapic *apic = vcpu->arch.apic; | |
2474 | struct page *page; | |
2475 | ||
2476 | if (!apic || !apic->vapic_addr) | |
2477 | return; | |
2478 | ||
10589a46 | 2479 | down_read(¤t->mm->mmap_sem); |
b93463aa AK |
2480 | page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); |
2481 | vcpu->arch.apic->vapic_page = page; | |
10589a46 | 2482 | up_read(¤t->mm->mmap_sem); |
b93463aa AK |
2483 | } |
2484 | ||
2485 | static void vapic_exit(struct kvm_vcpu *vcpu) | |
2486 | { | |
2487 | struct kvm_lapic *apic = vcpu->arch.apic; | |
2488 | ||
2489 | if (!apic || !apic->vapic_addr) | |
2490 | return; | |
2491 | ||
2492 | kvm_release_page_dirty(apic->vapic_page); | |
2493 | mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); | |
2494 | } | |
2495 | ||
b6c7a5dc HB |
2496 | static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) |
2497 | { | |
2498 | int r; | |
2499 | ||
ad312c7c | 2500 | if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) { |
b6c7a5dc | 2501 | pr_debug("vcpu %d received sipi with vector # %x\n", |
ad312c7c | 2502 | vcpu->vcpu_id, vcpu->arch.sipi_vector); |
b6c7a5dc HB |
2503 | kvm_lapic_reset(vcpu); |
2504 | r = kvm_x86_ops->vcpu_reset(vcpu); | |
2505 | if (r) | |
2506 | return r; | |
ad312c7c | 2507 | vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE; |
b6c7a5dc HB |
2508 | } |
2509 | ||
b93463aa AK |
2510 | vapic_enter(vcpu); |
2511 | ||
b6c7a5dc HB |
2512 | preempted: |
2513 | if (vcpu->guest_debug.enabled) | |
2514 | kvm_x86_ops->guest_debug_pre(vcpu); | |
2515 | ||
2516 | again: | |
2517 | r = kvm_mmu_reload(vcpu); | |
2518 | if (unlikely(r)) | |
2519 | goto out; | |
2520 | ||
b93463aa AK |
2521 | if (vcpu->requests) |
2522 | if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS, | |
2523 | &vcpu->requests)) { | |
2524 | kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS; | |
2525 | r = 0; | |
2526 | goto out; | |
2527 | } | |
2528 | ||
b6c7a5dc HB |
2529 | kvm_inject_pending_timer_irqs(vcpu); |
2530 | ||
2531 | preempt_disable(); | |
2532 | ||
2533 | kvm_x86_ops->prepare_guest_switch(vcpu); | |
2534 | kvm_load_guest_fpu(vcpu); | |
2535 | ||
2536 | local_irq_disable(); | |
2537 | ||
6c142801 AK |
2538 | if (need_resched()) { |
2539 | local_irq_enable(); | |
2540 | preempt_enable(); | |
2541 | r = 1; | |
2542 | goto out; | |
2543 | } | |
2544 | ||
b6c7a5dc HB |
2545 | if (signal_pending(current)) { |
2546 | local_irq_enable(); | |
2547 | preempt_enable(); | |
2548 | r = -EINTR; | |
2549 | kvm_run->exit_reason = KVM_EXIT_INTR; | |
2550 | ++vcpu->stat.signal_exits; | |
2551 | goto out; | |
2552 | } | |
2553 | ||
ad312c7c | 2554 | if (vcpu->arch.exception.pending) |
298101da AK |
2555 | __queue_exception(vcpu); |
2556 | else if (irqchip_in_kernel(vcpu->kvm)) | |
b6c7a5dc | 2557 | kvm_x86_ops->inject_pending_irq(vcpu); |
eb9774f0 | 2558 | else |
b6c7a5dc HB |
2559 | kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run); |
2560 | ||
b93463aa AK |
2561 | kvm_lapic_sync_to_vapic(vcpu); |
2562 | ||
b6c7a5dc HB |
2563 | vcpu->guest_mode = 1; |
2564 | kvm_guest_enter(); | |
2565 | ||
2566 | if (vcpu->requests) | |
2567 | if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests)) | |
2568 | kvm_x86_ops->tlb_flush(vcpu); | |
2569 | ||
2570 | kvm_x86_ops->run(vcpu, kvm_run); | |
2571 | ||
2572 | vcpu->guest_mode = 0; | |
2573 | local_irq_enable(); | |
2574 | ||
2575 | ++vcpu->stat.exits; | |
2576 | ||
2577 | /* | |
2578 | * We must have an instruction between local_irq_enable() and | |
2579 | * kvm_guest_exit(), so the timer interrupt isn't delayed by | |
2580 | * the interrupt shadow. The stat.exits increment will do nicely. | |
2581 | * But we need to prevent reordering, hence this barrier(): | |
2582 | */ | |
2583 | barrier(); | |
2584 | ||
2585 | kvm_guest_exit(); | |
2586 | ||
2587 | preempt_enable(); | |
2588 | ||
2589 | /* | |
2590 | * Profile KVM exit RIPs: | |
2591 | */ | |
2592 | if (unlikely(prof_on == KVM_PROFILING)) { | |
2593 | kvm_x86_ops->cache_regs(vcpu); | |
ad312c7c | 2594 | profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip); |
b6c7a5dc HB |
2595 | } |
2596 | ||
ad312c7c ZX |
2597 | if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu)) |
2598 | vcpu->arch.exception.pending = false; | |
298101da | 2599 | |
b93463aa AK |
2600 | kvm_lapic_sync_from_vapic(vcpu); |
2601 | ||
b6c7a5dc HB |
2602 | r = kvm_x86_ops->handle_exit(kvm_run, vcpu); |
2603 | ||
2604 | if (r > 0) { | |
2605 | if (dm_request_for_irq_injection(vcpu, kvm_run)) { | |
2606 | r = -EINTR; | |
2607 | kvm_run->exit_reason = KVM_EXIT_INTR; | |
2608 | ++vcpu->stat.request_irq_exits; | |
2609 | goto out; | |
2610 | } | |
e1beb1d3 | 2611 | if (!need_resched()) |
b6c7a5dc | 2612 | goto again; |
b6c7a5dc HB |
2613 | } |
2614 | ||
2615 | out: | |
2616 | if (r > 0) { | |
2617 | kvm_resched(vcpu); | |
2618 | goto preempted; | |
2619 | } | |
2620 | ||
2621 | post_kvm_run_save(vcpu, kvm_run); | |
2622 | ||
b93463aa AK |
2623 | vapic_exit(vcpu); |
2624 | ||
b6c7a5dc HB |
2625 | return r; |
2626 | } | |
2627 | ||
2628 | int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |
2629 | { | |
2630 | int r; | |
2631 | sigset_t sigsaved; | |
2632 | ||
2633 | vcpu_load(vcpu); | |
2634 | ||
ad312c7c | 2635 | if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) { |
b6c7a5dc HB |
2636 | kvm_vcpu_block(vcpu); |
2637 | vcpu_put(vcpu); | |
2638 | return -EAGAIN; | |
2639 | } | |
2640 | ||
2641 | if (vcpu->sigset_active) | |
2642 | sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved); | |
2643 | ||
2644 | /* re-sync apic's tpr */ | |
2645 | if (!irqchip_in_kernel(vcpu->kvm)) | |
2646 | set_cr8(vcpu, kvm_run->cr8); | |
2647 | ||
ad312c7c | 2648 | if (vcpu->arch.pio.cur_count) { |
b6c7a5dc HB |
2649 | r = complete_pio(vcpu); |
2650 | if (r) | |
2651 | goto out; | |
2652 | } | |
2653 | #if CONFIG_HAS_IOMEM | |
2654 | if (vcpu->mmio_needed) { | |
2655 | memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8); | |
2656 | vcpu->mmio_read_completed = 1; | |
2657 | vcpu->mmio_needed = 0; | |
2658 | r = emulate_instruction(vcpu, kvm_run, | |
571008da SY |
2659 | vcpu->arch.mmio_fault_cr2, 0, |
2660 | EMULTYPE_NO_DECODE); | |
b6c7a5dc HB |
2661 | if (r == EMULATE_DO_MMIO) { |
2662 | /* | |
2663 | * Read-modify-write. Back to userspace. | |
2664 | */ | |
2665 | r = 0; | |
2666 | goto out; | |
2667 | } | |
2668 | } | |
2669 | #endif | |
2670 | if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) { | |
2671 | kvm_x86_ops->cache_regs(vcpu); | |
ad312c7c | 2672 | vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret; |
b6c7a5dc HB |
2673 | kvm_x86_ops->decache_regs(vcpu); |
2674 | } | |
2675 | ||
2676 | r = __vcpu_run(vcpu, kvm_run); | |
2677 | ||
2678 | out: | |
2679 | if (vcpu->sigset_active) | |
2680 | sigprocmask(SIG_SETMASK, &sigsaved, NULL); | |
2681 | ||
2682 | vcpu_put(vcpu); | |
2683 | return r; | |
2684 | } | |
2685 | ||
2686 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
2687 | { | |
2688 | vcpu_load(vcpu); | |
2689 | ||
2690 | kvm_x86_ops->cache_regs(vcpu); | |
2691 | ||
ad312c7c ZX |
2692 | regs->rax = vcpu->arch.regs[VCPU_REGS_RAX]; |
2693 | regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX]; | |
2694 | regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX]; | |
2695 | regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX]; | |
2696 | regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI]; | |
2697 | regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI]; | |
2698 | regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP]; | |
2699 | regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP]; | |
b6c7a5dc | 2700 | #ifdef CONFIG_X86_64 |
ad312c7c ZX |
2701 | regs->r8 = vcpu->arch.regs[VCPU_REGS_R8]; |
2702 | regs->r9 = vcpu->arch.regs[VCPU_REGS_R9]; | |
2703 | regs->r10 = vcpu->arch.regs[VCPU_REGS_R10]; | |
2704 | regs->r11 = vcpu->arch.regs[VCPU_REGS_R11]; | |
2705 | regs->r12 = vcpu->arch.regs[VCPU_REGS_R12]; | |
2706 | regs->r13 = vcpu->arch.regs[VCPU_REGS_R13]; | |
2707 | regs->r14 = vcpu->arch.regs[VCPU_REGS_R14]; | |
2708 | regs->r15 = vcpu->arch.regs[VCPU_REGS_R15]; | |
b6c7a5dc HB |
2709 | #endif |
2710 | ||
ad312c7c | 2711 | regs->rip = vcpu->arch.rip; |
b6c7a5dc HB |
2712 | regs->rflags = kvm_x86_ops->get_rflags(vcpu); |
2713 | ||
2714 | /* | |
2715 | * Don't leak debug flags in case they were set for guest debugging | |
2716 | */ | |
2717 | if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep) | |
2718 | regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF); | |
2719 | ||
2720 | vcpu_put(vcpu); | |
2721 | ||
2722 | return 0; | |
2723 | } | |
2724 | ||
2725 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
2726 | { | |
2727 | vcpu_load(vcpu); | |
2728 | ||
ad312c7c ZX |
2729 | vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax; |
2730 | vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx; | |
2731 | vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx; | |
2732 | vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx; | |
2733 | vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi; | |
2734 | vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi; | |
2735 | vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp; | |
2736 | vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp; | |
b6c7a5dc | 2737 | #ifdef CONFIG_X86_64 |
ad312c7c ZX |
2738 | vcpu->arch.regs[VCPU_REGS_R8] = regs->r8; |
2739 | vcpu->arch.regs[VCPU_REGS_R9] = regs->r9; | |
2740 | vcpu->arch.regs[VCPU_REGS_R10] = regs->r10; | |
2741 | vcpu->arch.regs[VCPU_REGS_R11] = regs->r11; | |
2742 | vcpu->arch.regs[VCPU_REGS_R12] = regs->r12; | |
2743 | vcpu->arch.regs[VCPU_REGS_R13] = regs->r13; | |
2744 | vcpu->arch.regs[VCPU_REGS_R14] = regs->r14; | |
2745 | vcpu->arch.regs[VCPU_REGS_R15] = regs->r15; | |
b6c7a5dc HB |
2746 | #endif |
2747 | ||
ad312c7c | 2748 | vcpu->arch.rip = regs->rip; |
b6c7a5dc HB |
2749 | kvm_x86_ops->set_rflags(vcpu, regs->rflags); |
2750 | ||
2751 | kvm_x86_ops->decache_regs(vcpu); | |
2752 | ||
2753 | vcpu_put(vcpu); | |
2754 | ||
2755 | return 0; | |
2756 | } | |
2757 | ||
2758 | static void get_segment(struct kvm_vcpu *vcpu, | |
2759 | struct kvm_segment *var, int seg) | |
2760 | { | |
2761 | return kvm_x86_ops->get_segment(vcpu, var, seg); | |
2762 | } | |
2763 | ||
2764 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l) | |
2765 | { | |
2766 | struct kvm_segment cs; | |
2767 | ||
2768 | get_segment(vcpu, &cs, VCPU_SREG_CS); | |
2769 | *db = cs.db; | |
2770 | *l = cs.l; | |
2771 | } | |
2772 | EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits); | |
2773 | ||
2774 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |
2775 | struct kvm_sregs *sregs) | |
2776 | { | |
2777 | struct descriptor_table dt; | |
2778 | int pending_vec; | |
2779 | ||
2780 | vcpu_load(vcpu); | |
2781 | ||
2782 | get_segment(vcpu, &sregs->cs, VCPU_SREG_CS); | |
2783 | get_segment(vcpu, &sregs->ds, VCPU_SREG_DS); | |
2784 | get_segment(vcpu, &sregs->es, VCPU_SREG_ES); | |
2785 | get_segment(vcpu, &sregs->fs, VCPU_SREG_FS); | |
2786 | get_segment(vcpu, &sregs->gs, VCPU_SREG_GS); | |
2787 | get_segment(vcpu, &sregs->ss, VCPU_SREG_SS); | |
2788 | ||
2789 | get_segment(vcpu, &sregs->tr, VCPU_SREG_TR); | |
2790 | get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); | |
2791 | ||
2792 | kvm_x86_ops->get_idt(vcpu, &dt); | |
2793 | sregs->idt.limit = dt.limit; | |
2794 | sregs->idt.base = dt.base; | |
2795 | kvm_x86_ops->get_gdt(vcpu, &dt); | |
2796 | sregs->gdt.limit = dt.limit; | |
2797 | sregs->gdt.base = dt.base; | |
2798 | ||
2799 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
ad312c7c ZX |
2800 | sregs->cr0 = vcpu->arch.cr0; |
2801 | sregs->cr2 = vcpu->arch.cr2; | |
2802 | sregs->cr3 = vcpu->arch.cr3; | |
2803 | sregs->cr4 = vcpu->arch.cr4; | |
b6c7a5dc | 2804 | sregs->cr8 = get_cr8(vcpu); |
ad312c7c | 2805 | sregs->efer = vcpu->arch.shadow_efer; |
b6c7a5dc HB |
2806 | sregs->apic_base = kvm_get_apic_base(vcpu); |
2807 | ||
2808 | if (irqchip_in_kernel(vcpu->kvm)) { | |
2809 | memset(sregs->interrupt_bitmap, 0, | |
2810 | sizeof sregs->interrupt_bitmap); | |
2811 | pending_vec = kvm_x86_ops->get_irq(vcpu); | |
2812 | if (pending_vec >= 0) | |
2813 | set_bit(pending_vec, | |
2814 | (unsigned long *)sregs->interrupt_bitmap); | |
2815 | } else | |
ad312c7c | 2816 | memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending, |
b6c7a5dc HB |
2817 | sizeof sregs->interrupt_bitmap); |
2818 | ||
2819 | vcpu_put(vcpu); | |
2820 | ||
2821 | return 0; | |
2822 | } | |
2823 | ||
2824 | static void set_segment(struct kvm_vcpu *vcpu, | |
2825 | struct kvm_segment *var, int seg) | |
2826 | { | |
2827 | return kvm_x86_ops->set_segment(vcpu, var, seg); | |
2828 | } | |
2829 | ||
2830 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
2831 | struct kvm_sregs *sregs) | |
2832 | { | |
2833 | int mmu_reset_needed = 0; | |
2834 | int i, pending_vec, max_bits; | |
2835 | struct descriptor_table dt; | |
2836 | ||
2837 | vcpu_load(vcpu); | |
2838 | ||
2839 | dt.limit = sregs->idt.limit; | |
2840 | dt.base = sregs->idt.base; | |
2841 | kvm_x86_ops->set_idt(vcpu, &dt); | |
2842 | dt.limit = sregs->gdt.limit; | |
2843 | dt.base = sregs->gdt.base; | |
2844 | kvm_x86_ops->set_gdt(vcpu, &dt); | |
2845 | ||
ad312c7c ZX |
2846 | vcpu->arch.cr2 = sregs->cr2; |
2847 | mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3; | |
2848 | vcpu->arch.cr3 = sregs->cr3; | |
b6c7a5dc HB |
2849 | |
2850 | set_cr8(vcpu, sregs->cr8); | |
2851 | ||
ad312c7c | 2852 | mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer; |
b6c7a5dc HB |
2853 | #ifdef CONFIG_X86_64 |
2854 | kvm_x86_ops->set_efer(vcpu, sregs->efer); | |
2855 | #endif | |
2856 | kvm_set_apic_base(vcpu, sregs->apic_base); | |
2857 | ||
2858 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
2859 | ||
ad312c7c ZX |
2860 | mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0; |
2861 | vcpu->arch.cr0 = sregs->cr0; | |
b6c7a5dc HB |
2862 | kvm_x86_ops->set_cr0(vcpu, sregs->cr0); |
2863 | ||
ad312c7c | 2864 | mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4; |
b6c7a5dc HB |
2865 | kvm_x86_ops->set_cr4(vcpu, sregs->cr4); |
2866 | if (!is_long_mode(vcpu) && is_pae(vcpu)) | |
ad312c7c | 2867 | load_pdptrs(vcpu, vcpu->arch.cr3); |
b6c7a5dc HB |
2868 | |
2869 | if (mmu_reset_needed) | |
2870 | kvm_mmu_reset_context(vcpu); | |
2871 | ||
2872 | if (!irqchip_in_kernel(vcpu->kvm)) { | |
ad312c7c ZX |
2873 | memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap, |
2874 | sizeof vcpu->arch.irq_pending); | |
2875 | vcpu->arch.irq_summary = 0; | |
2876 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i) | |
2877 | if (vcpu->arch.irq_pending[i]) | |
2878 | __set_bit(i, &vcpu->arch.irq_summary); | |
b6c7a5dc HB |
2879 | } else { |
2880 | max_bits = (sizeof sregs->interrupt_bitmap) << 3; | |
2881 | pending_vec = find_first_bit( | |
2882 | (const unsigned long *)sregs->interrupt_bitmap, | |
2883 | max_bits); | |
2884 | /* Only pending external irq is handled here */ | |
2885 | if (pending_vec < max_bits) { | |
2886 | kvm_x86_ops->set_irq(vcpu, pending_vec); | |
2887 | pr_debug("Set back pending irq %d\n", | |
2888 | pending_vec); | |
2889 | } | |
2890 | } | |
2891 | ||
2892 | set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); | |
2893 | set_segment(vcpu, &sregs->ds, VCPU_SREG_DS); | |
2894 | set_segment(vcpu, &sregs->es, VCPU_SREG_ES); | |
2895 | set_segment(vcpu, &sregs->fs, VCPU_SREG_FS); | |
2896 | set_segment(vcpu, &sregs->gs, VCPU_SREG_GS); | |
2897 | set_segment(vcpu, &sregs->ss, VCPU_SREG_SS); | |
2898 | ||
2899 | set_segment(vcpu, &sregs->tr, VCPU_SREG_TR); | |
2900 | set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); | |
2901 | ||
2902 | vcpu_put(vcpu); | |
2903 | ||
2904 | return 0; | |
2905 | } | |
2906 | ||
2907 | int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, | |
2908 | struct kvm_debug_guest *dbg) | |
2909 | { | |
2910 | int r; | |
2911 | ||
2912 | vcpu_load(vcpu); | |
2913 | ||
2914 | r = kvm_x86_ops->set_guest_debug(vcpu, dbg); | |
2915 | ||
2916 | vcpu_put(vcpu); | |
2917 | ||
2918 | return r; | |
2919 | } | |
2920 | ||
d0752060 HB |
2921 | /* |
2922 | * fxsave fpu state. Taken from x86_64/processor.h. To be killed when | |
2923 | * we have asm/x86/processor.h | |
2924 | */ | |
2925 | struct fxsave { | |
2926 | u16 cwd; | |
2927 | u16 swd; | |
2928 | u16 twd; | |
2929 | u16 fop; | |
2930 | u64 rip; | |
2931 | u64 rdp; | |
2932 | u32 mxcsr; | |
2933 | u32 mxcsr_mask; | |
2934 | u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ | |
2935 | #ifdef CONFIG_X86_64 | |
2936 | u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */ | |
2937 | #else | |
2938 | u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */ | |
2939 | #endif | |
2940 | }; | |
2941 | ||
8b006791 ZX |
2942 | /* |
2943 | * Translate a guest virtual address to a guest physical address. | |
2944 | */ | |
2945 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, | |
2946 | struct kvm_translation *tr) | |
2947 | { | |
2948 | unsigned long vaddr = tr->linear_address; | |
2949 | gpa_t gpa; | |
2950 | ||
2951 | vcpu_load(vcpu); | |
10589a46 | 2952 | down_read(¤t->mm->mmap_sem); |
ad312c7c | 2953 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr); |
10589a46 | 2954 | up_read(¤t->mm->mmap_sem); |
8b006791 ZX |
2955 | tr->physical_address = gpa; |
2956 | tr->valid = gpa != UNMAPPED_GVA; | |
2957 | tr->writeable = 1; | |
2958 | tr->usermode = 0; | |
8b006791 ZX |
2959 | vcpu_put(vcpu); |
2960 | ||
2961 | return 0; | |
2962 | } | |
2963 | ||
d0752060 HB |
2964 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) |
2965 | { | |
ad312c7c | 2966 | struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image; |
d0752060 HB |
2967 | |
2968 | vcpu_load(vcpu); | |
2969 | ||
2970 | memcpy(fpu->fpr, fxsave->st_space, 128); | |
2971 | fpu->fcw = fxsave->cwd; | |
2972 | fpu->fsw = fxsave->swd; | |
2973 | fpu->ftwx = fxsave->twd; | |
2974 | fpu->last_opcode = fxsave->fop; | |
2975 | fpu->last_ip = fxsave->rip; | |
2976 | fpu->last_dp = fxsave->rdp; | |
2977 | memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space); | |
2978 | ||
2979 | vcpu_put(vcpu); | |
2980 | ||
2981 | return 0; | |
2982 | } | |
2983 | ||
2984 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
2985 | { | |
ad312c7c | 2986 | struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image; |
d0752060 HB |
2987 | |
2988 | vcpu_load(vcpu); | |
2989 | ||
2990 | memcpy(fxsave->st_space, fpu->fpr, 128); | |
2991 | fxsave->cwd = fpu->fcw; | |
2992 | fxsave->swd = fpu->fsw; | |
2993 | fxsave->twd = fpu->ftwx; | |
2994 | fxsave->fop = fpu->last_opcode; | |
2995 | fxsave->rip = fpu->last_ip; | |
2996 | fxsave->rdp = fpu->last_dp; | |
2997 | memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space); | |
2998 | ||
2999 | vcpu_put(vcpu); | |
3000 | ||
3001 | return 0; | |
3002 | } | |
3003 | ||
3004 | void fx_init(struct kvm_vcpu *vcpu) | |
3005 | { | |
3006 | unsigned after_mxcsr_mask; | |
3007 | ||
3008 | /* Initialize guest FPU by resetting ours and saving into guest's */ | |
3009 | preempt_disable(); | |
ad312c7c | 3010 | fx_save(&vcpu->arch.host_fx_image); |
d0752060 | 3011 | fpu_init(); |
ad312c7c ZX |
3012 | fx_save(&vcpu->arch.guest_fx_image); |
3013 | fx_restore(&vcpu->arch.host_fx_image); | |
d0752060 HB |
3014 | preempt_enable(); |
3015 | ||
ad312c7c | 3016 | vcpu->arch.cr0 |= X86_CR0_ET; |
d0752060 | 3017 | after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space); |
ad312c7c ZX |
3018 | vcpu->arch.guest_fx_image.mxcsr = 0x1f80; |
3019 | memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask, | |
d0752060 HB |
3020 | 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask); |
3021 | } | |
3022 | EXPORT_SYMBOL_GPL(fx_init); | |
3023 | ||
3024 | void kvm_load_guest_fpu(struct kvm_vcpu *vcpu) | |
3025 | { | |
3026 | if (!vcpu->fpu_active || vcpu->guest_fpu_loaded) | |
3027 | return; | |
3028 | ||
3029 | vcpu->guest_fpu_loaded = 1; | |
ad312c7c ZX |
3030 | fx_save(&vcpu->arch.host_fx_image); |
3031 | fx_restore(&vcpu->arch.guest_fx_image); | |
d0752060 HB |
3032 | } |
3033 | EXPORT_SYMBOL_GPL(kvm_load_guest_fpu); | |
3034 | ||
3035 | void kvm_put_guest_fpu(struct kvm_vcpu *vcpu) | |
3036 | { | |
3037 | if (!vcpu->guest_fpu_loaded) | |
3038 | return; | |
3039 | ||
3040 | vcpu->guest_fpu_loaded = 0; | |
ad312c7c ZX |
3041 | fx_save(&vcpu->arch.guest_fx_image); |
3042 | fx_restore(&vcpu->arch.host_fx_image); | |
f096ed85 | 3043 | ++vcpu->stat.fpu_reload; |
d0752060 HB |
3044 | } |
3045 | EXPORT_SYMBOL_GPL(kvm_put_guest_fpu); | |
e9b11c17 ZX |
3046 | |
3047 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) | |
3048 | { | |
3049 | kvm_x86_ops->vcpu_free(vcpu); | |
3050 | } | |
3051 | ||
3052 | struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, | |
3053 | unsigned int id) | |
3054 | { | |
26e5215f AK |
3055 | return kvm_x86_ops->vcpu_create(kvm, id); |
3056 | } | |
e9b11c17 | 3057 | |
26e5215f AK |
3058 | int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) |
3059 | { | |
3060 | int r; | |
e9b11c17 ZX |
3061 | |
3062 | /* We do fxsave: this must be aligned. */ | |
ad312c7c | 3063 | BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF); |
e9b11c17 ZX |
3064 | |
3065 | vcpu_load(vcpu); | |
3066 | r = kvm_arch_vcpu_reset(vcpu); | |
3067 | if (r == 0) | |
3068 | r = kvm_mmu_setup(vcpu); | |
3069 | vcpu_put(vcpu); | |
3070 | if (r < 0) | |
3071 | goto free_vcpu; | |
3072 | ||
26e5215f | 3073 | return 0; |
e9b11c17 ZX |
3074 | free_vcpu: |
3075 | kvm_x86_ops->vcpu_free(vcpu); | |
26e5215f | 3076 | return r; |
e9b11c17 ZX |
3077 | } |
3078 | ||
d40ccc62 | 3079 | void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) |
e9b11c17 ZX |
3080 | { |
3081 | vcpu_load(vcpu); | |
3082 | kvm_mmu_unload(vcpu); | |
3083 | vcpu_put(vcpu); | |
3084 | ||
3085 | kvm_x86_ops->vcpu_free(vcpu); | |
3086 | } | |
3087 | ||
3088 | int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu) | |
3089 | { | |
3090 | return kvm_x86_ops->vcpu_reset(vcpu); | |
3091 | } | |
3092 | ||
3093 | void kvm_arch_hardware_enable(void *garbage) | |
3094 | { | |
3095 | kvm_x86_ops->hardware_enable(garbage); | |
3096 | } | |
3097 | ||
3098 | void kvm_arch_hardware_disable(void *garbage) | |
3099 | { | |
3100 | kvm_x86_ops->hardware_disable(garbage); | |
3101 | } | |
3102 | ||
3103 | int kvm_arch_hardware_setup(void) | |
3104 | { | |
3105 | return kvm_x86_ops->hardware_setup(); | |
3106 | } | |
3107 | ||
3108 | void kvm_arch_hardware_unsetup(void) | |
3109 | { | |
3110 | kvm_x86_ops->hardware_unsetup(); | |
3111 | } | |
3112 | ||
3113 | void kvm_arch_check_processor_compat(void *rtn) | |
3114 | { | |
3115 | kvm_x86_ops->check_processor_compatibility(rtn); | |
3116 | } | |
3117 | ||
3118 | int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) | |
3119 | { | |
3120 | struct page *page; | |
3121 | struct kvm *kvm; | |
3122 | int r; | |
3123 | ||
3124 | BUG_ON(vcpu->kvm == NULL); | |
3125 | kvm = vcpu->kvm; | |
3126 | ||
ad312c7c | 3127 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
e9b11c17 | 3128 | if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0) |
ad312c7c | 3129 | vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE; |
e9b11c17 | 3130 | else |
ad312c7c | 3131 | vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED; |
e9b11c17 ZX |
3132 | |
3133 | page = alloc_page(GFP_KERNEL | __GFP_ZERO); | |
3134 | if (!page) { | |
3135 | r = -ENOMEM; | |
3136 | goto fail; | |
3137 | } | |
ad312c7c | 3138 | vcpu->arch.pio_data = page_address(page); |
e9b11c17 ZX |
3139 | |
3140 | r = kvm_mmu_create(vcpu); | |
3141 | if (r < 0) | |
3142 | goto fail_free_pio_data; | |
3143 | ||
3144 | if (irqchip_in_kernel(kvm)) { | |
3145 | r = kvm_create_lapic(vcpu); | |
3146 | if (r < 0) | |
3147 | goto fail_mmu_destroy; | |
3148 | } | |
3149 | ||
3150 | return 0; | |
3151 | ||
3152 | fail_mmu_destroy: | |
3153 | kvm_mmu_destroy(vcpu); | |
3154 | fail_free_pio_data: | |
ad312c7c | 3155 | free_page((unsigned long)vcpu->arch.pio_data); |
e9b11c17 ZX |
3156 | fail: |
3157 | return r; | |
3158 | } | |
3159 | ||
3160 | void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) | |
3161 | { | |
3162 | kvm_free_lapic(vcpu); | |
3163 | kvm_mmu_destroy(vcpu); | |
ad312c7c | 3164 | free_page((unsigned long)vcpu->arch.pio_data); |
e9b11c17 | 3165 | } |
d19a9cd2 ZX |
3166 | |
3167 | struct kvm *kvm_arch_create_vm(void) | |
3168 | { | |
3169 | struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL); | |
3170 | ||
3171 | if (!kvm) | |
3172 | return ERR_PTR(-ENOMEM); | |
3173 | ||
f05e70ac | 3174 | INIT_LIST_HEAD(&kvm->arch.active_mmu_pages); |
d19a9cd2 ZX |
3175 | |
3176 | return kvm; | |
3177 | } | |
3178 | ||
3179 | static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu) | |
3180 | { | |
3181 | vcpu_load(vcpu); | |
3182 | kvm_mmu_unload(vcpu); | |
3183 | vcpu_put(vcpu); | |
3184 | } | |
3185 | ||
3186 | static void kvm_free_vcpus(struct kvm *kvm) | |
3187 | { | |
3188 | unsigned int i; | |
3189 | ||
3190 | /* | |
3191 | * Unpin any mmu pages first. | |
3192 | */ | |
3193 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
3194 | if (kvm->vcpus[i]) | |
3195 | kvm_unload_vcpu_mmu(kvm->vcpus[i]); | |
3196 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | |
3197 | if (kvm->vcpus[i]) { | |
3198 | kvm_arch_vcpu_free(kvm->vcpus[i]); | |
3199 | kvm->vcpus[i] = NULL; | |
3200 | } | |
3201 | } | |
3202 | ||
3203 | } | |
3204 | ||
3205 | void kvm_arch_destroy_vm(struct kvm *kvm) | |
3206 | { | |
d7deeeb0 ZX |
3207 | kfree(kvm->arch.vpic); |
3208 | kfree(kvm->arch.vioapic); | |
d19a9cd2 ZX |
3209 | kvm_free_vcpus(kvm); |
3210 | kvm_free_physmem(kvm); | |
3211 | kfree(kvm); | |
3212 | } | |
0de10343 ZX |
3213 | |
3214 | int kvm_arch_set_memory_region(struct kvm *kvm, | |
3215 | struct kvm_userspace_memory_region *mem, | |
3216 | struct kvm_memory_slot old, | |
3217 | int user_alloc) | |
3218 | { | |
3219 | int npages = mem->memory_size >> PAGE_SHIFT; | |
3220 | struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot]; | |
3221 | ||
3222 | /*To keep backward compatibility with older userspace, | |
3223 | *x86 needs to hanlde !user_alloc case. | |
3224 | */ | |
3225 | if (!user_alloc) { | |
3226 | if (npages && !old.rmap) { | |
0de10343 ZX |
3227 | memslot->userspace_addr = do_mmap(NULL, 0, |
3228 | npages * PAGE_SIZE, | |
3229 | PROT_READ | PROT_WRITE, | |
3230 | MAP_SHARED | MAP_ANONYMOUS, | |
3231 | 0); | |
0de10343 ZX |
3232 | |
3233 | if (IS_ERR((void *)memslot->userspace_addr)) | |
3234 | return PTR_ERR((void *)memslot->userspace_addr); | |
3235 | } else { | |
3236 | if (!old.user_alloc && old.rmap) { | |
3237 | int ret; | |
3238 | ||
0de10343 ZX |
3239 | ret = do_munmap(current->mm, old.userspace_addr, |
3240 | old.npages * PAGE_SIZE); | |
0de10343 ZX |
3241 | if (ret < 0) |
3242 | printk(KERN_WARNING | |
3243 | "kvm_vm_ioctl_set_memory_region: " | |
3244 | "failed to munmap memory\n"); | |
3245 | } | |
3246 | } | |
3247 | } | |
3248 | ||
f05e70ac | 3249 | if (!kvm->arch.n_requested_mmu_pages) { |
0de10343 ZX |
3250 | unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm); |
3251 | kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages); | |
3252 | } | |
3253 | ||
3254 | kvm_mmu_slot_remove_write_access(kvm, mem->slot); | |
3255 | kvm_flush_remote_tlbs(kvm); | |
3256 | ||
3257 | return 0; | |
3258 | } | |
1d737c8a ZX |
3259 | |
3260 | int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu) | |
3261 | { | |
3262 | return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE | |
3263 | || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED; | |
3264 | } | |
5736199a ZX |
3265 | |
3266 | static void vcpu_kick_intr(void *info) | |
3267 | { | |
3268 | #ifdef DEBUG | |
3269 | struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info; | |
3270 | printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu); | |
3271 | #endif | |
3272 | } | |
3273 | ||
3274 | void kvm_vcpu_kick(struct kvm_vcpu *vcpu) | |
3275 | { | |
3276 | int ipi_pcpu = vcpu->cpu; | |
3277 | ||
3278 | if (waitqueue_active(&vcpu->wq)) { | |
3279 | wake_up_interruptible(&vcpu->wq); | |
3280 | ++vcpu->stat.halt_wakeup; | |
3281 | } | |
3282 | if (vcpu->guest_mode) | |
3283 | smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0); | |
3284 | } |