[mirror_ubuntu-eoan-kernel.git] / arch / x86 / lib / atomic64_386_32.S

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * atomic64_t for 386/486
 *
 * Copyright © 2010  Luca Barbieri
 */

#include <linux/linkage.h>
#include <asm/alternative-asm.h>

/* if you want SMP support, implement these with real spinlocks */
.macro LOCK reg
	pushfl
	cli
.endm

.macro UNLOCK reg
	popfl
.endm

#define BEGIN(op) \
.macro endp; \
ENDPROC(atomic64_##op##_386); \
.purgem endp; \
.endm; \
ENTRY(atomic64_##op##_386); \
	LOCK v;

#define ENDP endp

#define RET \
	UNLOCK v; \
	ret

#define RET_ENDP \
	RET; \
	ENDP

#define v %ecx
BEGIN(read)
	movl  (v), %eax
	movl 4(v), %edx
RET_ENDP
#undef v

#define v %esi
BEGIN(set)
	movl %ebx,  (v)
	movl %ecx, 4(v)
RET_ENDP
#undef v

#define v  %esi
BEGIN(xchg)
	movl  (v), %eax
	movl 4(v), %edx
	movl %ebx,  (v)
	movl %ecx, 4(v)
RET_ENDP
#undef v

#define v %ecx
BEGIN(add)
	addl %eax,  (v)
	adcl %edx, 4(v)
RET_ENDP
#undef v

#define v %ecx
BEGIN(add_return)
	addl  (v), %eax
	adcl 4(v), %edx
	movl %eax,  (v)
	movl %edx, 4(v)
RET_ENDP
#undef v

#define v %ecx
BEGIN(sub)
	subl %eax,  (v)
	sbbl %edx, 4(v)
RET_ENDP
#undef v

#define v %ecx
BEGIN(sub_return)
	negl %edx
	negl %eax
	sbbl $0, %edx
	addl  (v), %eax
	adcl 4(v), %edx
	movl %eax,  (v)
	movl %edx, 4(v)
RET_ENDP
#undef v

#define v %esi
BEGIN(inc)
	addl $1,  (v)
	adcl $0, 4(v)
RET_ENDP
#undef v

#define v %esi
BEGIN(inc_return)
	movl  (v), %eax
	movl 4(v), %edx
	addl $1, %eax
	adcl $0, %edx
	movl %eax,  (v)
	movl %edx, 4(v)
RET_ENDP
#undef v

#define v %esi
BEGIN(dec)
	subl $1,  (v)
	sbbl $0, 4(v)
RET_ENDP
#undef v

#define v %esi
BEGIN(dec_return)
	movl  (v), %eax
	movl 4(v), %edx
	subl $1, %eax
	sbbl $0, %edx
	movl %eax,  (v)
	movl %edx, 4(v)
RET_ENDP
#undef v

#define v %esi
BEGIN(add_unless)
	addl %eax, %ecx
	adcl %edx, %edi
	addl  (v), %eax
	adcl 4(v), %edx
	cmpl %eax, %ecx
	je 3f
1:
	movl %eax,  (v)
	movl %edx, 4(v)
	movl $1, %eax
2:
	RET
3:
	cmpl %edx, %edi
	jne 1b
	xorl %eax, %eax
	jmp 2b
ENDP
#undef v

#define v %esi
BEGIN(inc_not_zero)
	movl  (v), %eax
	movl 4(v), %edx
	testl %eax, %eax
	je 3f
1:
	addl $1, %eax
	adcl $0, %edx
	movl %eax,  (v)
	movl %edx, 4(v)
	movl $1, %eax
2:
	RET
3:
	testl %edx, %edx
	jne 1b
	jmp 2b
ENDP
#undef v

#define v %esi
BEGIN(dec_if_positive)
	movl  (v), %eax
	movl 4(v), %edx
	subl $1, %eax
	sbbl $0, %edx
	js 1f
	movl %eax,  (v)
	movl %edx, 4(v)
1:
RET_ENDP
#undef v
Commit	Line	Data
2874c5fd	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
a7e926ab LB	2	/*
	3	* atomic64_t for 386/486
	4	*
	5	* Copyright © 2010 Luca Barbieri
a7e926ab LB	6	*/
	7
	8	#include <linux/linkage.h>
	9	#include <asm/alternative-asm.h>
a7e926ab LB	10
	11	/* if you want SMP support, implement these with real spinlocks */
	12	.macro LOCK reg
131484c8	13	pushfl
a7e926ab LB	14	cli
	15	.endm
	16
	17	.macro UNLOCK reg
131484c8	18	popfl
a7e926ab LB	19	.endm
a7e926ab LB	20
30246557	21	#define BEGIN(op) \
417484d4	22	.macro endp; \
30246557	23	ENDPROC(atomic64_##op##_386); \
417484d4	24	.purgem endp; \
30246557 LB	25	.endm; \
30246557 LB	26	ENTRY(atomic64_##op##_386); \
30246557 LB	27	LOCK v;
30246557 LB	28
417484d4 LB	29	#define ENDP endp
417484d4 LB	30
30246557 LB	31	#define RET \
30246557 LB	32	UNLOCK v; \
a7e926ab	33	ret
a7e926ab	34
417484d4	35	#define RET_ENDP \
30246557	36	RET; \
417484d4	37	ENDP
30246557 LB	38
	39	#define v %ecx
	40	BEGIN(read)
	41	movl (v), %eax
	42	movl 4(v), %edx
417484d4	43	RET_ENDP
30246557 LB	44	#undef v
	45
	46	#define v %esi
	47	BEGIN(set)
	48	movl %ebx, (v)
	49	movl %ecx, 4(v)
417484d4	50	RET_ENDP
30246557 LB	51	#undef v
	52
	53	#define v %esi
	54	BEGIN(xchg)
	55	movl (v), %eax
	56	movl 4(v), %edx
	57	movl %ebx, (v)
	58	movl %ecx, 4(v)
417484d4	59	RET_ENDP
30246557 LB	60	#undef v
	61
	62	#define v %ecx
	63	BEGIN(add)
	64	addl %eax, (v)
	65	adcl %edx, 4(v)
417484d4	66	RET_ENDP
30246557 LB	67	#undef v
	68
	69	#define v %ecx
	70	BEGIN(add_return)
	71	addl (v), %eax
	72	adcl 4(v), %edx
	73	movl %eax, (v)
	74	movl %edx, 4(v)
417484d4	75	RET_ENDP
30246557 LB	76	#undef v
	77
	78	#define v %ecx
	79	BEGIN(sub)
	80	subl %eax, (v)
	81	sbbl %edx, 4(v)
417484d4	82	RET_ENDP
30246557 LB	83	#undef v
	84
	85	#define v %ecx
	86	BEGIN(sub_return)
a7e926ab LB	87	negl %edx
	88	negl %eax
	89	sbbl $0, %edx
30246557 LB	90	addl (v), %eax
	91	adcl 4(v), %edx
	92	movl %eax, (v)
	93	movl %edx, 4(v)
417484d4	94	RET_ENDP
30246557 LB	95	#undef v
	96
	97	#define v %esi
	98	BEGIN(inc)
	99	addl $1, (v)
	100	adcl $0, 4(v)
417484d4	101	RET_ENDP
30246557 LB	102	#undef v
	103
	104	#define v %esi
	105	BEGIN(inc_return)
	106	movl (v), %eax
	107	movl 4(v), %edx
a7e926ab LB	108	addl $1, %eax
a7e926ab LB	109	adcl $0, %edx
30246557 LB	110	movl %eax, (v)
30246557 LB	111	movl %edx, 4(v)
417484d4	112	RET_ENDP
30246557 LB	113	#undef v
	114
	115	#define v %esi
	116	BEGIN(dec)
	117	subl $1, (v)
	118	sbbl $0, 4(v)
417484d4	119	RET_ENDP
30246557 LB	120	#undef v
	121
	122	#define v %esi
	123	BEGIN(dec_return)
	124	movl (v), %eax
	125	movl 4(v), %edx
a7e926ab LB	126	subl $1, %eax
a7e926ab LB	127	sbbl $0, %edx
30246557 LB	128	movl %eax, (v)
30246557 LB	129	movl %edx, 4(v)
417484d4	130	RET_ENDP
30246557	131	#undef v
a7e926ab	132
cb8095bb	133	#define v %esi
30246557	134	BEGIN(add_unless)
cb8095bb	135	addl %eax, %ecx
a7e926ab	136	adcl %edx, %edi
30246557 LB	137	addl (v), %eax
30246557 LB	138	adcl 4(v), %edx
cb8095bb	139	cmpl %eax, %ecx
a7e926ab LB	140	je 3f
a7e926ab LB	141	1:
30246557 LB	142	movl %eax, (v)
30246557 LB	143	movl %edx, 4(v)
6e6104fe	144	movl $1, %eax
a7e926ab	145	2:
30246557	146	RET
a7e926ab LB	147	3:
	148	cmpl %edx, %edi
	149	jne 1b
6e6104fe	150	xorl %eax, %eax
a7e926ab	151	jmp 2b
417484d4	152	ENDP
30246557	153	#undef v
a7e926ab	154
30246557 LB	155	#define v %esi
	156	BEGIN(inc_not_zero)
	157	movl (v), %eax
	158	movl 4(v), %edx
a7e926ab LB	159	testl %eax, %eax
	160	je 3f
	161	1:
	162	addl $1, %eax
	163	adcl $0, %edx
30246557 LB	164	movl %eax, (v)
30246557 LB	165	movl %edx, 4(v)
f3e83131	166	movl $1, %eax
a7e926ab	167	2:
30246557	168	RET
a7e926ab LB	169	3:
	170	testl %edx, %edx
	171	jne 1b
a7e926ab	172	jmp 2b
417484d4	173	ENDP
30246557	174	#undef v
a7e926ab	175
30246557 LB	176	#define v %esi
	177	BEGIN(dec_if_positive)
	178	movl (v), %eax
	179	movl 4(v), %edx
a7e926ab LB	180	subl $1, %eax
	181	sbbl $0, %edx
	182	js 1f
30246557 LB	183	movl %eax, (v)
30246557 LB	184	movl %edx, 4(v)
a7e926ab	185	1:
417484d4	186	RET_ENDP
30246557	187	#undef v