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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
1da177e4 | 3 | * Copyright (C) 1995 Linus Torvalds |
2d4a7167 | 4 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
f8eeb2e6 | 5 | * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar |
1da177e4 | 6 | */ |
a2bcd473 | 7 | #include <linux/sched.h> /* test_thread_flag(), ... */ |
68db0cf1 | 8 | #include <linux/sched/task_stack.h> /* task_stack_*(), ... */ |
a2bcd473 | 9 | #include <linux/kdebug.h> /* oops_begin/end, ... */ |
4cdf8dbe | 10 | #include <linux/extable.h> /* search_exception_tables */ |
57c8a661 | 11 | #include <linux/memblock.h> /* max_low_pfn */ |
9326638c | 12 | #include <linux/kprobes.h> /* NOKPROBE_SYMBOL, ... */ |
a2bcd473 | 13 | #include <linux/mmiotrace.h> /* kmmio_handler, ... */ |
cdd6c482 | 14 | #include <linux/perf_event.h> /* perf_sw_event */ |
f672b49b | 15 | #include <linux/hugetlb.h> /* hstate_index_to_shift */ |
268bb0ce | 16 | #include <linux/prefetch.h> /* prefetchw */ |
56dd9470 | 17 | #include <linux/context_tracking.h> /* exception_enter(), ... */ |
70ffdb93 | 18 | #include <linux/uaccess.h> /* faulthandler_disabled() */ |
3425d934 | 19 | #include <linux/efi.h> /* efi_recover_from_page_fault()*/ |
50a7ca3c | 20 | #include <linux/mm_types.h> |
2d4a7167 | 21 | |
019132ff | 22 | #include <asm/cpufeature.h> /* boot_cpu_has, ... */ |
a2bcd473 IM |
23 | #include <asm/traps.h> /* dotraplinkage, ... */ |
24 | #include <asm/pgalloc.h> /* pgd_*(), ... */ | |
f40c3300 AL |
25 | #include <asm/fixmap.h> /* VSYSCALL_ADDR */ |
26 | #include <asm/vsyscall.h> /* emulate_vsyscall */ | |
ba3e127e | 27 | #include <asm/vm86.h> /* struct vm86 */ |
019132ff | 28 | #include <asm/mmu_context.h> /* vma_pkey() */ |
3425d934 | 29 | #include <asm/efi.h> /* efi_recover_from_page_fault()*/ |
a1a371c4 | 30 | #include <asm/desc.h> /* store_idt(), ... */ |
d876b673 | 31 | #include <asm/cpu_entry_area.h> /* exception stack */ |
186525bd | 32 | #include <asm/pgtable_areas.h> /* VMALLOC_START, ... */ |
ef68017e | 33 | #include <asm/kvm_para.h> /* kvm_handle_async_pf */ |
1da177e4 | 34 | |
d34603b0 SA |
35 | #define CREATE_TRACE_POINTS |
36 | #include <asm/trace/exceptions.h> | |
37 | ||
b814d41f | 38 | /* |
b319eed0 IM |
39 | * Returns 0 if mmiotrace is disabled, or if the fault is not |
40 | * handled by mmiotrace: | |
b814d41f | 41 | */ |
9326638c | 42 | static nokprobe_inline int |
62c9295f | 43 | kmmio_fault(struct pt_regs *regs, unsigned long addr) |
86069782 | 44 | { |
0fd0e3da PP |
45 | if (unlikely(is_kmmio_active())) |
46 | if (kmmio_handler(regs, addr) == 1) | |
47 | return -1; | |
0fd0e3da | 48 | return 0; |
86069782 PP |
49 | } |
50 | ||
1dc85be0 | 51 | /* |
2d4a7167 IM |
52 | * Prefetch quirks: |
53 | * | |
54 | * 32-bit mode: | |
55 | * | |
56 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | |
57 | * Check that here and ignore it. | |
1dc85be0 | 58 | * |
2d4a7167 | 59 | * 64-bit mode: |
1dc85be0 | 60 | * |
2d4a7167 IM |
61 | * Sometimes the CPU reports invalid exceptions on prefetch. |
62 | * Check that here and ignore it. | |
63 | * | |
64 | * Opcode checker based on code by Richard Brunner. | |
1dc85be0 | 65 | */ |
107a0367 IM |
66 | static inline int |
67 | check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, | |
68 | unsigned char opcode, int *prefetch) | |
69 | { | |
70 | unsigned char instr_hi = opcode & 0xf0; | |
71 | unsigned char instr_lo = opcode & 0x0f; | |
72 | ||
73 | switch (instr_hi) { | |
74 | case 0x20: | |
75 | case 0x30: | |
76 | /* | |
77 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | |
78 | * In X86_64 long mode, the CPU will signal invalid | |
79 | * opcode if some of these prefixes are present so | |
80 | * X86_64 will never get here anyway | |
81 | */ | |
82 | return ((instr_lo & 7) == 0x6); | |
83 | #ifdef CONFIG_X86_64 | |
84 | case 0x40: | |
85 | /* | |
86 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | |
87 | * Need to figure out under what instruction mode the | |
88 | * instruction was issued. Could check the LDT for lm, | |
89 | * but for now it's good enough to assume that long | |
90 | * mode only uses well known segments or kernel. | |
91 | */ | |
318f5a2a | 92 | return (!user_mode(regs) || user_64bit_mode(regs)); |
107a0367 IM |
93 | #endif |
94 | case 0x60: | |
95 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | |
96 | return (instr_lo & 0xC) == 0x4; | |
97 | case 0xF0: | |
98 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ | |
99 | return !instr_lo || (instr_lo>>1) == 1; | |
100 | case 0x00: | |
101 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | |
102 | if (probe_kernel_address(instr, opcode)) | |
103 | return 0; | |
104 | ||
105 | *prefetch = (instr_lo == 0xF) && | |
106 | (opcode == 0x0D || opcode == 0x18); | |
107 | return 0; | |
108 | default: | |
109 | return 0; | |
110 | } | |
111 | } | |
112 | ||
2d4a7167 IM |
113 | static int |
114 | is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) | |
33cb5243 | 115 | { |
2d4a7167 | 116 | unsigned char *max_instr; |
ab2bf0c1 | 117 | unsigned char *instr; |
33cb5243 | 118 | int prefetch = 0; |
1da177e4 | 119 | |
3085354d IM |
120 | /* |
121 | * If it was a exec (instruction fetch) fault on NX page, then | |
122 | * do not ignore the fault: | |
123 | */ | |
1067f030 | 124 | if (error_code & X86_PF_INSTR) |
1da177e4 | 125 | return 0; |
1dc85be0 | 126 | |
107a0367 | 127 | instr = (void *)convert_ip_to_linear(current, regs); |
f1290ec9 | 128 | max_instr = instr + 15; |
1da177e4 | 129 | |
d31bf07f | 130 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE_MAX) |
1da177e4 LT |
131 | return 0; |
132 | ||
107a0367 | 133 | while (instr < max_instr) { |
2d4a7167 | 134 | unsigned char opcode; |
1da177e4 | 135 | |
ab2bf0c1 | 136 | if (probe_kernel_address(instr, opcode)) |
33cb5243 | 137 | break; |
1da177e4 | 138 | |
1da177e4 LT |
139 | instr++; |
140 | ||
107a0367 | 141 | if (!check_prefetch_opcode(regs, instr, opcode, &prefetch)) |
1da177e4 | 142 | break; |
1da177e4 LT |
143 | } |
144 | return prefetch; | |
145 | } | |
146 | ||
f2f13a85 IM |
147 | DEFINE_SPINLOCK(pgd_lock); |
148 | LIST_HEAD(pgd_list); | |
149 | ||
150 | #ifdef CONFIG_X86_32 | |
151 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |
33cb5243 | 152 | { |
f2f13a85 IM |
153 | unsigned index = pgd_index(address); |
154 | pgd_t *pgd_k; | |
e0c4f675 | 155 | p4d_t *p4d, *p4d_k; |
f2f13a85 IM |
156 | pud_t *pud, *pud_k; |
157 | pmd_t *pmd, *pmd_k; | |
2d4a7167 | 158 | |
f2f13a85 IM |
159 | pgd += index; |
160 | pgd_k = init_mm.pgd + index; | |
161 | ||
162 | if (!pgd_present(*pgd_k)) | |
163 | return NULL; | |
164 | ||
165 | /* | |
166 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | |
167 | * and redundant with the set_pmd() on non-PAE. As would | |
e0c4f675 | 168 | * set_p4d/set_pud. |
f2f13a85 | 169 | */ |
e0c4f675 KS |
170 | p4d = p4d_offset(pgd, address); |
171 | p4d_k = p4d_offset(pgd_k, address); | |
172 | if (!p4d_present(*p4d_k)) | |
173 | return NULL; | |
174 | ||
175 | pud = pud_offset(p4d, address); | |
176 | pud_k = pud_offset(p4d_k, address); | |
f2f13a85 IM |
177 | if (!pud_present(*pud_k)) |
178 | return NULL; | |
179 | ||
180 | pmd = pmd_offset(pud, address); | |
181 | pmd_k = pmd_offset(pud_k, address); | |
f2f13a85 | 182 | |
8e998fc2 | 183 | if (pmd_present(*pmd) != pmd_present(*pmd_k)) |
f2f13a85 | 184 | set_pmd(pmd, *pmd_k); |
8e998fc2 JR |
185 | |
186 | if (!pmd_present(*pmd_k)) | |
187 | return NULL; | |
b8bcfe99 | 188 | else |
51b75b5b | 189 | BUG_ON(pmd_pfn(*pmd) != pmd_pfn(*pmd_k)); |
f2f13a85 IM |
190 | |
191 | return pmd_k; | |
192 | } | |
193 | ||
86cf69f1 | 194 | void arch_sync_kernel_mappings(unsigned long start, unsigned long end) |
f2f13a85 | 195 | { |
86cf69f1 | 196 | unsigned long addr; |
f2f13a85 | 197 | |
86cf69f1 JR |
198 | for (addr = start & PMD_MASK; |
199 | addr >= TASK_SIZE_MAX && addr < VMALLOC_END; | |
200 | addr += PMD_SIZE) { | |
f2f13a85 IM |
201 | struct page *page; |
202 | ||
a79e53d8 | 203 | spin_lock(&pgd_lock); |
f2f13a85 | 204 | list_for_each_entry(page, &pgd_list, lru) { |
617d34d9 | 205 | spinlock_t *pgt_lock; |
617d34d9 | 206 | |
a79e53d8 | 207 | /* the pgt_lock only for Xen */ |
617d34d9 JF |
208 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; |
209 | ||
210 | spin_lock(pgt_lock); | |
86cf69f1 | 211 | vmalloc_sync_one(page_address(page), addr); |
617d34d9 | 212 | spin_unlock(pgt_lock); |
f2f13a85 | 213 | } |
a79e53d8 | 214 | spin_unlock(&pgd_lock); |
f2f13a85 IM |
215 | } |
216 | } | |
217 | ||
f2f13a85 IM |
218 | /* |
219 | * Did it hit the DOS screen memory VA from vm86 mode? | |
220 | */ | |
221 | static inline void | |
222 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
223 | struct task_struct *tsk) | |
224 | { | |
9fda6a06 | 225 | #ifdef CONFIG_VM86 |
f2f13a85 IM |
226 | unsigned long bit; |
227 | ||
9fda6a06 | 228 | if (!v8086_mode(regs) || !tsk->thread.vm86) |
f2f13a85 IM |
229 | return; |
230 | ||
231 | bit = (address - 0xA0000) >> PAGE_SHIFT; | |
232 | if (bit < 32) | |
9fda6a06 BG |
233 | tsk->thread.vm86->screen_bitmap |= 1 << bit; |
234 | #endif | |
33cb5243 | 235 | } |
1da177e4 | 236 | |
087975b0 | 237 | static bool low_pfn(unsigned long pfn) |
1da177e4 | 238 | { |
087975b0 AM |
239 | return pfn < max_low_pfn; |
240 | } | |
1156e098 | 241 | |
087975b0 AM |
242 | static void dump_pagetable(unsigned long address) |
243 | { | |
6c690ee1 | 244 | pgd_t *base = __va(read_cr3_pa()); |
087975b0 | 245 | pgd_t *pgd = &base[pgd_index(address)]; |
e0c4f675 KS |
246 | p4d_t *p4d; |
247 | pud_t *pud; | |
087975b0 AM |
248 | pmd_t *pmd; |
249 | pte_t *pte; | |
2d4a7167 | 250 | |
1156e098 | 251 | #ifdef CONFIG_X86_PAE |
39e48d9b | 252 | pr_info("*pdpt = %016Lx ", pgd_val(*pgd)); |
087975b0 AM |
253 | if (!low_pfn(pgd_val(*pgd) >> PAGE_SHIFT) || !pgd_present(*pgd)) |
254 | goto out; | |
39e48d9b JB |
255 | #define pr_pde pr_cont |
256 | #else | |
257 | #define pr_pde pr_info | |
1156e098 | 258 | #endif |
e0c4f675 KS |
259 | p4d = p4d_offset(pgd, address); |
260 | pud = pud_offset(p4d, address); | |
261 | pmd = pmd_offset(pud, address); | |
39e48d9b JB |
262 | pr_pde("*pde = %0*Lx ", sizeof(*pmd) * 2, (u64)pmd_val(*pmd)); |
263 | #undef pr_pde | |
1156e098 HH |
264 | |
265 | /* | |
266 | * We must not directly access the pte in the highpte | |
267 | * case if the page table is located in highmem. | |
268 | * And let's rather not kmap-atomic the pte, just in case | |
2d4a7167 | 269 | * it's allocated already: |
1156e098 | 270 | */ |
087975b0 AM |
271 | if (!low_pfn(pmd_pfn(*pmd)) || !pmd_present(*pmd) || pmd_large(*pmd)) |
272 | goto out; | |
1156e098 | 273 | |
087975b0 | 274 | pte = pte_offset_kernel(pmd, address); |
39e48d9b | 275 | pr_cont("*pte = %0*Lx ", sizeof(*pte) * 2, (u64)pte_val(*pte)); |
087975b0 | 276 | out: |
39e48d9b | 277 | pr_cont("\n"); |
f2f13a85 IM |
278 | } |
279 | ||
280 | #else /* CONFIG_X86_64: */ | |
281 | ||
e05139f2 | 282 | #ifdef CONFIG_CPU_SUP_AMD |
f2f13a85 | 283 | static const char errata93_warning[] = |
ad361c98 JP |
284 | KERN_ERR |
285 | "******* Your BIOS seems to not contain a fix for K8 errata #93\n" | |
286 | "******* Working around it, but it may cause SEGVs or burn power.\n" | |
287 | "******* Please consider a BIOS update.\n" | |
288 | "******* Disabling USB legacy in the BIOS may also help.\n"; | |
e05139f2 | 289 | #endif |
f2f13a85 IM |
290 | |
291 | /* | |
292 | * No vm86 mode in 64-bit mode: | |
293 | */ | |
294 | static inline void | |
295 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
296 | struct task_struct *tsk) | |
297 | { | |
298 | } | |
299 | ||
300 | static int bad_address(void *p) | |
301 | { | |
302 | unsigned long dummy; | |
303 | ||
304 | return probe_kernel_address((unsigned long *)p, dummy); | |
305 | } | |
306 | ||
307 | static void dump_pagetable(unsigned long address) | |
308 | { | |
6c690ee1 | 309 | pgd_t *base = __va(read_cr3_pa()); |
087975b0 | 310 | pgd_t *pgd = base + pgd_index(address); |
e0c4f675 | 311 | p4d_t *p4d; |
1da177e4 LT |
312 | pud_t *pud; |
313 | pmd_t *pmd; | |
314 | pte_t *pte; | |
315 | ||
2d4a7167 IM |
316 | if (bad_address(pgd)) |
317 | goto bad; | |
318 | ||
39e48d9b | 319 | pr_info("PGD %lx ", pgd_val(*pgd)); |
2d4a7167 IM |
320 | |
321 | if (!pgd_present(*pgd)) | |
322 | goto out; | |
1da177e4 | 323 | |
e0c4f675 KS |
324 | p4d = p4d_offset(pgd, address); |
325 | if (bad_address(p4d)) | |
326 | goto bad; | |
327 | ||
39e48d9b | 328 | pr_cont("P4D %lx ", p4d_val(*p4d)); |
e0c4f675 KS |
329 | if (!p4d_present(*p4d) || p4d_large(*p4d)) |
330 | goto out; | |
331 | ||
332 | pud = pud_offset(p4d, address); | |
2d4a7167 IM |
333 | if (bad_address(pud)) |
334 | goto bad; | |
335 | ||
39e48d9b | 336 | pr_cont("PUD %lx ", pud_val(*pud)); |
b5360222 | 337 | if (!pud_present(*pud) || pud_large(*pud)) |
2d4a7167 | 338 | goto out; |
1da177e4 LT |
339 | |
340 | pmd = pmd_offset(pud, address); | |
2d4a7167 IM |
341 | if (bad_address(pmd)) |
342 | goto bad; | |
343 | ||
39e48d9b | 344 | pr_cont("PMD %lx ", pmd_val(*pmd)); |
2d4a7167 IM |
345 | if (!pmd_present(*pmd) || pmd_large(*pmd)) |
346 | goto out; | |
1da177e4 LT |
347 | |
348 | pte = pte_offset_kernel(pmd, address); | |
2d4a7167 IM |
349 | if (bad_address(pte)) |
350 | goto bad; | |
351 | ||
39e48d9b | 352 | pr_cont("PTE %lx", pte_val(*pte)); |
2d4a7167 | 353 | out: |
39e48d9b | 354 | pr_cont("\n"); |
1da177e4 LT |
355 | return; |
356 | bad: | |
39e48d9b | 357 | pr_info("BAD\n"); |
8c938f9f IM |
358 | } |
359 | ||
f2f13a85 | 360 | #endif /* CONFIG_X86_64 */ |
1da177e4 | 361 | |
2d4a7167 IM |
362 | /* |
363 | * Workaround for K8 erratum #93 & buggy BIOS. | |
364 | * | |
365 | * BIOS SMM functions are required to use a specific workaround | |
366 | * to avoid corruption of the 64bit RIP register on C stepping K8. | |
367 | * | |
368 | * A lot of BIOS that didn't get tested properly miss this. | |
369 | * | |
370 | * The OS sees this as a page fault with the upper 32bits of RIP cleared. | |
371 | * Try to work around it here. | |
372 | * | |
373 | * Note we only handle faults in kernel here. | |
374 | * Does nothing on 32-bit. | |
fdfe8aa8 | 375 | */ |
33cb5243 | 376 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
1da177e4 | 377 | { |
e05139f2 JB |
378 | #if defined(CONFIG_X86_64) && defined(CONFIG_CPU_SUP_AMD) |
379 | if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD | |
380 | || boot_cpu_data.x86 != 0xf) | |
381 | return 0; | |
382 | ||
65ea5b03 | 383 | if (address != regs->ip) |
1da177e4 | 384 | return 0; |
2d4a7167 | 385 | |
33cb5243 | 386 | if ((address >> 32) != 0) |
1da177e4 | 387 | return 0; |
2d4a7167 | 388 | |
1da177e4 | 389 | address |= 0xffffffffUL << 32; |
33cb5243 HH |
390 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
391 | (address >= MODULES_VADDR && address <= MODULES_END)) { | |
a454ab31 | 392 | printk_once(errata93_warning); |
65ea5b03 | 393 | regs->ip = address; |
1da177e4 LT |
394 | return 1; |
395 | } | |
fdfe8aa8 | 396 | #endif |
1da177e4 | 397 | return 0; |
33cb5243 | 398 | } |
1da177e4 | 399 | |
35f3266f | 400 | /* |
2d4a7167 IM |
401 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps |
402 | * to illegal addresses >4GB. | |
403 | * | |
404 | * We catch this in the page fault handler because these addresses | |
405 | * are not reachable. Just detect this case and return. Any code | |
35f3266f HH |
406 | * segment in LDT is compatibility mode. |
407 | */ | |
408 | static int is_errata100(struct pt_regs *regs, unsigned long address) | |
409 | { | |
410 | #ifdef CONFIG_X86_64 | |
2d4a7167 | 411 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32)) |
35f3266f HH |
412 | return 1; |
413 | #endif | |
414 | return 0; | |
415 | } | |
416 | ||
29caf2f9 HH |
417 | static int is_f00f_bug(struct pt_regs *regs, unsigned long address) |
418 | { | |
419 | #ifdef CONFIG_X86_F00F_BUG | |
420 | unsigned long nr; | |
2d4a7167 | 421 | |
29caf2f9 | 422 | /* |
2d4a7167 | 423 | * Pentium F0 0F C7 C8 bug workaround: |
29caf2f9 | 424 | */ |
e2604b49 | 425 | if (boot_cpu_has_bug(X86_BUG_F00F)) { |
29caf2f9 HH |
426 | nr = (address - idt_descr.address) >> 3; |
427 | ||
428 | if (nr == 6) { | |
49893c5c | 429 | handle_invalid_op(regs); |
29caf2f9 HH |
430 | return 1; |
431 | } | |
432 | } | |
433 | #endif | |
434 | return 0; | |
435 | } | |
436 | ||
a1a371c4 AL |
437 | static void show_ldttss(const struct desc_ptr *gdt, const char *name, u16 index) |
438 | { | |
439 | u32 offset = (index >> 3) * sizeof(struct desc_struct); | |
440 | unsigned long addr; | |
441 | struct ldttss_desc desc; | |
442 | ||
443 | if (index == 0) { | |
444 | pr_alert("%s: NULL\n", name); | |
445 | return; | |
446 | } | |
447 | ||
448 | if (offset + sizeof(struct ldttss_desc) >= gdt->size) { | |
449 | pr_alert("%s: 0x%hx -- out of bounds\n", name, index); | |
450 | return; | |
451 | } | |
452 | ||
453 | if (probe_kernel_read(&desc, (void *)(gdt->address + offset), | |
454 | sizeof(struct ldttss_desc))) { | |
455 | pr_alert("%s: 0x%hx -- GDT entry is not readable\n", | |
456 | name, index); | |
457 | return; | |
458 | } | |
459 | ||
5ccd3528 | 460 | addr = desc.base0 | (desc.base1 << 16) | ((unsigned long)desc.base2 << 24); |
a1a371c4 AL |
461 | #ifdef CONFIG_X86_64 |
462 | addr |= ((u64)desc.base3 << 32); | |
463 | #endif | |
464 | pr_alert("%s: 0x%hx -- base=0x%lx limit=0x%x\n", | |
465 | name, index, addr, (desc.limit0 | (desc.limit1 << 16))); | |
466 | } | |
467 | ||
2d4a7167 | 468 | static void |
a2aa52ab | 469 | show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long address) |
b3279c7f | 470 | { |
1156e098 HH |
471 | if (!oops_may_print()) |
472 | return; | |
473 | ||
1067f030 | 474 | if (error_code & X86_PF_INSTR) { |
93809be8 | 475 | unsigned int level; |
426e34cc MF |
476 | pgd_t *pgd; |
477 | pte_t *pte; | |
2d4a7167 | 478 | |
6c690ee1 | 479 | pgd = __va(read_cr3_pa()); |
426e34cc MF |
480 | pgd += pgd_index(address); |
481 | ||
482 | pte = lookup_address_in_pgd(pgd, address, &level); | |
1156e098 | 483 | |
8f766149 | 484 | if (pte && pte_present(*pte) && !pte_exec(*pte)) |
d79d0d8a DV |
485 | pr_crit("kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n", |
486 | from_kuid(&init_user_ns, current_uid())); | |
eff50c34 JK |
487 | if (pte && pte_present(*pte) && pte_exec(*pte) && |
488 | (pgd_flags(*pgd) & _PAGE_USER) && | |
1e02ce4c | 489 | (__read_cr4() & X86_CR4_SMEP)) |
d79d0d8a DV |
490 | pr_crit("unable to execute userspace code (SMEP?) (uid: %d)\n", |
491 | from_kuid(&init_user_ns, current_uid())); | |
1156e098 | 492 | } |
1156e098 | 493 | |
f28b11a2 | 494 | if (address < PAGE_SIZE && !user_mode(regs)) |
ea2f8d60 | 495 | pr_alert("BUG: kernel NULL pointer dereference, address: %px\n", |
f28b11a2 SC |
496 | (void *)address); |
497 | else | |
ea2f8d60 | 498 | pr_alert("BUG: unable to handle page fault for address: %px\n", |
f28b11a2 | 499 | (void *)address); |
2d4a7167 | 500 | |
ea2f8d60 | 501 | pr_alert("#PF: %s %s in %s mode\n", |
18ea35c5 SC |
502 | (error_code & X86_PF_USER) ? "user" : "supervisor", |
503 | (error_code & X86_PF_INSTR) ? "instruction fetch" : | |
504 | (error_code & X86_PF_WRITE) ? "write access" : | |
505 | "read access", | |
506 | user_mode(regs) ? "user" : "kernel"); | |
507 | pr_alert("#PF: error_code(0x%04lx) - %s\n", error_code, | |
508 | !(error_code & X86_PF_PROT) ? "not-present page" : | |
509 | (error_code & X86_PF_RSVD) ? "reserved bit violation" : | |
510 | (error_code & X86_PF_PK) ? "protection keys violation" : | |
511 | "permissions violation"); | |
a2aa52ab | 512 | |
a1a371c4 AL |
513 | if (!(error_code & X86_PF_USER) && user_mode(regs)) { |
514 | struct desc_ptr idt, gdt; | |
515 | u16 ldtr, tr; | |
516 | ||
a1a371c4 AL |
517 | /* |
518 | * This can happen for quite a few reasons. The more obvious | |
519 | * ones are faults accessing the GDT, or LDT. Perhaps | |
520 | * surprisingly, if the CPU tries to deliver a benign or | |
521 | * contributory exception from user code and gets a page fault | |
522 | * during delivery, the page fault can be delivered as though | |
523 | * it originated directly from user code. This could happen | |
524 | * due to wrong permissions on the IDT, GDT, LDT, TSS, or | |
525 | * kernel or IST stack. | |
526 | */ | |
527 | store_idt(&idt); | |
528 | ||
529 | /* Usable even on Xen PV -- it's just slow. */ | |
530 | native_store_gdt(&gdt); | |
531 | ||
532 | pr_alert("IDT: 0x%lx (limit=0x%hx) GDT: 0x%lx (limit=0x%hx)\n", | |
533 | idt.address, idt.size, gdt.address, gdt.size); | |
534 | ||
535 | store_ldt(ldtr); | |
536 | show_ldttss(&gdt, "LDTR", ldtr); | |
537 | ||
538 | store_tr(tr); | |
539 | show_ldttss(&gdt, "TR", tr); | |
540 | } | |
541 | ||
b3279c7f HH |
542 | dump_pagetable(address); |
543 | } | |
544 | ||
2d4a7167 IM |
545 | static noinline void |
546 | pgtable_bad(struct pt_regs *regs, unsigned long error_code, | |
547 | unsigned long address) | |
1da177e4 | 548 | { |
2d4a7167 IM |
549 | struct task_struct *tsk; |
550 | unsigned long flags; | |
551 | int sig; | |
552 | ||
553 | flags = oops_begin(); | |
554 | tsk = current; | |
555 | sig = SIGKILL; | |
1209140c | 556 | |
1da177e4 | 557 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
92181f19 | 558 | tsk->comm, address); |
1da177e4 | 559 | dump_pagetable(address); |
2d4a7167 | 560 | |
22f5991c | 561 | if (__die("Bad pagetable", regs, error_code)) |
874d93d1 | 562 | sig = 0; |
2d4a7167 | 563 | |
874d93d1 | 564 | oops_end(flags, regs, sig); |
1da177e4 LT |
565 | } |
566 | ||
e49d3cbe AL |
567 | static void set_signal_archinfo(unsigned long address, |
568 | unsigned long error_code) | |
569 | { | |
570 | struct task_struct *tsk = current; | |
571 | ||
572 | /* | |
573 | * To avoid leaking information about the kernel page | |
574 | * table layout, pretend that user-mode accesses to | |
575 | * kernel addresses are always protection faults. | |
e0a446ce AL |
576 | * |
577 | * NB: This means that failed vsyscalls with vsyscall=none | |
578 | * will have the PROT bit. This doesn't leak any | |
579 | * information and does not appear to cause any problems. | |
e49d3cbe AL |
580 | */ |
581 | if (address >= TASK_SIZE_MAX) | |
582 | error_code |= X86_PF_PROT; | |
583 | ||
584 | tsk->thread.trap_nr = X86_TRAP_PF; | |
585 | tsk->thread.error_code = error_code | X86_PF_USER; | |
586 | tsk->thread.cr2 = address; | |
587 | } | |
588 | ||
2d4a7167 IM |
589 | static noinline void |
590 | no_context(struct pt_regs *regs, unsigned long error_code, | |
4fc34901 | 591 | unsigned long address, int signal, int si_code) |
92181f19 NP |
592 | { |
593 | struct task_struct *tsk = current; | |
92181f19 NP |
594 | unsigned long flags; |
595 | int sig; | |
92181f19 | 596 | |
ebb53e25 AL |
597 | if (user_mode(regs)) { |
598 | /* | |
599 | * This is an implicit supervisor-mode access from user | |
600 | * mode. Bypass all the kernel-mode recovery code and just | |
601 | * OOPS. | |
602 | */ | |
603 | goto oops; | |
604 | } | |
605 | ||
2d4a7167 | 606 | /* Are we prepared to handle this kernel fault? */ |
81fd9c18 | 607 | if (fixup_exception(regs, X86_TRAP_PF, error_code, address)) { |
c026b359 PZ |
608 | /* |
609 | * Any interrupt that takes a fault gets the fixup. This makes | |
610 | * the below recursive fault logic only apply to a faults from | |
611 | * task context. | |
612 | */ | |
613 | if (in_interrupt()) | |
614 | return; | |
615 | ||
616 | /* | |
617 | * Per the above we're !in_interrupt(), aka. task context. | |
618 | * | |
619 | * In this case we need to make sure we're not recursively | |
620 | * faulting through the emulate_vsyscall() logic. | |
621 | */ | |
2a53ccbc | 622 | if (current->thread.sig_on_uaccess_err && signal) { |
e49d3cbe | 623 | set_signal_archinfo(address, error_code); |
4fc34901 AL |
624 | |
625 | /* XXX: hwpoison faults will set the wrong code. */ | |
2e1661d2 | 626 | force_sig_fault(signal, si_code, (void __user *)address); |
4fc34901 | 627 | } |
c026b359 PZ |
628 | |
629 | /* | |
630 | * Barring that, we can do the fixup and be happy. | |
631 | */ | |
92181f19 | 632 | return; |
4fc34901 | 633 | } |
92181f19 | 634 | |
6271cfdf AL |
635 | #ifdef CONFIG_VMAP_STACK |
636 | /* | |
637 | * Stack overflow? During boot, we can fault near the initial | |
638 | * stack in the direct map, but that's not an overflow -- check | |
639 | * that we're in vmalloc space to avoid this. | |
640 | */ | |
641 | if (is_vmalloc_addr((void *)address) && | |
642 | (((unsigned long)tsk->stack - 1 - address < PAGE_SIZE) || | |
643 | address - ((unsigned long)tsk->stack + THREAD_SIZE) < PAGE_SIZE)) { | |
d876b673 | 644 | unsigned long stack = __this_cpu_ist_top_va(DF) - sizeof(void *); |
6271cfdf AL |
645 | /* |
646 | * We're likely to be running with very little stack space | |
647 | * left. It's plausible that we'd hit this condition but | |
648 | * double-fault even before we get this far, in which case | |
649 | * we're fine: the double-fault handler will deal with it. | |
650 | * | |
651 | * We don't want to make it all the way into the oops code | |
652 | * and then double-fault, though, because we're likely to | |
653 | * break the console driver and lose most of the stack dump. | |
654 | */ | |
655 | asm volatile ("movq %[stack], %%rsp\n\t" | |
656 | "call handle_stack_overflow\n\t" | |
657 | "1: jmp 1b" | |
f5caf621 | 658 | : ASM_CALL_CONSTRAINT |
6271cfdf AL |
659 | : "D" ("kernel stack overflow (page fault)"), |
660 | "S" (regs), "d" (address), | |
661 | [stack] "rm" (stack)); | |
662 | unreachable(); | |
663 | } | |
664 | #endif | |
665 | ||
92181f19 | 666 | /* |
2d4a7167 IM |
667 | * 32-bit: |
668 | * | |
669 | * Valid to do another page fault here, because if this fault | |
670 | * had been triggered by is_prefetch fixup_exception would have | |
671 | * handled it. | |
672 | * | |
673 | * 64-bit: | |
92181f19 | 674 | * |
2d4a7167 | 675 | * Hall of shame of CPU/BIOS bugs. |
92181f19 NP |
676 | */ |
677 | if (is_prefetch(regs, error_code, address)) | |
678 | return; | |
679 | ||
680 | if (is_errata93(regs, address)) | |
681 | return; | |
682 | ||
3425d934 SP |
683 | /* |
684 | * Buggy firmware could access regions which might page fault, try to | |
685 | * recover from such faults. | |
686 | */ | |
687 | if (IS_ENABLED(CONFIG_EFI)) | |
688 | efi_recover_from_page_fault(address); | |
689 | ||
ebb53e25 | 690 | oops: |
92181f19 NP |
691 | /* |
692 | * Oops. The kernel tried to access some bad page. We'll have to | |
2d4a7167 | 693 | * terminate things with extreme prejudice: |
92181f19 | 694 | */ |
92181f19 | 695 | flags = oops_begin(); |
92181f19 NP |
696 | |
697 | show_fault_oops(regs, error_code, address); | |
698 | ||
a70857e4 | 699 | if (task_stack_end_corrupted(tsk)) |
b0f4c4b3 | 700 | printk(KERN_EMERG "Thread overran stack, or stack corrupted\n"); |
19803078 | 701 | |
92181f19 NP |
702 | sig = SIGKILL; |
703 | if (__die("Oops", regs, error_code)) | |
704 | sig = 0; | |
2d4a7167 | 705 | |
92181f19 | 706 | /* Executive summary in case the body of the oops scrolled away */ |
b0f4c4b3 | 707 | printk(KERN_DEFAULT "CR2: %016lx\n", address); |
2d4a7167 | 708 | |
92181f19 | 709 | oops_end(flags, regs, sig); |
92181f19 NP |
710 | } |
711 | ||
2d4a7167 IM |
712 | /* |
713 | * Print out info about fatal segfaults, if the show_unhandled_signals | |
714 | * sysctl is set: | |
715 | */ | |
716 | static inline void | |
717 | show_signal_msg(struct pt_regs *regs, unsigned long error_code, | |
718 | unsigned long address, struct task_struct *tsk) | |
719 | { | |
ba54d856 BP |
720 | const char *loglvl = task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG; |
721 | ||
2d4a7167 IM |
722 | if (!unhandled_signal(tsk, SIGSEGV)) |
723 | return; | |
724 | ||
725 | if (!printk_ratelimit()) | |
726 | return; | |
727 | ||
10a7e9d8 | 728 | printk("%s%s[%d]: segfault at %lx ip %px sp %px error %lx", |
ba54d856 | 729 | loglvl, tsk->comm, task_pid_nr(tsk), address, |
2d4a7167 IM |
730 | (void *)regs->ip, (void *)regs->sp, error_code); |
731 | ||
732 | print_vma_addr(KERN_CONT " in ", regs->ip); | |
733 | ||
734 | printk(KERN_CONT "\n"); | |
ba54d856 | 735 | |
342db04a | 736 | show_opcodes(regs, loglvl); |
2d4a7167 IM |
737 | } |
738 | ||
02e983b7 DH |
739 | /* |
740 | * The (legacy) vsyscall page is the long page in the kernel portion | |
741 | * of the address space that has user-accessible permissions. | |
742 | */ | |
743 | static bool is_vsyscall_vaddr(unsigned long vaddr) | |
744 | { | |
3ae0ad92 | 745 | return unlikely((vaddr & PAGE_MASK) == VSYSCALL_ADDR); |
02e983b7 DH |
746 | } |
747 | ||
2d4a7167 IM |
748 | static void |
749 | __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
419ceeb1 | 750 | unsigned long address, u32 pkey, int si_code) |
92181f19 NP |
751 | { |
752 | struct task_struct *tsk = current; | |
753 | ||
754 | /* User mode accesses just cause a SIGSEGV */ | |
6ea59b07 | 755 | if (user_mode(regs) && (error_code & X86_PF_USER)) { |
92181f19 | 756 | /* |
2d4a7167 | 757 | * It's possible to have interrupts off here: |
92181f19 NP |
758 | */ |
759 | local_irq_enable(); | |
760 | ||
761 | /* | |
762 | * Valid to do another page fault here because this one came | |
2d4a7167 | 763 | * from user space: |
92181f19 NP |
764 | */ |
765 | if (is_prefetch(regs, error_code, address)) | |
766 | return; | |
767 | ||
768 | if (is_errata100(regs, address)) | |
769 | return; | |
770 | ||
dc4fac84 AL |
771 | /* |
772 | * To avoid leaking information about the kernel page table | |
773 | * layout, pretend that user-mode accesses to kernel addresses | |
774 | * are always protection faults. | |
775 | */ | |
776 | if (address >= TASK_SIZE_MAX) | |
1067f030 | 777 | error_code |= X86_PF_PROT; |
3ae36655 | 778 | |
e575a86f | 779 | if (likely(show_unhandled_signals)) |
2d4a7167 IM |
780 | show_signal_msg(regs, error_code, address, tsk); |
781 | ||
e49d3cbe | 782 | set_signal_archinfo(address, error_code); |
92181f19 | 783 | |
9db812db | 784 | if (si_code == SEGV_PKUERR) |
419ceeb1 | 785 | force_sig_pkuerr((void __user *)address, pkey); |
9db812db | 786 | |
2e1661d2 | 787 | force_sig_fault(SIGSEGV, si_code, (void __user *)address); |
2d4a7167 | 788 | |
ca4c6a98 TG |
789 | local_irq_disable(); |
790 | ||
92181f19 NP |
791 | return; |
792 | } | |
793 | ||
794 | if (is_f00f_bug(regs, address)) | |
795 | return; | |
796 | ||
4fc34901 | 797 | no_context(regs, error_code, address, SIGSEGV, si_code); |
92181f19 NP |
798 | } |
799 | ||
2d4a7167 IM |
800 | static noinline void |
801 | bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
768fd9c6 | 802 | unsigned long address) |
92181f19 | 803 | { |
419ceeb1 | 804 | __bad_area_nosemaphore(regs, error_code, address, 0, SEGV_MAPERR); |
92181f19 NP |
805 | } |
806 | ||
2d4a7167 IM |
807 | static void |
808 | __bad_area(struct pt_regs *regs, unsigned long error_code, | |
419ceeb1 | 809 | unsigned long address, u32 pkey, int si_code) |
92181f19 NP |
810 | { |
811 | struct mm_struct *mm = current->mm; | |
92181f19 NP |
812 | /* |
813 | * Something tried to access memory that isn't in our memory map.. | |
814 | * Fix it, but check if it's kernel or user first.. | |
815 | */ | |
d8ed45c5 | 816 | mmap_read_unlock(mm); |
92181f19 | 817 | |
aba1ecd3 | 818 | __bad_area_nosemaphore(regs, error_code, address, pkey, si_code); |
92181f19 NP |
819 | } |
820 | ||
2d4a7167 IM |
821 | static noinline void |
822 | bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 | 823 | { |
419ceeb1 | 824 | __bad_area(regs, error_code, address, 0, SEGV_MAPERR); |
92181f19 NP |
825 | } |
826 | ||
33a709b2 DH |
827 | static inline bool bad_area_access_from_pkeys(unsigned long error_code, |
828 | struct vm_area_struct *vma) | |
829 | { | |
07f146f5 DH |
830 | /* This code is always called on the current mm */ |
831 | bool foreign = false; | |
832 | ||
33a709b2 DH |
833 | if (!boot_cpu_has(X86_FEATURE_OSPKE)) |
834 | return false; | |
1067f030 | 835 | if (error_code & X86_PF_PK) |
33a709b2 | 836 | return true; |
07f146f5 | 837 | /* this checks permission keys on the VMA: */ |
1067f030 RN |
838 | if (!arch_vma_access_permitted(vma, (error_code & X86_PF_WRITE), |
839 | (error_code & X86_PF_INSTR), foreign)) | |
07f146f5 | 840 | return true; |
33a709b2 | 841 | return false; |
92181f19 NP |
842 | } |
843 | ||
2d4a7167 IM |
844 | static noinline void |
845 | bad_area_access_error(struct pt_regs *regs, unsigned long error_code, | |
7b2d0dba | 846 | unsigned long address, struct vm_area_struct *vma) |
92181f19 | 847 | { |
019132ff DH |
848 | /* |
849 | * This OSPKE check is not strictly necessary at runtime. | |
850 | * But, doing it this way allows compiler optimizations | |
851 | * if pkeys are compiled out. | |
852 | */ | |
aba1ecd3 | 853 | if (bad_area_access_from_pkeys(error_code, vma)) { |
9db812db EB |
854 | /* |
855 | * A protection key fault means that the PKRU value did not allow | |
856 | * access to some PTE. Userspace can figure out what PKRU was | |
857 | * from the XSAVE state. This function captures the pkey from | |
858 | * the vma and passes it to userspace so userspace can discover | |
859 | * which protection key was set on the PTE. | |
860 | * | |
861 | * If we get here, we know that the hardware signaled a X86_PF_PK | |
862 | * fault and that there was a VMA once we got in the fault | |
863 | * handler. It does *not* guarantee that the VMA we find here | |
864 | * was the one that we faulted on. | |
865 | * | |
866 | * 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4); | |
867 | * 2. T1 : set PKRU to deny access to pkey=4, touches page | |
868 | * 3. T1 : faults... | |
869 | * 4. T2: mprotect_key(foo, PAGE_SIZE, pkey=5); | |
c1e8d7c6 | 870 | * 5. T1 : enters fault handler, takes mmap_lock, etc... |
9db812db EB |
871 | * 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really |
872 | * faulted on a pte with its pkey=4. | |
873 | */ | |
aba1ecd3 | 874 | u32 pkey = vma_pkey(vma); |
9db812db | 875 | |
419ceeb1 | 876 | __bad_area(regs, error_code, address, pkey, SEGV_PKUERR); |
aba1ecd3 | 877 | } else { |
419ceeb1 | 878 | __bad_area(regs, error_code, address, 0, SEGV_ACCERR); |
aba1ecd3 | 879 | } |
92181f19 NP |
880 | } |
881 | ||
2d4a7167 | 882 | static void |
a6e04aa9 | 883 | do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address, |
3d353901 | 884 | vm_fault_t fault) |
92181f19 | 885 | { |
2d4a7167 | 886 | /* Kernel mode? Handle exceptions or die: */ |
1067f030 | 887 | if (!(error_code & X86_PF_USER)) { |
4fc34901 | 888 | no_context(regs, error_code, address, SIGBUS, BUS_ADRERR); |
96054569 LT |
889 | return; |
890 | } | |
2d4a7167 | 891 | |
cd1b68f0 | 892 | /* User-space => ok to do another page fault: */ |
92181f19 NP |
893 | if (is_prefetch(regs, error_code, address)) |
894 | return; | |
2d4a7167 | 895 | |
e49d3cbe | 896 | set_signal_archinfo(address, error_code); |
2d4a7167 | 897 | |
a6e04aa9 | 898 | #ifdef CONFIG_MEMORY_FAILURE |
f672b49b | 899 | if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) { |
318759b4 | 900 | struct task_struct *tsk = current; |
40e55394 EB |
901 | unsigned lsb = 0; |
902 | ||
903 | pr_err( | |
a6e04aa9 AK |
904 | "MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n", |
905 | tsk->comm, tsk->pid, address); | |
40e55394 EB |
906 | if (fault & VM_FAULT_HWPOISON_LARGE) |
907 | lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); | |
908 | if (fault & VM_FAULT_HWPOISON) | |
909 | lsb = PAGE_SHIFT; | |
f8eac901 | 910 | force_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, lsb); |
40e55394 | 911 | return; |
a6e04aa9 AK |
912 | } |
913 | #endif | |
2e1661d2 | 914 | force_sig_fault(SIGBUS, BUS_ADRERR, (void __user *)address); |
92181f19 NP |
915 | } |
916 | ||
3a13c4d7 | 917 | static noinline void |
2d4a7167 | 918 | mm_fault_error(struct pt_regs *regs, unsigned long error_code, |
25c102d8 | 919 | unsigned long address, vm_fault_t fault) |
92181f19 | 920 | { |
1067f030 | 921 | if (fatal_signal_pending(current) && !(error_code & X86_PF_USER)) { |
3a13c4d7 JW |
922 | no_context(regs, error_code, address, 0, 0); |
923 | return; | |
b80ef10e | 924 | } |
b80ef10e | 925 | |
2d4a7167 | 926 | if (fault & VM_FAULT_OOM) { |
f8626854 | 927 | /* Kernel mode? Handle exceptions or die: */ |
1067f030 | 928 | if (!(error_code & X86_PF_USER)) { |
4fc34901 AL |
929 | no_context(regs, error_code, address, |
930 | SIGSEGV, SEGV_MAPERR); | |
3a13c4d7 | 931 | return; |
f8626854 AV |
932 | } |
933 | ||
c2d23f91 DR |
934 | /* |
935 | * We ran out of memory, call the OOM killer, and return the | |
936 | * userspace (which will retry the fault, or kill us if we got | |
937 | * oom-killed): | |
938 | */ | |
939 | pagefault_out_of_memory(); | |
2d4a7167 | 940 | } else { |
f672b49b AK |
941 | if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON| |
942 | VM_FAULT_HWPOISON_LARGE)) | |
27274f73 | 943 | do_sigbus(regs, error_code, address, fault); |
33692f27 | 944 | else if (fault & VM_FAULT_SIGSEGV) |
768fd9c6 | 945 | bad_area_nosemaphore(regs, error_code, address); |
2d4a7167 IM |
946 | else |
947 | BUG(); | |
948 | } | |
92181f19 NP |
949 | } |
950 | ||
8fed6200 | 951 | static int spurious_kernel_fault_check(unsigned long error_code, pte_t *pte) |
d8b57bb7 | 952 | { |
1067f030 | 953 | if ((error_code & X86_PF_WRITE) && !pte_write(*pte)) |
d8b57bb7 | 954 | return 0; |
2d4a7167 | 955 | |
1067f030 | 956 | if ((error_code & X86_PF_INSTR) && !pte_exec(*pte)) |
d8b57bb7 TG |
957 | return 0; |
958 | ||
959 | return 1; | |
960 | } | |
961 | ||
5b727a3b | 962 | /* |
2d4a7167 IM |
963 | * Handle a spurious fault caused by a stale TLB entry. |
964 | * | |
965 | * This allows us to lazily refresh the TLB when increasing the | |
966 | * permissions of a kernel page (RO -> RW or NX -> X). Doing it | |
967 | * eagerly is very expensive since that implies doing a full | |
968 | * cross-processor TLB flush, even if no stale TLB entries exist | |
969 | * on other processors. | |
970 | * | |
31668511 DV |
971 | * Spurious faults may only occur if the TLB contains an entry with |
972 | * fewer permission than the page table entry. Non-present (P = 0) | |
973 | * and reserved bit (R = 1) faults are never spurious. | |
974 | * | |
5b727a3b JF |
975 | * There are no security implications to leaving a stale TLB when |
976 | * increasing the permissions on a page. | |
31668511 DV |
977 | * |
978 | * Returns non-zero if a spurious fault was handled, zero otherwise. | |
979 | * | |
980 | * See Intel Developer's Manual Vol 3 Section 4.10.4.3, bullet 3 | |
981 | * (Optional Invalidation). | |
5b727a3b | 982 | */ |
9326638c | 983 | static noinline int |
8fed6200 | 984 | spurious_kernel_fault(unsigned long error_code, unsigned long address) |
5b727a3b JF |
985 | { |
986 | pgd_t *pgd; | |
e0c4f675 | 987 | p4d_t *p4d; |
5b727a3b JF |
988 | pud_t *pud; |
989 | pmd_t *pmd; | |
990 | pte_t *pte; | |
3c3e5694 | 991 | int ret; |
5b727a3b | 992 | |
31668511 DV |
993 | /* |
994 | * Only writes to RO or instruction fetches from NX may cause | |
995 | * spurious faults. | |
996 | * | |
997 | * These could be from user or supervisor accesses but the TLB | |
998 | * is only lazily flushed after a kernel mapping protection | |
999 | * change, so user accesses are not expected to cause spurious | |
1000 | * faults. | |
1001 | */ | |
1067f030 RN |
1002 | if (error_code != (X86_PF_WRITE | X86_PF_PROT) && |
1003 | error_code != (X86_PF_INSTR | X86_PF_PROT)) | |
5b727a3b JF |
1004 | return 0; |
1005 | ||
1006 | pgd = init_mm.pgd + pgd_index(address); | |
1007 | if (!pgd_present(*pgd)) | |
1008 | return 0; | |
1009 | ||
e0c4f675 KS |
1010 | p4d = p4d_offset(pgd, address); |
1011 | if (!p4d_present(*p4d)) | |
1012 | return 0; | |
1013 | ||
1014 | if (p4d_large(*p4d)) | |
8fed6200 | 1015 | return spurious_kernel_fault_check(error_code, (pte_t *) p4d); |
e0c4f675 KS |
1016 | |
1017 | pud = pud_offset(p4d, address); | |
5b727a3b JF |
1018 | if (!pud_present(*pud)) |
1019 | return 0; | |
1020 | ||
d8b57bb7 | 1021 | if (pud_large(*pud)) |
8fed6200 | 1022 | return spurious_kernel_fault_check(error_code, (pte_t *) pud); |
d8b57bb7 | 1023 | |
5b727a3b JF |
1024 | pmd = pmd_offset(pud, address); |
1025 | if (!pmd_present(*pmd)) | |
1026 | return 0; | |
1027 | ||
d8b57bb7 | 1028 | if (pmd_large(*pmd)) |
8fed6200 | 1029 | return spurious_kernel_fault_check(error_code, (pte_t *) pmd); |
d8b57bb7 | 1030 | |
5b727a3b | 1031 | pte = pte_offset_kernel(pmd, address); |
954f8571 | 1032 | if (!pte_present(*pte)) |
5b727a3b JF |
1033 | return 0; |
1034 | ||
8fed6200 | 1035 | ret = spurious_kernel_fault_check(error_code, pte); |
3c3e5694 SR |
1036 | if (!ret) |
1037 | return 0; | |
1038 | ||
1039 | /* | |
2d4a7167 IM |
1040 | * Make sure we have permissions in PMD. |
1041 | * If not, then there's a bug in the page tables: | |
3c3e5694 | 1042 | */ |
8fed6200 | 1043 | ret = spurious_kernel_fault_check(error_code, (pte_t *) pmd); |
3c3e5694 | 1044 | WARN_ONCE(!ret, "PMD has incorrect permission bits\n"); |
2d4a7167 | 1045 | |
3c3e5694 | 1046 | return ret; |
5b727a3b | 1047 | } |
8fed6200 | 1048 | NOKPROBE_SYMBOL(spurious_kernel_fault); |
5b727a3b | 1049 | |
abd4f750 | 1050 | int show_unhandled_signals = 1; |
1da177e4 | 1051 | |
2d4a7167 | 1052 | static inline int |
68da336a | 1053 | access_error(unsigned long error_code, struct vm_area_struct *vma) |
92181f19 | 1054 | { |
07f146f5 DH |
1055 | /* This is only called for the current mm, so: */ |
1056 | bool foreign = false; | |
e8c6226d DH |
1057 | |
1058 | /* | |
1059 | * Read or write was blocked by protection keys. This is | |
1060 | * always an unconditional error and can never result in | |
1061 | * a follow-up action to resolve the fault, like a COW. | |
1062 | */ | |
1067f030 | 1063 | if (error_code & X86_PF_PK) |
e8c6226d DH |
1064 | return 1; |
1065 | ||
07f146f5 DH |
1066 | /* |
1067 | * Make sure to check the VMA so that we do not perform | |
1067f030 | 1068 | * faults just to hit a X86_PF_PK as soon as we fill in a |
07f146f5 DH |
1069 | * page. |
1070 | */ | |
1067f030 RN |
1071 | if (!arch_vma_access_permitted(vma, (error_code & X86_PF_WRITE), |
1072 | (error_code & X86_PF_INSTR), foreign)) | |
07f146f5 | 1073 | return 1; |
33a709b2 | 1074 | |
1067f030 | 1075 | if (error_code & X86_PF_WRITE) { |
2d4a7167 | 1076 | /* write, present and write, not present: */ |
92181f19 NP |
1077 | if (unlikely(!(vma->vm_flags & VM_WRITE))) |
1078 | return 1; | |
2d4a7167 | 1079 | return 0; |
92181f19 NP |
1080 | } |
1081 | ||
2d4a7167 | 1082 | /* read, present: */ |
1067f030 | 1083 | if (unlikely(error_code & X86_PF_PROT)) |
2d4a7167 IM |
1084 | return 1; |
1085 | ||
1086 | /* read, not present: */ | |
3122e80e | 1087 | if (unlikely(!vma_is_accessible(vma))) |
2d4a7167 IM |
1088 | return 1; |
1089 | ||
92181f19 NP |
1090 | return 0; |
1091 | } | |
1092 | ||
0973a06c HS |
1093 | static int fault_in_kernel_space(unsigned long address) |
1094 | { | |
3ae0ad92 DH |
1095 | /* |
1096 | * On 64-bit systems, the vsyscall page is at an address above | |
1097 | * TASK_SIZE_MAX, but is not considered part of the kernel | |
1098 | * address space. | |
1099 | */ | |
1100 | if (IS_ENABLED(CONFIG_X86_64) && is_vsyscall_vaddr(address)) | |
1101 | return false; | |
1102 | ||
d9517346 | 1103 | return address >= TASK_SIZE_MAX; |
0973a06c HS |
1104 | } |
1105 | ||
1da177e4 | 1106 | /* |
8fed6200 DH |
1107 | * Called for all faults where 'address' is part of the kernel address |
1108 | * space. Might get called for faults that originate from *code* that | |
1109 | * ran in userspace or the kernel. | |
1da177e4 | 1110 | */ |
8fed6200 DH |
1111 | static void |
1112 | do_kern_addr_fault(struct pt_regs *regs, unsigned long hw_error_code, | |
1113 | unsigned long address) | |
1da177e4 | 1114 | { |
367e3f1d DH |
1115 | /* |
1116 | * Protection keys exceptions only happen on user pages. We | |
1117 | * have no user pages in the kernel portion of the address | |
1118 | * space, so do not expect them here. | |
1119 | */ | |
1120 | WARN_ON_ONCE(hw_error_code & X86_PF_PK); | |
1da177e4 | 1121 | |
8fed6200 DH |
1122 | /* Was the fault spurious, caused by lazy TLB invalidation? */ |
1123 | if (spurious_kernel_fault(hw_error_code, address)) | |
1124 | return; | |
2d4a7167 | 1125 | |
8fed6200 | 1126 | /* kprobes don't want to hook the spurious faults: */ |
b98cca44 | 1127 | if (kprobe_page_fault(regs, X86_TRAP_PF)) |
92181f19 | 1128 | return; |
8fed6200 DH |
1129 | |
1130 | /* | |
1131 | * Note, despite being a "bad area", there are quite a few | |
1132 | * acceptable reasons to get here, such as erratum fixups | |
1133 | * and handling kernel code that can fault, like get_user(). | |
1134 | * | |
1135 | * Don't take the mm semaphore here. If we fixup a prefetch | |
1136 | * fault we could otherwise deadlock: | |
1137 | */ | |
ba9f6f89 | 1138 | bad_area_nosemaphore(regs, hw_error_code, address); |
8fed6200 DH |
1139 | } |
1140 | NOKPROBE_SYMBOL(do_kern_addr_fault); | |
1141 | ||
aa37c51b DH |
1142 | /* Handle faults in the user portion of the address space */ |
1143 | static inline | |
1144 | void do_user_addr_fault(struct pt_regs *regs, | |
1145 | unsigned long hw_error_code, | |
1146 | unsigned long address) | |
1da177e4 | 1147 | { |
2d4a7167 | 1148 | struct vm_area_struct *vma; |
1da177e4 LT |
1149 | struct task_struct *tsk; |
1150 | struct mm_struct *mm; | |
50a7ca3c | 1151 | vm_fault_t fault, major = 0; |
dde16072 | 1152 | unsigned int flags = FAULT_FLAG_DEFAULT; |
1da177e4 | 1153 | |
a9ba9a3b AV |
1154 | tsk = current; |
1155 | mm = tsk->mm; | |
f8c2ee22 | 1156 | |
2d4a7167 | 1157 | /* kprobes don't want to hook the spurious faults: */ |
b98cca44 | 1158 | if (unlikely(kprobe_page_fault(regs, X86_TRAP_PF))) |
9be260a6 | 1159 | return; |
8c914cb7 | 1160 | |
5b0c2cac DH |
1161 | /* |
1162 | * Reserved bits are never expected to be set on | |
1163 | * entries in the user portion of the page tables. | |
1164 | */ | |
164477c2 DH |
1165 | if (unlikely(hw_error_code & X86_PF_RSVD)) |
1166 | pgtable_bad(regs, hw_error_code, address); | |
1da177e4 | 1167 | |
5b0c2cac | 1168 | /* |
e50928d7 AL |
1169 | * If SMAP is on, check for invalid kernel (supervisor) access to user |
1170 | * pages in the user address space. The odd case here is WRUSS, | |
1171 | * which, according to the preliminary documentation, does not respect | |
1172 | * SMAP and will have the USER bit set so, in all cases, SMAP | |
1173 | * enforcement appears to be consistent with the USER bit. | |
5b0c2cac | 1174 | */ |
a15781b5 AL |
1175 | if (unlikely(cpu_feature_enabled(X86_FEATURE_SMAP) && |
1176 | !(hw_error_code & X86_PF_USER) && | |
e50928d7 | 1177 | !(regs->flags & X86_EFLAGS_AC))) |
a15781b5 | 1178 | { |
ba9f6f89 | 1179 | bad_area_nosemaphore(regs, hw_error_code, address); |
4640c7ee | 1180 | return; |
40d3cd66 PA |
1181 | } |
1182 | ||
1da177e4 | 1183 | /* |
2d4a7167 | 1184 | * If we're in an interrupt, have no user context or are running |
70ffdb93 | 1185 | * in a region with pagefaults disabled then we must not take the fault |
1da177e4 | 1186 | */ |
70ffdb93 | 1187 | if (unlikely(faulthandler_disabled() || !mm)) { |
ba9f6f89 | 1188 | bad_area_nosemaphore(regs, hw_error_code, address); |
92181f19 NP |
1189 | return; |
1190 | } | |
1da177e4 | 1191 | |
e00b12e6 PZ |
1192 | /* |
1193 | * It's safe to allow irq's after cr2 has been saved and the | |
1194 | * vmalloc fault has been handled. | |
1195 | * | |
1196 | * User-mode registers count as a user access even for any | |
1197 | * potential system fault or CPU buglet: | |
1198 | */ | |
f39b6f0e | 1199 | if (user_mode(regs)) { |
e00b12e6 | 1200 | local_irq_enable(); |
e00b12e6 PZ |
1201 | flags |= FAULT_FLAG_USER; |
1202 | } else { | |
1203 | if (regs->flags & X86_EFLAGS_IF) | |
1204 | local_irq_enable(); | |
1205 | } | |
1206 | ||
1207 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); | |
1208 | ||
0ed32f1a | 1209 | if (hw_error_code & X86_PF_WRITE) |
759496ba | 1210 | flags |= FAULT_FLAG_WRITE; |
0ed32f1a | 1211 | if (hw_error_code & X86_PF_INSTR) |
d61172b4 | 1212 | flags |= FAULT_FLAG_INSTRUCTION; |
759496ba | 1213 | |
3ae0ad92 | 1214 | #ifdef CONFIG_X86_64 |
3a1dfe6e | 1215 | /* |
918ce325 AL |
1216 | * Faults in the vsyscall page might need emulation. The |
1217 | * vsyscall page is at a high address (>PAGE_OFFSET), but is | |
1218 | * considered to be part of the user address space. | |
1da177e4 | 1219 | * |
3ae0ad92 DH |
1220 | * The vsyscall page does not have a "real" VMA, so do this |
1221 | * emulation before we go searching for VMAs. | |
e0a446ce AL |
1222 | * |
1223 | * PKRU never rejects instruction fetches, so we don't need | |
1224 | * to consider the PF_PK bit. | |
3ae0ad92 | 1225 | */ |
918ce325 AL |
1226 | if (is_vsyscall_vaddr(address)) { |
1227 | if (emulate_vsyscall(hw_error_code, regs, address)) | |
3ae0ad92 DH |
1228 | return; |
1229 | } | |
1230 | #endif | |
1231 | ||
3a1dfe6e | 1232 | /* |
88259744 DH |
1233 | * Kernel-mode access to the user address space should only occur |
1234 | * on well-defined single instructions listed in the exception | |
1235 | * tables. But, an erroneous kernel fault occurring outside one of | |
c1e8d7c6 | 1236 | * those areas which also holds mmap_lock might deadlock attempting |
88259744 | 1237 | * to validate the fault against the address space. |
1da177e4 | 1238 | * |
88259744 DH |
1239 | * Only do the expensive exception table search when we might be at |
1240 | * risk of a deadlock. This happens if we | |
c1e8d7c6 | 1241 | * 1. Failed to acquire mmap_lock, and |
6344be60 | 1242 | * 2. The access did not originate in userspace. |
1da177e4 | 1243 | */ |
d8ed45c5 | 1244 | if (unlikely(!mmap_read_trylock(mm))) { |
6344be60 | 1245 | if (!user_mode(regs) && !search_exception_tables(regs->ip)) { |
88259744 DH |
1246 | /* |
1247 | * Fault from code in kernel from | |
1248 | * which we do not expect faults. | |
1249 | */ | |
0ed32f1a | 1250 | bad_area_nosemaphore(regs, hw_error_code, address); |
92181f19 NP |
1251 | return; |
1252 | } | |
d065bd81 | 1253 | retry: |
d8ed45c5 | 1254 | mmap_read_lock(mm); |
01006074 PZ |
1255 | } else { |
1256 | /* | |
2d4a7167 IM |
1257 | * The above down_read_trylock() might have succeeded in |
1258 | * which case we'll have missed the might_sleep() from | |
1259 | * down_read(): | |
01006074 PZ |
1260 | */ |
1261 | might_sleep(); | |
1da177e4 LT |
1262 | } |
1263 | ||
1264 | vma = find_vma(mm, address); | |
92181f19 | 1265 | if (unlikely(!vma)) { |
0ed32f1a | 1266 | bad_area(regs, hw_error_code, address); |
92181f19 NP |
1267 | return; |
1268 | } | |
1269 | if (likely(vma->vm_start <= address)) | |
1da177e4 | 1270 | goto good_area; |
92181f19 | 1271 | if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) { |
0ed32f1a | 1272 | bad_area(regs, hw_error_code, address); |
92181f19 NP |
1273 | return; |
1274 | } | |
92181f19 | 1275 | if (unlikely(expand_stack(vma, address))) { |
0ed32f1a | 1276 | bad_area(regs, hw_error_code, address); |
92181f19 NP |
1277 | return; |
1278 | } | |
1279 | ||
1280 | /* | |
1281 | * Ok, we have a good vm_area for this memory access, so | |
1282 | * we can handle it.. | |
1283 | */ | |
1da177e4 | 1284 | good_area: |
0ed32f1a AL |
1285 | if (unlikely(access_error(hw_error_code, vma))) { |
1286 | bad_area_access_error(regs, hw_error_code, address, vma); | |
92181f19 | 1287 | return; |
1da177e4 LT |
1288 | } |
1289 | ||
1290 | /* | |
1291 | * If for any reason at all we couldn't handle the fault, | |
1292 | * make sure we exit gracefully rather than endlessly redo | |
9a95f3cf | 1293 | * the fault. Since we never set FAULT_FLAG_RETRY_NOWAIT, if |
c1e8d7c6 | 1294 | * we get VM_FAULT_RETRY back, the mmap_lock has been unlocked. |
cb0631fd | 1295 | * |
c1e8d7c6 | 1296 | * Note that handle_userfault() may also release and reacquire mmap_lock |
cb0631fd VB |
1297 | * (and not return with VM_FAULT_RETRY), when returning to userland to |
1298 | * repeat the page fault later with a VM_FAULT_NOPAGE retval | |
1299 | * (potentially after handling any pending signal during the return to | |
1300 | * userland). The return to userland is identified whenever | |
1301 | * FAULT_FLAG_USER|FAULT_FLAG_KILLABLE are both set in flags. | |
1da177e4 | 1302 | */ |
dcddffd4 | 1303 | fault = handle_mm_fault(vma, address, flags); |
26178ec1 | 1304 | major |= fault & VM_FAULT_MAJOR; |
2d4a7167 | 1305 | |
39678191 PX |
1306 | /* Quick path to respond to signals */ |
1307 | if (fault_signal_pending(fault, regs)) { | |
1308 | if (!user_mode(regs)) | |
1309 | no_context(regs, hw_error_code, address, SIGBUS, | |
1310 | BUS_ADRERR); | |
1311 | return; | |
1312 | } | |
1313 | ||
3a13c4d7 | 1314 | /* |
c1e8d7c6 | 1315 | * If we need to retry the mmap_lock has already been released, |
26178ec1 LT |
1316 | * and if there is a fatal signal pending there is no guarantee |
1317 | * that we made any progress. Handle this case first. | |
3a13c4d7 | 1318 | */ |
39678191 PX |
1319 | if (unlikely((fault & VM_FAULT_RETRY) && |
1320 | (flags & FAULT_FLAG_ALLOW_RETRY))) { | |
39678191 PX |
1321 | flags |= FAULT_FLAG_TRIED; |
1322 | goto retry; | |
26178ec1 | 1323 | } |
3a13c4d7 | 1324 | |
d8ed45c5 | 1325 | mmap_read_unlock(mm); |
3a13c4d7 | 1326 | if (unlikely(fault & VM_FAULT_ERROR)) { |
0ed32f1a | 1327 | mm_fault_error(regs, hw_error_code, address, fault); |
3a13c4d7 | 1328 | return; |
37b23e05 KM |
1329 | } |
1330 | ||
d065bd81 | 1331 | /* |
26178ec1 LT |
1332 | * Major/minor page fault accounting. If any of the events |
1333 | * returned VM_FAULT_MAJOR, we account it as a major fault. | |
d065bd81 | 1334 | */ |
26178ec1 LT |
1335 | if (major) { |
1336 | tsk->maj_flt++; | |
1337 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address); | |
1338 | } else { | |
1339 | tsk->min_flt++; | |
1340 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address); | |
ac17dc8e | 1341 | } |
d729ab35 | 1342 | |
8c938f9f | 1343 | check_v8086_mode(regs, address, tsk); |
1da177e4 | 1344 | } |
aa37c51b DH |
1345 | NOKPROBE_SYMBOL(do_user_addr_fault); |
1346 | ||
a0d14b89 PZ |
1347 | static __always_inline void |
1348 | trace_page_fault_entries(struct pt_regs *regs, unsigned long error_code, | |
1349 | unsigned long address) | |
d34603b0 | 1350 | { |
a0d14b89 PZ |
1351 | if (!trace_pagefault_enabled()) |
1352 | return; | |
1353 | ||
d34603b0 | 1354 | if (user_mode(regs)) |
d4078e23 | 1355 | trace_page_fault_user(address, regs, error_code); |
d34603b0 | 1356 | else |
d4078e23 | 1357 | trace_page_fault_kernel(address, regs, error_code); |
d34603b0 SA |
1358 | } |
1359 | ||
91eeafea TG |
1360 | static __always_inline void |
1361 | handle_page_fault(struct pt_regs *regs, unsigned long error_code, | |
1362 | unsigned long address) | |
1363 | { | |
1364 | trace_page_fault_entries(regs, error_code, address); | |
1365 | ||
1366 | if (unlikely(kmmio_fault(regs, address))) | |
1367 | return; | |
1368 | ||
1369 | /* Was the fault on kernel-controlled part of the address space? */ | |
1370 | if (unlikely(fault_in_kernel_space(address))) { | |
1371 | do_kern_addr_fault(regs, error_code, address); | |
1372 | } else { | |
1373 | do_user_addr_fault(regs, error_code, address); | |
1374 | /* | |
1375 | * User address page fault handling might have reenabled | |
1376 | * interrupts. Fixing up all potential exit points of | |
1377 | * do_user_addr_fault() and its leaf functions is just not | |
1378 | * doable w/o creating an unholy mess or turning the code | |
1379 | * upside down. | |
1380 | */ | |
1381 | local_irq_disable(); | |
1382 | } | |
1383 | } | |
1384 | ||
1385 | DEFINE_IDTENTRY_RAW_ERRORCODE(exc_page_fault) | |
25c74b10 | 1386 | { |
91eeafea TG |
1387 | unsigned long address = read_cr2(); |
1388 | bool rcu_exit; | |
1389 | ||
da1c55f1 | 1390 | prefetchw(¤t->mm->mmap_lock); |
91eeafea | 1391 | |
ef68017e AL |
1392 | /* |
1393 | * KVM has two types of events that are, logically, interrupts, but | |
1394 | * are unfortunately delivered using the #PF vector. These events are | |
1395 | * "you just accessed valid memory, but the host doesn't have it right | |
1396 | * now, so I'll put you to sleep if you continue" and "that memory | |
1397 | * you tried to access earlier is available now." | |
1398 | * | |
1399 | * We are relying on the interrupted context being sane (valid RSP, | |
1400 | * relevant locks not held, etc.), which is fine as long as the | |
1401 | * interrupted context had IF=1. We are also relying on the KVM | |
1402 | * async pf type field and CR2 being read consistently instead of | |
1403 | * getting values from real and async page faults mixed up. | |
1404 | * | |
1405 | * Fingers crossed. | |
91eeafea TG |
1406 | * |
1407 | * The async #PF handling code takes care of idtentry handling | |
1408 | * itself. | |
ef68017e AL |
1409 | */ |
1410 | if (kvm_handle_async_pf(regs, (u32)address)) | |
1411 | return; | |
1412 | ||
91eeafea TG |
1413 | /* |
1414 | * Entry handling for valid #PF from kernel mode is slightly | |
1415 | * different: RCU is already watching and rcu_irq_enter() must not | |
1416 | * be invoked because a kernel fault on a user space address might | |
1417 | * sleep. | |
1418 | * | |
1419 | * In case the fault hit a RCU idle region the conditional entry | |
1420 | * code reenabled RCU to avoid subsequent wreckage which helps | |
1421 | * debugability. | |
1422 | */ | |
1423 | rcu_exit = idtentry_enter_cond_rcu(regs); | |
25c74b10 | 1424 | |
91eeafea TG |
1425 | instrumentation_begin(); |
1426 | handle_page_fault(regs, error_code, address); | |
1427 | instrumentation_end(); | |
ee6352b2 | 1428 | |
91eeafea | 1429 | idtentry_exit_cond_rcu(regs, rcu_exit); |
25c74b10 | 1430 | } |