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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1995 Linus Torvalds |
2d4a7167 | 3 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
1da177e4 | 4 | */ |
1da177e4 | 5 | #include <linux/interrupt.h> |
2d4a7167 IM |
6 | #include <linux/mmiotrace.h> |
7 | #include <linux/bootmem.h> | |
1da177e4 | 8 | #include <linux/compiler.h> |
c61e211d | 9 | #include <linux/highmem.h> |
0f2fbdcb | 10 | #include <linux/kprobes.h> |
ab2bf0c1 | 11 | #include <linux/uaccess.h> |
2d4a7167 IM |
12 | #include <linux/vmalloc.h> |
13 | #include <linux/vt_kern.h> | |
14 | #include <linux/signal.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/string.h> | |
18 | #include <linux/module.h> | |
1eeb66a1 | 19 | #include <linux/kdebug.h> |
2d4a7167 | 20 | #include <linux/errno.h> |
7c9f8861 | 21 | #include <linux/magic.h> |
2d4a7167 IM |
22 | #include <linux/sched.h> |
23 | #include <linux/types.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/mman.h> | |
26 | #include <linux/tty.h> | |
27 | #include <linux/smp.h> | |
28 | #include <linux/mm.h> | |
29 | ||
30 | #include <asm-generic/sections.h> | |
1da177e4 | 31 | |
1da177e4 | 32 | #include <asm/tlbflush.h> |
2d4a7167 IM |
33 | #include <asm/pgalloc.h> |
34 | #include <asm/segment.h> | |
35 | #include <asm/system.h> | |
1da177e4 | 36 | #include <asm/proto.h> |
70ef5641 | 37 | #include <asm/traps.h> |
2d4a7167 | 38 | #include <asm/desc.h> |
1da177e4 | 39 | |
33cb5243 | 40 | /* |
2d4a7167 IM |
41 | * Page fault error code bits: |
42 | * | |
43 | * bit 0 == 0: no page found 1: protection fault | |
44 | * bit 1 == 0: read access 1: write access | |
45 | * bit 2 == 0: kernel-mode access 1: user-mode access | |
46 | * bit 3 == 1: use of reserved bit detected | |
47 | * bit 4 == 1: fault was an instruction fetch | |
33cb5243 | 48 | */ |
2d4a7167 IM |
49 | enum x86_pf_error_code { |
50 | ||
51 | PF_PROT = 1 << 0, | |
52 | PF_WRITE = 1 << 1, | |
53 | PF_USER = 1 << 2, | |
54 | PF_RSVD = 1 << 3, | |
55 | PF_INSTR = 1 << 4, | |
56 | }; | |
66c58156 | 57 | |
b814d41f IM |
58 | /* |
59 | * (returns 0 if mmiotrace is disabled) | |
60 | */ | |
0fd0e3da | 61 | static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) |
86069782 | 62 | { |
0fd0e3da PP |
63 | if (unlikely(is_kmmio_active())) |
64 | if (kmmio_handler(regs, addr) == 1) | |
65 | return -1; | |
0fd0e3da | 66 | return 0; |
86069782 PP |
67 | } |
68 | ||
74a0b576 | 69 | static inline int notify_page_fault(struct pt_regs *regs) |
1bd858a5 | 70 | { |
74a0b576 CH |
71 | int ret = 0; |
72 | ||
73 | /* kprobe_running() needs smp_processor_id() */ | |
b1801812 | 74 | if (kprobes_built_in() && !user_mode_vm(regs)) { |
74a0b576 CH |
75 | preempt_disable(); |
76 | if (kprobe_running() && kprobe_fault_handler(regs, 14)) | |
77 | ret = 1; | |
78 | preempt_enable(); | |
79 | } | |
1bd858a5 | 80 | |
74a0b576 | 81 | return ret; |
33cb5243 | 82 | } |
1bd858a5 | 83 | |
1dc85be0 | 84 | /* |
2d4a7167 IM |
85 | * Prefetch quirks: |
86 | * | |
87 | * 32-bit mode: | |
88 | * | |
89 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | |
90 | * Check that here and ignore it. | |
1dc85be0 | 91 | * |
2d4a7167 | 92 | * 64-bit mode: |
1dc85be0 | 93 | * |
2d4a7167 IM |
94 | * Sometimes the CPU reports invalid exceptions on prefetch. |
95 | * Check that here and ignore it. | |
96 | * | |
97 | * Opcode checker based on code by Richard Brunner. | |
1dc85be0 | 98 | */ |
107a0367 IM |
99 | static inline int |
100 | check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, | |
101 | unsigned char opcode, int *prefetch) | |
102 | { | |
103 | unsigned char instr_hi = opcode & 0xf0; | |
104 | unsigned char instr_lo = opcode & 0x0f; | |
105 | ||
106 | switch (instr_hi) { | |
107 | case 0x20: | |
108 | case 0x30: | |
109 | /* | |
110 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | |
111 | * In X86_64 long mode, the CPU will signal invalid | |
112 | * opcode if some of these prefixes are present so | |
113 | * X86_64 will never get here anyway | |
114 | */ | |
115 | return ((instr_lo & 7) == 0x6); | |
116 | #ifdef CONFIG_X86_64 | |
117 | case 0x40: | |
118 | /* | |
119 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | |
120 | * Need to figure out under what instruction mode the | |
121 | * instruction was issued. Could check the LDT for lm, | |
122 | * but for now it's good enough to assume that long | |
123 | * mode only uses well known segments or kernel. | |
124 | */ | |
125 | return (!user_mode(regs)) || (regs->cs == __USER_CS); | |
126 | #endif | |
127 | case 0x60: | |
128 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | |
129 | return (instr_lo & 0xC) == 0x4; | |
130 | case 0xF0: | |
131 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ | |
132 | return !instr_lo || (instr_lo>>1) == 1; | |
133 | case 0x00: | |
134 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | |
135 | if (probe_kernel_address(instr, opcode)) | |
136 | return 0; | |
137 | ||
138 | *prefetch = (instr_lo == 0xF) && | |
139 | (opcode == 0x0D || opcode == 0x18); | |
140 | return 0; | |
141 | default: | |
142 | return 0; | |
143 | } | |
144 | } | |
145 | ||
2d4a7167 IM |
146 | static int |
147 | is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) | |
33cb5243 | 148 | { |
2d4a7167 | 149 | unsigned char *max_instr; |
ab2bf0c1 | 150 | unsigned char *instr; |
33cb5243 | 151 | int prefetch = 0; |
1da177e4 | 152 | |
3085354d IM |
153 | /* |
154 | * If it was a exec (instruction fetch) fault on NX page, then | |
155 | * do not ignore the fault: | |
156 | */ | |
66c58156 | 157 | if (error_code & PF_INSTR) |
1da177e4 | 158 | return 0; |
1dc85be0 | 159 | |
107a0367 | 160 | instr = (void *)convert_ip_to_linear(current, regs); |
f1290ec9 | 161 | max_instr = instr + 15; |
1da177e4 | 162 | |
76381fee | 163 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) |
1da177e4 LT |
164 | return 0; |
165 | ||
107a0367 | 166 | while (instr < max_instr) { |
2d4a7167 | 167 | unsigned char opcode; |
1da177e4 | 168 | |
ab2bf0c1 | 169 | if (probe_kernel_address(instr, opcode)) |
33cb5243 | 170 | break; |
1da177e4 | 171 | |
1da177e4 LT |
172 | instr++; |
173 | ||
107a0367 | 174 | if (!check_prefetch_opcode(regs, instr, opcode, &prefetch)) |
1da177e4 | 175 | break; |
1da177e4 LT |
176 | } |
177 | return prefetch; | |
178 | } | |
179 | ||
2d4a7167 IM |
180 | static void |
181 | force_sig_info_fault(int si_signo, int si_code, unsigned long address, | |
182 | struct task_struct *tsk) | |
c4aba4a8 HH |
183 | { |
184 | siginfo_t info; | |
185 | ||
2d4a7167 IM |
186 | info.si_signo = si_signo; |
187 | info.si_errno = 0; | |
188 | info.si_code = si_code; | |
189 | info.si_addr = (void __user *)address; | |
190 | ||
c4aba4a8 HH |
191 | force_sig_info(si_signo, &info, tsk); |
192 | } | |
193 | ||
f2f13a85 IM |
194 | DEFINE_SPINLOCK(pgd_lock); |
195 | LIST_HEAD(pgd_list); | |
196 | ||
197 | #ifdef CONFIG_X86_32 | |
198 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |
33cb5243 | 199 | { |
f2f13a85 IM |
200 | unsigned index = pgd_index(address); |
201 | pgd_t *pgd_k; | |
202 | pud_t *pud, *pud_k; | |
203 | pmd_t *pmd, *pmd_k; | |
2d4a7167 | 204 | |
f2f13a85 IM |
205 | pgd += index; |
206 | pgd_k = init_mm.pgd + index; | |
207 | ||
208 | if (!pgd_present(*pgd_k)) | |
209 | return NULL; | |
210 | ||
211 | /* | |
212 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | |
213 | * and redundant with the set_pmd() on non-PAE. As would | |
214 | * set_pud. | |
215 | */ | |
216 | pud = pud_offset(pgd, address); | |
217 | pud_k = pud_offset(pgd_k, address); | |
218 | if (!pud_present(*pud_k)) | |
219 | return NULL; | |
220 | ||
221 | pmd = pmd_offset(pud, address); | |
222 | pmd_k = pmd_offset(pud_k, address); | |
223 | if (!pmd_present(*pmd_k)) | |
224 | return NULL; | |
225 | ||
226 | if (!pmd_present(*pmd)) { | |
227 | set_pmd(pmd, *pmd_k); | |
228 | arch_flush_lazy_mmu_mode(); | |
229 | } else { | |
230 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | |
231 | } | |
232 | ||
233 | return pmd_k; | |
234 | } | |
235 | ||
236 | void vmalloc_sync_all(void) | |
237 | { | |
238 | unsigned long address; | |
239 | ||
240 | if (SHARED_KERNEL_PMD) | |
241 | return; | |
242 | ||
243 | for (address = VMALLOC_START & PMD_MASK; | |
244 | address >= TASK_SIZE && address < FIXADDR_TOP; | |
245 | address += PMD_SIZE) { | |
246 | ||
247 | unsigned long flags; | |
248 | struct page *page; | |
249 | ||
250 | spin_lock_irqsave(&pgd_lock, flags); | |
251 | list_for_each_entry(page, &pgd_list, lru) { | |
252 | if (!vmalloc_sync_one(page_address(page), address)) | |
253 | break; | |
254 | } | |
255 | spin_unlock_irqrestore(&pgd_lock, flags); | |
256 | } | |
257 | } | |
258 | ||
259 | /* | |
260 | * 32-bit: | |
261 | * | |
262 | * Handle a fault on the vmalloc or module mapping area | |
263 | */ | |
264 | static noinline int vmalloc_fault(unsigned long address) | |
265 | { | |
266 | unsigned long pgd_paddr; | |
267 | pmd_t *pmd_k; | |
268 | pte_t *pte_k; | |
269 | ||
270 | /* Make sure we are in vmalloc area: */ | |
271 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
272 | return -1; | |
273 | ||
274 | /* | |
275 | * Synchronize this task's top level page-table | |
276 | * with the 'reference' page table. | |
277 | * | |
278 | * Do _not_ use "current" here. We might be inside | |
279 | * an interrupt in the middle of a task switch.. | |
280 | */ | |
281 | pgd_paddr = read_cr3(); | |
282 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | |
283 | if (!pmd_k) | |
284 | return -1; | |
285 | ||
286 | pte_k = pte_offset_kernel(pmd_k, address); | |
287 | if (!pte_present(*pte_k)) | |
288 | return -1; | |
289 | ||
290 | return 0; | |
291 | } | |
292 | ||
293 | /* | |
294 | * Did it hit the DOS screen memory VA from vm86 mode? | |
295 | */ | |
296 | static inline void | |
297 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
298 | struct task_struct *tsk) | |
299 | { | |
300 | unsigned long bit; | |
301 | ||
302 | if (!v8086_mode(regs)) | |
303 | return; | |
304 | ||
305 | bit = (address - 0xA0000) >> PAGE_SHIFT; | |
306 | if (bit < 32) | |
307 | tsk->thread.screen_bitmap |= 1 << bit; | |
33cb5243 | 308 | } |
1da177e4 | 309 | |
cae30f82 | 310 | static void dump_pagetable(unsigned long address) |
1da177e4 | 311 | { |
1156e098 HH |
312 | __typeof__(pte_val(__pte(0))) page; |
313 | ||
314 | page = read_cr3(); | |
315 | page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT]; | |
2d4a7167 | 316 | |
1156e098 HH |
317 | #ifdef CONFIG_X86_PAE |
318 | printk("*pdpt = %016Lx ", page); | |
319 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
320 | && page & _PAGE_PRESENT) { | |
321 | page &= PAGE_MASK; | |
322 | page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT) | |
2d4a7167 | 323 | & (PTRS_PER_PMD - 1)]; |
1156e098 HH |
324 | printk(KERN_CONT "*pde = %016Lx ", page); |
325 | page &= ~_PAGE_NX; | |
326 | } | |
327 | #else | |
328 | printk("*pde = %08lx ", page); | |
329 | #endif | |
330 | ||
331 | /* | |
332 | * We must not directly access the pte in the highpte | |
333 | * case if the page table is located in highmem. | |
334 | * And let's rather not kmap-atomic the pte, just in case | |
2d4a7167 | 335 | * it's allocated already: |
1156e098 HH |
336 | */ |
337 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
338 | && (page & _PAGE_PRESENT) | |
339 | && !(page & _PAGE_PSE)) { | |
2d4a7167 | 340 | |
1156e098 HH |
341 | page &= PAGE_MASK; |
342 | page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT) | |
2d4a7167 | 343 | & (PTRS_PER_PTE - 1)]; |
1156e098 HH |
344 | printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page); |
345 | } | |
346 | ||
347 | printk("\n"); | |
f2f13a85 IM |
348 | } |
349 | ||
350 | #else /* CONFIG_X86_64: */ | |
351 | ||
352 | void vmalloc_sync_all(void) | |
353 | { | |
354 | unsigned long address; | |
355 | ||
356 | for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END; | |
357 | address += PGDIR_SIZE) { | |
358 | ||
359 | const pgd_t *pgd_ref = pgd_offset_k(address); | |
360 | unsigned long flags; | |
361 | struct page *page; | |
362 | ||
363 | if (pgd_none(*pgd_ref)) | |
364 | continue; | |
365 | ||
366 | spin_lock_irqsave(&pgd_lock, flags); | |
367 | list_for_each_entry(page, &pgd_list, lru) { | |
368 | pgd_t *pgd; | |
369 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | |
370 | if (pgd_none(*pgd)) | |
371 | set_pgd(pgd, *pgd_ref); | |
372 | else | |
373 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
374 | } | |
375 | spin_unlock_irqrestore(&pgd_lock, flags); | |
376 | } | |
377 | } | |
378 | ||
379 | /* | |
380 | * 64-bit: | |
381 | * | |
382 | * Handle a fault on the vmalloc area | |
383 | * | |
384 | * This assumes no large pages in there. | |
385 | */ | |
386 | static noinline int vmalloc_fault(unsigned long address) | |
387 | { | |
388 | pgd_t *pgd, *pgd_ref; | |
389 | pud_t *pud, *pud_ref; | |
390 | pmd_t *pmd, *pmd_ref; | |
391 | pte_t *pte, *pte_ref; | |
392 | ||
393 | /* Make sure we are in vmalloc area: */ | |
394 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
395 | return -1; | |
396 | ||
397 | /* | |
398 | * Copy kernel mappings over when needed. This can also | |
399 | * happen within a race in page table update. In the later | |
400 | * case just flush: | |
401 | */ | |
402 | pgd = pgd_offset(current->active_mm, address); | |
403 | pgd_ref = pgd_offset_k(address); | |
404 | if (pgd_none(*pgd_ref)) | |
405 | return -1; | |
406 | ||
407 | if (pgd_none(*pgd)) | |
408 | set_pgd(pgd, *pgd_ref); | |
409 | else | |
410 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
411 | ||
412 | /* | |
413 | * Below here mismatches are bugs because these lower tables | |
414 | * are shared: | |
415 | */ | |
416 | ||
417 | pud = pud_offset(pgd, address); | |
418 | pud_ref = pud_offset(pgd_ref, address); | |
419 | if (pud_none(*pud_ref)) | |
420 | return -1; | |
421 | ||
422 | if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref)) | |
423 | BUG(); | |
424 | ||
425 | pmd = pmd_offset(pud, address); | |
426 | pmd_ref = pmd_offset(pud_ref, address); | |
427 | if (pmd_none(*pmd_ref)) | |
428 | return -1; | |
429 | ||
430 | if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref)) | |
431 | BUG(); | |
432 | ||
433 | pte_ref = pte_offset_kernel(pmd_ref, address); | |
434 | if (!pte_present(*pte_ref)) | |
435 | return -1; | |
436 | ||
437 | pte = pte_offset_kernel(pmd, address); | |
438 | ||
439 | /* | |
440 | * Don't use pte_page here, because the mappings can point | |
441 | * outside mem_map, and the NUMA hash lookup cannot handle | |
442 | * that: | |
443 | */ | |
444 | if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref)) | |
445 | BUG(); | |
446 | ||
447 | return 0; | |
448 | } | |
449 | ||
450 | static const char errata93_warning[] = | |
451 | KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n" | |
452 | KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n" | |
453 | KERN_ERR "******* Please consider a BIOS update.\n" | |
454 | KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n"; | |
455 | ||
456 | /* | |
457 | * No vm86 mode in 64-bit mode: | |
458 | */ | |
459 | static inline void | |
460 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
461 | struct task_struct *tsk) | |
462 | { | |
463 | } | |
464 | ||
465 | static int bad_address(void *p) | |
466 | { | |
467 | unsigned long dummy; | |
468 | ||
469 | return probe_kernel_address((unsigned long *)p, dummy); | |
470 | } | |
471 | ||
472 | static void dump_pagetable(unsigned long address) | |
473 | { | |
1da177e4 LT |
474 | pgd_t *pgd; |
475 | pud_t *pud; | |
476 | pmd_t *pmd; | |
477 | pte_t *pte; | |
478 | ||
f51c9452 | 479 | pgd = (pgd_t *)read_cr3(); |
1da177e4 | 480 | |
33cb5243 | 481 | pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); |
2d4a7167 | 482 | |
1da177e4 | 483 | pgd += pgd_index(address); |
2d4a7167 IM |
484 | if (bad_address(pgd)) |
485 | goto bad; | |
486 | ||
d646bce4 | 487 | printk("PGD %lx ", pgd_val(*pgd)); |
2d4a7167 IM |
488 | |
489 | if (!pgd_present(*pgd)) | |
490 | goto out; | |
1da177e4 | 491 | |
d2ae5b5f | 492 | pud = pud_offset(pgd, address); |
2d4a7167 IM |
493 | if (bad_address(pud)) |
494 | goto bad; | |
495 | ||
1da177e4 | 496 | printk("PUD %lx ", pud_val(*pud)); |
b5360222 | 497 | if (!pud_present(*pud) || pud_large(*pud)) |
2d4a7167 | 498 | goto out; |
1da177e4 LT |
499 | |
500 | pmd = pmd_offset(pud, address); | |
2d4a7167 IM |
501 | if (bad_address(pmd)) |
502 | goto bad; | |
503 | ||
1da177e4 | 504 | printk("PMD %lx ", pmd_val(*pmd)); |
2d4a7167 IM |
505 | if (!pmd_present(*pmd) || pmd_large(*pmd)) |
506 | goto out; | |
1da177e4 LT |
507 | |
508 | pte = pte_offset_kernel(pmd, address); | |
2d4a7167 IM |
509 | if (bad_address(pte)) |
510 | goto bad; | |
511 | ||
33cb5243 | 512 | printk("PTE %lx", pte_val(*pte)); |
2d4a7167 | 513 | out: |
1da177e4 LT |
514 | printk("\n"); |
515 | return; | |
516 | bad: | |
517 | printk("BAD\n"); | |
8c938f9f IM |
518 | } |
519 | ||
f2f13a85 | 520 | #endif /* CONFIG_X86_64 */ |
1da177e4 | 521 | |
2d4a7167 IM |
522 | /* |
523 | * Workaround for K8 erratum #93 & buggy BIOS. | |
524 | * | |
525 | * BIOS SMM functions are required to use a specific workaround | |
526 | * to avoid corruption of the 64bit RIP register on C stepping K8. | |
527 | * | |
528 | * A lot of BIOS that didn't get tested properly miss this. | |
529 | * | |
530 | * The OS sees this as a page fault with the upper 32bits of RIP cleared. | |
531 | * Try to work around it here. | |
532 | * | |
533 | * Note we only handle faults in kernel here. | |
534 | * Does nothing on 32-bit. | |
fdfe8aa8 | 535 | */ |
33cb5243 | 536 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
1da177e4 | 537 | { |
fdfe8aa8 | 538 | #ifdef CONFIG_X86_64 |
2d4a7167 IM |
539 | static int once; |
540 | ||
65ea5b03 | 541 | if (address != regs->ip) |
1da177e4 | 542 | return 0; |
2d4a7167 | 543 | |
33cb5243 | 544 | if ((address >> 32) != 0) |
1da177e4 | 545 | return 0; |
2d4a7167 | 546 | |
1da177e4 | 547 | address |= 0xffffffffUL << 32; |
33cb5243 HH |
548 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
549 | (address >= MODULES_VADDR && address <= MODULES_END)) { | |
2d4a7167 | 550 | if (!once) { |
33cb5243 | 551 | printk(errata93_warning); |
2d4a7167 | 552 | once = 1; |
1da177e4 | 553 | } |
65ea5b03 | 554 | regs->ip = address; |
1da177e4 LT |
555 | return 1; |
556 | } | |
fdfe8aa8 | 557 | #endif |
1da177e4 | 558 | return 0; |
33cb5243 | 559 | } |
1da177e4 | 560 | |
35f3266f | 561 | /* |
2d4a7167 IM |
562 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps |
563 | * to illegal addresses >4GB. | |
564 | * | |
565 | * We catch this in the page fault handler because these addresses | |
566 | * are not reachable. Just detect this case and return. Any code | |
35f3266f HH |
567 | * segment in LDT is compatibility mode. |
568 | */ | |
569 | static int is_errata100(struct pt_regs *regs, unsigned long address) | |
570 | { | |
571 | #ifdef CONFIG_X86_64 | |
2d4a7167 | 572 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32)) |
35f3266f HH |
573 | return 1; |
574 | #endif | |
575 | return 0; | |
576 | } | |
577 | ||
29caf2f9 HH |
578 | static int is_f00f_bug(struct pt_regs *regs, unsigned long address) |
579 | { | |
580 | #ifdef CONFIG_X86_F00F_BUG | |
581 | unsigned long nr; | |
2d4a7167 | 582 | |
29caf2f9 | 583 | /* |
2d4a7167 | 584 | * Pentium F0 0F C7 C8 bug workaround: |
29caf2f9 HH |
585 | */ |
586 | if (boot_cpu_data.f00f_bug) { | |
587 | nr = (address - idt_descr.address) >> 3; | |
588 | ||
589 | if (nr == 6) { | |
590 | do_invalid_op(regs, 0); | |
591 | return 1; | |
592 | } | |
593 | } | |
594 | #endif | |
595 | return 0; | |
596 | } | |
597 | ||
8f766149 IM |
598 | static const char nx_warning[] = KERN_CRIT |
599 | "kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n"; | |
600 | ||
2d4a7167 IM |
601 | static void |
602 | show_fault_oops(struct pt_regs *regs, unsigned long error_code, | |
603 | unsigned long address) | |
b3279c7f | 604 | { |
1156e098 HH |
605 | if (!oops_may_print()) |
606 | return; | |
607 | ||
1156e098 | 608 | if (error_code & PF_INSTR) { |
93809be8 | 609 | unsigned int level; |
2d4a7167 | 610 | |
1156e098 HH |
611 | pte_t *pte = lookup_address(address, &level); |
612 | ||
8f766149 IM |
613 | if (pte && pte_present(*pte) && !pte_exec(*pte)) |
614 | printk(nx_warning, current_uid()); | |
1156e098 | 615 | } |
1156e098 | 616 | |
19f0dda9 | 617 | printk(KERN_ALERT "BUG: unable to handle kernel "); |
b3279c7f | 618 | if (address < PAGE_SIZE) |
19f0dda9 | 619 | printk(KERN_CONT "NULL pointer dereference"); |
b3279c7f | 620 | else |
19f0dda9 | 621 | printk(KERN_CONT "paging request"); |
2d4a7167 | 622 | |
f294a8ce | 623 | printk(KERN_CONT " at %p\n", (void *) address); |
19f0dda9 | 624 | printk(KERN_ALERT "IP:"); |
b3279c7f | 625 | printk_address(regs->ip, 1); |
2d4a7167 | 626 | |
b3279c7f HH |
627 | dump_pagetable(address); |
628 | } | |
629 | ||
2d4a7167 IM |
630 | static noinline void |
631 | pgtable_bad(struct pt_regs *regs, unsigned long error_code, | |
632 | unsigned long address) | |
1da177e4 | 633 | { |
2d4a7167 IM |
634 | struct task_struct *tsk; |
635 | unsigned long flags; | |
636 | int sig; | |
637 | ||
638 | flags = oops_begin(); | |
639 | tsk = current; | |
640 | sig = SIGKILL; | |
1209140c | 641 | |
1da177e4 | 642 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
92181f19 | 643 | tsk->comm, address); |
1da177e4 | 644 | dump_pagetable(address); |
2d4a7167 IM |
645 | |
646 | tsk->thread.cr2 = address; | |
647 | tsk->thread.trap_no = 14; | |
648 | tsk->thread.error_code = error_code; | |
649 | ||
22f5991c | 650 | if (__die("Bad pagetable", regs, error_code)) |
874d93d1 | 651 | sig = 0; |
2d4a7167 | 652 | |
874d93d1 | 653 | oops_end(flags, regs, sig); |
1da177e4 LT |
654 | } |
655 | ||
2d4a7167 IM |
656 | static noinline void |
657 | no_context(struct pt_regs *regs, unsigned long error_code, | |
658 | unsigned long address) | |
92181f19 NP |
659 | { |
660 | struct task_struct *tsk = current; | |
19803078 | 661 | unsigned long *stackend; |
92181f19 NP |
662 | unsigned long flags; |
663 | int sig; | |
92181f19 | 664 | |
2d4a7167 | 665 | /* Are we prepared to handle this kernel fault? */ |
92181f19 NP |
666 | if (fixup_exception(regs)) |
667 | return; | |
668 | ||
669 | /* | |
2d4a7167 IM |
670 | * 32-bit: |
671 | * | |
672 | * Valid to do another page fault here, because if this fault | |
673 | * had been triggered by is_prefetch fixup_exception would have | |
674 | * handled it. | |
675 | * | |
676 | * 64-bit: | |
92181f19 | 677 | * |
2d4a7167 | 678 | * Hall of shame of CPU/BIOS bugs. |
92181f19 NP |
679 | */ |
680 | if (is_prefetch(regs, error_code, address)) | |
681 | return; | |
682 | ||
683 | if (is_errata93(regs, address)) | |
684 | return; | |
685 | ||
686 | /* | |
687 | * Oops. The kernel tried to access some bad page. We'll have to | |
2d4a7167 | 688 | * terminate things with extreme prejudice: |
92181f19 | 689 | */ |
92181f19 | 690 | flags = oops_begin(); |
92181f19 NP |
691 | |
692 | show_fault_oops(regs, error_code, address); | |
693 | ||
2d4a7167 | 694 | stackend = end_of_stack(tsk); |
19803078 IM |
695 | if (*stackend != STACK_END_MAGIC) |
696 | printk(KERN_ALERT "Thread overran stack, or stack corrupted\n"); | |
697 | ||
1cc99544 IM |
698 | tsk->thread.cr2 = address; |
699 | tsk->thread.trap_no = 14; | |
700 | tsk->thread.error_code = error_code; | |
92181f19 | 701 | |
92181f19 NP |
702 | sig = SIGKILL; |
703 | if (__die("Oops", regs, error_code)) | |
704 | sig = 0; | |
2d4a7167 | 705 | |
92181f19 NP |
706 | /* Executive summary in case the body of the oops scrolled away */ |
707 | printk(KERN_EMERG "CR2: %016lx\n", address); | |
2d4a7167 | 708 | |
92181f19 | 709 | oops_end(flags, regs, sig); |
92181f19 NP |
710 | } |
711 | ||
2d4a7167 IM |
712 | /* |
713 | * Print out info about fatal segfaults, if the show_unhandled_signals | |
714 | * sysctl is set: | |
715 | */ | |
716 | static inline void | |
717 | show_signal_msg(struct pt_regs *regs, unsigned long error_code, | |
718 | unsigned long address, struct task_struct *tsk) | |
719 | { | |
720 | if (!unhandled_signal(tsk, SIGSEGV)) | |
721 | return; | |
722 | ||
723 | if (!printk_ratelimit()) | |
724 | return; | |
725 | ||
726 | printk(KERN_CONT "%s%s[%d]: segfault at %lx ip %p sp %p error %lx", | |
727 | task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, | |
728 | tsk->comm, task_pid_nr(tsk), address, | |
729 | (void *)regs->ip, (void *)regs->sp, error_code); | |
730 | ||
731 | print_vma_addr(KERN_CONT " in ", regs->ip); | |
732 | ||
733 | printk(KERN_CONT "\n"); | |
734 | } | |
735 | ||
736 | static void | |
737 | __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
738 | unsigned long address, int si_code) | |
92181f19 NP |
739 | { |
740 | struct task_struct *tsk = current; | |
741 | ||
742 | /* User mode accesses just cause a SIGSEGV */ | |
743 | if (error_code & PF_USER) { | |
744 | /* | |
2d4a7167 | 745 | * It's possible to have interrupts off here: |
92181f19 NP |
746 | */ |
747 | local_irq_enable(); | |
748 | ||
749 | /* | |
750 | * Valid to do another page fault here because this one came | |
2d4a7167 | 751 | * from user space: |
92181f19 NP |
752 | */ |
753 | if (is_prefetch(regs, error_code, address)) | |
754 | return; | |
755 | ||
756 | if (is_errata100(regs, address)) | |
757 | return; | |
758 | ||
2d4a7167 IM |
759 | if (unlikely(show_unhandled_signals)) |
760 | show_signal_msg(regs, error_code, address, tsk); | |
761 | ||
762 | /* Kernel addresses are always protection faults: */ | |
763 | tsk->thread.cr2 = address; | |
764 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | |
765 | tsk->thread.trap_no = 14; | |
92181f19 | 766 | |
92181f19 | 767 | force_sig_info_fault(SIGSEGV, si_code, address, tsk); |
2d4a7167 | 768 | |
92181f19 NP |
769 | return; |
770 | } | |
771 | ||
772 | if (is_f00f_bug(regs, address)) | |
773 | return; | |
774 | ||
775 | no_context(regs, error_code, address); | |
776 | } | |
777 | ||
2d4a7167 IM |
778 | static noinline void |
779 | bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
780 | unsigned long address) | |
92181f19 NP |
781 | { |
782 | __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR); | |
783 | } | |
784 | ||
2d4a7167 IM |
785 | static void |
786 | __bad_area(struct pt_regs *regs, unsigned long error_code, | |
787 | unsigned long address, int si_code) | |
92181f19 NP |
788 | { |
789 | struct mm_struct *mm = current->mm; | |
790 | ||
791 | /* | |
792 | * Something tried to access memory that isn't in our memory map.. | |
793 | * Fix it, but check if it's kernel or user first.. | |
794 | */ | |
795 | up_read(&mm->mmap_sem); | |
796 | ||
797 | __bad_area_nosemaphore(regs, error_code, address, si_code); | |
798 | } | |
799 | ||
2d4a7167 IM |
800 | static noinline void |
801 | bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
802 | { |
803 | __bad_area(regs, error_code, address, SEGV_MAPERR); | |
804 | } | |
805 | ||
2d4a7167 IM |
806 | static noinline void |
807 | bad_area_access_error(struct pt_regs *regs, unsigned long error_code, | |
808 | unsigned long address) | |
92181f19 NP |
809 | { |
810 | __bad_area(regs, error_code, address, SEGV_ACCERR); | |
811 | } | |
812 | ||
813 | /* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */ | |
2d4a7167 IM |
814 | static void |
815 | out_of_memory(struct pt_regs *regs, unsigned long error_code, | |
816 | unsigned long address) | |
92181f19 NP |
817 | { |
818 | /* | |
819 | * We ran out of memory, call the OOM killer, and return the userspace | |
2d4a7167 | 820 | * (which will retry the fault, or kill us if we got oom-killed): |
92181f19 NP |
821 | */ |
822 | up_read(¤t->mm->mmap_sem); | |
2d4a7167 | 823 | |
92181f19 NP |
824 | pagefault_out_of_memory(); |
825 | } | |
826 | ||
2d4a7167 IM |
827 | static void |
828 | do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
829 | { |
830 | struct task_struct *tsk = current; | |
831 | struct mm_struct *mm = tsk->mm; | |
832 | ||
833 | up_read(&mm->mmap_sem); | |
834 | ||
2d4a7167 | 835 | /* Kernel mode? Handle exceptions or die: */ |
92181f19 NP |
836 | if (!(error_code & PF_USER)) |
837 | no_context(regs, error_code, address); | |
2d4a7167 | 838 | |
92181f19 | 839 | #ifdef CONFIG_X86_32 |
2d4a7167 | 840 | /* User space => ok to do another page fault: */ |
92181f19 NP |
841 | if (is_prefetch(regs, error_code, address)) |
842 | return; | |
843 | #endif | |
2d4a7167 IM |
844 | |
845 | tsk->thread.cr2 = address; | |
846 | tsk->thread.error_code = error_code; | |
847 | tsk->thread.trap_no = 14; | |
848 | ||
92181f19 NP |
849 | force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); |
850 | } | |
851 | ||
2d4a7167 IM |
852 | static noinline void |
853 | mm_fault_error(struct pt_regs *regs, unsigned long error_code, | |
854 | unsigned long address, unsigned int fault) | |
92181f19 | 855 | { |
2d4a7167 | 856 | if (fault & VM_FAULT_OOM) { |
92181f19 | 857 | out_of_memory(regs, error_code, address); |
2d4a7167 IM |
858 | } else { |
859 | if (fault & VM_FAULT_SIGBUS) | |
860 | do_sigbus(regs, error_code, address); | |
861 | else | |
862 | BUG(); | |
863 | } | |
92181f19 NP |
864 | } |
865 | ||
d8b57bb7 TG |
866 | static int spurious_fault_check(unsigned long error_code, pte_t *pte) |
867 | { | |
868 | if ((error_code & PF_WRITE) && !pte_write(*pte)) | |
869 | return 0; | |
2d4a7167 | 870 | |
d8b57bb7 TG |
871 | if ((error_code & PF_INSTR) && !pte_exec(*pte)) |
872 | return 0; | |
873 | ||
874 | return 1; | |
875 | } | |
876 | ||
5b727a3b | 877 | /* |
2d4a7167 IM |
878 | * Handle a spurious fault caused by a stale TLB entry. |
879 | * | |
880 | * This allows us to lazily refresh the TLB when increasing the | |
881 | * permissions of a kernel page (RO -> RW or NX -> X). Doing it | |
882 | * eagerly is very expensive since that implies doing a full | |
883 | * cross-processor TLB flush, even if no stale TLB entries exist | |
884 | * on other processors. | |
885 | * | |
5b727a3b JF |
886 | * There are no security implications to leaving a stale TLB when |
887 | * increasing the permissions on a page. | |
888 | */ | |
2d4a7167 IM |
889 | static noinline int |
890 | spurious_fault(unsigned long error_code, unsigned long address) | |
5b727a3b JF |
891 | { |
892 | pgd_t *pgd; | |
893 | pud_t *pud; | |
894 | pmd_t *pmd; | |
895 | pte_t *pte; | |
3c3e5694 | 896 | int ret; |
5b727a3b JF |
897 | |
898 | /* Reserved-bit violation or user access to kernel space? */ | |
899 | if (error_code & (PF_USER | PF_RSVD)) | |
900 | return 0; | |
901 | ||
902 | pgd = init_mm.pgd + pgd_index(address); | |
903 | if (!pgd_present(*pgd)) | |
904 | return 0; | |
905 | ||
906 | pud = pud_offset(pgd, address); | |
907 | if (!pud_present(*pud)) | |
908 | return 0; | |
909 | ||
d8b57bb7 TG |
910 | if (pud_large(*pud)) |
911 | return spurious_fault_check(error_code, (pte_t *) pud); | |
912 | ||
5b727a3b JF |
913 | pmd = pmd_offset(pud, address); |
914 | if (!pmd_present(*pmd)) | |
915 | return 0; | |
916 | ||
d8b57bb7 TG |
917 | if (pmd_large(*pmd)) |
918 | return spurious_fault_check(error_code, (pte_t *) pmd); | |
919 | ||
5b727a3b JF |
920 | pte = pte_offset_kernel(pmd, address); |
921 | if (!pte_present(*pte)) | |
922 | return 0; | |
923 | ||
3c3e5694 SR |
924 | ret = spurious_fault_check(error_code, pte); |
925 | if (!ret) | |
926 | return 0; | |
927 | ||
928 | /* | |
2d4a7167 IM |
929 | * Make sure we have permissions in PMD. |
930 | * If not, then there's a bug in the page tables: | |
3c3e5694 SR |
931 | */ |
932 | ret = spurious_fault_check(error_code, (pte_t *) pmd); | |
933 | WARN_ONCE(!ret, "PMD has incorrect permission bits\n"); | |
2d4a7167 | 934 | |
3c3e5694 | 935 | return ret; |
5b727a3b JF |
936 | } |
937 | ||
abd4f750 | 938 | int show_unhandled_signals = 1; |
1da177e4 | 939 | |
2d4a7167 IM |
940 | static inline int |
941 | access_error(unsigned long error_code, int write, struct vm_area_struct *vma) | |
92181f19 NP |
942 | { |
943 | if (write) { | |
2d4a7167 | 944 | /* write, present and write, not present: */ |
92181f19 NP |
945 | if (unlikely(!(vma->vm_flags & VM_WRITE))) |
946 | return 1; | |
2d4a7167 | 947 | return 0; |
92181f19 NP |
948 | } |
949 | ||
2d4a7167 IM |
950 | /* read, present: */ |
951 | if (unlikely(error_code & PF_PROT)) | |
952 | return 1; | |
953 | ||
954 | /* read, not present: */ | |
955 | if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))) | |
956 | return 1; | |
957 | ||
92181f19 NP |
958 | return 0; |
959 | } | |
960 | ||
0973a06c HS |
961 | static int fault_in_kernel_space(unsigned long address) |
962 | { | |
963 | #ifdef CONFIG_X86_32 | |
964 | return address >= TASK_SIZE; | |
2d4a7167 | 965 | #else |
0973a06c | 966 | return address >= TASK_SIZE64; |
2d4a7167 | 967 | #endif |
0973a06c HS |
968 | } |
969 | ||
1da177e4 LT |
970 | /* |
971 | * This routine handles page faults. It determines the address, | |
972 | * and the problem, and then passes it off to one of the appropriate | |
973 | * routines. | |
1da177e4 | 974 | */ |
c3731c68 IM |
975 | dotraplinkage void __kprobes |
976 | do_page_fault(struct pt_regs *regs, unsigned long error_code) | |
1da177e4 | 977 | { |
2d4a7167 | 978 | struct vm_area_struct *vma; |
1da177e4 | 979 | struct task_struct *tsk; |
2d4a7167 | 980 | unsigned long address; |
1da177e4 | 981 | struct mm_struct *mm; |
92181f19 | 982 | int write; |
f8c2ee22 | 983 | int fault; |
1da177e4 | 984 | |
a9ba9a3b AV |
985 | tsk = current; |
986 | mm = tsk->mm; | |
2d4a7167 | 987 | |
a9ba9a3b AV |
988 | prefetchw(&mm->mmap_sem); |
989 | ||
2d4a7167 | 990 | /* Get the faulting address: */ |
f51c9452 | 991 | address = read_cr2(); |
1da177e4 | 992 | |
0fd0e3da | 993 | if (unlikely(kmmio_fault(regs, address))) |
86069782 | 994 | return; |
1da177e4 LT |
995 | |
996 | /* | |
997 | * We fault-in kernel-space virtual memory on-demand. The | |
998 | * 'reference' page table is init_mm.pgd. | |
999 | * | |
1000 | * NOTE! We MUST NOT take any locks for this case. We may | |
1001 | * be in an interrupt or a critical region, and should | |
1002 | * only copy the information from the master page table, | |
1003 | * nothing more. | |
1004 | * | |
1005 | * This verifies that the fault happens in kernel space | |
1006 | * (error_code & 4) == 0, and that the fault was not a | |
8b1bde93 | 1007 | * protection error (error_code & 9) == 0. |
1da177e4 | 1008 | */ |
0973a06c | 1009 | if (unlikely(fault_in_kernel_space(address))) { |
f8c2ee22 HH |
1010 | if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) && |
1011 | vmalloc_fault(address) >= 0) | |
1012 | return; | |
5b727a3b | 1013 | |
2d4a7167 | 1014 | /* Can handle a stale RO->RW TLB: */ |
92181f19 | 1015 | if (spurious_fault(error_code, address)) |
5b727a3b JF |
1016 | return; |
1017 | ||
2d4a7167 | 1018 | /* kprobes don't want to hook the spurious faults: */ |
9be260a6 MH |
1019 | if (notify_page_fault(regs)) |
1020 | return; | |
f8c2ee22 HH |
1021 | /* |
1022 | * Don't take the mm semaphore here. If we fixup a prefetch | |
2d4a7167 | 1023 | * fault we could otherwise deadlock: |
f8c2ee22 | 1024 | */ |
92181f19 | 1025 | bad_area_nosemaphore(regs, error_code, address); |
2d4a7167 | 1026 | |
92181f19 | 1027 | return; |
f8c2ee22 HH |
1028 | } |
1029 | ||
2d4a7167 | 1030 | /* kprobes don't want to hook the spurious faults: */ |
f8a6b2b9 | 1031 | if (unlikely(notify_page_fault(regs))) |
9be260a6 | 1032 | return; |
f8c2ee22 | 1033 | /* |
891cffbd LT |
1034 | * It's safe to allow irq's after cr2 has been saved and the |
1035 | * vmalloc fault has been handled. | |
1036 | * | |
1037 | * User-mode registers count as a user access even for any | |
2d4a7167 | 1038 | * potential system fault or CPU buglet: |
f8c2ee22 | 1039 | */ |
891cffbd LT |
1040 | if (user_mode_vm(regs)) { |
1041 | local_irq_enable(); | |
1042 | error_code |= PF_USER; | |
2d4a7167 IM |
1043 | } else { |
1044 | if (regs->flags & X86_EFLAGS_IF) | |
1045 | local_irq_enable(); | |
1046 | } | |
8c914cb7 | 1047 | |
66c58156 | 1048 | if (unlikely(error_code & PF_RSVD)) |
92181f19 | 1049 | pgtable_bad(regs, error_code, address); |
1da177e4 LT |
1050 | |
1051 | /* | |
2d4a7167 IM |
1052 | * If we're in an interrupt, have no user context or are running |
1053 | * in an atomic region then we must not take the fault: | |
1da177e4 | 1054 | */ |
92181f19 NP |
1055 | if (unlikely(in_atomic() || !mm)) { |
1056 | bad_area_nosemaphore(regs, error_code, address); | |
1057 | return; | |
1058 | } | |
1da177e4 | 1059 | |
3a1dfe6e IM |
1060 | /* |
1061 | * When running in the kernel we expect faults to occur only to | |
2d4a7167 IM |
1062 | * addresses in user space. All other faults represent errors in |
1063 | * the kernel and should generate an OOPS. Unfortunately, in the | |
1064 | * case of an erroneous fault occurring in a code path which already | |
1065 | * holds mmap_sem we will deadlock attempting to validate the fault | |
1066 | * against the address space. Luckily the kernel only validly | |
1067 | * references user space from well defined areas of code, which are | |
1068 | * listed in the exceptions table. | |
1da177e4 LT |
1069 | * |
1070 | * As the vast majority of faults will be valid we will only perform | |
2d4a7167 IM |
1071 | * the source reference check when there is a possibility of a |
1072 | * deadlock. Attempt to lock the address space, if we cannot we then | |
1073 | * validate the source. If this is invalid we can skip the address | |
1074 | * space check, thus avoiding the deadlock: | |
1da177e4 | 1075 | */ |
92181f19 | 1076 | if (unlikely(!down_read_trylock(&mm->mmap_sem))) { |
66c58156 | 1077 | if ((error_code & PF_USER) == 0 && |
92181f19 NP |
1078 | !search_exception_tables(regs->ip)) { |
1079 | bad_area_nosemaphore(regs, error_code, address); | |
1080 | return; | |
1081 | } | |
1da177e4 | 1082 | down_read(&mm->mmap_sem); |
01006074 PZ |
1083 | } else { |
1084 | /* | |
2d4a7167 IM |
1085 | * The above down_read_trylock() might have succeeded in |
1086 | * which case we'll have missed the might_sleep() from | |
1087 | * down_read(): | |
01006074 PZ |
1088 | */ |
1089 | might_sleep(); | |
1da177e4 LT |
1090 | } |
1091 | ||
1092 | vma = find_vma(mm, address); | |
92181f19 NP |
1093 | if (unlikely(!vma)) { |
1094 | bad_area(regs, error_code, address); | |
1095 | return; | |
1096 | } | |
1097 | if (likely(vma->vm_start <= address)) | |
1da177e4 | 1098 | goto good_area; |
92181f19 NP |
1099 | if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) { |
1100 | bad_area(regs, error_code, address); | |
1101 | return; | |
1102 | } | |
33cb5243 | 1103 | if (error_code & PF_USER) { |
6f4d368e HH |
1104 | /* |
1105 | * Accessing the stack below %sp is always a bug. | |
1106 | * The large cushion allows instructions like enter | |
2d4a7167 | 1107 | * and pusha to work. ("enter $65535, $31" pushes |
6f4d368e | 1108 | * 32 pointers and then decrements %sp by 65535.) |
03fdc2c2 | 1109 | */ |
92181f19 NP |
1110 | if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) { |
1111 | bad_area(regs, error_code, address); | |
1112 | return; | |
1113 | } | |
1da177e4 | 1114 | } |
92181f19 NP |
1115 | if (unlikely(expand_stack(vma, address))) { |
1116 | bad_area(regs, error_code, address); | |
1117 | return; | |
1118 | } | |
1119 | ||
1120 | /* | |
1121 | * Ok, we have a good vm_area for this memory access, so | |
1122 | * we can handle it.. | |
1123 | */ | |
1da177e4 | 1124 | good_area: |
92181f19 | 1125 | write = error_code & PF_WRITE; |
2d4a7167 | 1126 | |
92181f19 NP |
1127 | if (unlikely(access_error(error_code, write, vma))) { |
1128 | bad_area_access_error(regs, error_code, address); | |
1129 | return; | |
1da177e4 LT |
1130 | } |
1131 | ||
1132 | /* | |
1133 | * If for any reason at all we couldn't handle the fault, | |
1134 | * make sure we exit gracefully rather than endlessly redo | |
2d4a7167 | 1135 | * the fault: |
1da177e4 | 1136 | */ |
83c54070 | 1137 | fault = handle_mm_fault(mm, vma, address, write); |
2d4a7167 | 1138 | |
83c54070 | 1139 | if (unlikely(fault & VM_FAULT_ERROR)) { |
92181f19 NP |
1140 | mm_fault_error(regs, error_code, address, fault); |
1141 | return; | |
1da177e4 | 1142 | } |
2d4a7167 | 1143 | |
83c54070 NP |
1144 | if (fault & VM_FAULT_MAJOR) |
1145 | tsk->maj_flt++; | |
1146 | else | |
1147 | tsk->min_flt++; | |
d729ab35 | 1148 | |
8c938f9f IM |
1149 | check_v8086_mode(regs, address, tsk); |
1150 | ||
1da177e4 | 1151 | up_read(&mm->mmap_sem); |
1da177e4 | 1152 | } |