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Commit | Line | Data |
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5a0e3ad6 | 1 | #include <linux/gfp.h> |
2c1b284e | 2 | #include <linux/initrd.h> |
540aca06 | 3 | #include <linux/ioport.h> |
e5b2bb55 | 4 | #include <linux/swap.h> |
a9ce6bc1 | 5 | #include <linux/memblock.h> |
17623915 | 6 | #include <linux/bootmem.h> /* for max_low_pfn */ |
377eeaa8 AK |
7 | #include <linux/swapfile.h> |
8 | #include <linux/swapops.h> | |
540aca06 | 9 | |
d1163651 | 10 | #include <asm/set_memory.h> |
66441bd3 | 11 | #include <asm/e820/api.h> |
4fcb2083 | 12 | #include <asm/init.h> |
e5b2bb55 | 13 | #include <asm/page.h> |
540aca06 | 14 | #include <asm/page_types.h> |
e5b2bb55 | 15 | #include <asm/sections.h> |
49834396 | 16 | #include <asm/setup.h> |
f765090a | 17 | #include <asm/tlbflush.h> |
9518e0e4 | 18 | #include <asm/tlb.h> |
76c06927 | 19 | #include <asm/proto.h> |
17623915 | 20 | #include <asm/dma.h> /* for MAX_DMA_PFN */ |
cd745be8 | 21 | #include <asm/microcode.h> |
0483e1fa | 22 | #include <asm/kaslr.h> |
c138d811 | 23 | #include <asm/hypervisor.h> |
c7ad5ad2 | 24 | #include <asm/cpufeature.h> |
aa8c6248 | 25 | #include <asm/pti.h> |
9518e0e4 | 26 | |
d17d8f9d DH |
27 | /* |
28 | * We need to define the tracepoints somewhere, and tlb.c | |
29 | * is only compied when SMP=y. | |
30 | */ | |
31 | #define CREATE_TRACE_POINTS | |
32 | #include <trace/events/tlb.h> | |
33 | ||
5c51bdbe YL |
34 | #include "mm_internal.h" |
35 | ||
281d4078 JG |
36 | /* |
37 | * Tables translating between page_cache_type_t and pte encoding. | |
c709feda | 38 | * |
d5dc861b TK |
39 | * The default values are defined statically as minimal supported mode; |
40 | * WC and WT fall back to UC-. pat_init() updates these values to support | |
41 | * more cache modes, WC and WT, when it is safe to do so. See pat_init() | |
42 | * for the details. Note, __early_ioremap() used during early boot-time | |
43 | * takes pgprot_t (pte encoding) and does not use these tables. | |
c709feda IM |
44 | * |
45 | * Index into __cachemode2pte_tbl[] is the cachemode. | |
46 | * | |
47 | * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte | |
48 | * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2. | |
281d4078 JG |
49 | */ |
50 | uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = { | |
c709feda | 51 | [_PAGE_CACHE_MODE_WB ] = 0 | 0 , |
9cd25aac | 52 | [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD, |
c709feda IM |
53 | [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD, |
54 | [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD, | |
55 | [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD, | |
56 | [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD, | |
281d4078 | 57 | }; |
31bb7723 | 58 | EXPORT_SYMBOL(__cachemode2pte_tbl); |
c709feda | 59 | |
281d4078 | 60 | uint8_t __pte2cachemode_tbl[8] = { |
c709feda | 61 | [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB, |
9cd25aac | 62 | [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS, |
c709feda IM |
63 | [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS, |
64 | [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC, | |
65 | [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB, | |
9cd25aac | 66 | [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS, |
c709feda | 67 | [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS, |
281d4078 JG |
68 | [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC, |
69 | }; | |
31bb7723 | 70 | EXPORT_SYMBOL(__pte2cachemode_tbl); |
281d4078 | 71 | |
cf470659 YL |
72 | static unsigned long __initdata pgt_buf_start; |
73 | static unsigned long __initdata pgt_buf_end; | |
74 | static unsigned long __initdata pgt_buf_top; | |
f765090a | 75 | |
9985b4c6 YL |
76 | static unsigned long min_pfn_mapped; |
77 | ||
c9b3234a YL |
78 | static bool __initdata can_use_brk_pgt = true; |
79 | ||
ddd3509d SS |
80 | /* |
81 | * Pages returned are already directly mapped. | |
82 | * | |
83 | * Changing that is likely to break Xen, see commit: | |
84 | * | |
85 | * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve | |
86 | * | |
87 | * for detailed information. | |
88 | */ | |
22c8ca2a | 89 | __ref void *alloc_low_pages(unsigned int num) |
5c51bdbe YL |
90 | { |
91 | unsigned long pfn; | |
22c8ca2a | 92 | int i; |
5c51bdbe | 93 | |
5c51bdbe | 94 | if (after_bootmem) { |
22c8ca2a | 95 | unsigned int order; |
5c51bdbe | 96 | |
22c8ca2a | 97 | order = get_order((unsigned long)num << PAGE_SHIFT); |
75f296d9 | 98 | return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order); |
5c51bdbe | 99 | } |
5c51bdbe | 100 | |
c9b3234a | 101 | if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) { |
75f2d3a0 JG |
102 | unsigned long ret = 0; |
103 | ||
104 | if (min_pfn_mapped < max_pfn_mapped) { | |
105 | ret = memblock_find_in_range( | |
106 | min_pfn_mapped << PAGE_SHIFT, | |
5c51bdbe | 107 | max_pfn_mapped << PAGE_SHIFT, |
22c8ca2a | 108 | PAGE_SIZE * num , PAGE_SIZE); |
75f2d3a0 JG |
109 | } |
110 | if (ret) | |
111 | memblock_reserve(ret, PAGE_SIZE * num); | |
112 | else if (can_use_brk_pgt) | |
113 | ret = __pa(extend_brk(PAGE_SIZE * num, PAGE_SIZE)); | |
114 | ||
5c51bdbe | 115 | if (!ret) |
d4dd100f | 116 | panic("alloc_low_pages: can not alloc memory"); |
75f2d3a0 | 117 | |
5c51bdbe | 118 | pfn = ret >> PAGE_SHIFT; |
22c8ca2a YL |
119 | } else { |
120 | pfn = pgt_buf_end; | |
121 | pgt_buf_end += num; | |
c9b3234a YL |
122 | printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n", |
123 | pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1); | |
22c8ca2a YL |
124 | } |
125 | ||
126 | for (i = 0; i < num; i++) { | |
127 | void *adr; | |
128 | ||
129 | adr = __va((pfn + i) << PAGE_SHIFT); | |
130 | clear_page(adr); | |
131 | } | |
5c51bdbe | 132 | |
22c8ca2a | 133 | return __va(pfn << PAGE_SHIFT); |
5c51bdbe YL |
134 | } |
135 | ||
fb754f95 TG |
136 | /* |
137 | * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS. | |
138 | * With KASLR memory randomization, depending on the machine e820 memory | |
139 | * and the PUD alignment. We may need twice more pages when KASLR memory | |
140 | * randomization is enabled. | |
141 | */ | |
142 | #ifndef CONFIG_RANDOMIZE_MEMORY | |
143 | #define INIT_PGD_PAGE_COUNT 6 | |
144 | #else | |
145 | #define INIT_PGD_PAGE_COUNT 12 | |
146 | #endif | |
147 | #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE) | |
8d57470d YL |
148 | RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE); |
149 | void __init early_alloc_pgt_buf(void) | |
150 | { | |
151 | unsigned long tables = INIT_PGT_BUF_SIZE; | |
152 | phys_addr_t base; | |
153 | ||
154 | base = __pa(extend_brk(tables, PAGE_SIZE)); | |
155 | ||
156 | pgt_buf_start = base >> PAGE_SHIFT; | |
157 | pgt_buf_end = pgt_buf_start; | |
158 | pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT); | |
159 | } | |
160 | ||
f765090a PE |
161 | int after_bootmem; |
162 | ||
10971ab2 | 163 | early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES); |
148b2098 | 164 | |
844ab6f9 JS |
165 | struct map_range { |
166 | unsigned long start; | |
167 | unsigned long end; | |
168 | unsigned page_size_mask; | |
169 | }; | |
170 | ||
fa62aafe | 171 | static int page_size_mask; |
f765090a | 172 | |
22ddfcaa | 173 | static void __init probe_page_size_mask(void) |
fa62aafe | 174 | { |
fa62aafe | 175 | /* |
4675ff05 | 176 | * For pagealloc debugging, identity mapping will use small pages. |
fa62aafe YL |
177 | * This will simplify cpa(), which otherwise needs to support splitting |
178 | * large pages into small in interrupt context, etc. | |
179 | */ | |
4675ff05 | 180 | if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled()) |
fa62aafe | 181 | page_size_mask |= 1 << PG_LEVEL_2M; |
d9ee35ac VB |
182 | else |
183 | direct_gbpages = 0; | |
fa62aafe YL |
184 | |
185 | /* Enable PSE if available */ | |
16bf9226 | 186 | if (boot_cpu_has(X86_FEATURE_PSE)) |
375074cc | 187 | cr4_set_bits_and_update_boot(X86_CR4_PSE); |
fa62aafe YL |
188 | |
189 | /* Enable PGE if available */ | |
c313ec66 | 190 | __supported_pte_mask &= ~_PAGE_GLOBAL; |
c109bf95 | 191 | if (boot_cpu_has(X86_FEATURE_PGE)) { |
375074cc | 192 | cr4_set_bits_and_update_boot(X86_CR4_PGE); |
39114b7a | 193 | __supported_pte_mask |= _PAGE_GLOBAL; |
c313ec66 | 194 | } |
e61980a7 | 195 | |
8a57f484 DH |
196 | /* By the default is everything supported: */ |
197 | __default_kernel_pte_mask = __supported_pte_mask; | |
198 | /* Except when with PTI where the kernel is mostly non-Global: */ | |
199 | if (cpu_feature_enabled(X86_FEATURE_PTI)) | |
200 | __default_kernel_pte_mask &= ~_PAGE_GLOBAL; | |
201 | ||
e61980a7 | 202 | /* Enable 1 GB linear kernel mappings if available: */ |
b8291adc | 203 | if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) { |
e61980a7 IM |
204 | printk(KERN_INFO "Using GB pages for direct mapping\n"); |
205 | page_size_mask |= 1 << PG_LEVEL_1G; | |
206 | } else { | |
207 | direct_gbpages = 0; | |
208 | } | |
fa62aafe | 209 | } |
279b706b | 210 | |
c7ad5ad2 AL |
211 | static void setup_pcid(void) |
212 | { | |
6cff64b8 DH |
213 | if (!IS_ENABLED(CONFIG_X86_64)) |
214 | return; | |
215 | ||
216 | if (!boot_cpu_has(X86_FEATURE_PCID)) | |
217 | return; | |
218 | ||
219 | if (boot_cpu_has(X86_FEATURE_PGE)) { | |
220 | /* | |
221 | * This can't be cr4_set_bits_and_update_boot() -- the | |
222 | * trampoline code can't handle CR4.PCIDE and it wouldn't | |
223 | * do any good anyway. Despite the name, | |
224 | * cr4_set_bits_and_update_boot() doesn't actually cause | |
225 | * the bits in question to remain set all the way through | |
226 | * the secondary boot asm. | |
227 | * | |
228 | * Instead, we brute-force it and set CR4.PCIDE manually in | |
229 | * start_secondary(). | |
230 | */ | |
231 | cr4_set_bits(X86_CR4_PCIDE); | |
232 | ||
233 | /* | |
234 | * INVPCID's single-context modes (2/3) only work if we set | |
235 | * X86_CR4_PCIDE, *and* we INVPCID support. It's unusable | |
236 | * on systems that have X86_CR4_PCIDE clear, or that have | |
237 | * no INVPCID support at all. | |
238 | */ | |
239 | if (boot_cpu_has(X86_FEATURE_INVPCID)) | |
240 | setup_force_cpu_cap(X86_FEATURE_INVPCID_SINGLE); | |
241 | } else { | |
242 | /* | |
243 | * flush_tlb_all(), as currently implemented, won't work if | |
244 | * PCID is on but PGE is not. Since that combination | |
245 | * doesn't exist on real hardware, there's no reason to try | |
246 | * to fully support it, but it's polite to avoid corrupting | |
247 | * data if we're on an improperly configured VM. | |
248 | */ | |
249 | setup_clear_cpu_cap(X86_FEATURE_PCID); | |
c7ad5ad2 | 250 | } |
c7ad5ad2 AL |
251 | } |
252 | ||
f765090a PE |
253 | #ifdef CONFIG_X86_32 |
254 | #define NR_RANGE_MR 3 | |
255 | #else /* CONFIG_X86_64 */ | |
256 | #define NR_RANGE_MR 5 | |
257 | #endif | |
258 | ||
dc9dd5cc JB |
259 | static int __meminit save_mr(struct map_range *mr, int nr_range, |
260 | unsigned long start_pfn, unsigned long end_pfn, | |
261 | unsigned long page_size_mask) | |
f765090a PE |
262 | { |
263 | if (start_pfn < end_pfn) { | |
264 | if (nr_range >= NR_RANGE_MR) | |
265 | panic("run out of range for init_memory_mapping\n"); | |
266 | mr[nr_range].start = start_pfn<<PAGE_SHIFT; | |
267 | mr[nr_range].end = end_pfn<<PAGE_SHIFT; | |
268 | mr[nr_range].page_size_mask = page_size_mask; | |
269 | nr_range++; | |
270 | } | |
271 | ||
272 | return nr_range; | |
273 | } | |
274 | ||
aeebe84c YL |
275 | /* |
276 | * adjust the page_size_mask for small range to go with | |
277 | * big page size instead small one if nearby are ram too. | |
278 | */ | |
bd721ea7 | 279 | static void __ref adjust_range_page_size_mask(struct map_range *mr, |
aeebe84c YL |
280 | int nr_range) |
281 | { | |
282 | int i; | |
283 | ||
284 | for (i = 0; i < nr_range; i++) { | |
285 | if ((page_size_mask & (1<<PG_LEVEL_2M)) && | |
286 | !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) { | |
287 | unsigned long start = round_down(mr[i].start, PMD_SIZE); | |
288 | unsigned long end = round_up(mr[i].end, PMD_SIZE); | |
289 | ||
290 | #ifdef CONFIG_X86_32 | |
291 | if ((end >> PAGE_SHIFT) > max_low_pfn) | |
292 | continue; | |
293 | #endif | |
294 | ||
295 | if (memblock_is_region_memory(start, end - start)) | |
296 | mr[i].page_size_mask |= 1<<PG_LEVEL_2M; | |
297 | } | |
298 | if ((page_size_mask & (1<<PG_LEVEL_1G)) && | |
299 | !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) { | |
300 | unsigned long start = round_down(mr[i].start, PUD_SIZE); | |
301 | unsigned long end = round_up(mr[i].end, PUD_SIZE); | |
302 | ||
303 | if (memblock_is_region_memory(start, end - start)) | |
304 | mr[i].page_size_mask |= 1<<PG_LEVEL_1G; | |
305 | } | |
306 | } | |
307 | } | |
308 | ||
f15e0518 DH |
309 | static const char *page_size_string(struct map_range *mr) |
310 | { | |
311 | static const char str_1g[] = "1G"; | |
312 | static const char str_2m[] = "2M"; | |
313 | static const char str_4m[] = "4M"; | |
314 | static const char str_4k[] = "4k"; | |
315 | ||
316 | if (mr->page_size_mask & (1<<PG_LEVEL_1G)) | |
317 | return str_1g; | |
318 | /* | |
319 | * 32-bit without PAE has a 4M large page size. | |
320 | * PG_LEVEL_2M is misnamed, but we can at least | |
321 | * print out the right size in the string. | |
322 | */ | |
323 | if (IS_ENABLED(CONFIG_X86_32) && | |
324 | !IS_ENABLED(CONFIG_X86_PAE) && | |
325 | mr->page_size_mask & (1<<PG_LEVEL_2M)) | |
326 | return str_4m; | |
327 | ||
328 | if (mr->page_size_mask & (1<<PG_LEVEL_2M)) | |
329 | return str_2m; | |
330 | ||
331 | return str_4k; | |
332 | } | |
333 | ||
4e33e065 YL |
334 | static int __meminit split_mem_range(struct map_range *mr, int nr_range, |
335 | unsigned long start, | |
336 | unsigned long end) | |
f765090a | 337 | { |
2e8059ed | 338 | unsigned long start_pfn, end_pfn, limit_pfn; |
1829ae9a | 339 | unsigned long pfn; |
4e33e065 | 340 | int i; |
f765090a | 341 | |
2e8059ed YL |
342 | limit_pfn = PFN_DOWN(end); |
343 | ||
f765090a | 344 | /* head if not big page alignment ? */ |
1829ae9a | 345 | pfn = start_pfn = PFN_DOWN(start); |
f765090a PE |
346 | #ifdef CONFIG_X86_32 |
347 | /* | |
348 | * Don't use a large page for the first 2/4MB of memory | |
349 | * because there are often fixed size MTRRs in there | |
350 | * and overlapping MTRRs into large pages can cause | |
351 | * slowdowns. | |
352 | */ | |
1829ae9a | 353 | if (pfn == 0) |
84d77001 | 354 | end_pfn = PFN_DOWN(PMD_SIZE); |
f765090a | 355 | else |
1829ae9a | 356 | end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 357 | #else /* CONFIG_X86_64 */ |
1829ae9a | 358 | end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 359 | #endif |
2e8059ed YL |
360 | if (end_pfn > limit_pfn) |
361 | end_pfn = limit_pfn; | |
f765090a PE |
362 | if (start_pfn < end_pfn) { |
363 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); | |
1829ae9a | 364 | pfn = end_pfn; |
f765090a PE |
365 | } |
366 | ||
367 | /* big page (2M) range */ | |
1829ae9a | 368 | start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 369 | #ifdef CONFIG_X86_32 |
2e8059ed | 370 | end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 371 | #else /* CONFIG_X86_64 */ |
1829ae9a | 372 | end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE)); |
2e8059ed YL |
373 | if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE))) |
374 | end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); | |
f765090a PE |
375 | #endif |
376 | ||
377 | if (start_pfn < end_pfn) { | |
378 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, | |
379 | page_size_mask & (1<<PG_LEVEL_2M)); | |
1829ae9a | 380 | pfn = end_pfn; |
f765090a PE |
381 | } |
382 | ||
383 | #ifdef CONFIG_X86_64 | |
384 | /* big page (1G) range */ | |
1829ae9a | 385 | start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE)); |
2e8059ed | 386 | end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE)); |
f765090a PE |
387 | if (start_pfn < end_pfn) { |
388 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, | |
389 | page_size_mask & | |
390 | ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G))); | |
1829ae9a | 391 | pfn = end_pfn; |
f765090a PE |
392 | } |
393 | ||
394 | /* tail is not big page (1G) alignment */ | |
1829ae9a | 395 | start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
2e8059ed | 396 | end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); |
f765090a PE |
397 | if (start_pfn < end_pfn) { |
398 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, | |
399 | page_size_mask & (1<<PG_LEVEL_2M)); | |
1829ae9a | 400 | pfn = end_pfn; |
f765090a PE |
401 | } |
402 | #endif | |
403 | ||
404 | /* tail is not big page (2M) alignment */ | |
1829ae9a | 405 | start_pfn = pfn; |
2e8059ed | 406 | end_pfn = limit_pfn; |
f765090a PE |
407 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); |
408 | ||
7de3d66b YL |
409 | if (!after_bootmem) |
410 | adjust_range_page_size_mask(mr, nr_range); | |
411 | ||
f765090a PE |
412 | /* try to merge same page size and continuous */ |
413 | for (i = 0; nr_range > 1 && i < nr_range - 1; i++) { | |
414 | unsigned long old_start; | |
415 | if (mr[i].end != mr[i+1].start || | |
416 | mr[i].page_size_mask != mr[i+1].page_size_mask) | |
417 | continue; | |
418 | /* move it */ | |
419 | old_start = mr[i].start; | |
420 | memmove(&mr[i], &mr[i+1], | |
421 | (nr_range - 1 - i) * sizeof(struct map_range)); | |
422 | mr[i--].start = old_start; | |
423 | nr_range--; | |
424 | } | |
425 | ||
426 | for (i = 0; i < nr_range; i++) | |
c9cdaeb2 | 427 | pr_debug(" [mem %#010lx-%#010lx] page %s\n", |
365811d6 | 428 | mr[i].start, mr[i].end - 1, |
f15e0518 | 429 | page_size_string(&mr[i])); |
f765090a | 430 | |
4e33e065 YL |
431 | return nr_range; |
432 | } | |
433 | ||
08b46d5d | 434 | struct range pfn_mapped[E820_MAX_ENTRIES]; |
0e691cf8 | 435 | int nr_pfn_mapped; |
66520ebc JS |
436 | |
437 | static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn) | |
438 | { | |
08b46d5d | 439 | nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES, |
66520ebc | 440 | nr_pfn_mapped, start_pfn, end_pfn); |
08b46d5d | 441 | nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES); |
66520ebc JS |
442 | |
443 | max_pfn_mapped = max(max_pfn_mapped, end_pfn); | |
444 | ||
445 | if (start_pfn < (1UL<<(32-PAGE_SHIFT))) | |
446 | max_low_pfn_mapped = max(max_low_pfn_mapped, | |
447 | min(end_pfn, 1UL<<(32-PAGE_SHIFT))); | |
448 | } | |
449 | ||
450 | bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn) | |
451 | { | |
452 | int i; | |
453 | ||
454 | for (i = 0; i < nr_pfn_mapped; i++) | |
455 | if ((start_pfn >= pfn_mapped[i].start) && | |
456 | (end_pfn <= pfn_mapped[i].end)) | |
457 | return true; | |
458 | ||
459 | return false; | |
460 | } | |
461 | ||
4e33e065 YL |
462 | /* |
463 | * Setup the direct mapping of the physical memory at PAGE_OFFSET. | |
464 | * This runs before bootmem is initialized and gets pages directly from | |
465 | * the physical memory. To access them they are temporarily mapped. | |
466 | */ | |
bd721ea7 | 467 | unsigned long __ref init_memory_mapping(unsigned long start, |
4e33e065 YL |
468 | unsigned long end) |
469 | { | |
470 | struct map_range mr[NR_RANGE_MR]; | |
471 | unsigned long ret = 0; | |
472 | int nr_range, i; | |
473 | ||
c9cdaeb2 | 474 | pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n", |
4e33e065 YL |
475 | start, end - 1); |
476 | ||
477 | memset(mr, 0, sizeof(mr)); | |
478 | nr_range = split_mem_range(mr, 0, start, end); | |
479 | ||
f765090a PE |
480 | for (i = 0; i < nr_range; i++) |
481 | ret = kernel_physical_mapping_init(mr[i].start, mr[i].end, | |
482 | mr[i].page_size_mask); | |
f765090a | 483 | |
66520ebc JS |
484 | add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT); |
485 | ||
c14fa0b6 YL |
486 | return ret >> PAGE_SHIFT; |
487 | } | |
488 | ||
66520ebc | 489 | /* |
cf8b166d | 490 | * We need to iterate through the E820 memory map and create direct mappings |
09821ff1 | 491 | * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply |
cf8b166d ZY |
492 | * create direct mappings for all pfns from [0 to max_low_pfn) and |
493 | * [4GB to max_pfn) because of possible memory holes in high addresses | |
494 | * that cannot be marked as UC by fixed/variable range MTRRs. | |
495 | * Depending on the alignment of E820 ranges, this may possibly result | |
496 | * in using smaller size (i.e. 4K instead of 2M or 1G) page tables. | |
497 | * | |
498 | * init_mem_mapping() calls init_range_memory_mapping() with big range. | |
499 | * That range would have hole in the middle or ends, and only ram parts | |
500 | * will be mapped in init_range_memory_mapping(). | |
66520ebc | 501 | */ |
8d57470d | 502 | static unsigned long __init init_range_memory_mapping( |
b8fd39c0 YL |
503 | unsigned long r_start, |
504 | unsigned long r_end) | |
66520ebc JS |
505 | { |
506 | unsigned long start_pfn, end_pfn; | |
8d57470d | 507 | unsigned long mapped_ram_size = 0; |
66520ebc JS |
508 | int i; |
509 | ||
66520ebc | 510 | for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) { |
b8fd39c0 YL |
511 | u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end); |
512 | u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end); | |
513 | if (start >= end) | |
66520ebc JS |
514 | continue; |
515 | ||
c9b3234a YL |
516 | /* |
517 | * if it is overlapping with brk pgt, we need to | |
518 | * alloc pgt buf from memblock instead. | |
519 | */ | |
520 | can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >= | |
521 | min(end, (u64)pgt_buf_top<<PAGE_SHIFT); | |
f763ad1d | 522 | init_memory_mapping(start, end); |
8d57470d | 523 | mapped_ram_size += end - start; |
c9b3234a | 524 | can_use_brk_pgt = true; |
66520ebc | 525 | } |
8d57470d YL |
526 | |
527 | return mapped_ram_size; | |
66520ebc JS |
528 | } |
529 | ||
6979287a YL |
530 | static unsigned long __init get_new_step_size(unsigned long step_size) |
531 | { | |
532 | /* | |
132978b9 | 533 | * Initial mapped size is PMD_SIZE (2M). |
6979287a YL |
534 | * We can not set step_size to be PUD_SIZE (1G) yet. |
535 | * In worse case, when we cross the 1G boundary, and | |
536 | * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k) | |
132978b9 JB |
537 | * to map 1G range with PTE. Hence we use one less than the |
538 | * difference of page table level shifts. | |
6979287a | 539 | * |
132978b9 JB |
540 | * Don't need to worry about overflow in the top-down case, on 32bit, |
541 | * when step_size is 0, round_down() returns 0 for start, and that | |
542 | * turns it into 0x100000000ULL. | |
543 | * In the bottom-up case, round_up(x, 0) returns 0 though too, which | |
544 | * needs to be taken into consideration by the code below. | |
6979287a | 545 | */ |
132978b9 | 546 | return step_size << (PMD_SHIFT - PAGE_SHIFT - 1); |
6979287a YL |
547 | } |
548 | ||
0167d7d8 TC |
549 | /** |
550 | * memory_map_top_down - Map [map_start, map_end) top down | |
551 | * @map_start: start address of the target memory range | |
552 | * @map_end: end address of the target memory range | |
553 | * | |
554 | * This function will setup direct mapping for memory range | |
555 | * [map_start, map_end) in top-down. That said, the page tables | |
556 | * will be allocated at the end of the memory, and we map the | |
557 | * memory in top-down. | |
558 | */ | |
559 | static void __init memory_map_top_down(unsigned long map_start, | |
560 | unsigned long map_end) | |
c14fa0b6 | 561 | { |
0167d7d8 | 562 | unsigned long real_end, start, last_start; |
8d57470d YL |
563 | unsigned long step_size; |
564 | unsigned long addr; | |
565 | unsigned long mapped_ram_size = 0; | |
ab951937 | 566 | |
98e7a989 | 567 | /* xen has big range in reserved near end of ram, skip it at first.*/ |
0167d7d8 | 568 | addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE); |
8d57470d YL |
569 | real_end = addr + PMD_SIZE; |
570 | ||
571 | /* step_size need to be small so pgt_buf from BRK could cover it */ | |
572 | step_size = PMD_SIZE; | |
573 | max_pfn_mapped = 0; /* will get exact value next */ | |
574 | min_pfn_mapped = real_end >> PAGE_SHIFT; | |
575 | last_start = start = real_end; | |
cf8b166d ZY |
576 | |
577 | /* | |
578 | * We start from the top (end of memory) and go to the bottom. | |
579 | * The memblock_find_in_range() gets us a block of RAM from the | |
580 | * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages | |
581 | * for page table. | |
582 | */ | |
0167d7d8 | 583 | while (last_start > map_start) { |
8d57470d YL |
584 | if (last_start > step_size) { |
585 | start = round_down(last_start - 1, step_size); | |
0167d7d8 TC |
586 | if (start < map_start) |
587 | start = map_start; | |
8d57470d | 588 | } else |
0167d7d8 | 589 | start = map_start; |
132978b9 | 590 | mapped_ram_size += init_range_memory_mapping(start, |
8d57470d YL |
591 | last_start); |
592 | last_start = start; | |
593 | min_pfn_mapped = last_start >> PAGE_SHIFT; | |
132978b9 | 594 | if (mapped_ram_size >= step_size) |
6979287a | 595 | step_size = get_new_step_size(step_size); |
8d57470d YL |
596 | } |
597 | ||
0167d7d8 TC |
598 | if (real_end < map_end) |
599 | init_range_memory_mapping(real_end, map_end); | |
600 | } | |
601 | ||
b959ed6c TC |
602 | /** |
603 | * memory_map_bottom_up - Map [map_start, map_end) bottom up | |
604 | * @map_start: start address of the target memory range | |
605 | * @map_end: end address of the target memory range | |
606 | * | |
607 | * This function will setup direct mapping for memory range | |
608 | * [map_start, map_end) in bottom-up. Since we have limited the | |
609 | * bottom-up allocation above the kernel, the page tables will | |
610 | * be allocated just above the kernel and we map the memory | |
611 | * in [map_start, map_end) in bottom-up. | |
612 | */ | |
613 | static void __init memory_map_bottom_up(unsigned long map_start, | |
614 | unsigned long map_end) | |
615 | { | |
132978b9 | 616 | unsigned long next, start; |
b959ed6c TC |
617 | unsigned long mapped_ram_size = 0; |
618 | /* step_size need to be small so pgt_buf from BRK could cover it */ | |
619 | unsigned long step_size = PMD_SIZE; | |
620 | ||
621 | start = map_start; | |
622 | min_pfn_mapped = start >> PAGE_SHIFT; | |
623 | ||
624 | /* | |
625 | * We start from the bottom (@map_start) and go to the top (@map_end). | |
626 | * The memblock_find_in_range() gets us a block of RAM from the | |
627 | * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages | |
628 | * for page table. | |
629 | */ | |
630 | while (start < map_end) { | |
132978b9 | 631 | if (step_size && map_end - start > step_size) { |
b959ed6c TC |
632 | next = round_up(start + 1, step_size); |
633 | if (next > map_end) | |
634 | next = map_end; | |
132978b9 | 635 | } else { |
b959ed6c | 636 | next = map_end; |
132978b9 | 637 | } |
b959ed6c | 638 | |
132978b9 | 639 | mapped_ram_size += init_range_memory_mapping(start, next); |
b959ed6c TC |
640 | start = next; |
641 | ||
132978b9 | 642 | if (mapped_ram_size >= step_size) |
b959ed6c | 643 | step_size = get_new_step_size(step_size); |
b959ed6c TC |
644 | } |
645 | } | |
646 | ||
0167d7d8 TC |
647 | void __init init_mem_mapping(void) |
648 | { | |
649 | unsigned long end; | |
650 | ||
aa8c6248 | 651 | pti_check_boottime_disable(); |
0167d7d8 | 652 | probe_page_size_mask(); |
c7ad5ad2 | 653 | setup_pcid(); |
0167d7d8 TC |
654 | |
655 | #ifdef CONFIG_X86_64 | |
656 | end = max_pfn << PAGE_SHIFT; | |
657 | #else | |
658 | end = max_low_pfn << PAGE_SHIFT; | |
659 | #endif | |
660 | ||
661 | /* the ISA range is always mapped regardless of memory holes */ | |
662 | init_memory_mapping(0, ISA_END_ADDRESS); | |
663 | ||
b234e8a0 TG |
664 | /* Init the trampoline, possibly with KASLR memory offset */ |
665 | init_trampoline(); | |
666 | ||
b959ed6c TC |
667 | /* |
668 | * If the allocation is in bottom-up direction, we setup direct mapping | |
669 | * in bottom-up, otherwise we setup direct mapping in top-down. | |
670 | */ | |
671 | if (memblock_bottom_up()) { | |
672 | unsigned long kernel_end = __pa_symbol(_end); | |
673 | ||
674 | /* | |
675 | * we need two separate calls here. This is because we want to | |
676 | * allocate page tables above the kernel. So we first map | |
677 | * [kernel_end, end) to make memory above the kernel be mapped | |
678 | * as soon as possible. And then use page tables allocated above | |
679 | * the kernel to map [ISA_END_ADDRESS, kernel_end). | |
680 | */ | |
681 | memory_map_bottom_up(kernel_end, end); | |
682 | memory_map_bottom_up(ISA_END_ADDRESS, kernel_end); | |
683 | } else { | |
684 | memory_map_top_down(ISA_END_ADDRESS, end); | |
685 | } | |
8d57470d | 686 | |
f763ad1d YL |
687 | #ifdef CONFIG_X86_64 |
688 | if (max_pfn > max_low_pfn) { | |
689 | /* can we preseve max_low_pfn ?*/ | |
690 | max_low_pfn = max_pfn; | |
691 | } | |
719272c4 YL |
692 | #else |
693 | early_ioremap_page_table_range_init(); | |
8170e6be PA |
694 | #endif |
695 | ||
719272c4 YL |
696 | load_cr3(swapper_pg_dir); |
697 | __flush_tlb_all(); | |
719272c4 | 698 | |
f72e38e8 | 699 | x86_init.hyper.init_mem_mapping(); |
c138d811 | 700 | |
c14fa0b6 | 701 | early_memtest(0, max_pfn_mapped << PAGE_SHIFT); |
22ddfcaa | 702 | } |
e5b2bb55 | 703 | |
540aca06 PE |
704 | /* |
705 | * devmem_is_allowed() checks to see if /dev/mem access to a certain address | |
706 | * is valid. The argument is a physical page number. | |
707 | * | |
a4866aa8 KC |
708 | * On x86, access has to be given to the first megabyte of RAM because that |
709 | * area traditionally contains BIOS code and data regions used by X, dosemu, | |
710 | * and similar apps. Since they map the entire memory range, the whole range | |
711 | * must be allowed (for mapping), but any areas that would otherwise be | |
712 | * disallowed are flagged as being "zero filled" instead of rejected. | |
713 | * Access has to be given to non-kernel-ram areas as well, these contain the | |
714 | * PCI mmio resources as well as potential bios/acpi data regions. | |
540aca06 PE |
715 | */ |
716 | int devmem_is_allowed(unsigned long pagenr) | |
717 | { | |
2bdce744 DW |
718 | if (region_intersects(PFN_PHYS(pagenr), PAGE_SIZE, |
719 | IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE) | |
720 | != REGION_DISJOINT) { | |
a4866aa8 KC |
721 | /* |
722 | * For disallowed memory regions in the low 1MB range, | |
723 | * request that the page be shown as all zeros. | |
724 | */ | |
725 | if (pagenr < 256) | |
726 | return 2; | |
727 | ||
728 | return 0; | |
729 | } | |
730 | ||
731 | /* | |
732 | * This must follow RAM test, since System RAM is considered a | |
733 | * restricted resource under CONFIG_STRICT_IOMEM. | |
734 | */ | |
735 | if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) { | |
736 | /* Low 1MB bypasses iomem restrictions. */ | |
737 | if (pagenr < 256) | |
738 | return 1; | |
739 | ||
540aca06 | 740 | return 0; |
a4866aa8 KC |
741 | } |
742 | ||
743 | return 1; | |
540aca06 PE |
744 | } |
745 | ||
e5b2bb55 PE |
746 | void free_init_pages(char *what, unsigned long begin, unsigned long end) |
747 | { | |
c967da6a | 748 | unsigned long begin_aligned, end_aligned; |
e5b2bb55 | 749 | |
c967da6a YL |
750 | /* Make sure boundaries are page aligned */ |
751 | begin_aligned = PAGE_ALIGN(begin); | |
752 | end_aligned = end & PAGE_MASK; | |
753 | ||
754 | if (WARN_ON(begin_aligned != begin || end_aligned != end)) { | |
755 | begin = begin_aligned; | |
756 | end = end_aligned; | |
757 | } | |
758 | ||
759 | if (begin >= end) | |
e5b2bb55 PE |
760 | return; |
761 | ||
762 | /* | |
763 | * If debugging page accesses then do not free this memory but | |
764 | * mark them not present - any buggy init-section access will | |
765 | * create a kernel page fault: | |
766 | */ | |
a75e1f63 CB |
767 | if (debug_pagealloc_enabled()) { |
768 | pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n", | |
769 | begin, end - 1); | |
770 | set_memory_np(begin, (end - begin) >> PAGE_SHIFT); | |
771 | } else { | |
772 | /* | |
773 | * We just marked the kernel text read only above, now that | |
774 | * we are going to free part of that, we need to make that | |
775 | * writeable and non-executable first. | |
776 | */ | |
777 | set_memory_nx(begin, (end - begin) >> PAGE_SHIFT); | |
778 | set_memory_rw(begin, (end - begin) >> PAGE_SHIFT); | |
e5b2bb55 | 779 | |
a75e1f63 CB |
780 | free_reserved_area((void *)begin, (void *)end, |
781 | POISON_FREE_INITMEM, what); | |
782 | } | |
e5b2bb55 PE |
783 | } |
784 | ||
6ea2738e DH |
785 | /* |
786 | * begin/end can be in the direct map or the "high kernel mapping" | |
787 | * used for the kernel image only. free_init_pages() will do the | |
788 | * right thing for either kind of address. | |
789 | */ | |
790 | void free_kernel_image_pages(void *begin, void *end) | |
791 | { | |
c40a56a7 DH |
792 | unsigned long begin_ul = (unsigned long)begin; |
793 | unsigned long end_ul = (unsigned long)end; | |
794 | unsigned long len_pages = (end_ul - begin_ul) >> PAGE_SHIFT; | |
795 | ||
796 | ||
797 | free_init_pages("unused kernel image", begin_ul, end_ul); | |
798 | ||
799 | /* | |
800 | * PTI maps some of the kernel into userspace. For performance, | |
801 | * this includes some kernel areas that do not contain secrets. | |
802 | * Those areas might be adjacent to the parts of the kernel image | |
803 | * being freed, which may contain secrets. Remove the "high kernel | |
804 | * image mapping" for these freed areas, ensuring they are not even | |
805 | * potentially vulnerable to Meltdown regardless of the specific | |
806 | * optimizations PTI is currently using. | |
807 | * | |
808 | * The "noalias" prevents unmapping the direct map alias which is | |
809 | * needed to access the freed pages. | |
810 | * | |
811 | * This is only valid for 64bit kernels. 32bit has only one mapping | |
812 | * which can't be treated in this way for obvious reasons. | |
813 | */ | |
814 | if (IS_ENABLED(CONFIG_X86_64) && cpu_feature_enabled(X86_FEATURE_PTI)) | |
815 | set_memory_np_noalias(begin_ul, len_pages); | |
6ea2738e DH |
816 | } |
817 | ||
18278229 | 818 | void __ref free_initmem(void) |
e5b2bb55 | 819 | { |
0c6fc11a | 820 | e820__reallocate_tables(); |
47533968 | 821 | |
6ea2738e | 822 | free_kernel_image_pages(&__init_begin, &__init_end); |
e5b2bb55 | 823 | } |
731ddea6 PE |
824 | |
825 | #ifdef CONFIG_BLK_DEV_INITRD | |
0d26d1d8 | 826 | void __init free_initrd_mem(unsigned long start, unsigned long end) |
731ddea6 | 827 | { |
c967da6a YL |
828 | /* |
829 | * end could be not aligned, and We can not align that, | |
830 | * decompresser could be confused by aligned initrd_end | |
831 | * We already reserve the end partial page before in | |
832 | * - i386_start_kernel() | |
833 | * - x86_64_start_kernel() | |
834 | * - relocate_initrd() | |
835 | * So here We can do PAGE_ALIGN() safely to get partial page to be freed | |
836 | */ | |
c88442ec | 837 | free_init_pages("initrd", start, PAGE_ALIGN(end)); |
731ddea6 PE |
838 | } |
839 | #endif | |
17623915 | 840 | |
4270fd8b IM |
841 | /* |
842 | * Calculate the precise size of the DMA zone (first 16 MB of RAM), | |
843 | * and pass it to the MM layer - to help it set zone watermarks more | |
844 | * accurately. | |
845 | * | |
846 | * Done on 64-bit systems only for the time being, although 32-bit systems | |
847 | * might benefit from this as well. | |
848 | */ | |
849 | void __init memblock_find_dma_reserve(void) | |
850 | { | |
851 | #ifdef CONFIG_X86_64 | |
852 | u64 nr_pages = 0, nr_free_pages = 0; | |
853 | unsigned long start_pfn, end_pfn; | |
854 | phys_addr_t start_addr, end_addr; | |
855 | int i; | |
856 | u64 u; | |
857 | ||
858 | /* | |
859 | * Iterate over all memory ranges (free and reserved ones alike), | |
860 | * to calculate the total number of pages in the first 16 MB of RAM: | |
861 | */ | |
862 | nr_pages = 0; | |
863 | for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) { | |
864 | start_pfn = min(start_pfn, MAX_DMA_PFN); | |
865 | end_pfn = min(end_pfn, MAX_DMA_PFN); | |
866 | ||
867 | nr_pages += end_pfn - start_pfn; | |
868 | } | |
869 | ||
870 | /* | |
871 | * Iterate over free memory ranges to calculate the number of free | |
872 | * pages in the DMA zone, while not counting potential partial | |
873 | * pages at the beginning or the end of the range: | |
874 | */ | |
875 | nr_free_pages = 0; | |
876 | for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &start_addr, &end_addr, NULL) { | |
877 | start_pfn = min_t(unsigned long, PFN_UP(start_addr), MAX_DMA_PFN); | |
878 | end_pfn = min_t(unsigned long, PFN_DOWN(end_addr), MAX_DMA_PFN); | |
879 | ||
880 | if (start_pfn < end_pfn) | |
881 | nr_free_pages += end_pfn - start_pfn; | |
882 | } | |
883 | ||
884 | set_dma_reserve(nr_pages - nr_free_pages); | |
885 | #endif | |
886 | } | |
887 | ||
17623915 PE |
888 | void __init zone_sizes_init(void) |
889 | { | |
890 | unsigned long max_zone_pfns[MAX_NR_ZONES]; | |
891 | ||
892 | memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); | |
893 | ||
894 | #ifdef CONFIG_ZONE_DMA | |
c072b90c | 895 | max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn); |
17623915 PE |
896 | #endif |
897 | #ifdef CONFIG_ZONE_DMA32 | |
c072b90c | 898 | max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn); |
17623915 PE |
899 | #endif |
900 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | |
901 | #ifdef CONFIG_HIGHMEM | |
902 | max_zone_pfns[ZONE_HIGHMEM] = max_pfn; | |
903 | #endif | |
904 | ||
905 | free_area_init_nodes(max_zone_pfns); | |
906 | } | |
907 | ||
6fd166aa | 908 | __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { |
3d28ebce | 909 | .loaded_mm = &init_mm, |
10af6235 | 910 | .next_asid = 1, |
1e02ce4c AL |
911 | .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */ |
912 | }; | |
1e547681 | 913 | EXPORT_PER_CPU_SYMBOL(cpu_tlbstate); |
1e02ce4c | 914 | |
bd809af1 JG |
915 | void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache) |
916 | { | |
917 | /* entry 0 MUST be WB (hardwired to speed up translations) */ | |
918 | BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB); | |
919 | ||
920 | __cachemode2pte_tbl[cache] = __cm_idx2pte(entry); | |
921 | __pte2cachemode_tbl[entry] = cache; | |
922 | } | |
377eeaa8 | 923 | |
792adb90 | 924 | #ifdef CONFIG_SWAP |
377eeaa8 AK |
925 | unsigned long max_swapfile_size(void) |
926 | { | |
927 | unsigned long pages; | |
928 | ||
929 | pages = generic_max_swapfile_size(); | |
930 | ||
931 | if (boot_cpu_has_bug(X86_BUG_L1TF)) { | |
932 | /* Limit the swap file size to MAX_PA/2 for L1TF workaround */ | |
b0a182f8 | 933 | unsigned long long l1tf_limit = l1tf_pfn_limit(); |
1a7ed1ba VB |
934 | /* |
935 | * We encode swap offsets also with 3 bits below those for pfn | |
936 | * which makes the usable limit higher. | |
937 | */ | |
0d0f6249 | 938 | #if CONFIG_PGTABLE_LEVELS > 2 |
1a7ed1ba VB |
939 | l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT; |
940 | #endif | |
9df95169 | 941 | pages = min_t(unsigned long long, l1tf_limit, pages); |
377eeaa8 AK |
942 | } |
943 | return pages; | |
944 | } | |
792adb90 | 945 | #endif |