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init.h: Clean up the __setup()/early_param() macros
[mirror_ubuntu-artful-kernel.git] / arch / x86 / mm / init.c
CommitLineData
5a0e3ad6 1#include <linux/gfp.h>
2c1b284e 2#include <linux/initrd.h>
540aca06 3#include <linux/ioport.h>
e5b2bb55 4#include <linux/swap.h>
a9ce6bc1 5#include <linux/memblock.h>
17623915 6#include <linux/bootmem.h> /* for max_low_pfn */
540aca06 7
e5b2bb55 8#include <asm/cacheflush.h>
f765090a 9#include <asm/e820.h>
4fcb2083 10#include <asm/init.h>
e5b2bb55 11#include <asm/page.h>
540aca06 12#include <asm/page_types.h>
e5b2bb55 13#include <asm/sections.h>
49834396 14#include <asm/setup.h>
f765090a 15#include <asm/tlbflush.h>
9518e0e4 16#include <asm/tlb.h>
76c06927 17#include <asm/proto.h>
17623915 18#include <asm/dma.h> /* for MAX_DMA_PFN */
cd745be8 19#include <asm/microcode.h>
9518e0e4 20
d17d8f9d
DH
21/*
22 * We need to define the tracepoints somewhere, and tlb.c
23 * is only compied when SMP=y.
24 */
25#define CREATE_TRACE_POINTS
26#include <trace/events/tlb.h>
27
5c51bdbe
YL
28#include "mm_internal.h"
29
281d4078
JG
30/*
31 * Tables translating between page_cache_type_t and pte encoding.
32 * Minimal supported modes are defined statically, modified if more supported
33 * cache modes are available.
34 * Index into __cachemode2pte_tbl is the cachemode.
35 * Index into __pte2cachemode_tbl are the caching attribute bits of the pte
36 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
37 */
38uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
39 [_PAGE_CACHE_MODE_WB] = 0,
40 [_PAGE_CACHE_MODE_WC] = _PAGE_PWT,
41 [_PAGE_CACHE_MODE_UC_MINUS] = _PAGE_PCD,
42 [_PAGE_CACHE_MODE_UC] = _PAGE_PCD | _PAGE_PWT,
43 [_PAGE_CACHE_MODE_WT] = _PAGE_PCD,
44 [_PAGE_CACHE_MODE_WP] = _PAGE_PCD,
45};
31bb7723 46EXPORT_SYMBOL(__cachemode2pte_tbl);
281d4078
JG
47uint8_t __pte2cachemode_tbl[8] = {
48 [__pte2cm_idx(0)] = _PAGE_CACHE_MODE_WB,
49 [__pte2cm_idx(_PAGE_PWT)] = _PAGE_CACHE_MODE_WC,
50 [__pte2cm_idx(_PAGE_PCD)] = _PAGE_CACHE_MODE_UC_MINUS,
51 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD)] = _PAGE_CACHE_MODE_UC,
52 [__pte2cm_idx(_PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
53 [__pte2cm_idx(_PAGE_PWT | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
54 [__pte2cm_idx(_PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
55 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
56};
31bb7723 57EXPORT_SYMBOL(__pte2cachemode_tbl);
281d4078 58
cf470659
YL
59static unsigned long __initdata pgt_buf_start;
60static unsigned long __initdata pgt_buf_end;
61static unsigned long __initdata pgt_buf_top;
f765090a 62
9985b4c6
YL
63static unsigned long min_pfn_mapped;
64
c9b3234a
YL
65static bool __initdata can_use_brk_pgt = true;
66
ddd3509d
SS
67/*
68 * Pages returned are already directly mapped.
69 *
70 * Changing that is likely to break Xen, see commit:
71 *
72 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
73 *
74 * for detailed information.
75 */
22c8ca2a 76__ref void *alloc_low_pages(unsigned int num)
5c51bdbe
YL
77{
78 unsigned long pfn;
22c8ca2a 79 int i;
5c51bdbe 80
5c51bdbe 81 if (after_bootmem) {
22c8ca2a 82 unsigned int order;
5c51bdbe 83
22c8ca2a
YL
84 order = get_order((unsigned long)num << PAGE_SHIFT);
85 return (void *)__get_free_pages(GFP_ATOMIC | __GFP_NOTRACK |
86 __GFP_ZERO, order);
5c51bdbe 87 }
5c51bdbe 88
c9b3234a 89 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
5c51bdbe
YL
90 unsigned long ret;
91 if (min_pfn_mapped >= max_pfn_mapped)
d4dd100f 92 panic("alloc_low_pages: ran out of memory");
5c51bdbe
YL
93 ret = memblock_find_in_range(min_pfn_mapped << PAGE_SHIFT,
94 max_pfn_mapped << PAGE_SHIFT,
22c8ca2a 95 PAGE_SIZE * num , PAGE_SIZE);
5c51bdbe 96 if (!ret)
d4dd100f 97 panic("alloc_low_pages: can not alloc memory");
22c8ca2a 98 memblock_reserve(ret, PAGE_SIZE * num);
5c51bdbe 99 pfn = ret >> PAGE_SHIFT;
22c8ca2a
YL
100 } else {
101 pfn = pgt_buf_end;
102 pgt_buf_end += num;
c9b3234a
YL
103 printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n",
104 pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1);
22c8ca2a
YL
105 }
106
107 for (i = 0; i < num; i++) {
108 void *adr;
109
110 adr = __va((pfn + i) << PAGE_SHIFT);
111 clear_page(adr);
112 }
5c51bdbe 113
22c8ca2a 114 return __va(pfn << PAGE_SHIFT);
5c51bdbe
YL
115}
116
527bf129
YL
117/* need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS */
118#define INIT_PGT_BUF_SIZE (6 * PAGE_SIZE)
8d57470d
YL
119RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
120void __init early_alloc_pgt_buf(void)
121{
122 unsigned long tables = INIT_PGT_BUF_SIZE;
123 phys_addr_t base;
124
125 base = __pa(extend_brk(tables, PAGE_SIZE));
126
127 pgt_buf_start = base >> PAGE_SHIFT;
128 pgt_buf_end = pgt_buf_start;
129 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
130}
131
f765090a
PE
132int after_bootmem;
133
10971ab2 134early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
f765090a 135
844ab6f9
JS
136struct map_range {
137 unsigned long start;
138 unsigned long end;
139 unsigned page_size_mask;
140};
141
e61980a7
IM
142static int page_size_mask;
143
22ddfcaa 144static void __init probe_page_size_mask(void)
fa62aafe
YL
145{
146#if !defined(CONFIG_DEBUG_PAGEALLOC) && !defined(CONFIG_KMEMCHECK)
147 /*
148 * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
149 * This will simplify cpa(), which otherwise needs to support splitting
150 * large pages into small in interrupt context, etc.
151 */
fa62aafe
YL
152 if (cpu_has_pse)
153 page_size_mask |= 1 << PG_LEVEL_2M;
154#endif
155
156 /* Enable PSE if available */
157 if (cpu_has_pse)
375074cc 158 cr4_set_bits_and_update_boot(X86_CR4_PSE);
fa62aafe
YL
159
160 /* Enable PGE if available */
161 if (cpu_has_pge) {
375074cc 162 cr4_set_bits_and_update_boot(X86_CR4_PGE);
fa62aafe
YL
163 __supported_pte_mask |= _PAGE_GLOBAL;
164 }
e61980a7
IM
165
166 /* Enable 1 GB linear kernel mappings if available: */
167 if (direct_gbpages && cpu_has_gbpages) {
168 printk(KERN_INFO "Using GB pages for direct mapping\n");
169 page_size_mask |= 1 << PG_LEVEL_1G;
170 } else {
171 direct_gbpages = 0;
172 }
fa62aafe 173}
279b706b 174
f765090a
PE
175#ifdef CONFIG_X86_32
176#define NR_RANGE_MR 3
177#else /* CONFIG_X86_64 */
178#define NR_RANGE_MR 5
179#endif
180
dc9dd5cc
JB
181static int __meminit save_mr(struct map_range *mr, int nr_range,
182 unsigned long start_pfn, unsigned long end_pfn,
183 unsigned long page_size_mask)
f765090a
PE
184{
185 if (start_pfn < end_pfn) {
186 if (nr_range >= NR_RANGE_MR)
187 panic("run out of range for init_memory_mapping\n");
188 mr[nr_range].start = start_pfn<<PAGE_SHIFT;
189 mr[nr_range].end = end_pfn<<PAGE_SHIFT;
190 mr[nr_range].page_size_mask = page_size_mask;
191 nr_range++;
192 }
193
194 return nr_range;
195}
196
aeebe84c
YL
197/*
198 * adjust the page_size_mask for small range to go with
199 * big page size instead small one if nearby are ram too.
200 */
201static void __init_refok adjust_range_page_size_mask(struct map_range *mr,
202 int nr_range)
203{
204 int i;
205
206 for (i = 0; i < nr_range; i++) {
207 if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
208 !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
209 unsigned long start = round_down(mr[i].start, PMD_SIZE);
210 unsigned long end = round_up(mr[i].end, PMD_SIZE);
211
212#ifdef CONFIG_X86_32
213 if ((end >> PAGE_SHIFT) > max_low_pfn)
214 continue;
215#endif
216
217 if (memblock_is_region_memory(start, end - start))
218 mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
219 }
220 if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
221 !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
222 unsigned long start = round_down(mr[i].start, PUD_SIZE);
223 unsigned long end = round_up(mr[i].end, PUD_SIZE);
224
225 if (memblock_is_region_memory(start, end - start))
226 mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
227 }
228 }
229}
230
f15e0518
DH
231static const char *page_size_string(struct map_range *mr)
232{
233 static const char str_1g[] = "1G";
234 static const char str_2m[] = "2M";
235 static const char str_4m[] = "4M";
236 static const char str_4k[] = "4k";
237
238 if (mr->page_size_mask & (1<<PG_LEVEL_1G))
239 return str_1g;
240 /*
241 * 32-bit without PAE has a 4M large page size.
242 * PG_LEVEL_2M is misnamed, but we can at least
243 * print out the right size in the string.
244 */
245 if (IS_ENABLED(CONFIG_X86_32) &&
246 !IS_ENABLED(CONFIG_X86_PAE) &&
247 mr->page_size_mask & (1<<PG_LEVEL_2M))
248 return str_4m;
249
250 if (mr->page_size_mask & (1<<PG_LEVEL_2M))
251 return str_2m;
252
253 return str_4k;
254}
255
4e33e065
YL
256static int __meminit split_mem_range(struct map_range *mr, int nr_range,
257 unsigned long start,
258 unsigned long end)
f765090a 259{
2e8059ed 260 unsigned long start_pfn, end_pfn, limit_pfn;
1829ae9a 261 unsigned long pfn;
4e33e065 262 int i;
f765090a 263
2e8059ed
YL
264 limit_pfn = PFN_DOWN(end);
265
f765090a 266 /* head if not big page alignment ? */
1829ae9a 267 pfn = start_pfn = PFN_DOWN(start);
f765090a
PE
268#ifdef CONFIG_X86_32
269 /*
270 * Don't use a large page for the first 2/4MB of memory
271 * because there are often fixed size MTRRs in there
272 * and overlapping MTRRs into large pages can cause
273 * slowdowns.
274 */
1829ae9a 275 if (pfn == 0)
84d77001 276 end_pfn = PFN_DOWN(PMD_SIZE);
f765090a 277 else
1829ae9a 278 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
f765090a 279#else /* CONFIG_X86_64 */
1829ae9a 280 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
f765090a 281#endif
2e8059ed
YL
282 if (end_pfn > limit_pfn)
283 end_pfn = limit_pfn;
f765090a
PE
284 if (start_pfn < end_pfn) {
285 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
1829ae9a 286 pfn = end_pfn;
f765090a
PE
287 }
288
289 /* big page (2M) range */
1829ae9a 290 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
f765090a 291#ifdef CONFIG_X86_32
2e8059ed 292 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
f765090a 293#else /* CONFIG_X86_64 */
1829ae9a 294 end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
2e8059ed
YL
295 if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
296 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
f765090a
PE
297#endif
298
299 if (start_pfn < end_pfn) {
300 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
301 page_size_mask & (1<<PG_LEVEL_2M));
1829ae9a 302 pfn = end_pfn;
f765090a
PE
303 }
304
305#ifdef CONFIG_X86_64
306 /* big page (1G) range */
1829ae9a 307 start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
2e8059ed 308 end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
f765090a
PE
309 if (start_pfn < end_pfn) {
310 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
311 page_size_mask &
312 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
1829ae9a 313 pfn = end_pfn;
f765090a
PE
314 }
315
316 /* tail is not big page (1G) alignment */
1829ae9a 317 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
2e8059ed 318 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
f765090a
PE
319 if (start_pfn < end_pfn) {
320 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
321 page_size_mask & (1<<PG_LEVEL_2M));
1829ae9a 322 pfn = end_pfn;
f765090a
PE
323 }
324#endif
325
326 /* tail is not big page (2M) alignment */
1829ae9a 327 start_pfn = pfn;
2e8059ed 328 end_pfn = limit_pfn;
f765090a
PE
329 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
330
7de3d66b
YL
331 if (!after_bootmem)
332 adjust_range_page_size_mask(mr, nr_range);
333
f765090a
PE
334 /* try to merge same page size and continuous */
335 for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
336 unsigned long old_start;
337 if (mr[i].end != mr[i+1].start ||
338 mr[i].page_size_mask != mr[i+1].page_size_mask)
339 continue;
340 /* move it */
341 old_start = mr[i].start;
342 memmove(&mr[i], &mr[i+1],
343 (nr_range - 1 - i) * sizeof(struct map_range));
344 mr[i--].start = old_start;
345 nr_range--;
346 }
347
348 for (i = 0; i < nr_range; i++)
365811d6
BH
349 printk(KERN_DEBUG " [mem %#010lx-%#010lx] page %s\n",
350 mr[i].start, mr[i].end - 1,
f15e0518 351 page_size_string(&mr[i]));
f765090a 352
4e33e065
YL
353 return nr_range;
354}
355
0e691cf8
YL
356struct range pfn_mapped[E820_X_MAX];
357int nr_pfn_mapped;
66520ebc
JS
358
359static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
360{
361 nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_X_MAX,
362 nr_pfn_mapped, start_pfn, end_pfn);
363 nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_X_MAX);
364
365 max_pfn_mapped = max(max_pfn_mapped, end_pfn);
366
367 if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
368 max_low_pfn_mapped = max(max_low_pfn_mapped,
369 min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
370}
371
372bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
373{
374 int i;
375
376 for (i = 0; i < nr_pfn_mapped; i++)
377 if ((start_pfn >= pfn_mapped[i].start) &&
378 (end_pfn <= pfn_mapped[i].end))
379 return true;
380
381 return false;
382}
383
4e33e065
YL
384/*
385 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
386 * This runs before bootmem is initialized and gets pages directly from
387 * the physical memory. To access them they are temporarily mapped.
388 */
389unsigned long __init_refok init_memory_mapping(unsigned long start,
390 unsigned long end)
391{
392 struct map_range mr[NR_RANGE_MR];
393 unsigned long ret = 0;
394 int nr_range, i;
395
396 pr_info("init_memory_mapping: [mem %#010lx-%#010lx]\n",
397 start, end - 1);
398
399 memset(mr, 0, sizeof(mr));
400 nr_range = split_mem_range(mr, 0, start, end);
401
f765090a
PE
402 for (i = 0; i < nr_range; i++)
403 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
404 mr[i].page_size_mask);
f765090a 405
66520ebc
JS
406 add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
407
c14fa0b6
YL
408 return ret >> PAGE_SHIFT;
409}
410
66520ebc 411/*
cf8b166d
ZY
412 * We need to iterate through the E820 memory map and create direct mappings
413 * for only E820_RAM and E820_KERN_RESERVED regions. We cannot simply
414 * create direct mappings for all pfns from [0 to max_low_pfn) and
415 * [4GB to max_pfn) because of possible memory holes in high addresses
416 * that cannot be marked as UC by fixed/variable range MTRRs.
417 * Depending on the alignment of E820 ranges, this may possibly result
418 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
419 *
420 * init_mem_mapping() calls init_range_memory_mapping() with big range.
421 * That range would have hole in the middle or ends, and only ram parts
422 * will be mapped in init_range_memory_mapping().
66520ebc 423 */
8d57470d 424static unsigned long __init init_range_memory_mapping(
b8fd39c0
YL
425 unsigned long r_start,
426 unsigned long r_end)
66520ebc
JS
427{
428 unsigned long start_pfn, end_pfn;
8d57470d 429 unsigned long mapped_ram_size = 0;
66520ebc
JS
430 int i;
431
66520ebc 432 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
b8fd39c0
YL
433 u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
434 u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
435 if (start >= end)
66520ebc
JS
436 continue;
437
c9b3234a
YL
438 /*
439 * if it is overlapping with brk pgt, we need to
440 * alloc pgt buf from memblock instead.
441 */
442 can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
443 min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
f763ad1d 444 init_memory_mapping(start, end);
8d57470d 445 mapped_ram_size += end - start;
c9b3234a 446 can_use_brk_pgt = true;
66520ebc 447 }
8d57470d
YL
448
449 return mapped_ram_size;
66520ebc
JS
450}
451
6979287a
YL
452static unsigned long __init get_new_step_size(unsigned long step_size)
453{
454 /*
132978b9 455 * Initial mapped size is PMD_SIZE (2M).
6979287a
YL
456 * We can not set step_size to be PUD_SIZE (1G) yet.
457 * In worse case, when we cross the 1G boundary, and
458 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
132978b9
JB
459 * to map 1G range with PTE. Hence we use one less than the
460 * difference of page table level shifts.
6979287a 461 *
132978b9
JB
462 * Don't need to worry about overflow in the top-down case, on 32bit,
463 * when step_size is 0, round_down() returns 0 for start, and that
464 * turns it into 0x100000000ULL.
465 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
466 * needs to be taken into consideration by the code below.
6979287a 467 */
132978b9 468 return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
6979287a
YL
469}
470
0167d7d8
TC
471/**
472 * memory_map_top_down - Map [map_start, map_end) top down
473 * @map_start: start address of the target memory range
474 * @map_end: end address of the target memory range
475 *
476 * This function will setup direct mapping for memory range
477 * [map_start, map_end) in top-down. That said, the page tables
478 * will be allocated at the end of the memory, and we map the
479 * memory in top-down.
480 */
481static void __init memory_map_top_down(unsigned long map_start,
482 unsigned long map_end)
c14fa0b6 483{
0167d7d8 484 unsigned long real_end, start, last_start;
8d57470d
YL
485 unsigned long step_size;
486 unsigned long addr;
487 unsigned long mapped_ram_size = 0;
ab951937 488
98e7a989 489 /* xen has big range in reserved near end of ram, skip it at first.*/
0167d7d8 490 addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
8d57470d
YL
491 real_end = addr + PMD_SIZE;
492
493 /* step_size need to be small so pgt_buf from BRK could cover it */
494 step_size = PMD_SIZE;
495 max_pfn_mapped = 0; /* will get exact value next */
496 min_pfn_mapped = real_end >> PAGE_SHIFT;
497 last_start = start = real_end;
cf8b166d
ZY
498
499 /*
500 * We start from the top (end of memory) and go to the bottom.
501 * The memblock_find_in_range() gets us a block of RAM from the
502 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
503 * for page table.
504 */
0167d7d8 505 while (last_start > map_start) {
8d57470d
YL
506 if (last_start > step_size) {
507 start = round_down(last_start - 1, step_size);
0167d7d8
TC
508 if (start < map_start)
509 start = map_start;
8d57470d 510 } else
0167d7d8 511 start = map_start;
132978b9 512 mapped_ram_size += init_range_memory_mapping(start,
8d57470d
YL
513 last_start);
514 last_start = start;
515 min_pfn_mapped = last_start >> PAGE_SHIFT;
132978b9 516 if (mapped_ram_size >= step_size)
6979287a 517 step_size = get_new_step_size(step_size);
8d57470d
YL
518 }
519
0167d7d8
TC
520 if (real_end < map_end)
521 init_range_memory_mapping(real_end, map_end);
522}
523
b959ed6c
TC
524/**
525 * memory_map_bottom_up - Map [map_start, map_end) bottom up
526 * @map_start: start address of the target memory range
527 * @map_end: end address of the target memory range
528 *
529 * This function will setup direct mapping for memory range
530 * [map_start, map_end) in bottom-up. Since we have limited the
531 * bottom-up allocation above the kernel, the page tables will
532 * be allocated just above the kernel and we map the memory
533 * in [map_start, map_end) in bottom-up.
534 */
535static void __init memory_map_bottom_up(unsigned long map_start,
536 unsigned long map_end)
537{
132978b9 538 unsigned long next, start;
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TC
539 unsigned long mapped_ram_size = 0;
540 /* step_size need to be small so pgt_buf from BRK could cover it */
541 unsigned long step_size = PMD_SIZE;
542
543 start = map_start;
544 min_pfn_mapped = start >> PAGE_SHIFT;
545
546 /*
547 * We start from the bottom (@map_start) and go to the top (@map_end).
548 * The memblock_find_in_range() gets us a block of RAM from the
549 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
550 * for page table.
551 */
552 while (start < map_end) {
132978b9 553 if (step_size && map_end - start > step_size) {
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TC
554 next = round_up(start + 1, step_size);
555 if (next > map_end)
556 next = map_end;
132978b9 557 } else {
b959ed6c 558 next = map_end;
132978b9 559 }
b959ed6c 560
132978b9 561 mapped_ram_size += init_range_memory_mapping(start, next);
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TC
562 start = next;
563
132978b9 564 if (mapped_ram_size >= step_size)
b959ed6c 565 step_size = get_new_step_size(step_size);
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TC
566 }
567}
568
0167d7d8
TC
569void __init init_mem_mapping(void)
570{
571 unsigned long end;
572
573 probe_page_size_mask();
574
575#ifdef CONFIG_X86_64
576 end = max_pfn << PAGE_SHIFT;
577#else
578 end = max_low_pfn << PAGE_SHIFT;
579#endif
580
581 /* the ISA range is always mapped regardless of memory holes */
582 init_memory_mapping(0, ISA_END_ADDRESS);
583
b959ed6c
TC
584 /*
585 * If the allocation is in bottom-up direction, we setup direct mapping
586 * in bottom-up, otherwise we setup direct mapping in top-down.
587 */
588 if (memblock_bottom_up()) {
589 unsigned long kernel_end = __pa_symbol(_end);
590
591 /*
592 * we need two separate calls here. This is because we want to
593 * allocate page tables above the kernel. So we first map
594 * [kernel_end, end) to make memory above the kernel be mapped
595 * as soon as possible. And then use page tables allocated above
596 * the kernel to map [ISA_END_ADDRESS, kernel_end).
597 */
598 memory_map_bottom_up(kernel_end, end);
599 memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
600 } else {
601 memory_map_top_down(ISA_END_ADDRESS, end);
602 }
8d57470d 603
f763ad1d
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604#ifdef CONFIG_X86_64
605 if (max_pfn > max_low_pfn) {
606 /* can we preseve max_low_pfn ?*/
607 max_low_pfn = max_pfn;
608 }
719272c4
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609#else
610 early_ioremap_page_table_range_init();
8170e6be
PA
611#endif
612
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613 load_cr3(swapper_pg_dir);
614 __flush_tlb_all();
719272c4 615
c14fa0b6 616 early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
22ddfcaa 617}
e5b2bb55 618
540aca06
PE
619/*
620 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
621 * is valid. The argument is a physical page number.
622 *
623 *
624 * On x86, access has to be given to the first megabyte of ram because that area
801a5591 625 * contains BIOS code and data regions used by X and dosemu and similar apps.
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PE
626 * Access has to be given to non-kernel-ram areas as well, these contain the PCI
627 * mmio resources as well as potential bios/acpi data regions.
628 */
629int devmem_is_allowed(unsigned long pagenr)
630{
73e8f3d7 631 if (pagenr < 256)
540aca06
PE
632 return 1;
633 if (iomem_is_exclusive(pagenr << PAGE_SHIFT))
634 return 0;
635 if (!page_is_ram(pagenr))
636 return 1;
637 return 0;
638}
639
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PE
640void free_init_pages(char *what, unsigned long begin, unsigned long end)
641{
c967da6a 642 unsigned long begin_aligned, end_aligned;
e5b2bb55 643
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YL
644 /* Make sure boundaries are page aligned */
645 begin_aligned = PAGE_ALIGN(begin);
646 end_aligned = end & PAGE_MASK;
647
648 if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
649 begin = begin_aligned;
650 end = end_aligned;
651 }
652
653 if (begin >= end)
e5b2bb55
PE
654 return;
655
656 /*
657 * If debugging page accesses then do not free this memory but
658 * mark them not present - any buggy init-section access will
659 * create a kernel page fault:
660 */
661#ifdef CONFIG_DEBUG_PAGEALLOC
365811d6
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662 printk(KERN_INFO "debug: unmapping init [mem %#010lx-%#010lx]\n",
663 begin, end - 1);
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PE
664 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
665#else
666 /*
667 * We just marked the kernel text read only above, now that
668 * we are going to free part of that, we need to make that
5bd5a452 669 * writeable and non-executable first.
e5b2bb55 670 */
5bd5a452 671 set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
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PE
672 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
673
c88442ec 674 free_reserved_area((void *)begin, (void *)end, POISON_FREE_INITMEM, what);
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PE
675#endif
676}
677
678void free_initmem(void)
679{
c88442ec 680 free_init_pages("unused kernel",
e5b2bb55
PE
681 (unsigned long)(&__init_begin),
682 (unsigned long)(&__init_end));
683}
731ddea6
PE
684
685#ifdef CONFIG_BLK_DEV_INITRD
0d26d1d8 686void __init free_initrd_mem(unsigned long start, unsigned long end)
731ddea6 687{
cd745be8
FY
688#ifdef CONFIG_MICROCODE_EARLY
689 /*
690 * Remember, initrd memory may contain microcode or other useful things.
691 * Before we lose initrd mem, we need to find a place to hold them
692 * now that normal virtual memory is enabled.
693 */
694 save_microcode_in_initrd();
695#endif
696
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697 /*
698 * end could be not aligned, and We can not align that,
699 * decompresser could be confused by aligned initrd_end
700 * We already reserve the end partial page before in
701 * - i386_start_kernel()
702 * - x86_64_start_kernel()
703 * - relocate_initrd()
704 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
705 */
c88442ec 706 free_init_pages("initrd", start, PAGE_ALIGN(end));
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PE
707}
708#endif
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PE
709
710void __init zone_sizes_init(void)
711{
712 unsigned long max_zone_pfns[MAX_NR_ZONES];
713
714 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
715
716#ifdef CONFIG_ZONE_DMA
c072b90c 717 max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
17623915
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718#endif
719#ifdef CONFIG_ZONE_DMA32
c072b90c 720 max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
17623915
PE
721#endif
722 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
723#ifdef CONFIG_HIGHMEM
724 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
725#endif
726
727 free_area_init_nodes(max_zone_pfns);
728}
729
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730DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
731#ifdef CONFIG_SMP
732 .active_mm = &init_mm,
733 .state = 0,
734#endif
735 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
736};
737EXPORT_SYMBOL_GPL(cpu_tlbstate);
738
bd809af1
JG
739void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
740{
741 /* entry 0 MUST be WB (hardwired to speed up translations) */
742 BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
743
744 __cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
745 __pte2cachemode_tbl[entry] = cache;
746}