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457c8996 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * linux/arch/x86_64/mm/init.c | |
4 | * | |
5 | * Copyright (C) 1995 Linus Torvalds | |
a2531293 | 6 | * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> |
1da177e4 LT |
7 | * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> |
8 | */ | |
9 | ||
1da177e4 LT |
10 | #include <linux/signal.h> |
11 | #include <linux/sched.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/mman.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/swap.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/init.h> | |
11034d55 | 22 | #include <linux/initrd.h> |
1da177e4 | 23 | #include <linux/pagemap.h> |
a9ce6bc1 | 24 | #include <linux/memblock.h> |
1da177e4 | 25 | #include <linux/proc_fs.h> |
59170891 | 26 | #include <linux/pci.h> |
6fb14755 | 27 | #include <linux/pfn.h> |
c9cf5528 | 28 | #include <linux/poison.h> |
17a941d8 | 29 | #include <linux/dma-mapping.h> |
a63fdc51 | 30 | #include <linux/memory.h> |
44df75e6 | 31 | #include <linux/memory_hotplug.h> |
4b94ffdc | 32 | #include <linux/memremap.h> |
ae32b129 | 33 | #include <linux/nmi.h> |
5a0e3ad6 | 34 | #include <linux/gfp.h> |
2f96b8c1 | 35 | #include <linux/kcore.h> |
426e5c42 | 36 | #include <linux/bootmem_info.h> |
1da177e4 LT |
37 | |
38 | #include <asm/processor.h> | |
46eaa670 | 39 | #include <asm/bios_ebda.h> |
7c0f6ba6 | 40 | #include <linux/uaccess.h> |
1da177e4 LT |
41 | #include <asm/pgalloc.h> |
42 | #include <asm/dma.h> | |
43 | #include <asm/fixmap.h> | |
66441bd3 | 44 | #include <asm/e820/api.h> |
1da177e4 LT |
45 | #include <asm/apic.h> |
46 | #include <asm/tlb.h> | |
47 | #include <asm/mmu_context.h> | |
48 | #include <asm/proto.h> | |
49 | #include <asm/smp.h> | |
2bc0414e | 50 | #include <asm/sections.h> |
718fc13b | 51 | #include <asm/kdebug.h> |
aaa64e04 | 52 | #include <asm/numa.h> |
d1163651 | 53 | #include <asm/set_memory.h> |
4fcb2083 | 54 | #include <asm/init.h> |
43c75f93 | 55 | #include <asm/uv/uv.h> |
e5f15b45 | 56 | #include <asm/setup.h> |
59566b0b | 57 | #include <asm/ftrace.h> |
1da177e4 | 58 | |
5c51bdbe YL |
59 | #include "mm_internal.h" |
60 | ||
cf4fb15b | 61 | #include "ident_map.c" |
aece2785 | 62 | |
eccd9064 BS |
63 | #define DEFINE_POPULATE(fname, type1, type2, init) \ |
64 | static inline void fname##_init(struct mm_struct *mm, \ | |
65 | type1##_t *arg1, type2##_t *arg2, bool init) \ | |
66 | { \ | |
67 | if (init) \ | |
68 | fname##_safe(mm, arg1, arg2); \ | |
69 | else \ | |
70 | fname(mm, arg1, arg2); \ | |
71 | } | |
72 | ||
73 | DEFINE_POPULATE(p4d_populate, p4d, pud, init) | |
74 | DEFINE_POPULATE(pgd_populate, pgd, p4d, init) | |
75 | DEFINE_POPULATE(pud_populate, pud, pmd, init) | |
76 | DEFINE_POPULATE(pmd_populate_kernel, pmd, pte, init) | |
77 | ||
78 | #define DEFINE_ENTRY(type1, type2, init) \ | |
79 | static inline void set_##type1##_init(type1##_t *arg1, \ | |
80 | type2##_t arg2, bool init) \ | |
81 | { \ | |
82 | if (init) \ | |
83 | set_##type1##_safe(arg1, arg2); \ | |
84 | else \ | |
85 | set_##type1(arg1, arg2); \ | |
86 | } | |
87 | ||
88 | DEFINE_ENTRY(p4d, p4d, init) | |
89 | DEFINE_ENTRY(pud, pud, init) | |
90 | DEFINE_ENTRY(pmd, pmd, init) | |
91 | DEFINE_ENTRY(pte, pte, init) | |
92 | ||
93 | ||
1da177e4 LT |
94 | /* |
95 | * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the | |
96 | * physical space so we can cache the place of the first one and move | |
97 | * around without checking the pgd every time. | |
98 | */ | |
99 | ||
8a57f484 | 100 | /* Bits supported by the hardware: */ |
f955371c | 101 | pteval_t __supported_pte_mask __read_mostly = ~0; |
8a57f484 DH |
102 | /* Bits allowed in normal kernel mappings: */ |
103 | pteval_t __default_kernel_pte_mask __read_mostly = ~0; | |
bd220a24 | 104 | EXPORT_SYMBOL_GPL(__supported_pte_mask); |
8a57f484 DH |
105 | /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */ |
106 | EXPORT_SYMBOL(__default_kernel_pte_mask); | |
bd220a24 | 107 | |
bd220a24 YL |
108 | int force_personality32; |
109 | ||
deed05b7 IM |
110 | /* |
111 | * noexec32=on|off | |
112 | * Control non executable heap for 32bit processes. | |
113 | * To control the stack too use noexec=off | |
114 | * | |
115 | * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) | |
116 | * off PROT_READ implies PROT_EXEC | |
117 | */ | |
bd220a24 YL |
118 | static int __init nonx32_setup(char *str) |
119 | { | |
120 | if (!strcmp(str, "on")) | |
121 | force_personality32 &= ~READ_IMPLIES_EXEC; | |
122 | else if (!strcmp(str, "off")) | |
123 | force_personality32 |= READ_IMPLIES_EXEC; | |
124 | return 1; | |
125 | } | |
126 | __setup("noexec32=", nonx32_setup); | |
127 | ||
91f606a8 | 128 | static void sync_global_pgds_l5(unsigned long start, unsigned long end) |
141efad7 KS |
129 | { |
130 | unsigned long addr; | |
131 | ||
132 | for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { | |
133 | const pgd_t *pgd_ref = pgd_offset_k(addr); | |
134 | struct page *page; | |
135 | ||
136 | /* Check for overflow */ | |
137 | if (addr < start) | |
138 | break; | |
139 | ||
140 | if (pgd_none(*pgd_ref)) | |
141 | continue; | |
142 | ||
143 | spin_lock(&pgd_lock); | |
144 | list_for_each_entry(page, &pgd_list, lru) { | |
145 | pgd_t *pgd; | |
146 | spinlock_t *pgt_lock; | |
147 | ||
148 | pgd = (pgd_t *)page_address(page) + pgd_index(addr); | |
149 | /* the pgt_lock only for Xen */ | |
150 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; | |
151 | spin_lock(pgt_lock); | |
152 | ||
153 | if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) | |
154 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
155 | ||
156 | if (pgd_none(*pgd)) | |
157 | set_pgd(pgd, *pgd_ref); | |
158 | ||
159 | spin_unlock(pgt_lock); | |
160 | } | |
161 | spin_unlock(&pgd_lock); | |
162 | } | |
163 | } | |
91f606a8 KS |
164 | |
165 | static void sync_global_pgds_l4(unsigned long start, unsigned long end) | |
6afb5157 | 166 | { |
fc5f9d5f | 167 | unsigned long addr; |
44235dcd | 168 | |
fc5f9d5f BH |
169 | for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { |
170 | pgd_t *pgd_ref = pgd_offset_k(addr); | |
f2a6a705 | 171 | const p4d_t *p4d_ref; |
44235dcd JF |
172 | struct page *page; |
173 | ||
f2a6a705 KS |
174 | /* |
175 | * With folded p4d, pgd_none() is always false, we need to | |
d9f6e12f | 176 | * handle synchronization on p4d level. |
f2a6a705 | 177 | */ |
c65e774f | 178 | MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); |
fc5f9d5f | 179 | p4d_ref = p4d_offset(pgd_ref, addr); |
f2a6a705 KS |
180 | |
181 | if (p4d_none(*p4d_ref)) | |
44235dcd JF |
182 | continue; |
183 | ||
a79e53d8 | 184 | spin_lock(&pgd_lock); |
44235dcd | 185 | list_for_each_entry(page, &pgd_list, lru) { |
be354f40 | 186 | pgd_t *pgd; |
f2a6a705 | 187 | p4d_t *p4d; |
617d34d9 JF |
188 | spinlock_t *pgt_lock; |
189 | ||
fc5f9d5f BH |
190 | pgd = (pgd_t *)page_address(page) + pgd_index(addr); |
191 | p4d = p4d_offset(pgd, addr); | |
a79e53d8 | 192 | /* the pgt_lock only for Xen */ |
617d34d9 JF |
193 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; |
194 | spin_lock(pgt_lock); | |
195 | ||
f2a6a705 | 196 | if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) |
dc4875f0 AK |
197 | BUG_ON(p4d_pgtable(*p4d) |
198 | != p4d_pgtable(*p4d_ref)); | |
617d34d9 | 199 | |
f2a6a705 KS |
200 | if (p4d_none(*p4d)) |
201 | set_p4d(p4d, *p4d_ref); | |
9661d5bc | 202 | |
617d34d9 | 203 | spin_unlock(pgt_lock); |
44235dcd | 204 | } |
a79e53d8 | 205 | spin_unlock(&pgd_lock); |
44235dcd | 206 | } |
6afb5157 | 207 | } |
91f606a8 KS |
208 | |
209 | /* | |
210 | * When memory was added make sure all the processes MM have | |
211 | * suitable PGD entries in the local PGD level page. | |
212 | */ | |
2b32ab03 | 213 | static void sync_global_pgds(unsigned long start, unsigned long end) |
91f606a8 | 214 | { |
ed7588d5 | 215 | if (pgtable_l5_enabled()) |
91f606a8 KS |
216 | sync_global_pgds_l5(start, end); |
217 | else | |
218 | sync_global_pgds_l4(start, end); | |
219 | } | |
6afb5157 | 220 | |
8d6ea967 MS |
221 | /* |
222 | * NOTE: This function is marked __ref because it calls __init function | |
223 | * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. | |
224 | */ | |
225 | static __ref void *spp_getpage(void) | |
14a62c34 | 226 | { |
1da177e4 | 227 | void *ptr; |
14a62c34 | 228 | |
1da177e4 | 229 | if (after_bootmem) |
75f296d9 | 230 | ptr = (void *) get_zeroed_page(GFP_ATOMIC); |
1da177e4 | 231 | else |
15c3c114 | 232 | ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE); |
14a62c34 TG |
233 | |
234 | if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { | |
235 | panic("set_pte_phys: cannot allocate page data %s\n", | |
236 | after_bootmem ? "after bootmem" : ""); | |
237 | } | |
1da177e4 | 238 | |
10f22dde | 239 | pr_debug("spp_getpage %p\n", ptr); |
14a62c34 | 240 | |
1da177e4 | 241 | return ptr; |
14a62c34 | 242 | } |
1da177e4 | 243 | |
f2a6a705 | 244 | static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) |
1da177e4 | 245 | { |
458a3e64 | 246 | if (pgd_none(*pgd)) { |
f2a6a705 KS |
247 | p4d_t *p4d = (p4d_t *)spp_getpage(); |
248 | pgd_populate(&init_mm, pgd, p4d); | |
249 | if (p4d != p4d_offset(pgd, 0)) | |
458a3e64 | 250 | printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", |
f2a6a705 KS |
251 | p4d, p4d_offset(pgd, 0)); |
252 | } | |
253 | return p4d_offset(pgd, vaddr); | |
254 | } | |
255 | ||
256 | static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) | |
257 | { | |
258 | if (p4d_none(*p4d)) { | |
259 | pud_t *pud = (pud_t *)spp_getpage(); | |
260 | p4d_populate(&init_mm, p4d, pud); | |
261 | if (pud != pud_offset(p4d, 0)) | |
262 | printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", | |
263 | pud, pud_offset(p4d, 0)); | |
458a3e64 | 264 | } |
f2a6a705 | 265 | return pud_offset(p4d, vaddr); |
458a3e64 | 266 | } |
1da177e4 | 267 | |
f254f390 | 268 | static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) |
458a3e64 | 269 | { |
1da177e4 | 270 | if (pud_none(*pud)) { |
458a3e64 | 271 | pmd_t *pmd = (pmd_t *) spp_getpage(); |
bb23e403 | 272 | pud_populate(&init_mm, pud, pmd); |
458a3e64 | 273 | if (pmd != pmd_offset(pud, 0)) |
f2a6a705 | 274 | printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", |
458a3e64 | 275 | pmd, pmd_offset(pud, 0)); |
1da177e4 | 276 | } |
458a3e64 TH |
277 | return pmd_offset(pud, vaddr); |
278 | } | |
279 | ||
f254f390 | 280 | static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) |
458a3e64 | 281 | { |
1da177e4 | 282 | if (pmd_none(*pmd)) { |
458a3e64 | 283 | pte_t *pte = (pte_t *) spp_getpage(); |
bb23e403 | 284 | pmd_populate_kernel(&init_mm, pmd, pte); |
458a3e64 | 285 | if (pte != pte_offset_kernel(pmd, 0)) |
f2a6a705 | 286 | printk(KERN_ERR "PAGETABLE BUG #03!\n"); |
1da177e4 | 287 | } |
458a3e64 TH |
288 | return pte_offset_kernel(pmd, vaddr); |
289 | } | |
290 | ||
f2a6a705 | 291 | static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) |
458a3e64 | 292 | { |
f2a6a705 KS |
293 | pmd_t *pmd = fill_pmd(pud, vaddr); |
294 | pte_t *pte = fill_pte(pmd, vaddr); | |
1da177e4 | 295 | |
1da177e4 LT |
296 | set_pte(pte, new_pte); |
297 | ||
298 | /* | |
299 | * It's enough to flush this one mapping. | |
300 | * (PGE mappings get flushed as well) | |
301 | */ | |
58430c5d | 302 | flush_tlb_one_kernel(vaddr); |
1da177e4 LT |
303 | } |
304 | ||
f2a6a705 KS |
305 | void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) |
306 | { | |
307 | p4d_t *p4d = p4d_page + p4d_index(vaddr); | |
308 | pud_t *pud = fill_pud(p4d, vaddr); | |
309 | ||
310 | __set_pte_vaddr(pud, vaddr, new_pte); | |
311 | } | |
312 | ||
313 | void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) | |
314 | { | |
315 | pud_t *pud = pud_page + pud_index(vaddr); | |
316 | ||
317 | __set_pte_vaddr(pud, vaddr, new_pte); | |
318 | } | |
319 | ||
458a3e64 | 320 | void set_pte_vaddr(unsigned long vaddr, pte_t pteval) |
0814e0ba EH |
321 | { |
322 | pgd_t *pgd; | |
f2a6a705 | 323 | p4d_t *p4d_page; |
0814e0ba EH |
324 | |
325 | pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); | |
326 | ||
327 | pgd = pgd_offset_k(vaddr); | |
328 | if (pgd_none(*pgd)) { | |
329 | printk(KERN_ERR | |
330 | "PGD FIXMAP MISSING, it should be setup in head.S!\n"); | |
331 | return; | |
332 | } | |
f2a6a705 KS |
333 | |
334 | p4d_page = p4d_offset(pgd, 0); | |
335 | set_pte_vaddr_p4d(p4d_page, vaddr, pteval); | |
0814e0ba EH |
336 | } |
337 | ||
458a3e64 | 338 | pmd_t * __init populate_extra_pmd(unsigned long vaddr) |
11124411 TH |
339 | { |
340 | pgd_t *pgd; | |
f2a6a705 | 341 | p4d_t *p4d; |
11124411 TH |
342 | pud_t *pud; |
343 | ||
344 | pgd = pgd_offset_k(vaddr); | |
f2a6a705 KS |
345 | p4d = fill_p4d(pgd, vaddr); |
346 | pud = fill_pud(p4d, vaddr); | |
458a3e64 TH |
347 | return fill_pmd(pud, vaddr); |
348 | } | |
349 | ||
350 | pte_t * __init populate_extra_pte(unsigned long vaddr) | |
351 | { | |
352 | pmd_t *pmd; | |
11124411 | 353 | |
458a3e64 TH |
354 | pmd = populate_extra_pmd(vaddr); |
355 | return fill_pte(pmd, vaddr); | |
11124411 TH |
356 | } |
357 | ||
3a9e189d JS |
358 | /* |
359 | * Create large page table mappings for a range of physical addresses. | |
360 | */ | |
361 | static void __init __init_extra_mapping(unsigned long phys, unsigned long size, | |
2df58b6d | 362 | enum page_cache_mode cache) |
3a9e189d JS |
363 | { |
364 | pgd_t *pgd; | |
f2a6a705 | 365 | p4d_t *p4d; |
3a9e189d JS |
366 | pud_t *pud; |
367 | pmd_t *pmd; | |
2df58b6d | 368 | pgprot_t prot; |
3a9e189d | 369 | |
2df58b6d | 370 | pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | |
d0735693 | 371 | protval_4k_2_large(cachemode2protval(cache)); |
3a9e189d JS |
372 | BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); |
373 | for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { | |
374 | pgd = pgd_offset_k((unsigned long)__va(phys)); | |
375 | if (pgd_none(*pgd)) { | |
f2a6a705 KS |
376 | p4d = (p4d_t *) spp_getpage(); |
377 | set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | | |
378 | _PAGE_USER)); | |
379 | } | |
380 | p4d = p4d_offset(pgd, (unsigned long)__va(phys)); | |
381 | if (p4d_none(*p4d)) { | |
3a9e189d | 382 | pud = (pud_t *) spp_getpage(); |
f2a6a705 | 383 | set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | |
3a9e189d JS |
384 | _PAGE_USER)); |
385 | } | |
f2a6a705 | 386 | pud = pud_offset(p4d, (unsigned long)__va(phys)); |
3a9e189d JS |
387 | if (pud_none(*pud)) { |
388 | pmd = (pmd_t *) spp_getpage(); | |
389 | set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | | |
390 | _PAGE_USER)); | |
391 | } | |
392 | pmd = pmd_offset(pud, phys); | |
393 | BUG_ON(!pmd_none(*pmd)); | |
394 | set_pmd(pmd, __pmd(phys | pgprot_val(prot))); | |
395 | } | |
396 | } | |
397 | ||
398 | void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) | |
399 | { | |
2df58b6d | 400 | __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); |
3a9e189d JS |
401 | } |
402 | ||
403 | void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) | |
404 | { | |
2df58b6d | 405 | __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); |
3a9e189d JS |
406 | } |
407 | ||
31eedd82 | 408 | /* |
88f3aec7 IM |
409 | * The head.S code sets up the kernel high mapping: |
410 | * | |
411 | * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) | |
31eedd82 | 412 | * |
1e3b3081 | 413 | * phys_base holds the negative offset to the kernel, which is added |
31eedd82 TG |
414 | * to the compile time generated pmds. This results in invalid pmds up |
415 | * to the point where we hit the physaddr 0 mapping. | |
416 | * | |
e5f15b45 YL |
417 | * We limit the mappings to the region from _text to _brk_end. _brk_end |
418 | * is rounded up to the 2MB boundary. This catches the invalid pmds as | |
31eedd82 TG |
419 | * well, as they are located before _text: |
420 | */ | |
421 | void __init cleanup_highmap(void) | |
422 | { | |
423 | unsigned long vaddr = __START_KERNEL_map; | |
10054230 | 424 | unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; |
e5f15b45 | 425 | unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; |
31eedd82 | 426 | pmd_t *pmd = level2_kernel_pgt; |
31eedd82 | 427 | |
10054230 YL |
428 | /* |
429 | * Native path, max_pfn_mapped is not set yet. | |
430 | * Xen has valid max_pfn_mapped set in | |
431 | * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). | |
432 | */ | |
433 | if (max_pfn_mapped) | |
434 | vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); | |
435 | ||
e5f15b45 | 436 | for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { |
2884f110 | 437 | if (pmd_none(*pmd)) |
31eedd82 TG |
438 | continue; |
439 | if (vaddr < (unsigned long) _text || vaddr > end) | |
440 | set_pmd(pmd, __pmd(0)); | |
441 | } | |
442 | } | |
443 | ||
59b3d020 TG |
444 | /* |
445 | * Create PTE level page table mapping for physical addresses. | |
446 | * It returns the last physical address mapped. | |
447 | */ | |
7b16eb89 | 448 | static unsigned long __meminit |
59b3d020 | 449 | phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, |
eccd9064 | 450 | pgprot_t prot, bool init) |
4f9c11dd | 451 | { |
59b3d020 TG |
452 | unsigned long pages = 0, paddr_next; |
453 | unsigned long paddr_last = paddr_end; | |
454 | pte_t *pte; | |
4f9c11dd | 455 | int i; |
7b16eb89 | 456 | |
59b3d020 TG |
457 | pte = pte_page + pte_index(paddr); |
458 | i = pte_index(paddr); | |
4f9c11dd | 459 | |
59b3d020 TG |
460 | for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { |
461 | paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; | |
462 | if (paddr >= paddr_end) { | |
eceb3632 | 463 | if (!after_bootmem && |
3bce64f0 | 464 | !e820__mapped_any(paddr & PAGE_MASK, paddr_next, |
09821ff1 | 465 | E820_TYPE_RAM) && |
3bce64f0 | 466 | !e820__mapped_any(paddr & PAGE_MASK, paddr_next, |
09821ff1 | 467 | E820_TYPE_RESERVED_KERN)) |
eccd9064 | 468 | set_pte_init(pte, __pte(0), init); |
eceb3632 | 469 | continue; |
4f9c11dd JF |
470 | } |
471 | ||
b27a43c1 SS |
472 | /* |
473 | * We will re-use the existing mapping. | |
474 | * Xen for example has some special requirements, like mapping | |
475 | * pagetable pages as RO. So assume someone who pre-setup | |
476 | * these mappings are more intelligent. | |
477 | */ | |
dcb32d99 | 478 | if (!pte_none(*pte)) { |
876ee61a JB |
479 | if (!after_bootmem) |
480 | pages++; | |
4f9c11dd | 481 | continue; |
3afa3949 | 482 | } |
4f9c11dd JF |
483 | |
484 | if (0) | |
59b3d020 TG |
485 | pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr, |
486 | pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte); | |
4f9c11dd | 487 | pages++; |
eccd9064 | 488 | set_pte_init(pte, pfn_pte(paddr >> PAGE_SHIFT, prot), init); |
59b3d020 | 489 | paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; |
4f9c11dd | 490 | } |
a2699e47 | 491 | |
4f9c11dd | 492 | update_page_count(PG_LEVEL_4K, pages); |
7b16eb89 | 493 | |
59b3d020 | 494 | return paddr_last; |
4f9c11dd JF |
495 | } |
496 | ||
59b3d020 TG |
497 | /* |
498 | * Create PMD level page table mapping for physical addresses. The virtual | |
499 | * and physical address have to be aligned at this level. | |
500 | * It returns the last physical address mapped. | |
501 | */ | |
cc615032 | 502 | static unsigned long __meminit |
59b3d020 | 503 | phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, |
eccd9064 | 504 | unsigned long page_size_mask, pgprot_t prot, bool init) |
44df75e6 | 505 | { |
59b3d020 TG |
506 | unsigned long pages = 0, paddr_next; |
507 | unsigned long paddr_last = paddr_end; | |
ce0c0e50 | 508 | |
59b3d020 | 509 | int i = pmd_index(paddr); |
44df75e6 | 510 | |
59b3d020 TG |
511 | for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { |
512 | pmd_t *pmd = pmd_page + pmd_index(paddr); | |
4f9c11dd | 513 | pte_t *pte; |
b27a43c1 | 514 | pgprot_t new_prot = prot; |
44df75e6 | 515 | |
59b3d020 TG |
516 | paddr_next = (paddr & PMD_MASK) + PMD_SIZE; |
517 | if (paddr >= paddr_end) { | |
eceb3632 | 518 | if (!after_bootmem && |
3bce64f0 | 519 | !e820__mapped_any(paddr & PMD_MASK, paddr_next, |
09821ff1 | 520 | E820_TYPE_RAM) && |
3bce64f0 | 521 | !e820__mapped_any(paddr & PMD_MASK, paddr_next, |
09821ff1 | 522 | E820_TYPE_RESERVED_KERN)) |
eccd9064 | 523 | set_pmd_init(pmd, __pmd(0), init); |
eceb3632 | 524 | continue; |
44df75e6 | 525 | } |
6ad91658 | 526 | |
dcb32d99 | 527 | if (!pmd_none(*pmd)) { |
8ae3a5a8 JB |
528 | if (!pmd_large(*pmd)) { |
529 | spin_lock(&init_mm.page_table_lock); | |
973dc4f3 | 530 | pte = (pte_t *)pmd_page_vaddr(*pmd); |
59b3d020 | 531 | paddr_last = phys_pte_init(pte, paddr, |
eccd9064 BS |
532 | paddr_end, prot, |
533 | init); | |
8ae3a5a8 | 534 | spin_unlock(&init_mm.page_table_lock); |
a2699e47 | 535 | continue; |
8ae3a5a8 | 536 | } |
b27a43c1 SS |
537 | /* |
538 | * If we are ok with PG_LEVEL_2M mapping, then we will | |
539 | * use the existing mapping, | |
540 | * | |
541 | * Otherwise, we will split the large page mapping but | |
542 | * use the same existing protection bits except for | |
543 | * large page, so that we don't violate Intel's TLB | |
544 | * Application note (317080) which says, while changing | |
545 | * the page sizes, new and old translations should | |
546 | * not differ with respect to page frame and | |
547 | * attributes. | |
548 | */ | |
3afa3949 | 549 | if (page_size_mask & (1 << PG_LEVEL_2M)) { |
876ee61a JB |
550 | if (!after_bootmem) |
551 | pages++; | |
59b3d020 | 552 | paddr_last = paddr_next; |
b27a43c1 | 553 | continue; |
3afa3949 | 554 | } |
b27a43c1 | 555 | new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); |
4f9c11dd JF |
556 | } |
557 | ||
b50efd2a | 558 | if (page_size_mask & (1<<PG_LEVEL_2M)) { |
4f9c11dd | 559 | pages++; |
8ae3a5a8 | 560 | spin_lock(&init_mm.page_table_lock); |
eccd9064 BS |
561 | set_pte_init((pte_t *)pmd, |
562 | pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT, | |
563 | __pgprot(pgprot_val(prot) | _PAGE_PSE)), | |
564 | init); | |
8ae3a5a8 | 565 | spin_unlock(&init_mm.page_table_lock); |
59b3d020 | 566 | paddr_last = paddr_next; |
6ad91658 | 567 | continue; |
4f9c11dd | 568 | } |
6ad91658 | 569 | |
868bf4d6 | 570 | pte = alloc_low_page(); |
eccd9064 | 571 | paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot, init); |
4f9c11dd | 572 | |
8ae3a5a8 | 573 | spin_lock(&init_mm.page_table_lock); |
eccd9064 | 574 | pmd_populate_kernel_init(&init_mm, pmd, pte, init); |
8ae3a5a8 | 575 | spin_unlock(&init_mm.page_table_lock); |
44df75e6 | 576 | } |
ce0c0e50 | 577 | update_page_count(PG_LEVEL_2M, pages); |
59b3d020 | 578 | return paddr_last; |
44df75e6 MT |
579 | } |
580 | ||
59b3d020 TG |
581 | /* |
582 | * Create PUD level page table mapping for physical addresses. The virtual | |
faa37933 TG |
583 | * and physical address do not have to be aligned at this level. KASLR can |
584 | * randomize virtual addresses up to this level. | |
59b3d020 TG |
585 | * It returns the last physical address mapped. |
586 | */ | |
cc615032 | 587 | static unsigned long __meminit |
59b3d020 | 588 | phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, |
c164fbb4 | 589 | unsigned long page_size_mask, pgprot_t _prot, bool init) |
14a62c34 | 590 | { |
59b3d020 TG |
591 | unsigned long pages = 0, paddr_next; |
592 | unsigned long paddr_last = paddr_end; | |
faa37933 TG |
593 | unsigned long vaddr = (unsigned long)__va(paddr); |
594 | int i = pud_index(vaddr); | |
44df75e6 | 595 | |
59b3d020 | 596 | for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { |
faa37933 | 597 | pud_t *pud; |
1da177e4 | 598 | pmd_t *pmd; |
c164fbb4 | 599 | pgprot_t prot = _prot; |
1da177e4 | 600 | |
faa37933 TG |
601 | vaddr = (unsigned long)__va(paddr); |
602 | pud = pud_page + pud_index(vaddr); | |
59b3d020 | 603 | paddr_next = (paddr & PUD_MASK) + PUD_SIZE; |
faa37933 | 604 | |
59b3d020 | 605 | if (paddr >= paddr_end) { |
eceb3632 | 606 | if (!after_bootmem && |
3bce64f0 | 607 | !e820__mapped_any(paddr & PUD_MASK, paddr_next, |
09821ff1 | 608 | E820_TYPE_RAM) && |
3bce64f0 | 609 | !e820__mapped_any(paddr & PUD_MASK, paddr_next, |
09821ff1 | 610 | E820_TYPE_RESERVED_KERN)) |
eccd9064 | 611 | set_pud_init(pud, __pud(0), init); |
1da177e4 | 612 | continue; |
14a62c34 | 613 | } |
1da177e4 | 614 | |
dcb32d99 | 615 | if (!pud_none(*pud)) { |
a2699e47 | 616 | if (!pud_large(*pud)) { |
973dc4f3 | 617 | pmd = pmd_offset(pud, 0); |
59b3d020 TG |
618 | paddr_last = phys_pmd_init(pmd, paddr, |
619 | paddr_end, | |
620 | page_size_mask, | |
eccd9064 | 621 | prot, init); |
a2699e47 SS |
622 | continue; |
623 | } | |
b27a43c1 SS |
624 | /* |
625 | * If we are ok with PG_LEVEL_1G mapping, then we will | |
626 | * use the existing mapping. | |
627 | * | |
628 | * Otherwise, we will split the gbpage mapping but use | |
629 | * the same existing protection bits except for large | |
630 | * page, so that we don't violate Intel's TLB | |
631 | * Application note (317080) which says, while changing | |
632 | * the page sizes, new and old translations should | |
633 | * not differ with respect to page frame and | |
634 | * attributes. | |
635 | */ | |
3afa3949 | 636 | if (page_size_mask & (1 << PG_LEVEL_1G)) { |
876ee61a JB |
637 | if (!after_bootmem) |
638 | pages++; | |
59b3d020 | 639 | paddr_last = paddr_next; |
b27a43c1 | 640 | continue; |
3afa3949 | 641 | } |
b27a43c1 | 642 | prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); |
ef925766 AK |
643 | } |
644 | ||
b50efd2a | 645 | if (page_size_mask & (1<<PG_LEVEL_1G)) { |
ce0c0e50 | 646 | pages++; |
8ae3a5a8 | 647 | spin_lock(&init_mm.page_table_lock); |
c164fbb4 LG |
648 | |
649 | prot = __pgprot(pgprot_val(prot) | __PAGE_KERNEL_LARGE); | |
650 | ||
eccd9064 BS |
651 | set_pte_init((pte_t *)pud, |
652 | pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT, | |
c164fbb4 | 653 | prot), |
eccd9064 | 654 | init); |
8ae3a5a8 | 655 | spin_unlock(&init_mm.page_table_lock); |
59b3d020 | 656 | paddr_last = paddr_next; |
6ad91658 KM |
657 | continue; |
658 | } | |
659 | ||
868bf4d6 | 660 | pmd = alloc_low_page(); |
59b3d020 | 661 | paddr_last = phys_pmd_init(pmd, paddr, paddr_end, |
eccd9064 | 662 | page_size_mask, prot, init); |
8ae3a5a8 JB |
663 | |
664 | spin_lock(&init_mm.page_table_lock); | |
eccd9064 | 665 | pud_populate_init(&init_mm, pud, pmd, init); |
44df75e6 | 666 | spin_unlock(&init_mm.page_table_lock); |
1da177e4 | 667 | } |
a2699e47 | 668 | |
ce0c0e50 | 669 | update_page_count(PG_LEVEL_1G, pages); |
cc615032 | 670 | |
59b3d020 | 671 | return paddr_last; |
14a62c34 | 672 | } |
1da177e4 | 673 | |
7e82ea94 KS |
674 | static unsigned long __meminit |
675 | phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, | |
c164fbb4 | 676 | unsigned long page_size_mask, pgprot_t prot, bool init) |
7e82ea94 | 677 | { |
432c8332 KS |
678 | unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last; |
679 | ||
680 | paddr_last = paddr_end; | |
681 | vaddr = (unsigned long)__va(paddr); | |
682 | vaddr_end = (unsigned long)__va(paddr_end); | |
7e82ea94 | 683 | |
ed7588d5 | 684 | if (!pgtable_l5_enabled()) |
eccd9064 | 685 | return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, |
c164fbb4 | 686 | page_size_mask, prot, init); |
7e82ea94 | 687 | |
432c8332 KS |
688 | for (; vaddr < vaddr_end; vaddr = vaddr_next) { |
689 | p4d_t *p4d = p4d_page + p4d_index(vaddr); | |
7e82ea94 KS |
690 | pud_t *pud; |
691 | ||
432c8332 KS |
692 | vaddr_next = (vaddr & P4D_MASK) + P4D_SIZE; |
693 | paddr = __pa(vaddr); | |
7e82ea94 KS |
694 | |
695 | if (paddr >= paddr_end) { | |
432c8332 | 696 | paddr_next = __pa(vaddr_next); |
7e82ea94 KS |
697 | if (!after_bootmem && |
698 | !e820__mapped_any(paddr & P4D_MASK, paddr_next, | |
699 | E820_TYPE_RAM) && | |
700 | !e820__mapped_any(paddr & P4D_MASK, paddr_next, | |
701 | E820_TYPE_RESERVED_KERN)) | |
eccd9064 | 702 | set_p4d_init(p4d, __p4d(0), init); |
7e82ea94 KS |
703 | continue; |
704 | } | |
705 | ||
706 | if (!p4d_none(*p4d)) { | |
707 | pud = pud_offset(p4d, 0); | |
432c8332 | 708 | paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), |
c164fbb4 | 709 | page_size_mask, prot, init); |
7e82ea94 KS |
710 | continue; |
711 | } | |
712 | ||
713 | pud = alloc_low_page(); | |
432c8332 | 714 | paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), |
c164fbb4 | 715 | page_size_mask, prot, init); |
7e82ea94 KS |
716 | |
717 | spin_lock(&init_mm.page_table_lock); | |
eccd9064 | 718 | p4d_populate_init(&init_mm, p4d, pud, init); |
7e82ea94 KS |
719 | spin_unlock(&init_mm.page_table_lock); |
720 | } | |
7e82ea94 KS |
721 | |
722 | return paddr_last; | |
723 | } | |
724 | ||
eccd9064 BS |
725 | static unsigned long __meminit |
726 | __kernel_physical_mapping_init(unsigned long paddr_start, | |
727 | unsigned long paddr_end, | |
728 | unsigned long page_size_mask, | |
c164fbb4 | 729 | pgprot_t prot, bool init) |
14a62c34 | 730 | { |
9b861528 | 731 | bool pgd_changed = false; |
59b3d020 | 732 | unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; |
1da177e4 | 733 | |
59b3d020 TG |
734 | paddr_last = paddr_end; |
735 | vaddr = (unsigned long)__va(paddr_start); | |
736 | vaddr_end = (unsigned long)__va(paddr_end); | |
737 | vaddr_start = vaddr; | |
1da177e4 | 738 | |
59b3d020 TG |
739 | for (; vaddr < vaddr_end; vaddr = vaddr_next) { |
740 | pgd_t *pgd = pgd_offset_k(vaddr); | |
f2a6a705 | 741 | p4d_t *p4d; |
44df75e6 | 742 | |
59b3d020 | 743 | vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; |
4f9c11dd | 744 | |
7e82ea94 KS |
745 | if (pgd_val(*pgd)) { |
746 | p4d = (p4d_t *)pgd_page_vaddr(*pgd); | |
747 | paddr_last = phys_p4d_init(p4d, __pa(vaddr), | |
59b3d020 | 748 | __pa(vaddr_end), |
eccd9064 | 749 | page_size_mask, |
c164fbb4 | 750 | prot, init); |
4f9c11dd JF |
751 | continue; |
752 | } | |
753 | ||
7e82ea94 KS |
754 | p4d = alloc_low_page(); |
755 | paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), | |
c164fbb4 | 756 | page_size_mask, prot, init); |
8ae3a5a8 JB |
757 | |
758 | spin_lock(&init_mm.page_table_lock); | |
ed7588d5 | 759 | if (pgtable_l5_enabled()) |
eccd9064 | 760 | pgd_populate_init(&init_mm, pgd, p4d, init); |
7e82ea94 | 761 | else |
eccd9064 BS |
762 | p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), |
763 | (pud_t *) p4d, init); | |
764 | ||
8ae3a5a8 | 765 | spin_unlock(&init_mm.page_table_lock); |
9b861528 | 766 | pgd_changed = true; |
14a62c34 | 767 | } |
9b861528 HL |
768 | |
769 | if (pgd_changed) | |
5372e155 | 770 | sync_global_pgds(vaddr_start, vaddr_end - 1); |
9b861528 | 771 | |
59b3d020 | 772 | return paddr_last; |
b50efd2a | 773 | } |
7b16eb89 | 774 | |
eccd9064 BS |
775 | |
776 | /* | |
777 | * Create page table mapping for the physical memory for specific physical | |
778 | * addresses. Note that it can only be used to populate non-present entries. | |
779 | * The virtual and physical addresses have to be aligned on PMD level | |
780 | * down. It returns the last physical address mapped. | |
781 | */ | |
782 | unsigned long __meminit | |
783 | kernel_physical_mapping_init(unsigned long paddr_start, | |
784 | unsigned long paddr_end, | |
c164fbb4 | 785 | unsigned long page_size_mask, pgprot_t prot) |
eccd9064 BS |
786 | { |
787 | return __kernel_physical_mapping_init(paddr_start, paddr_end, | |
c164fbb4 | 788 | page_size_mask, prot, true); |
eccd9064 BS |
789 | } |
790 | ||
791 | /* | |
792 | * This function is similar to kernel_physical_mapping_init() above with the | |
793 | * exception that it uses set_{pud,pmd}() instead of the set_{pud,pte}_safe() | |
794 | * when updating the mapping. The caller is responsible to flush the TLBs after | |
795 | * the function returns. | |
796 | */ | |
797 | unsigned long __meminit | |
798 | kernel_physical_mapping_change(unsigned long paddr_start, | |
799 | unsigned long paddr_end, | |
800 | unsigned long page_size_mask) | |
801 | { | |
802 | return __kernel_physical_mapping_init(paddr_start, paddr_end, | |
c164fbb4 LG |
803 | page_size_mask, PAGE_KERNEL, |
804 | false); | |
eccd9064 BS |
805 | } |
806 | ||
2b97690f | 807 | #ifndef CONFIG_NUMA |
d8fc3afc | 808 | void __init initmem_init(void) |
1f75d7e3 | 809 | { |
d7dc899a | 810 | memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0); |
1f75d7e3 | 811 | } |
3551f88f | 812 | #endif |
1f75d7e3 | 813 | |
1da177e4 LT |
814 | void __init paging_init(void) |
815 | { | |
44df75e6 | 816 | sparse_init(); |
44b57280 YL |
817 | |
818 | /* | |
819 | * clear the default setting with node 0 | |
820 | * note: don't use nodes_clear here, that is really clearing when | |
821 | * numa support is not compiled in, and later node_set_state | |
822 | * will not set it back. | |
823 | */ | |
4b0ef1fe | 824 | node_clear_state(0, N_MEMORY); |
aa61ee7b | 825 | node_clear_state(0, N_NORMAL_MEMORY); |
44b57280 | 826 | |
4c0b2e5f | 827 | zone_sizes_init(); |
1da177e4 | 828 | } |
1da177e4 | 829 | |
8d400913 OS |
830 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
831 | #define PAGE_UNUSED 0xFD | |
832 | ||
faf1c000 OS |
833 | /* |
834 | * The unused vmemmap range, which was not yet memset(PAGE_UNUSED), ranges | |
835 | * from unused_pmd_start to next PMD_SIZE boundary. | |
836 | */ | |
837 | static unsigned long unused_pmd_start __meminitdata; | |
838 | ||
839 | static void __meminit vmemmap_flush_unused_pmd(void) | |
840 | { | |
841 | if (!unused_pmd_start) | |
842 | return; | |
843 | /* | |
844 | * Clears (unused_pmd_start, PMD_END] | |
845 | */ | |
846 | memset((void *)unused_pmd_start, PAGE_UNUSED, | |
847 | ALIGN(unused_pmd_start, PMD_SIZE) - unused_pmd_start); | |
848 | unused_pmd_start = 0; | |
849 | } | |
850 | ||
851 | #ifdef CONFIG_MEMORY_HOTPLUG | |
8d400913 OS |
852 | /* Returns true if the PMD is completely unused and thus it can be freed */ |
853 | static bool __meminit vmemmap_pmd_is_unused(unsigned long addr, unsigned long end) | |
854 | { | |
855 | unsigned long start = ALIGN_DOWN(addr, PMD_SIZE); | |
856 | ||
faf1c000 OS |
857 | /* |
858 | * Flush the unused range cache to ensure that memchr_inv() will work | |
859 | * for the whole range. | |
860 | */ | |
861 | vmemmap_flush_unused_pmd(); | |
8d400913 OS |
862 | memset((void *)addr, PAGE_UNUSED, end - addr); |
863 | ||
864 | return !memchr_inv((void *)start, PAGE_UNUSED, PMD_SIZE); | |
865 | } | |
faf1c000 | 866 | #endif |
8d400913 | 867 | |
faf1c000 | 868 | static void __meminit __vmemmap_use_sub_pmd(unsigned long start) |
8d400913 OS |
869 | { |
870 | /* | |
871 | * As we expect to add in the same granularity as we remove, it's | |
872 | * sufficient to mark only some piece used to block the memmap page from | |
873 | * getting removed when removing some other adjacent memmap (just in | |
874 | * case the first memmap never gets initialized e.g., because the memory | |
875 | * block never gets onlined). | |
876 | */ | |
877 | memset((void *)start, 0, sizeof(struct page)); | |
878 | } | |
879 | ||
faf1c000 OS |
880 | static void __meminit vmemmap_use_sub_pmd(unsigned long start, unsigned long end) |
881 | { | |
882 | /* | |
883 | * We only optimize if the new used range directly follows the | |
884 | * previously unused range (esp., when populating consecutive sections). | |
885 | */ | |
886 | if (unused_pmd_start == start) { | |
887 | if (likely(IS_ALIGNED(end, PMD_SIZE))) | |
888 | unused_pmd_start = 0; | |
889 | else | |
890 | unused_pmd_start = end; | |
891 | return; | |
892 | } | |
893 | ||
894 | /* | |
895 | * If the range does not contiguously follows previous one, make sure | |
896 | * to mark the unused range of the previous one so it can be removed. | |
897 | */ | |
898 | vmemmap_flush_unused_pmd(); | |
899 | __vmemmap_use_sub_pmd(start); | |
900 | } | |
901 | ||
902 | ||
8d400913 OS |
903 | static void __meminit vmemmap_use_new_sub_pmd(unsigned long start, unsigned long end) |
904 | { | |
faf1c000 OS |
905 | vmemmap_flush_unused_pmd(); |
906 | ||
8d400913 OS |
907 | /* |
908 | * Could be our memmap page is filled with PAGE_UNUSED already from a | |
909 | * previous remove. Make sure to reset it. | |
910 | */ | |
faf1c000 | 911 | __vmemmap_use_sub_pmd(start); |
8d400913 OS |
912 | |
913 | /* | |
914 | * Mark with PAGE_UNUSED the unused parts of the new memmap range | |
915 | */ | |
916 | if (!IS_ALIGNED(start, PMD_SIZE)) | |
917 | memset((void *)start, PAGE_UNUSED, | |
faf1c000 OS |
918 | start - ALIGN_DOWN(start, PMD_SIZE)); |
919 | ||
920 | /* | |
921 | * We want to avoid memset(PAGE_UNUSED) when populating the vmemmap of | |
922 | * consecutive sections. Remember for the last added PMD where the | |
923 | * unused range begins. | |
924 | */ | |
8d400913 | 925 | if (!IS_ALIGNED(end, PMD_SIZE)) |
faf1c000 | 926 | unused_pmd_start = end; |
8d400913 OS |
927 | } |
928 | #endif | |
929 | ||
44df75e6 MT |
930 | /* |
931 | * Memory hotplug specific functions | |
44df75e6 | 932 | */ |
bc02af93 | 933 | #ifdef CONFIG_MEMORY_HOTPLUG |
ea085417 SZ |
934 | /* |
935 | * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need | |
936 | * updating. | |
937 | */ | |
3072e413 | 938 | static void update_end_of_memory_vars(u64 start, u64 size) |
ea085417 SZ |
939 | { |
940 | unsigned long end_pfn = PFN_UP(start + size); | |
941 | ||
942 | if (end_pfn > max_pfn) { | |
943 | max_pfn = end_pfn; | |
944 | max_low_pfn = end_pfn; | |
945 | high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; | |
946 | } | |
947 | } | |
948 | ||
24e6d5a5 | 949 | int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, |
f5637d3b | 950 | struct mhp_params *params) |
44df75e6 | 951 | { |
44df75e6 MT |
952 | int ret; |
953 | ||
f5637d3b | 954 | ret = __add_pages(nid, start_pfn, nr_pages, params); |
fe8b868e | 955 | WARN_ON_ONCE(ret); |
44df75e6 | 956 | |
ea085417 | 957 | /* update max_pfn, max_low_pfn and high_memory */ |
3072e413 MH |
958 | update_end_of_memory_vars(start_pfn << PAGE_SHIFT, |
959 | nr_pages << PAGE_SHIFT); | |
ea085417 | 960 | |
44df75e6 | 961 | return ret; |
44df75e6 | 962 | } |
3072e413 | 963 | |
940519f0 | 964 | int arch_add_memory(int nid, u64 start, u64 size, |
f5637d3b | 965 | struct mhp_params *params) |
3072e413 MH |
966 | { |
967 | unsigned long start_pfn = start >> PAGE_SHIFT; | |
968 | unsigned long nr_pages = size >> PAGE_SHIFT; | |
969 | ||
bfeb022f | 970 | init_memory_mapping(start, start + size, params->pgprot); |
3072e413 | 971 | |
f5637d3b | 972 | return add_pages(nid, start_pfn, nr_pages, params); |
3072e413 | 973 | } |
44df75e6 | 974 | |
a7e6c701 | 975 | static void __meminit free_pagetable(struct page *page, int order) |
ae9aae9e | 976 | { |
ae9aae9e WC |
977 | unsigned long magic; |
978 | unsigned int nr_pages = 1 << order; | |
4b94ffdc | 979 | |
ae9aae9e WC |
980 | /* bootmem page has reserved flag */ |
981 | if (PageReserved(page)) { | |
982 | __ClearPageReserved(page); | |
ae9aae9e | 983 | |
ddffe98d | 984 | magic = (unsigned long)page->freelist; |
ae9aae9e WC |
985 | if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) { |
986 | while (nr_pages--) | |
987 | put_page_bootmem(page++); | |
988 | } else | |
170a5a7e JL |
989 | while (nr_pages--) |
990 | free_reserved_page(page++); | |
ae9aae9e WC |
991 | } else |
992 | free_pages((unsigned long)page_address(page), order); | |
ae9aae9e WC |
993 | } |
994 | ||
a7e6c701 | 995 | static void __meminit free_hugepage_table(struct page *page, |
24b6d416 | 996 | struct vmem_altmap *altmap) |
a7e6c701 DW |
997 | { |
998 | if (altmap) | |
999 | vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE); | |
1000 | else | |
1001 | free_pagetable(page, get_order(PMD_SIZE)); | |
1002 | } | |
1003 | ||
1004 | static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) | |
ae9aae9e WC |
1005 | { |
1006 | pte_t *pte; | |
1007 | int i; | |
1008 | ||
1009 | for (i = 0; i < PTRS_PER_PTE; i++) { | |
1010 | pte = pte_start + i; | |
dcb32d99 | 1011 | if (!pte_none(*pte)) |
ae9aae9e WC |
1012 | return; |
1013 | } | |
1014 | ||
1015 | /* free a pte talbe */ | |
a7e6c701 | 1016 | free_pagetable(pmd_page(*pmd), 0); |
ae9aae9e WC |
1017 | spin_lock(&init_mm.page_table_lock); |
1018 | pmd_clear(pmd); | |
1019 | spin_unlock(&init_mm.page_table_lock); | |
1020 | } | |
1021 | ||
a7e6c701 | 1022 | static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) |
ae9aae9e WC |
1023 | { |
1024 | pmd_t *pmd; | |
1025 | int i; | |
1026 | ||
1027 | for (i = 0; i < PTRS_PER_PMD; i++) { | |
1028 | pmd = pmd_start + i; | |
dcb32d99 | 1029 | if (!pmd_none(*pmd)) |
ae9aae9e WC |
1030 | return; |
1031 | } | |
1032 | ||
1033 | /* free a pmd talbe */ | |
a7e6c701 | 1034 | free_pagetable(pud_page(*pud), 0); |
ae9aae9e WC |
1035 | spin_lock(&init_mm.page_table_lock); |
1036 | pud_clear(pud); | |
1037 | spin_unlock(&init_mm.page_table_lock); | |
1038 | } | |
1039 | ||
a7e6c701 | 1040 | static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) |
f2a6a705 KS |
1041 | { |
1042 | pud_t *pud; | |
1043 | int i; | |
1044 | ||
1045 | for (i = 0; i < PTRS_PER_PUD; i++) { | |
1046 | pud = pud_start + i; | |
1047 | if (!pud_none(*pud)) | |
1048 | return; | |
1049 | } | |
1050 | ||
1051 | /* free a pud talbe */ | |
a7e6c701 | 1052 | free_pagetable(p4d_page(*p4d), 0); |
f2a6a705 KS |
1053 | spin_lock(&init_mm.page_table_lock); |
1054 | p4d_clear(p4d); | |
1055 | spin_unlock(&init_mm.page_table_lock); | |
1056 | } | |
1057 | ||
ae9aae9e WC |
1058 | static void __meminit |
1059 | remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, | |
a7e6c701 | 1060 | bool direct) |
ae9aae9e WC |
1061 | { |
1062 | unsigned long next, pages = 0; | |
1063 | pte_t *pte; | |
ae9aae9e WC |
1064 | phys_addr_t phys_addr; |
1065 | ||
1066 | pte = pte_start + pte_index(addr); | |
1067 | for (; addr < end; addr = next, pte++) { | |
1068 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
1069 | if (next > end) | |
1070 | next = end; | |
1071 | ||
1072 | if (!pte_present(*pte)) | |
1073 | continue; | |
1074 | ||
1075 | /* | |
1076 | * We mapped [0,1G) memory as identity mapping when | |
1077 | * initializing, in arch/x86/kernel/head_64.S. These | |
1078 | * pagetables cannot be removed. | |
1079 | */ | |
1080 | phys_addr = pte_val(*pte) + (addr & PAGE_MASK); | |
1081 | if (phys_addr < (phys_addr_t)0x40000000) | |
1082 | return; | |
1083 | ||
8e2df191 OS |
1084 | if (!direct) |
1085 | free_pagetable(pte_page(*pte), 0); | |
ae9aae9e | 1086 | |
8e2df191 OS |
1087 | spin_lock(&init_mm.page_table_lock); |
1088 | pte_clear(&init_mm, addr, pte); | |
1089 | spin_unlock(&init_mm.page_table_lock); | |
ae9aae9e | 1090 | |
8e2df191 OS |
1091 | /* For non-direct mapping, pages means nothing. */ |
1092 | pages++; | |
ae9aae9e WC |
1093 | } |
1094 | ||
1095 | /* Call free_pte_table() in remove_pmd_table(). */ | |
1096 | flush_tlb_all(); | |
1097 | if (direct) | |
1098 | update_page_count(PG_LEVEL_4K, -pages); | |
1099 | } | |
1100 | ||
1101 | static void __meminit | |
1102 | remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, | |
24b6d416 | 1103 | bool direct, struct vmem_altmap *altmap) |
ae9aae9e WC |
1104 | { |
1105 | unsigned long next, pages = 0; | |
1106 | pte_t *pte_base; | |
1107 | pmd_t *pmd; | |
ae9aae9e WC |
1108 | |
1109 | pmd = pmd_start + pmd_index(addr); | |
1110 | for (; addr < end; addr = next, pmd++) { | |
1111 | next = pmd_addr_end(addr, end); | |
1112 | ||
1113 | if (!pmd_present(*pmd)) | |
1114 | continue; | |
1115 | ||
1116 | if (pmd_large(*pmd)) { | |
1117 | if (IS_ALIGNED(addr, PMD_SIZE) && | |
1118 | IS_ALIGNED(next, PMD_SIZE)) { | |
1119 | if (!direct) | |
a7e6c701 DW |
1120 | free_hugepage_table(pmd_page(*pmd), |
1121 | altmap); | |
ae9aae9e WC |
1122 | |
1123 | spin_lock(&init_mm.page_table_lock); | |
1124 | pmd_clear(pmd); | |
1125 | spin_unlock(&init_mm.page_table_lock); | |
1126 | pages++; | |
8d400913 OS |
1127 | } |
1128 | #ifdef CONFIG_SPARSEMEM_VMEMMAP | |
1129 | else if (vmemmap_pmd_is_unused(addr, next)) { | |
a7e6c701 DW |
1130 | free_hugepage_table(pmd_page(*pmd), |
1131 | altmap); | |
ae9aae9e WC |
1132 | spin_lock(&init_mm.page_table_lock); |
1133 | pmd_clear(pmd); | |
1134 | spin_unlock(&init_mm.page_table_lock); | |
ae9aae9e | 1135 | } |
8d400913 | 1136 | #endif |
ae9aae9e WC |
1137 | continue; |
1138 | } | |
1139 | ||
1140 | pte_base = (pte_t *)pmd_page_vaddr(*pmd); | |
a7e6c701 DW |
1141 | remove_pte_table(pte_base, addr, next, direct); |
1142 | free_pte_table(pte_base, pmd); | |
ae9aae9e WC |
1143 | } |
1144 | ||
1145 | /* Call free_pmd_table() in remove_pud_table(). */ | |
1146 | if (direct) | |
1147 | update_page_count(PG_LEVEL_2M, -pages); | |
1148 | } | |
1149 | ||
1150 | static void __meminit | |
1151 | remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, | |
24b6d416 | 1152 | struct vmem_altmap *altmap, bool direct) |
ae9aae9e WC |
1153 | { |
1154 | unsigned long next, pages = 0; | |
1155 | pmd_t *pmd_base; | |
1156 | pud_t *pud; | |
ae9aae9e WC |
1157 | |
1158 | pud = pud_start + pud_index(addr); | |
1159 | for (; addr < end; addr = next, pud++) { | |
1160 | next = pud_addr_end(addr, end); | |
1161 | ||
1162 | if (!pud_present(*pud)) | |
1163 | continue; | |
1164 | ||
69ccfe74 OS |
1165 | if (pud_large(*pud) && |
1166 | IS_ALIGNED(addr, PUD_SIZE) && | |
1167 | IS_ALIGNED(next, PUD_SIZE)) { | |
1168 | spin_lock(&init_mm.page_table_lock); | |
1169 | pud_clear(pud); | |
1170 | spin_unlock(&init_mm.page_table_lock); | |
1171 | pages++; | |
ae9aae9e WC |
1172 | continue; |
1173 | } | |
1174 | ||
e6ab9c4d | 1175 | pmd_base = pmd_offset(pud, 0); |
24b6d416 | 1176 | remove_pmd_table(pmd_base, addr, next, direct, altmap); |
a7e6c701 | 1177 | free_pmd_table(pmd_base, pud); |
ae9aae9e WC |
1178 | } |
1179 | ||
1180 | if (direct) | |
1181 | update_page_count(PG_LEVEL_1G, -pages); | |
1182 | } | |
1183 | ||
f2a6a705 KS |
1184 | static void __meminit |
1185 | remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, | |
24b6d416 | 1186 | struct vmem_altmap *altmap, bool direct) |
f2a6a705 KS |
1187 | { |
1188 | unsigned long next, pages = 0; | |
1189 | pud_t *pud_base; | |
1190 | p4d_t *p4d; | |
1191 | ||
1192 | p4d = p4d_start + p4d_index(addr); | |
1193 | for (; addr < end; addr = next, p4d++) { | |
1194 | next = p4d_addr_end(addr, end); | |
1195 | ||
1196 | if (!p4d_present(*p4d)) | |
1197 | continue; | |
1198 | ||
1199 | BUILD_BUG_ON(p4d_large(*p4d)); | |
1200 | ||
e6ab9c4d | 1201 | pud_base = pud_offset(p4d, 0); |
24b6d416 | 1202 | remove_pud_table(pud_base, addr, next, altmap, direct); |
98fe3633 JG |
1203 | /* |
1204 | * For 4-level page tables we do not want to free PUDs, but in the | |
1205 | * 5-level case we should free them. This code will have to change | |
1206 | * to adapt for boot-time switching between 4 and 5 level page tables. | |
1207 | */ | |
ed7588d5 | 1208 | if (pgtable_l5_enabled()) |
a7e6c701 | 1209 | free_pud_table(pud_base, p4d); |
f2a6a705 KS |
1210 | } |
1211 | ||
1212 | if (direct) | |
1213 | update_page_count(PG_LEVEL_512G, -pages); | |
1214 | } | |
1215 | ||
ae9aae9e WC |
1216 | /* start and end are both virtual address. */ |
1217 | static void __meminit | |
24b6d416 CH |
1218 | remove_pagetable(unsigned long start, unsigned long end, bool direct, |
1219 | struct vmem_altmap *altmap) | |
ae9aae9e WC |
1220 | { |
1221 | unsigned long next; | |
5255e0a7 | 1222 | unsigned long addr; |
ae9aae9e | 1223 | pgd_t *pgd; |
f2a6a705 | 1224 | p4d_t *p4d; |
ae9aae9e | 1225 | |
5255e0a7 YI |
1226 | for (addr = start; addr < end; addr = next) { |
1227 | next = pgd_addr_end(addr, end); | |
ae9aae9e | 1228 | |
5255e0a7 | 1229 | pgd = pgd_offset_k(addr); |
ae9aae9e WC |
1230 | if (!pgd_present(*pgd)) |
1231 | continue; | |
1232 | ||
e6ab9c4d | 1233 | p4d = p4d_offset(pgd, 0); |
24b6d416 | 1234 | remove_p4d_table(p4d, addr, next, altmap, direct); |
ae9aae9e WC |
1235 | } |
1236 | ||
ae9aae9e WC |
1237 | flush_tlb_all(); |
1238 | } | |
1239 | ||
24b6d416 CH |
1240 | void __ref vmemmap_free(unsigned long start, unsigned long end, |
1241 | struct vmem_altmap *altmap) | |
0197518c | 1242 | { |
8e2df191 OS |
1243 | VM_BUG_ON(!IS_ALIGNED(start, PAGE_SIZE)); |
1244 | VM_BUG_ON(!IS_ALIGNED(end, PAGE_SIZE)); | |
1245 | ||
24b6d416 | 1246 | remove_pagetable(start, end, false, altmap); |
0197518c TC |
1247 | } |
1248 | ||
bbcab878 TC |
1249 | static void __meminit |
1250 | kernel_physical_mapping_remove(unsigned long start, unsigned long end) | |
1251 | { | |
1252 | start = (unsigned long)__va(start); | |
1253 | end = (unsigned long)__va(end); | |
1254 | ||
24b6d416 | 1255 | remove_pagetable(start, end, true, NULL); |
bbcab878 TC |
1256 | } |
1257 | ||
65a2aa5f | 1258 | void __ref arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap) |
24d335ca WC |
1259 | { |
1260 | unsigned long start_pfn = start >> PAGE_SHIFT; | |
1261 | unsigned long nr_pages = size >> PAGE_SHIFT; | |
24d335ca | 1262 | |
feee6b29 | 1263 | __remove_pages(start_pfn, nr_pages, altmap); |
4b94ffdc | 1264 | kernel_physical_mapping_remove(start, start + size); |
24d335ca | 1265 | } |
45e0b78b KM |
1266 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
1267 | ||
81ac3ad9 | 1268 | static struct kcore_list kcore_vsyscall; |
1da177e4 | 1269 | |
94b43c3d YL |
1270 | static void __init register_page_bootmem_info(void) |
1271 | { | |
6be24bed | 1272 | #if defined(CONFIG_NUMA) || defined(CONFIG_HUGETLB_PAGE_FREE_VMEMMAP) |
94b43c3d YL |
1273 | int i; |
1274 | ||
1275 | for_each_online_node(i) | |
1276 | register_page_bootmem_info_node(NODE_DATA(i)); | |
1277 | #endif | |
1278 | } | |
1279 | ||
6eb82f99 JR |
1280 | /* |
1281 | * Pre-allocates page-table pages for the vmalloc area in the kernel page-table. | |
1282 | * Only the level which needs to be synchronized between all page-tables is | |
1283 | * allocated because the synchronization can be expensive. | |
1284 | */ | |
1285 | static void __init preallocate_vmalloc_pages(void) | |
1286 | { | |
1287 | unsigned long addr; | |
1288 | const char *lvl; | |
1289 | ||
1290 | for (addr = VMALLOC_START; addr <= VMALLOC_END; addr = ALIGN(addr + 1, PGDIR_SIZE)) { | |
1291 | pgd_t *pgd = pgd_offset_k(addr); | |
1292 | p4d_t *p4d; | |
1293 | pud_t *pud; | |
1294 | ||
995909a4 JR |
1295 | lvl = "p4d"; |
1296 | p4d = p4d_alloc(&init_mm, pgd, addr); | |
1297 | if (!p4d) | |
1298 | goto failed; | |
6eb82f99 JR |
1299 | |
1300 | if (pgtable_l5_enabled()) | |
1301 | continue; | |
1302 | ||
7a27ef5e JR |
1303 | /* |
1304 | * The goal here is to allocate all possibly required | |
1305 | * hardware page tables pointed to by the top hardware | |
1306 | * level. | |
1307 | * | |
1308 | * On 4-level systems, the P4D layer is folded away and | |
1309 | * the above code does no preallocation. Below, go down | |
1310 | * to the pud _software_ level to ensure the second | |
1311 | * hardware level is allocated on 4-level systems too. | |
1312 | */ | |
995909a4 JR |
1313 | lvl = "pud"; |
1314 | pud = pud_alloc(&init_mm, p4d, addr); | |
1315 | if (!pud) | |
1316 | goto failed; | |
6eb82f99 JR |
1317 | } |
1318 | ||
1319 | return; | |
1320 | ||
1321 | failed: | |
1322 | ||
1323 | /* | |
1324 | * The pages have to be there now or they will be missing in | |
1325 | * process page-tables later. | |
1326 | */ | |
1327 | panic("Failed to pre-allocate %s pages for vmalloc area\n", lvl); | |
1328 | } | |
1329 | ||
1da177e4 LT |
1330 | void __init mem_init(void) |
1331 | { | |
0dc243ae | 1332 | pci_iommu_alloc(); |
1da177e4 | 1333 | |
48ddb154 | 1334 | /* clear_bss() already clear the empty_zero_page */ |
1da177e4 | 1335 | |
bced0e32 | 1336 | /* this will put all memory onto the freelists */ |
c6ffc5ca | 1337 | memblock_free_all(); |
1da177e4 | 1338 | after_bootmem = 1; |
6f84f8d1 | 1339 | x86_init.hyper.init_after_bootmem(); |
1da177e4 | 1340 | |
353b1e7b PT |
1341 | /* |
1342 | * Must be done after boot memory is put on freelist, because here we | |
1343 | * might set fields in deferred struct pages that have not yet been | |
c6ffc5ca | 1344 | * initialized, and memblock_free_all() initializes all the reserved |
353b1e7b PT |
1345 | * deferred pages for us. |
1346 | */ | |
1347 | register_page_bootmem_info(); | |
1348 | ||
1da177e4 | 1349 | /* Register memory areas for /proc/kcore */ |
cd026ca2 JZ |
1350 | if (get_gate_vma(&init_mm)) |
1351 | kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); | |
1da177e4 | 1352 | |
6eb82f99 | 1353 | preallocate_vmalloc_pages(); |
1da177e4 LT |
1354 | } |
1355 | ||
ecd09650 DJ |
1356 | #ifdef CONFIG_DEFERRED_STRUCT_PAGE_INIT |
1357 | int __init deferred_page_init_max_threads(const struct cpumask *node_cpumask) | |
1358 | { | |
1359 | /* | |
1360 | * More CPUs always led to greater speedups on tested systems, up to | |
1361 | * all the nodes' CPUs. Use all since the system is otherwise idle | |
1362 | * now. | |
1363 | */ | |
1364 | return max_t(int, cpumask_weight(node_cpumask), 1); | |
1365 | } | |
1366 | #endif | |
1367 | ||
502f6604 | 1368 | int kernel_set_to_readonly; |
16239630 | 1369 | |
67df197b AV |
1370 | void mark_rodata_ro(void) |
1371 | { | |
74e08179 | 1372 | unsigned long start = PFN_ALIGN(_text); |
fc8d7826 | 1373 | unsigned long rodata_start = PFN_ALIGN(__start_rodata); |
2d0004d1 KC |
1374 | unsigned long end = (unsigned long)__end_rodata_hpage_align; |
1375 | unsigned long text_end = PFN_ALIGN(_etext); | |
1376 | unsigned long rodata_end = PFN_ALIGN(__end_rodata); | |
45e2a9d4 | 1377 | unsigned long all_end; |
8f0f996e | 1378 | |
6fb14755 | 1379 | printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", |
e3ebadd9 | 1380 | (end - start) >> 10); |
984bb80d AV |
1381 | set_memory_ro(start, (end - start) >> PAGE_SHIFT); |
1382 | ||
16239630 SR |
1383 | kernel_set_to_readonly = 1; |
1384 | ||
984bb80d | 1385 | /* |
72212675 YL |
1386 | * The rodata/data/bss/brk section (but not the kernel text!) |
1387 | * should also be not-executable. | |
45e2a9d4 KC |
1388 | * |
1389 | * We align all_end to PMD_SIZE because the existing mapping | |
1390 | * is a full PMD. If we would align _brk_end to PAGE_SIZE we | |
1391 | * split the PMD and the reminder between _brk_end and the end | |
1392 | * of the PMD will remain mapped executable. | |
1393 | * | |
1394 | * Any PMD which was setup after the one which covers _brk_end | |
1395 | * has been zapped already via cleanup_highmem(). | |
984bb80d | 1396 | */ |
45e2a9d4 | 1397 | all_end = roundup((unsigned long)_brk_end, PMD_SIZE); |
ab76f7b4 | 1398 | set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); |
67df197b | 1399 | |
59566b0b SRV |
1400 | set_ftrace_ops_ro(); |
1401 | ||
0c42f392 | 1402 | #ifdef CONFIG_CPA_DEBUG |
10f22dde | 1403 | printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); |
6d238cc4 | 1404 | set_memory_rw(start, (end-start) >> PAGE_SHIFT); |
0c42f392 | 1405 | |
10f22dde | 1406 | printk(KERN_INFO "Testing CPA: again\n"); |
6d238cc4 | 1407 | set_memory_ro(start, (end-start) >> PAGE_SHIFT); |
0c42f392 | 1408 | #endif |
74e08179 | 1409 | |
5494c3a6 KC |
1410 | free_kernel_image_pages("unused kernel image (text/rodata gap)", |
1411 | (void *)text_end, (void *)rodata_start); | |
1412 | free_kernel_image_pages("unused kernel image (rodata/data gap)", | |
1413 | (void *)rodata_end, (void *)_sdata); | |
e1a58320 SS |
1414 | |
1415 | debug_checkwx(); | |
67df197b | 1416 | } |
4e4eee0e | 1417 | |
14a62c34 TG |
1418 | int kern_addr_valid(unsigned long addr) |
1419 | { | |
1da177e4 | 1420 | unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT; |
14a62c34 | 1421 | pgd_t *pgd; |
f2a6a705 | 1422 | p4d_t *p4d; |
14a62c34 TG |
1423 | pud_t *pud; |
1424 | pmd_t *pmd; | |
1425 | pte_t *pte; | |
1da177e4 LT |
1426 | |
1427 | if (above != 0 && above != -1UL) | |
14a62c34 TG |
1428 | return 0; |
1429 | ||
1da177e4 LT |
1430 | pgd = pgd_offset_k(addr); |
1431 | if (pgd_none(*pgd)) | |
1432 | return 0; | |
1433 | ||
f2a6a705 | 1434 | p4d = p4d_offset(pgd, addr); |
34b1999d | 1435 | if (!p4d_present(*p4d)) |
f2a6a705 KS |
1436 | return 0; |
1437 | ||
1438 | pud = pud_offset(p4d, addr); | |
34b1999d | 1439 | if (!pud_present(*pud)) |
14a62c34 | 1440 | return 0; |
1da177e4 | 1441 | |
0ee364eb MG |
1442 | if (pud_large(*pud)) |
1443 | return pfn_valid(pud_pfn(*pud)); | |
1444 | ||
1da177e4 | 1445 | pmd = pmd_offset(pud, addr); |
34b1999d | 1446 | if (!pmd_present(*pmd)) |
1da177e4 | 1447 | return 0; |
14a62c34 | 1448 | |
1da177e4 LT |
1449 | if (pmd_large(*pmd)) |
1450 | return pfn_valid(pmd_pfn(*pmd)); | |
1451 | ||
1452 | pte = pte_offset_kernel(pmd, addr); | |
1453 | if (pte_none(*pte)) | |
1454 | return 0; | |
14a62c34 | 1455 | |
1da177e4 LT |
1456 | return pfn_valid(pte_pfn(*pte)); |
1457 | } | |
1458 | ||
078eb6aa PT |
1459 | /* |
1460 | * Block size is the minimum amount of memory which can be hotplugged or | |
1461 | * hotremoved. It must be power of two and must be equal or larger than | |
1462 | * MIN_MEMORY_BLOCK_SIZE. | |
1463 | */ | |
1464 | #define MAX_BLOCK_SIZE (2UL << 30) | |
1465 | ||
1466 | /* Amount of ram needed to start using large blocks */ | |
1467 | #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30) | |
1468 | ||
f642fb58 | 1469 | /* Adjustable memory block size */ |
1470 | static unsigned long set_memory_block_size; | |
1471 | int __init set_memory_block_size_order(unsigned int order) | |
1472 | { | |
1473 | unsigned long size = 1UL << order; | |
1474 | ||
1475 | if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE) | |
1476 | return -EINVAL; | |
1477 | ||
1478 | set_memory_block_size = size; | |
1479 | return 0; | |
1480 | } | |
1481 | ||
982792c7 | 1482 | static unsigned long probe_memory_block_size(void) |
1dc41aa6 | 1483 | { |
078eb6aa PT |
1484 | unsigned long boot_mem_end = max_pfn << PAGE_SHIFT; |
1485 | unsigned long bz; | |
982792c7 | 1486 | |
f642fb58 | 1487 | /* If memory block size has been set, then use it */ |
1488 | bz = set_memory_block_size; | |
1489 | if (bz) | |
078eb6aa | 1490 | goto done; |
982792c7 | 1491 | |
078eb6aa PT |
1492 | /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */ |
1493 | if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) { | |
1494 | bz = MIN_MEMORY_BLOCK_SIZE; | |
1495 | goto done; | |
1496 | } | |
1497 | ||
fe124c95 DJ |
1498 | /* |
1499 | * Use max block size to minimize overhead on bare metal, where | |
1500 | * alignment for memory hotplug isn't a concern. | |
1501 | */ | |
1502 | if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) { | |
1503 | bz = MAX_BLOCK_SIZE; | |
1504 | goto done; | |
1505 | } | |
1506 | ||
078eb6aa PT |
1507 | /* Find the largest allowed block size that aligns to memory end */ |
1508 | for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) { | |
1509 | if (IS_ALIGNED(boot_mem_end, bz)) | |
1510 | break; | |
1511 | } | |
1512 | done: | |
43c75f93 | 1513 | pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); |
982792c7 YL |
1514 | |
1515 | return bz; | |
1516 | } | |
1517 | ||
1518 | static unsigned long memory_block_size_probed; | |
1519 | unsigned long memory_block_size_bytes(void) | |
1520 | { | |
1521 | if (!memory_block_size_probed) | |
1522 | memory_block_size_probed = probe_memory_block_size(); | |
1523 | ||
1524 | return memory_block_size_probed; | |
1525 | } | |
1526 | ||
0889eba5 CL |
1527 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
1528 | /* | |
1529 | * Initialise the sparsemem vmemmap using huge-pages at the PMD level. | |
1530 | */ | |
c2b91e2e YL |
1531 | static long __meminitdata addr_start, addr_end; |
1532 | static void __meminitdata *p_start, *p_end; | |
1533 | static int __meminitdata node_start; | |
1534 | ||
e8216da5 | 1535 | static int __meminit vmemmap_populate_hugepages(unsigned long start, |
4b94ffdc | 1536 | unsigned long end, int node, struct vmem_altmap *altmap) |
0889eba5 | 1537 | { |
0aad818b | 1538 | unsigned long addr; |
0889eba5 CL |
1539 | unsigned long next; |
1540 | pgd_t *pgd; | |
f2a6a705 | 1541 | p4d_t *p4d; |
0889eba5 CL |
1542 | pud_t *pud; |
1543 | pmd_t *pmd; | |
1544 | ||
0aad818b | 1545 | for (addr = start; addr < end; addr = next) { |
e8216da5 | 1546 | next = pmd_addr_end(addr, end); |
0889eba5 CL |
1547 | |
1548 | pgd = vmemmap_pgd_populate(addr, node); | |
1549 | if (!pgd) | |
1550 | return -ENOMEM; | |
14a62c34 | 1551 | |
f2a6a705 KS |
1552 | p4d = vmemmap_p4d_populate(pgd, addr, node); |
1553 | if (!p4d) | |
1554 | return -ENOMEM; | |
1555 | ||
1556 | pud = vmemmap_pud_populate(p4d, addr, node); | |
0889eba5 CL |
1557 | if (!pud) |
1558 | return -ENOMEM; | |
1559 | ||
e8216da5 JW |
1560 | pmd = pmd_offset(pud, addr); |
1561 | if (pmd_none(*pmd)) { | |
e8216da5 | 1562 | void *p; |
14a62c34 | 1563 | |
56993b4e | 1564 | p = vmemmap_alloc_block_buf(PMD_SIZE, node, altmap); |
8e2cdbcb JW |
1565 | if (p) { |
1566 | pte_t entry; | |
1567 | ||
1568 | entry = pfn_pte(__pa(p) >> PAGE_SHIFT, | |
1569 | PAGE_KERNEL_LARGE); | |
1570 | set_pmd(pmd, __pmd(pte_val(entry))); | |
1571 | ||
1572 | /* check to see if we have contiguous blocks */ | |
1573 | if (p_end != p || node_start != node) { | |
1574 | if (p_start) | |
c9cdaeb2 | 1575 | pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", |
8e2cdbcb JW |
1576 | addr_start, addr_end-1, p_start, p_end-1, node_start); |
1577 | addr_start = addr; | |
1578 | node_start = node; | |
1579 | p_start = p; | |
1580 | } | |
7c934d39 | 1581 | |
8e2cdbcb JW |
1582 | addr_end = addr + PMD_SIZE; |
1583 | p_end = p + PMD_SIZE; | |
8d400913 OS |
1584 | |
1585 | if (!IS_ALIGNED(addr, PMD_SIZE) || | |
1586 | !IS_ALIGNED(next, PMD_SIZE)) | |
1587 | vmemmap_use_new_sub_pmd(addr, next); | |
1588 | ||
8e2cdbcb | 1589 | continue; |
4b94ffdc DW |
1590 | } else if (altmap) |
1591 | return -ENOMEM; /* no fallback */ | |
8e2cdbcb | 1592 | } else if (pmd_large(*pmd)) { |
e8216da5 | 1593 | vmemmap_verify((pte_t *)pmd, node, addr, next); |
faf1c000 | 1594 | vmemmap_use_sub_pmd(addr, next); |
8e2cdbcb JW |
1595 | continue; |
1596 | } | |
1d9cfee7 | 1597 | if (vmemmap_populate_basepages(addr, next, node, NULL)) |
8e2cdbcb | 1598 | return -ENOMEM; |
0889eba5 | 1599 | } |
0889eba5 CL |
1600 | return 0; |
1601 | } | |
c2b91e2e | 1602 | |
7b73d978 CH |
1603 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
1604 | struct vmem_altmap *altmap) | |
e8216da5 JW |
1605 | { |
1606 | int err; | |
1607 | ||
8e2df191 OS |
1608 | VM_BUG_ON(!IS_ALIGNED(start, PAGE_SIZE)); |
1609 | VM_BUG_ON(!IS_ALIGNED(end, PAGE_SIZE)); | |
1610 | ||
2d7a2171 | 1611 | if (end - start < PAGES_PER_SECTION * sizeof(struct page)) |
1d9cfee7 | 1612 | err = vmemmap_populate_basepages(start, end, node, NULL); |
e9c0a3f0 | 1613 | else if (boot_cpu_has(X86_FEATURE_PSE)) |
4b94ffdc DW |
1614 | err = vmemmap_populate_hugepages(start, end, node, altmap); |
1615 | else if (altmap) { | |
1616 | pr_err_once("%s: no cpu support for altmap allocations\n", | |
1617 | __func__); | |
1618 | err = -ENOMEM; | |
1619 | } else | |
1d9cfee7 | 1620 | err = vmemmap_populate_basepages(start, end, node, NULL); |
e8216da5 | 1621 | if (!err) |
5372e155 | 1622 | sync_global_pgds(start, end - 1); |
e8216da5 JW |
1623 | return err; |
1624 | } | |
1625 | ||
426e5c42 | 1626 | #ifdef CONFIG_HAVE_BOOTMEM_INFO_NODE |
46723bfa | 1627 | void register_page_bootmem_memmap(unsigned long section_nr, |
15670bfe | 1628 | struct page *start_page, unsigned long nr_pages) |
46723bfa YI |
1629 | { |
1630 | unsigned long addr = (unsigned long)start_page; | |
15670bfe | 1631 | unsigned long end = (unsigned long)(start_page + nr_pages); |
46723bfa YI |
1632 | unsigned long next; |
1633 | pgd_t *pgd; | |
f2a6a705 | 1634 | p4d_t *p4d; |
46723bfa YI |
1635 | pud_t *pud; |
1636 | pmd_t *pmd; | |
15670bfe | 1637 | unsigned int nr_pmd_pages; |
46723bfa YI |
1638 | struct page *page; |
1639 | ||
1640 | for (; addr < end; addr = next) { | |
1641 | pte_t *pte = NULL; | |
1642 | ||
1643 | pgd = pgd_offset_k(addr); | |
1644 | if (pgd_none(*pgd)) { | |
1645 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
1646 | continue; | |
1647 | } | |
1648 | get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO); | |
1649 | ||
f2a6a705 KS |
1650 | p4d = p4d_offset(pgd, addr); |
1651 | if (p4d_none(*p4d)) { | |
1652 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
1653 | continue; | |
1654 | } | |
1655 | get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO); | |
1656 | ||
1657 | pud = pud_offset(p4d, addr); | |
46723bfa YI |
1658 | if (pud_none(*pud)) { |
1659 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
1660 | continue; | |
1661 | } | |
1662 | get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO); | |
1663 | ||
2d7a2171 | 1664 | if (!boot_cpu_has(X86_FEATURE_PSE)) { |
46723bfa YI |
1665 | next = (addr + PAGE_SIZE) & PAGE_MASK; |
1666 | pmd = pmd_offset(pud, addr); | |
1667 | if (pmd_none(*pmd)) | |
1668 | continue; | |
1669 | get_page_bootmem(section_nr, pmd_page(*pmd), | |
1670 | MIX_SECTION_INFO); | |
1671 | ||
1672 | pte = pte_offset_kernel(pmd, addr); | |
1673 | if (pte_none(*pte)) | |
1674 | continue; | |
1675 | get_page_bootmem(section_nr, pte_page(*pte), | |
1676 | SECTION_INFO); | |
1677 | } else { | |
1678 | next = pmd_addr_end(addr, end); | |
1679 | ||
1680 | pmd = pmd_offset(pud, addr); | |
1681 | if (pmd_none(*pmd)) | |
1682 | continue; | |
1683 | ||
15670bfe | 1684 | nr_pmd_pages = 1 << get_order(PMD_SIZE); |
46723bfa | 1685 | page = pmd_page(*pmd); |
15670bfe | 1686 | while (nr_pmd_pages--) |
46723bfa YI |
1687 | get_page_bootmem(section_nr, page++, |
1688 | SECTION_INFO); | |
1689 | } | |
1690 | } | |
1691 | } | |
1692 | #endif | |
1693 | ||
c2b91e2e YL |
1694 | void __meminit vmemmap_populate_print_last(void) |
1695 | { | |
1696 | if (p_start) { | |
c9cdaeb2 | 1697 | pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", |
c2b91e2e YL |
1698 | addr_start, addr_end-1, p_start, p_end-1, node_start); |
1699 | p_start = NULL; | |
1700 | p_end = NULL; | |
1701 | node_start = 0; | |
1702 | } | |
1703 | } | |
0889eba5 | 1704 | #endif |