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457c8996 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * linux/arch/x86_64/mm/init.c | |
4 | * | |
5 | * Copyright (C) 1995 Linus Torvalds | |
a2531293 | 6 | * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> |
1da177e4 LT |
7 | * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> |
8 | */ | |
9 | ||
1da177e4 LT |
10 | #include <linux/signal.h> |
11 | #include <linux/sched.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/mman.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/swap.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/init.h> | |
11034d55 | 22 | #include <linux/initrd.h> |
1da177e4 | 23 | #include <linux/pagemap.h> |
a9ce6bc1 | 24 | #include <linux/memblock.h> |
1da177e4 | 25 | #include <linux/proc_fs.h> |
59170891 | 26 | #include <linux/pci.h> |
6fb14755 | 27 | #include <linux/pfn.h> |
c9cf5528 | 28 | #include <linux/poison.h> |
17a941d8 | 29 | #include <linux/dma-mapping.h> |
a63fdc51 | 30 | #include <linux/memory.h> |
44df75e6 | 31 | #include <linux/memory_hotplug.h> |
4b94ffdc | 32 | #include <linux/memremap.h> |
ae32b129 | 33 | #include <linux/nmi.h> |
5a0e3ad6 | 34 | #include <linux/gfp.h> |
2f96b8c1 | 35 | #include <linux/kcore.h> |
1da177e4 LT |
36 | |
37 | #include <asm/processor.h> | |
46eaa670 | 38 | #include <asm/bios_ebda.h> |
7c0f6ba6 | 39 | #include <linux/uaccess.h> |
1da177e4 LT |
40 | #include <asm/pgtable.h> |
41 | #include <asm/pgalloc.h> | |
42 | #include <asm/dma.h> | |
43 | #include <asm/fixmap.h> | |
66441bd3 | 44 | #include <asm/e820/api.h> |
1da177e4 LT |
45 | #include <asm/apic.h> |
46 | #include <asm/tlb.h> | |
47 | #include <asm/mmu_context.h> | |
48 | #include <asm/proto.h> | |
49 | #include <asm/smp.h> | |
2bc0414e | 50 | #include <asm/sections.h> |
718fc13b | 51 | #include <asm/kdebug.h> |
aaa64e04 | 52 | #include <asm/numa.h> |
d1163651 | 53 | #include <asm/set_memory.h> |
4fcb2083 | 54 | #include <asm/init.h> |
43c75f93 | 55 | #include <asm/uv/uv.h> |
e5f15b45 | 56 | #include <asm/setup.h> |
1da177e4 | 57 | |
5c51bdbe YL |
58 | #include "mm_internal.h" |
59 | ||
cf4fb15b | 60 | #include "ident_map.c" |
aece2785 | 61 | |
eccd9064 BS |
62 | #define DEFINE_POPULATE(fname, type1, type2, init) \ |
63 | static inline void fname##_init(struct mm_struct *mm, \ | |
64 | type1##_t *arg1, type2##_t *arg2, bool init) \ | |
65 | { \ | |
66 | if (init) \ | |
67 | fname##_safe(mm, arg1, arg2); \ | |
68 | else \ | |
69 | fname(mm, arg1, arg2); \ | |
70 | } | |
71 | ||
72 | DEFINE_POPULATE(p4d_populate, p4d, pud, init) | |
73 | DEFINE_POPULATE(pgd_populate, pgd, p4d, init) | |
74 | DEFINE_POPULATE(pud_populate, pud, pmd, init) | |
75 | DEFINE_POPULATE(pmd_populate_kernel, pmd, pte, init) | |
76 | ||
77 | #define DEFINE_ENTRY(type1, type2, init) \ | |
78 | static inline void set_##type1##_init(type1##_t *arg1, \ | |
79 | type2##_t arg2, bool init) \ | |
80 | { \ | |
81 | if (init) \ | |
82 | set_##type1##_safe(arg1, arg2); \ | |
83 | else \ | |
84 | set_##type1(arg1, arg2); \ | |
85 | } | |
86 | ||
87 | DEFINE_ENTRY(p4d, p4d, init) | |
88 | DEFINE_ENTRY(pud, pud, init) | |
89 | DEFINE_ENTRY(pmd, pmd, init) | |
90 | DEFINE_ENTRY(pte, pte, init) | |
91 | ||
92 | ||
1da177e4 LT |
93 | /* |
94 | * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the | |
95 | * physical space so we can cache the place of the first one and move | |
96 | * around without checking the pgd every time. | |
97 | */ | |
98 | ||
8a57f484 | 99 | /* Bits supported by the hardware: */ |
f955371c | 100 | pteval_t __supported_pte_mask __read_mostly = ~0; |
8a57f484 DH |
101 | /* Bits allowed in normal kernel mappings: */ |
102 | pteval_t __default_kernel_pte_mask __read_mostly = ~0; | |
bd220a24 | 103 | EXPORT_SYMBOL_GPL(__supported_pte_mask); |
8a57f484 DH |
104 | /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */ |
105 | EXPORT_SYMBOL(__default_kernel_pte_mask); | |
bd220a24 | 106 | |
bd220a24 YL |
107 | int force_personality32; |
108 | ||
deed05b7 IM |
109 | /* |
110 | * noexec32=on|off | |
111 | * Control non executable heap for 32bit processes. | |
112 | * To control the stack too use noexec=off | |
113 | * | |
114 | * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) | |
115 | * off PROT_READ implies PROT_EXEC | |
116 | */ | |
bd220a24 YL |
117 | static int __init nonx32_setup(char *str) |
118 | { | |
119 | if (!strcmp(str, "on")) | |
120 | force_personality32 &= ~READ_IMPLIES_EXEC; | |
121 | else if (!strcmp(str, "off")) | |
122 | force_personality32 |= READ_IMPLIES_EXEC; | |
123 | return 1; | |
124 | } | |
125 | __setup("noexec32=", nonx32_setup); | |
126 | ||
91f606a8 | 127 | static void sync_global_pgds_l5(unsigned long start, unsigned long end) |
141efad7 KS |
128 | { |
129 | unsigned long addr; | |
130 | ||
131 | for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { | |
132 | const pgd_t *pgd_ref = pgd_offset_k(addr); | |
133 | struct page *page; | |
134 | ||
135 | /* Check for overflow */ | |
136 | if (addr < start) | |
137 | break; | |
138 | ||
139 | if (pgd_none(*pgd_ref)) | |
140 | continue; | |
141 | ||
142 | spin_lock(&pgd_lock); | |
143 | list_for_each_entry(page, &pgd_list, lru) { | |
144 | pgd_t *pgd; | |
145 | spinlock_t *pgt_lock; | |
146 | ||
147 | pgd = (pgd_t *)page_address(page) + pgd_index(addr); | |
148 | /* the pgt_lock only for Xen */ | |
149 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; | |
150 | spin_lock(pgt_lock); | |
151 | ||
152 | if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) | |
153 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
154 | ||
155 | if (pgd_none(*pgd)) | |
156 | set_pgd(pgd, *pgd_ref); | |
157 | ||
158 | spin_unlock(pgt_lock); | |
159 | } | |
160 | spin_unlock(&pgd_lock); | |
161 | } | |
162 | } | |
91f606a8 KS |
163 | |
164 | static void sync_global_pgds_l4(unsigned long start, unsigned long end) | |
6afb5157 | 165 | { |
fc5f9d5f | 166 | unsigned long addr; |
44235dcd | 167 | |
fc5f9d5f BH |
168 | for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { |
169 | pgd_t *pgd_ref = pgd_offset_k(addr); | |
f2a6a705 | 170 | const p4d_t *p4d_ref; |
44235dcd JF |
171 | struct page *page; |
172 | ||
f2a6a705 KS |
173 | /* |
174 | * With folded p4d, pgd_none() is always false, we need to | |
175 | * handle synchonization on p4d level. | |
176 | */ | |
c65e774f | 177 | MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); |
fc5f9d5f | 178 | p4d_ref = p4d_offset(pgd_ref, addr); |
f2a6a705 KS |
179 | |
180 | if (p4d_none(*p4d_ref)) | |
44235dcd JF |
181 | continue; |
182 | ||
a79e53d8 | 183 | spin_lock(&pgd_lock); |
44235dcd | 184 | list_for_each_entry(page, &pgd_list, lru) { |
be354f40 | 185 | pgd_t *pgd; |
f2a6a705 | 186 | p4d_t *p4d; |
617d34d9 JF |
187 | spinlock_t *pgt_lock; |
188 | ||
fc5f9d5f BH |
189 | pgd = (pgd_t *)page_address(page) + pgd_index(addr); |
190 | p4d = p4d_offset(pgd, addr); | |
a79e53d8 | 191 | /* the pgt_lock only for Xen */ |
617d34d9 JF |
192 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; |
193 | spin_lock(pgt_lock); | |
194 | ||
f2a6a705 KS |
195 | if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) |
196 | BUG_ON(p4d_page_vaddr(*p4d) | |
197 | != p4d_page_vaddr(*p4d_ref)); | |
617d34d9 | 198 | |
f2a6a705 KS |
199 | if (p4d_none(*p4d)) |
200 | set_p4d(p4d, *p4d_ref); | |
9661d5bc | 201 | |
617d34d9 | 202 | spin_unlock(pgt_lock); |
44235dcd | 203 | } |
a79e53d8 | 204 | spin_unlock(&pgd_lock); |
44235dcd | 205 | } |
6afb5157 | 206 | } |
91f606a8 KS |
207 | |
208 | /* | |
209 | * When memory was added make sure all the processes MM have | |
210 | * suitable PGD entries in the local PGD level page. | |
211 | */ | |
212 | void sync_global_pgds(unsigned long start, unsigned long end) | |
213 | { | |
ed7588d5 | 214 | if (pgtable_l5_enabled()) |
91f606a8 KS |
215 | sync_global_pgds_l5(start, end); |
216 | else | |
217 | sync_global_pgds_l4(start, end); | |
218 | } | |
6afb5157 | 219 | |
8d6ea967 MS |
220 | /* |
221 | * NOTE: This function is marked __ref because it calls __init function | |
222 | * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. | |
223 | */ | |
224 | static __ref void *spp_getpage(void) | |
14a62c34 | 225 | { |
1da177e4 | 226 | void *ptr; |
14a62c34 | 227 | |
1da177e4 | 228 | if (after_bootmem) |
75f296d9 | 229 | ptr = (void *) get_zeroed_page(GFP_ATOMIC); |
1da177e4 | 230 | else |
15c3c114 | 231 | ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE); |
14a62c34 TG |
232 | |
233 | if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { | |
234 | panic("set_pte_phys: cannot allocate page data %s\n", | |
235 | after_bootmem ? "after bootmem" : ""); | |
236 | } | |
1da177e4 | 237 | |
10f22dde | 238 | pr_debug("spp_getpage %p\n", ptr); |
14a62c34 | 239 | |
1da177e4 | 240 | return ptr; |
14a62c34 | 241 | } |
1da177e4 | 242 | |
f2a6a705 | 243 | static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) |
1da177e4 | 244 | { |
458a3e64 | 245 | if (pgd_none(*pgd)) { |
f2a6a705 KS |
246 | p4d_t *p4d = (p4d_t *)spp_getpage(); |
247 | pgd_populate(&init_mm, pgd, p4d); | |
248 | if (p4d != p4d_offset(pgd, 0)) | |
458a3e64 | 249 | printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", |
f2a6a705 KS |
250 | p4d, p4d_offset(pgd, 0)); |
251 | } | |
252 | return p4d_offset(pgd, vaddr); | |
253 | } | |
254 | ||
255 | static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) | |
256 | { | |
257 | if (p4d_none(*p4d)) { | |
258 | pud_t *pud = (pud_t *)spp_getpage(); | |
259 | p4d_populate(&init_mm, p4d, pud); | |
260 | if (pud != pud_offset(p4d, 0)) | |
261 | printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", | |
262 | pud, pud_offset(p4d, 0)); | |
458a3e64 | 263 | } |
f2a6a705 | 264 | return pud_offset(p4d, vaddr); |
458a3e64 | 265 | } |
1da177e4 | 266 | |
f254f390 | 267 | static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) |
458a3e64 | 268 | { |
1da177e4 | 269 | if (pud_none(*pud)) { |
458a3e64 | 270 | pmd_t *pmd = (pmd_t *) spp_getpage(); |
bb23e403 | 271 | pud_populate(&init_mm, pud, pmd); |
458a3e64 | 272 | if (pmd != pmd_offset(pud, 0)) |
f2a6a705 | 273 | printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", |
458a3e64 | 274 | pmd, pmd_offset(pud, 0)); |
1da177e4 | 275 | } |
458a3e64 TH |
276 | return pmd_offset(pud, vaddr); |
277 | } | |
278 | ||
f254f390 | 279 | static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) |
458a3e64 | 280 | { |
1da177e4 | 281 | if (pmd_none(*pmd)) { |
458a3e64 | 282 | pte_t *pte = (pte_t *) spp_getpage(); |
bb23e403 | 283 | pmd_populate_kernel(&init_mm, pmd, pte); |
458a3e64 | 284 | if (pte != pte_offset_kernel(pmd, 0)) |
f2a6a705 | 285 | printk(KERN_ERR "PAGETABLE BUG #03!\n"); |
1da177e4 | 286 | } |
458a3e64 TH |
287 | return pte_offset_kernel(pmd, vaddr); |
288 | } | |
289 | ||
f2a6a705 | 290 | static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) |
458a3e64 | 291 | { |
f2a6a705 KS |
292 | pmd_t *pmd = fill_pmd(pud, vaddr); |
293 | pte_t *pte = fill_pte(pmd, vaddr); | |
1da177e4 | 294 | |
1da177e4 LT |
295 | set_pte(pte, new_pte); |
296 | ||
297 | /* | |
298 | * It's enough to flush this one mapping. | |
299 | * (PGE mappings get flushed as well) | |
300 | */ | |
1299ef1d | 301 | __flush_tlb_one_kernel(vaddr); |
1da177e4 LT |
302 | } |
303 | ||
f2a6a705 KS |
304 | void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) |
305 | { | |
306 | p4d_t *p4d = p4d_page + p4d_index(vaddr); | |
307 | pud_t *pud = fill_pud(p4d, vaddr); | |
308 | ||
309 | __set_pte_vaddr(pud, vaddr, new_pte); | |
310 | } | |
311 | ||
312 | void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) | |
313 | { | |
314 | pud_t *pud = pud_page + pud_index(vaddr); | |
315 | ||
316 | __set_pte_vaddr(pud, vaddr, new_pte); | |
317 | } | |
318 | ||
458a3e64 | 319 | void set_pte_vaddr(unsigned long vaddr, pte_t pteval) |
0814e0ba EH |
320 | { |
321 | pgd_t *pgd; | |
f2a6a705 | 322 | p4d_t *p4d_page; |
0814e0ba EH |
323 | |
324 | pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); | |
325 | ||
326 | pgd = pgd_offset_k(vaddr); | |
327 | if (pgd_none(*pgd)) { | |
328 | printk(KERN_ERR | |
329 | "PGD FIXMAP MISSING, it should be setup in head.S!\n"); | |
330 | return; | |
331 | } | |
f2a6a705 KS |
332 | |
333 | p4d_page = p4d_offset(pgd, 0); | |
334 | set_pte_vaddr_p4d(p4d_page, vaddr, pteval); | |
0814e0ba EH |
335 | } |
336 | ||
458a3e64 | 337 | pmd_t * __init populate_extra_pmd(unsigned long vaddr) |
11124411 TH |
338 | { |
339 | pgd_t *pgd; | |
f2a6a705 | 340 | p4d_t *p4d; |
11124411 TH |
341 | pud_t *pud; |
342 | ||
343 | pgd = pgd_offset_k(vaddr); | |
f2a6a705 KS |
344 | p4d = fill_p4d(pgd, vaddr); |
345 | pud = fill_pud(p4d, vaddr); | |
458a3e64 TH |
346 | return fill_pmd(pud, vaddr); |
347 | } | |
348 | ||
349 | pte_t * __init populate_extra_pte(unsigned long vaddr) | |
350 | { | |
351 | pmd_t *pmd; | |
11124411 | 352 | |
458a3e64 TH |
353 | pmd = populate_extra_pmd(vaddr); |
354 | return fill_pte(pmd, vaddr); | |
11124411 TH |
355 | } |
356 | ||
3a9e189d JS |
357 | /* |
358 | * Create large page table mappings for a range of physical addresses. | |
359 | */ | |
360 | static void __init __init_extra_mapping(unsigned long phys, unsigned long size, | |
2df58b6d | 361 | enum page_cache_mode cache) |
3a9e189d JS |
362 | { |
363 | pgd_t *pgd; | |
f2a6a705 | 364 | p4d_t *p4d; |
3a9e189d JS |
365 | pud_t *pud; |
366 | pmd_t *pmd; | |
2df58b6d | 367 | pgprot_t prot; |
3a9e189d | 368 | |
2df58b6d JG |
369 | pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | |
370 | pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache))); | |
3a9e189d JS |
371 | BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); |
372 | for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { | |
373 | pgd = pgd_offset_k((unsigned long)__va(phys)); | |
374 | if (pgd_none(*pgd)) { | |
f2a6a705 KS |
375 | p4d = (p4d_t *) spp_getpage(); |
376 | set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | | |
377 | _PAGE_USER)); | |
378 | } | |
379 | p4d = p4d_offset(pgd, (unsigned long)__va(phys)); | |
380 | if (p4d_none(*p4d)) { | |
3a9e189d | 381 | pud = (pud_t *) spp_getpage(); |
f2a6a705 | 382 | set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | |
3a9e189d JS |
383 | _PAGE_USER)); |
384 | } | |
f2a6a705 | 385 | pud = pud_offset(p4d, (unsigned long)__va(phys)); |
3a9e189d JS |
386 | if (pud_none(*pud)) { |
387 | pmd = (pmd_t *) spp_getpage(); | |
388 | set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | | |
389 | _PAGE_USER)); | |
390 | } | |
391 | pmd = pmd_offset(pud, phys); | |
392 | BUG_ON(!pmd_none(*pmd)); | |
393 | set_pmd(pmd, __pmd(phys | pgprot_val(prot))); | |
394 | } | |
395 | } | |
396 | ||
397 | void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) | |
398 | { | |
2df58b6d | 399 | __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); |
3a9e189d JS |
400 | } |
401 | ||
402 | void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) | |
403 | { | |
2df58b6d | 404 | __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); |
3a9e189d JS |
405 | } |
406 | ||
31eedd82 | 407 | /* |
88f3aec7 IM |
408 | * The head.S code sets up the kernel high mapping: |
409 | * | |
410 | * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) | |
31eedd82 | 411 | * |
1e3b3081 | 412 | * phys_base holds the negative offset to the kernel, which is added |
31eedd82 TG |
413 | * to the compile time generated pmds. This results in invalid pmds up |
414 | * to the point where we hit the physaddr 0 mapping. | |
415 | * | |
e5f15b45 YL |
416 | * We limit the mappings to the region from _text to _brk_end. _brk_end |
417 | * is rounded up to the 2MB boundary. This catches the invalid pmds as | |
31eedd82 TG |
418 | * well, as they are located before _text: |
419 | */ | |
420 | void __init cleanup_highmap(void) | |
421 | { | |
422 | unsigned long vaddr = __START_KERNEL_map; | |
10054230 | 423 | unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; |
e5f15b45 | 424 | unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; |
31eedd82 | 425 | pmd_t *pmd = level2_kernel_pgt; |
31eedd82 | 426 | |
10054230 YL |
427 | /* |
428 | * Native path, max_pfn_mapped is not set yet. | |
429 | * Xen has valid max_pfn_mapped set in | |
430 | * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). | |
431 | */ | |
432 | if (max_pfn_mapped) | |
433 | vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); | |
434 | ||
e5f15b45 | 435 | for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { |
2884f110 | 436 | if (pmd_none(*pmd)) |
31eedd82 TG |
437 | continue; |
438 | if (vaddr < (unsigned long) _text || vaddr > end) | |
439 | set_pmd(pmd, __pmd(0)); | |
440 | } | |
441 | } | |
442 | ||
59b3d020 TG |
443 | /* |
444 | * Create PTE level page table mapping for physical addresses. | |
445 | * It returns the last physical address mapped. | |
446 | */ | |
7b16eb89 | 447 | static unsigned long __meminit |
59b3d020 | 448 | phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, |
eccd9064 | 449 | pgprot_t prot, bool init) |
4f9c11dd | 450 | { |
59b3d020 TG |
451 | unsigned long pages = 0, paddr_next; |
452 | unsigned long paddr_last = paddr_end; | |
453 | pte_t *pte; | |
4f9c11dd | 454 | int i; |
7b16eb89 | 455 | |
59b3d020 TG |
456 | pte = pte_page + pte_index(paddr); |
457 | i = pte_index(paddr); | |
4f9c11dd | 458 | |
59b3d020 TG |
459 | for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { |
460 | paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; | |
461 | if (paddr >= paddr_end) { | |
eceb3632 | 462 | if (!after_bootmem && |
3bce64f0 | 463 | !e820__mapped_any(paddr & PAGE_MASK, paddr_next, |
09821ff1 | 464 | E820_TYPE_RAM) && |
3bce64f0 | 465 | !e820__mapped_any(paddr & PAGE_MASK, paddr_next, |
09821ff1 | 466 | E820_TYPE_RESERVED_KERN)) |
eccd9064 | 467 | set_pte_init(pte, __pte(0), init); |
eceb3632 | 468 | continue; |
4f9c11dd JF |
469 | } |
470 | ||
b27a43c1 SS |
471 | /* |
472 | * We will re-use the existing mapping. | |
473 | * Xen for example has some special requirements, like mapping | |
474 | * pagetable pages as RO. So assume someone who pre-setup | |
475 | * these mappings are more intelligent. | |
476 | */ | |
dcb32d99 | 477 | if (!pte_none(*pte)) { |
876ee61a JB |
478 | if (!after_bootmem) |
479 | pages++; | |
4f9c11dd | 480 | continue; |
3afa3949 | 481 | } |
4f9c11dd JF |
482 | |
483 | if (0) | |
59b3d020 TG |
484 | pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr, |
485 | pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte); | |
4f9c11dd | 486 | pages++; |
eccd9064 | 487 | set_pte_init(pte, pfn_pte(paddr >> PAGE_SHIFT, prot), init); |
59b3d020 | 488 | paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; |
4f9c11dd | 489 | } |
a2699e47 | 490 | |
4f9c11dd | 491 | update_page_count(PG_LEVEL_4K, pages); |
7b16eb89 | 492 | |
59b3d020 | 493 | return paddr_last; |
4f9c11dd JF |
494 | } |
495 | ||
59b3d020 TG |
496 | /* |
497 | * Create PMD level page table mapping for physical addresses. The virtual | |
498 | * and physical address have to be aligned at this level. | |
499 | * It returns the last physical address mapped. | |
500 | */ | |
cc615032 | 501 | static unsigned long __meminit |
59b3d020 | 502 | phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, |
eccd9064 | 503 | unsigned long page_size_mask, pgprot_t prot, bool init) |
44df75e6 | 504 | { |
59b3d020 TG |
505 | unsigned long pages = 0, paddr_next; |
506 | unsigned long paddr_last = paddr_end; | |
ce0c0e50 | 507 | |
59b3d020 | 508 | int i = pmd_index(paddr); |
44df75e6 | 509 | |
59b3d020 TG |
510 | for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { |
511 | pmd_t *pmd = pmd_page + pmd_index(paddr); | |
4f9c11dd | 512 | pte_t *pte; |
b27a43c1 | 513 | pgprot_t new_prot = prot; |
44df75e6 | 514 | |
59b3d020 TG |
515 | paddr_next = (paddr & PMD_MASK) + PMD_SIZE; |
516 | if (paddr >= paddr_end) { | |
eceb3632 | 517 | if (!after_bootmem && |
3bce64f0 | 518 | !e820__mapped_any(paddr & PMD_MASK, paddr_next, |
09821ff1 | 519 | E820_TYPE_RAM) && |
3bce64f0 | 520 | !e820__mapped_any(paddr & PMD_MASK, paddr_next, |
09821ff1 | 521 | E820_TYPE_RESERVED_KERN)) |
eccd9064 | 522 | set_pmd_init(pmd, __pmd(0), init); |
eceb3632 | 523 | continue; |
44df75e6 | 524 | } |
6ad91658 | 525 | |
dcb32d99 | 526 | if (!pmd_none(*pmd)) { |
8ae3a5a8 JB |
527 | if (!pmd_large(*pmd)) { |
528 | spin_lock(&init_mm.page_table_lock); | |
973dc4f3 | 529 | pte = (pte_t *)pmd_page_vaddr(*pmd); |
59b3d020 | 530 | paddr_last = phys_pte_init(pte, paddr, |
eccd9064 BS |
531 | paddr_end, prot, |
532 | init); | |
8ae3a5a8 | 533 | spin_unlock(&init_mm.page_table_lock); |
a2699e47 | 534 | continue; |
8ae3a5a8 | 535 | } |
b27a43c1 SS |
536 | /* |
537 | * If we are ok with PG_LEVEL_2M mapping, then we will | |
538 | * use the existing mapping, | |
539 | * | |
540 | * Otherwise, we will split the large page mapping but | |
541 | * use the same existing protection bits except for | |
542 | * large page, so that we don't violate Intel's TLB | |
543 | * Application note (317080) which says, while changing | |
544 | * the page sizes, new and old translations should | |
545 | * not differ with respect to page frame and | |
546 | * attributes. | |
547 | */ | |
3afa3949 | 548 | if (page_size_mask & (1 << PG_LEVEL_2M)) { |
876ee61a JB |
549 | if (!after_bootmem) |
550 | pages++; | |
59b3d020 | 551 | paddr_last = paddr_next; |
b27a43c1 | 552 | continue; |
3afa3949 | 553 | } |
b27a43c1 | 554 | new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); |
4f9c11dd JF |
555 | } |
556 | ||
b50efd2a | 557 | if (page_size_mask & (1<<PG_LEVEL_2M)) { |
4f9c11dd | 558 | pages++; |
8ae3a5a8 | 559 | spin_lock(&init_mm.page_table_lock); |
eccd9064 BS |
560 | set_pte_init((pte_t *)pmd, |
561 | pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT, | |
562 | __pgprot(pgprot_val(prot) | _PAGE_PSE)), | |
563 | init); | |
8ae3a5a8 | 564 | spin_unlock(&init_mm.page_table_lock); |
59b3d020 | 565 | paddr_last = paddr_next; |
6ad91658 | 566 | continue; |
4f9c11dd | 567 | } |
6ad91658 | 568 | |
868bf4d6 | 569 | pte = alloc_low_page(); |
eccd9064 | 570 | paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot, init); |
4f9c11dd | 571 | |
8ae3a5a8 | 572 | spin_lock(&init_mm.page_table_lock); |
eccd9064 | 573 | pmd_populate_kernel_init(&init_mm, pmd, pte, init); |
8ae3a5a8 | 574 | spin_unlock(&init_mm.page_table_lock); |
44df75e6 | 575 | } |
ce0c0e50 | 576 | update_page_count(PG_LEVEL_2M, pages); |
59b3d020 | 577 | return paddr_last; |
44df75e6 MT |
578 | } |
579 | ||
59b3d020 TG |
580 | /* |
581 | * Create PUD level page table mapping for physical addresses. The virtual | |
faa37933 TG |
582 | * and physical address do not have to be aligned at this level. KASLR can |
583 | * randomize virtual addresses up to this level. | |
59b3d020 TG |
584 | * It returns the last physical address mapped. |
585 | */ | |
cc615032 | 586 | static unsigned long __meminit |
59b3d020 | 587 | phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, |
eccd9064 | 588 | unsigned long page_size_mask, bool init) |
14a62c34 | 589 | { |
59b3d020 TG |
590 | unsigned long pages = 0, paddr_next; |
591 | unsigned long paddr_last = paddr_end; | |
faa37933 TG |
592 | unsigned long vaddr = (unsigned long)__va(paddr); |
593 | int i = pud_index(vaddr); | |
44df75e6 | 594 | |
59b3d020 | 595 | for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { |
faa37933 | 596 | pud_t *pud; |
1da177e4 | 597 | pmd_t *pmd; |
b27a43c1 | 598 | pgprot_t prot = PAGE_KERNEL; |
1da177e4 | 599 | |
faa37933 TG |
600 | vaddr = (unsigned long)__va(paddr); |
601 | pud = pud_page + pud_index(vaddr); | |
59b3d020 | 602 | paddr_next = (paddr & PUD_MASK) + PUD_SIZE; |
faa37933 | 603 | |
59b3d020 | 604 | if (paddr >= paddr_end) { |
eceb3632 | 605 | if (!after_bootmem && |
3bce64f0 | 606 | !e820__mapped_any(paddr & PUD_MASK, paddr_next, |
09821ff1 | 607 | E820_TYPE_RAM) && |
3bce64f0 | 608 | !e820__mapped_any(paddr & PUD_MASK, paddr_next, |
09821ff1 | 609 | E820_TYPE_RESERVED_KERN)) |
eccd9064 | 610 | set_pud_init(pud, __pud(0), init); |
1da177e4 | 611 | continue; |
14a62c34 | 612 | } |
1da177e4 | 613 | |
dcb32d99 | 614 | if (!pud_none(*pud)) { |
a2699e47 | 615 | if (!pud_large(*pud)) { |
973dc4f3 | 616 | pmd = pmd_offset(pud, 0); |
59b3d020 TG |
617 | paddr_last = phys_pmd_init(pmd, paddr, |
618 | paddr_end, | |
619 | page_size_mask, | |
eccd9064 | 620 | prot, init); |
a2699e47 SS |
621 | continue; |
622 | } | |
b27a43c1 SS |
623 | /* |
624 | * If we are ok with PG_LEVEL_1G mapping, then we will | |
625 | * use the existing mapping. | |
626 | * | |
627 | * Otherwise, we will split the gbpage mapping but use | |
628 | * the same existing protection bits except for large | |
629 | * page, so that we don't violate Intel's TLB | |
630 | * Application note (317080) which says, while changing | |
631 | * the page sizes, new and old translations should | |
632 | * not differ with respect to page frame and | |
633 | * attributes. | |
634 | */ | |
3afa3949 | 635 | if (page_size_mask & (1 << PG_LEVEL_1G)) { |
876ee61a JB |
636 | if (!after_bootmem) |
637 | pages++; | |
59b3d020 | 638 | paddr_last = paddr_next; |
b27a43c1 | 639 | continue; |
3afa3949 | 640 | } |
b27a43c1 | 641 | prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); |
ef925766 AK |
642 | } |
643 | ||
b50efd2a | 644 | if (page_size_mask & (1<<PG_LEVEL_1G)) { |
ce0c0e50 | 645 | pages++; |
8ae3a5a8 | 646 | spin_lock(&init_mm.page_table_lock); |
eccd9064 BS |
647 | set_pte_init((pte_t *)pud, |
648 | pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT, | |
649 | PAGE_KERNEL_LARGE), | |
650 | init); | |
8ae3a5a8 | 651 | spin_unlock(&init_mm.page_table_lock); |
59b3d020 | 652 | paddr_last = paddr_next; |
6ad91658 KM |
653 | continue; |
654 | } | |
655 | ||
868bf4d6 | 656 | pmd = alloc_low_page(); |
59b3d020 | 657 | paddr_last = phys_pmd_init(pmd, paddr, paddr_end, |
eccd9064 | 658 | page_size_mask, prot, init); |
8ae3a5a8 JB |
659 | |
660 | spin_lock(&init_mm.page_table_lock); | |
eccd9064 | 661 | pud_populate_init(&init_mm, pud, pmd, init); |
44df75e6 | 662 | spin_unlock(&init_mm.page_table_lock); |
1da177e4 | 663 | } |
a2699e47 | 664 | |
ce0c0e50 | 665 | update_page_count(PG_LEVEL_1G, pages); |
cc615032 | 666 | |
59b3d020 | 667 | return paddr_last; |
14a62c34 | 668 | } |
1da177e4 | 669 | |
7e82ea94 KS |
670 | static unsigned long __meminit |
671 | phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, | |
eccd9064 | 672 | unsigned long page_size_mask, bool init) |
7e82ea94 | 673 | { |
432c8332 KS |
674 | unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last; |
675 | ||
676 | paddr_last = paddr_end; | |
677 | vaddr = (unsigned long)__va(paddr); | |
678 | vaddr_end = (unsigned long)__va(paddr_end); | |
7e82ea94 | 679 | |
ed7588d5 | 680 | if (!pgtable_l5_enabled()) |
eccd9064 BS |
681 | return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, |
682 | page_size_mask, init); | |
7e82ea94 | 683 | |
432c8332 KS |
684 | for (; vaddr < vaddr_end; vaddr = vaddr_next) { |
685 | p4d_t *p4d = p4d_page + p4d_index(vaddr); | |
7e82ea94 KS |
686 | pud_t *pud; |
687 | ||
432c8332 KS |
688 | vaddr_next = (vaddr & P4D_MASK) + P4D_SIZE; |
689 | paddr = __pa(vaddr); | |
7e82ea94 KS |
690 | |
691 | if (paddr >= paddr_end) { | |
432c8332 | 692 | paddr_next = __pa(vaddr_next); |
7e82ea94 KS |
693 | if (!after_bootmem && |
694 | !e820__mapped_any(paddr & P4D_MASK, paddr_next, | |
695 | E820_TYPE_RAM) && | |
696 | !e820__mapped_any(paddr & P4D_MASK, paddr_next, | |
697 | E820_TYPE_RESERVED_KERN)) | |
eccd9064 | 698 | set_p4d_init(p4d, __p4d(0), init); |
7e82ea94 KS |
699 | continue; |
700 | } | |
701 | ||
702 | if (!p4d_none(*p4d)) { | |
703 | pud = pud_offset(p4d, 0); | |
432c8332 KS |
704 | paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), |
705 | page_size_mask, init); | |
7e82ea94 KS |
706 | continue; |
707 | } | |
708 | ||
709 | pud = alloc_low_page(); | |
432c8332 | 710 | paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), |
eccd9064 | 711 | page_size_mask, init); |
7e82ea94 KS |
712 | |
713 | spin_lock(&init_mm.page_table_lock); | |
eccd9064 | 714 | p4d_populate_init(&init_mm, p4d, pud, init); |
7e82ea94 KS |
715 | spin_unlock(&init_mm.page_table_lock); |
716 | } | |
7e82ea94 KS |
717 | |
718 | return paddr_last; | |
719 | } | |
720 | ||
eccd9064 BS |
721 | static unsigned long __meminit |
722 | __kernel_physical_mapping_init(unsigned long paddr_start, | |
723 | unsigned long paddr_end, | |
724 | unsigned long page_size_mask, | |
725 | bool init) | |
14a62c34 | 726 | { |
9b861528 | 727 | bool pgd_changed = false; |
59b3d020 | 728 | unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; |
1da177e4 | 729 | |
59b3d020 TG |
730 | paddr_last = paddr_end; |
731 | vaddr = (unsigned long)__va(paddr_start); | |
732 | vaddr_end = (unsigned long)__va(paddr_end); | |
733 | vaddr_start = vaddr; | |
1da177e4 | 734 | |
59b3d020 TG |
735 | for (; vaddr < vaddr_end; vaddr = vaddr_next) { |
736 | pgd_t *pgd = pgd_offset_k(vaddr); | |
f2a6a705 | 737 | p4d_t *p4d; |
44df75e6 | 738 | |
59b3d020 | 739 | vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; |
4f9c11dd | 740 | |
7e82ea94 KS |
741 | if (pgd_val(*pgd)) { |
742 | p4d = (p4d_t *)pgd_page_vaddr(*pgd); | |
743 | paddr_last = phys_p4d_init(p4d, __pa(vaddr), | |
59b3d020 | 744 | __pa(vaddr_end), |
eccd9064 BS |
745 | page_size_mask, |
746 | init); | |
4f9c11dd JF |
747 | continue; |
748 | } | |
749 | ||
7e82ea94 KS |
750 | p4d = alloc_low_page(); |
751 | paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), | |
eccd9064 | 752 | page_size_mask, init); |
8ae3a5a8 JB |
753 | |
754 | spin_lock(&init_mm.page_table_lock); | |
ed7588d5 | 755 | if (pgtable_l5_enabled()) |
eccd9064 | 756 | pgd_populate_init(&init_mm, pgd, p4d, init); |
7e82ea94 | 757 | else |
eccd9064 BS |
758 | p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), |
759 | (pud_t *) p4d, init); | |
760 | ||
8ae3a5a8 | 761 | spin_unlock(&init_mm.page_table_lock); |
9b861528 | 762 | pgd_changed = true; |
14a62c34 | 763 | } |
9b861528 HL |
764 | |
765 | if (pgd_changed) | |
5372e155 | 766 | sync_global_pgds(vaddr_start, vaddr_end - 1); |
9b861528 | 767 | |
59b3d020 | 768 | return paddr_last; |
b50efd2a | 769 | } |
7b16eb89 | 770 | |
eccd9064 BS |
771 | |
772 | /* | |
773 | * Create page table mapping for the physical memory for specific physical | |
774 | * addresses. Note that it can only be used to populate non-present entries. | |
775 | * The virtual and physical addresses have to be aligned on PMD level | |
776 | * down. It returns the last physical address mapped. | |
777 | */ | |
778 | unsigned long __meminit | |
779 | kernel_physical_mapping_init(unsigned long paddr_start, | |
780 | unsigned long paddr_end, | |
781 | unsigned long page_size_mask) | |
782 | { | |
783 | return __kernel_physical_mapping_init(paddr_start, paddr_end, | |
784 | page_size_mask, true); | |
785 | } | |
786 | ||
787 | /* | |
788 | * This function is similar to kernel_physical_mapping_init() above with the | |
789 | * exception that it uses set_{pud,pmd}() instead of the set_{pud,pte}_safe() | |
790 | * when updating the mapping. The caller is responsible to flush the TLBs after | |
791 | * the function returns. | |
792 | */ | |
793 | unsigned long __meminit | |
794 | kernel_physical_mapping_change(unsigned long paddr_start, | |
795 | unsigned long paddr_end, | |
796 | unsigned long page_size_mask) | |
797 | { | |
798 | return __kernel_physical_mapping_init(paddr_start, paddr_end, | |
799 | page_size_mask, false); | |
800 | } | |
801 | ||
2b97690f | 802 | #ifndef CONFIG_NUMA |
d8fc3afc | 803 | void __init initmem_init(void) |
1f75d7e3 | 804 | { |
d7dc899a | 805 | memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0); |
1f75d7e3 | 806 | } |
3551f88f | 807 | #endif |
1f75d7e3 | 808 | |
1da177e4 LT |
809 | void __init paging_init(void) |
810 | { | |
3551f88f | 811 | sparse_memory_present_with_active_regions(MAX_NUMNODES); |
44df75e6 | 812 | sparse_init(); |
44b57280 YL |
813 | |
814 | /* | |
815 | * clear the default setting with node 0 | |
816 | * note: don't use nodes_clear here, that is really clearing when | |
817 | * numa support is not compiled in, and later node_set_state | |
818 | * will not set it back. | |
819 | */ | |
4b0ef1fe LJ |
820 | node_clear_state(0, N_MEMORY); |
821 | if (N_MEMORY != N_NORMAL_MEMORY) | |
822 | node_clear_state(0, N_NORMAL_MEMORY); | |
44b57280 | 823 | |
4c0b2e5f | 824 | zone_sizes_init(); |
1da177e4 | 825 | } |
1da177e4 | 826 | |
44df75e6 MT |
827 | /* |
828 | * Memory hotplug specific functions | |
44df75e6 | 829 | */ |
bc02af93 | 830 | #ifdef CONFIG_MEMORY_HOTPLUG |
ea085417 SZ |
831 | /* |
832 | * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need | |
833 | * updating. | |
834 | */ | |
3072e413 | 835 | static void update_end_of_memory_vars(u64 start, u64 size) |
ea085417 SZ |
836 | { |
837 | unsigned long end_pfn = PFN_UP(start + size); | |
838 | ||
839 | if (end_pfn > max_pfn) { | |
840 | max_pfn = end_pfn; | |
841 | max_low_pfn = end_pfn; | |
842 | high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; | |
843 | } | |
844 | } | |
845 | ||
24e6d5a5 | 846 | int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, |
940519f0 | 847 | struct mhp_restrictions *restrictions) |
44df75e6 | 848 | { |
44df75e6 MT |
849 | int ret; |
850 | ||
940519f0 | 851 | ret = __add_pages(nid, start_pfn, nr_pages, restrictions); |
fe8b868e | 852 | WARN_ON_ONCE(ret); |
44df75e6 | 853 | |
ea085417 | 854 | /* update max_pfn, max_low_pfn and high_memory */ |
3072e413 MH |
855 | update_end_of_memory_vars(start_pfn << PAGE_SHIFT, |
856 | nr_pages << PAGE_SHIFT); | |
ea085417 | 857 | |
44df75e6 | 858 | return ret; |
44df75e6 | 859 | } |
3072e413 | 860 | |
940519f0 MH |
861 | int arch_add_memory(int nid, u64 start, u64 size, |
862 | struct mhp_restrictions *restrictions) | |
3072e413 MH |
863 | { |
864 | unsigned long start_pfn = start >> PAGE_SHIFT; | |
865 | unsigned long nr_pages = size >> PAGE_SHIFT; | |
866 | ||
867 | init_memory_mapping(start, start + size); | |
868 | ||
940519f0 | 869 | return add_pages(nid, start_pfn, nr_pages, restrictions); |
3072e413 | 870 | } |
44df75e6 | 871 | |
ae9aae9e WC |
872 | #define PAGE_INUSE 0xFD |
873 | ||
a7e6c701 | 874 | static void __meminit free_pagetable(struct page *page, int order) |
ae9aae9e | 875 | { |
ae9aae9e WC |
876 | unsigned long magic; |
877 | unsigned int nr_pages = 1 << order; | |
4b94ffdc | 878 | |
ae9aae9e WC |
879 | /* bootmem page has reserved flag */ |
880 | if (PageReserved(page)) { | |
881 | __ClearPageReserved(page); | |
ae9aae9e | 882 | |
ddffe98d | 883 | magic = (unsigned long)page->freelist; |
ae9aae9e WC |
884 | if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) { |
885 | while (nr_pages--) | |
886 | put_page_bootmem(page++); | |
887 | } else | |
170a5a7e JL |
888 | while (nr_pages--) |
889 | free_reserved_page(page++); | |
ae9aae9e WC |
890 | } else |
891 | free_pages((unsigned long)page_address(page), order); | |
ae9aae9e WC |
892 | } |
893 | ||
a7e6c701 | 894 | static void __meminit free_hugepage_table(struct page *page, |
24b6d416 | 895 | struct vmem_altmap *altmap) |
a7e6c701 DW |
896 | { |
897 | if (altmap) | |
898 | vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE); | |
899 | else | |
900 | free_pagetable(page, get_order(PMD_SIZE)); | |
901 | } | |
902 | ||
903 | static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) | |
ae9aae9e WC |
904 | { |
905 | pte_t *pte; | |
906 | int i; | |
907 | ||
908 | for (i = 0; i < PTRS_PER_PTE; i++) { | |
909 | pte = pte_start + i; | |
dcb32d99 | 910 | if (!pte_none(*pte)) |
ae9aae9e WC |
911 | return; |
912 | } | |
913 | ||
914 | /* free a pte talbe */ | |
a7e6c701 | 915 | free_pagetable(pmd_page(*pmd), 0); |
ae9aae9e WC |
916 | spin_lock(&init_mm.page_table_lock); |
917 | pmd_clear(pmd); | |
918 | spin_unlock(&init_mm.page_table_lock); | |
919 | } | |
920 | ||
a7e6c701 | 921 | static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) |
ae9aae9e WC |
922 | { |
923 | pmd_t *pmd; | |
924 | int i; | |
925 | ||
926 | for (i = 0; i < PTRS_PER_PMD; i++) { | |
927 | pmd = pmd_start + i; | |
dcb32d99 | 928 | if (!pmd_none(*pmd)) |
ae9aae9e WC |
929 | return; |
930 | } | |
931 | ||
932 | /* free a pmd talbe */ | |
a7e6c701 | 933 | free_pagetable(pud_page(*pud), 0); |
ae9aae9e WC |
934 | spin_lock(&init_mm.page_table_lock); |
935 | pud_clear(pud); | |
936 | spin_unlock(&init_mm.page_table_lock); | |
937 | } | |
938 | ||
a7e6c701 | 939 | static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) |
f2a6a705 KS |
940 | { |
941 | pud_t *pud; | |
942 | int i; | |
943 | ||
944 | for (i = 0; i < PTRS_PER_PUD; i++) { | |
945 | pud = pud_start + i; | |
946 | if (!pud_none(*pud)) | |
947 | return; | |
948 | } | |
949 | ||
950 | /* free a pud talbe */ | |
a7e6c701 | 951 | free_pagetable(p4d_page(*p4d), 0); |
f2a6a705 KS |
952 | spin_lock(&init_mm.page_table_lock); |
953 | p4d_clear(p4d); | |
954 | spin_unlock(&init_mm.page_table_lock); | |
955 | } | |
956 | ||
ae9aae9e WC |
957 | static void __meminit |
958 | remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, | |
a7e6c701 | 959 | bool direct) |
ae9aae9e WC |
960 | { |
961 | unsigned long next, pages = 0; | |
962 | pte_t *pte; | |
963 | void *page_addr; | |
964 | phys_addr_t phys_addr; | |
965 | ||
966 | pte = pte_start + pte_index(addr); | |
967 | for (; addr < end; addr = next, pte++) { | |
968 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
969 | if (next > end) | |
970 | next = end; | |
971 | ||
972 | if (!pte_present(*pte)) | |
973 | continue; | |
974 | ||
975 | /* | |
976 | * We mapped [0,1G) memory as identity mapping when | |
977 | * initializing, in arch/x86/kernel/head_64.S. These | |
978 | * pagetables cannot be removed. | |
979 | */ | |
980 | phys_addr = pte_val(*pte) + (addr & PAGE_MASK); | |
981 | if (phys_addr < (phys_addr_t)0x40000000) | |
982 | return; | |
983 | ||
b500f77b | 984 | if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) { |
ae9aae9e WC |
985 | /* |
986 | * Do not free direct mapping pages since they were | |
987 | * freed when offlining, or simplely not in use. | |
988 | */ | |
989 | if (!direct) | |
a7e6c701 | 990 | free_pagetable(pte_page(*pte), 0); |
ae9aae9e WC |
991 | |
992 | spin_lock(&init_mm.page_table_lock); | |
993 | pte_clear(&init_mm, addr, pte); | |
994 | spin_unlock(&init_mm.page_table_lock); | |
995 | ||
996 | /* For non-direct mapping, pages means nothing. */ | |
997 | pages++; | |
998 | } else { | |
999 | /* | |
1000 | * If we are here, we are freeing vmemmap pages since | |
1001 | * direct mapped memory ranges to be freed are aligned. | |
1002 | * | |
1003 | * If we are not removing the whole page, it means | |
1004 | * other page structs in this page are being used and | |
1005 | * we canot remove them. So fill the unused page_structs | |
1006 | * with 0xFD, and remove the page when it is wholly | |
1007 | * filled with 0xFD. | |
1008 | */ | |
1009 | memset((void *)addr, PAGE_INUSE, next - addr); | |
1010 | ||
1011 | page_addr = page_address(pte_page(*pte)); | |
1012 | if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) { | |
a7e6c701 | 1013 | free_pagetable(pte_page(*pte), 0); |
ae9aae9e WC |
1014 | |
1015 | spin_lock(&init_mm.page_table_lock); | |
1016 | pte_clear(&init_mm, addr, pte); | |
1017 | spin_unlock(&init_mm.page_table_lock); | |
1018 | } | |
1019 | } | |
1020 | } | |
1021 | ||
1022 | /* Call free_pte_table() in remove_pmd_table(). */ | |
1023 | flush_tlb_all(); | |
1024 | if (direct) | |
1025 | update_page_count(PG_LEVEL_4K, -pages); | |
1026 | } | |
1027 | ||
1028 | static void __meminit | |
1029 | remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, | |
24b6d416 | 1030 | bool direct, struct vmem_altmap *altmap) |
ae9aae9e WC |
1031 | { |
1032 | unsigned long next, pages = 0; | |
1033 | pte_t *pte_base; | |
1034 | pmd_t *pmd; | |
1035 | void *page_addr; | |
1036 | ||
1037 | pmd = pmd_start + pmd_index(addr); | |
1038 | for (; addr < end; addr = next, pmd++) { | |
1039 | next = pmd_addr_end(addr, end); | |
1040 | ||
1041 | if (!pmd_present(*pmd)) | |
1042 | continue; | |
1043 | ||
1044 | if (pmd_large(*pmd)) { | |
1045 | if (IS_ALIGNED(addr, PMD_SIZE) && | |
1046 | IS_ALIGNED(next, PMD_SIZE)) { | |
1047 | if (!direct) | |
a7e6c701 DW |
1048 | free_hugepage_table(pmd_page(*pmd), |
1049 | altmap); | |
ae9aae9e WC |
1050 | |
1051 | spin_lock(&init_mm.page_table_lock); | |
1052 | pmd_clear(pmd); | |
1053 | spin_unlock(&init_mm.page_table_lock); | |
1054 | pages++; | |
1055 | } else { | |
1056 | /* If here, we are freeing vmemmap pages. */ | |
1057 | memset((void *)addr, PAGE_INUSE, next - addr); | |
1058 | ||
1059 | page_addr = page_address(pmd_page(*pmd)); | |
1060 | if (!memchr_inv(page_addr, PAGE_INUSE, | |
1061 | PMD_SIZE)) { | |
a7e6c701 DW |
1062 | free_hugepage_table(pmd_page(*pmd), |
1063 | altmap); | |
ae9aae9e WC |
1064 | |
1065 | spin_lock(&init_mm.page_table_lock); | |
1066 | pmd_clear(pmd); | |
1067 | spin_unlock(&init_mm.page_table_lock); | |
1068 | } | |
1069 | } | |
1070 | ||
1071 | continue; | |
1072 | } | |
1073 | ||
1074 | pte_base = (pte_t *)pmd_page_vaddr(*pmd); | |
a7e6c701 DW |
1075 | remove_pte_table(pte_base, addr, next, direct); |
1076 | free_pte_table(pte_base, pmd); | |
ae9aae9e WC |
1077 | } |
1078 | ||
1079 | /* Call free_pmd_table() in remove_pud_table(). */ | |
1080 | if (direct) | |
1081 | update_page_count(PG_LEVEL_2M, -pages); | |
1082 | } | |
1083 | ||
1084 | static void __meminit | |
1085 | remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, | |
24b6d416 | 1086 | struct vmem_altmap *altmap, bool direct) |
ae9aae9e WC |
1087 | { |
1088 | unsigned long next, pages = 0; | |
1089 | pmd_t *pmd_base; | |
1090 | pud_t *pud; | |
1091 | void *page_addr; | |
1092 | ||
1093 | pud = pud_start + pud_index(addr); | |
1094 | for (; addr < end; addr = next, pud++) { | |
1095 | next = pud_addr_end(addr, end); | |
1096 | ||
1097 | if (!pud_present(*pud)) | |
1098 | continue; | |
1099 | ||
1100 | if (pud_large(*pud)) { | |
1101 | if (IS_ALIGNED(addr, PUD_SIZE) && | |
1102 | IS_ALIGNED(next, PUD_SIZE)) { | |
1103 | if (!direct) | |
1104 | free_pagetable(pud_page(*pud), | |
a7e6c701 | 1105 | get_order(PUD_SIZE)); |
ae9aae9e WC |
1106 | |
1107 | spin_lock(&init_mm.page_table_lock); | |
1108 | pud_clear(pud); | |
1109 | spin_unlock(&init_mm.page_table_lock); | |
1110 | pages++; | |
1111 | } else { | |
1112 | /* If here, we are freeing vmemmap pages. */ | |
1113 | memset((void *)addr, PAGE_INUSE, next - addr); | |
1114 | ||
1115 | page_addr = page_address(pud_page(*pud)); | |
1116 | if (!memchr_inv(page_addr, PAGE_INUSE, | |
1117 | PUD_SIZE)) { | |
1118 | free_pagetable(pud_page(*pud), | |
a7e6c701 | 1119 | get_order(PUD_SIZE)); |
ae9aae9e WC |
1120 | |
1121 | spin_lock(&init_mm.page_table_lock); | |
1122 | pud_clear(pud); | |
1123 | spin_unlock(&init_mm.page_table_lock); | |
1124 | } | |
1125 | } | |
1126 | ||
1127 | continue; | |
1128 | } | |
1129 | ||
e6ab9c4d | 1130 | pmd_base = pmd_offset(pud, 0); |
24b6d416 | 1131 | remove_pmd_table(pmd_base, addr, next, direct, altmap); |
a7e6c701 | 1132 | free_pmd_table(pmd_base, pud); |
ae9aae9e WC |
1133 | } |
1134 | ||
1135 | if (direct) | |
1136 | update_page_count(PG_LEVEL_1G, -pages); | |
1137 | } | |
1138 | ||
f2a6a705 KS |
1139 | static void __meminit |
1140 | remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, | |
24b6d416 | 1141 | struct vmem_altmap *altmap, bool direct) |
f2a6a705 KS |
1142 | { |
1143 | unsigned long next, pages = 0; | |
1144 | pud_t *pud_base; | |
1145 | p4d_t *p4d; | |
1146 | ||
1147 | p4d = p4d_start + p4d_index(addr); | |
1148 | for (; addr < end; addr = next, p4d++) { | |
1149 | next = p4d_addr_end(addr, end); | |
1150 | ||
1151 | if (!p4d_present(*p4d)) | |
1152 | continue; | |
1153 | ||
1154 | BUILD_BUG_ON(p4d_large(*p4d)); | |
1155 | ||
e6ab9c4d | 1156 | pud_base = pud_offset(p4d, 0); |
24b6d416 | 1157 | remove_pud_table(pud_base, addr, next, altmap, direct); |
98fe3633 JG |
1158 | /* |
1159 | * For 4-level page tables we do not want to free PUDs, but in the | |
1160 | * 5-level case we should free them. This code will have to change | |
1161 | * to adapt for boot-time switching between 4 and 5 level page tables. | |
1162 | */ | |
ed7588d5 | 1163 | if (pgtable_l5_enabled()) |
a7e6c701 | 1164 | free_pud_table(pud_base, p4d); |
f2a6a705 KS |
1165 | } |
1166 | ||
1167 | if (direct) | |
1168 | update_page_count(PG_LEVEL_512G, -pages); | |
1169 | } | |
1170 | ||
ae9aae9e WC |
1171 | /* start and end are both virtual address. */ |
1172 | static void __meminit | |
24b6d416 CH |
1173 | remove_pagetable(unsigned long start, unsigned long end, bool direct, |
1174 | struct vmem_altmap *altmap) | |
ae9aae9e WC |
1175 | { |
1176 | unsigned long next; | |
5255e0a7 | 1177 | unsigned long addr; |
ae9aae9e | 1178 | pgd_t *pgd; |
f2a6a705 | 1179 | p4d_t *p4d; |
ae9aae9e | 1180 | |
5255e0a7 YI |
1181 | for (addr = start; addr < end; addr = next) { |
1182 | next = pgd_addr_end(addr, end); | |
ae9aae9e | 1183 | |
5255e0a7 | 1184 | pgd = pgd_offset_k(addr); |
ae9aae9e WC |
1185 | if (!pgd_present(*pgd)) |
1186 | continue; | |
1187 | ||
e6ab9c4d | 1188 | p4d = p4d_offset(pgd, 0); |
24b6d416 | 1189 | remove_p4d_table(p4d, addr, next, altmap, direct); |
ae9aae9e WC |
1190 | } |
1191 | ||
ae9aae9e WC |
1192 | flush_tlb_all(); |
1193 | } | |
1194 | ||
24b6d416 CH |
1195 | void __ref vmemmap_free(unsigned long start, unsigned long end, |
1196 | struct vmem_altmap *altmap) | |
0197518c | 1197 | { |
24b6d416 | 1198 | remove_pagetable(start, end, false, altmap); |
0197518c TC |
1199 | } |
1200 | ||
bbcab878 TC |
1201 | static void __meminit |
1202 | kernel_physical_mapping_remove(unsigned long start, unsigned long end) | |
1203 | { | |
1204 | start = (unsigned long)__va(start); | |
1205 | end = (unsigned long)__va(end); | |
1206 | ||
24b6d416 | 1207 | remove_pagetable(start, end, true, NULL); |
bbcab878 TC |
1208 | } |
1209 | ||
ac5c9426 DH |
1210 | void __ref arch_remove_memory(int nid, u64 start, u64 size, |
1211 | struct vmem_altmap *altmap) | |
24d335ca WC |
1212 | { |
1213 | unsigned long start_pfn = start >> PAGE_SHIFT; | |
1214 | unsigned long nr_pages = size >> PAGE_SHIFT; | |
514caf23 CH |
1215 | struct page *page = pfn_to_page(start_pfn) + vmem_altmap_offset(altmap); |
1216 | struct zone *zone = page_zone(page); | |
24d335ca | 1217 | |
ac5c9426 | 1218 | __remove_pages(zone, start_pfn, nr_pages, altmap); |
4b94ffdc | 1219 | kernel_physical_mapping_remove(start, start + size); |
24d335ca | 1220 | } |
45e0b78b KM |
1221 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
1222 | ||
81ac3ad9 | 1223 | static struct kcore_list kcore_vsyscall; |
1da177e4 | 1224 | |
94b43c3d YL |
1225 | static void __init register_page_bootmem_info(void) |
1226 | { | |
1227 | #ifdef CONFIG_NUMA | |
1228 | int i; | |
1229 | ||
1230 | for_each_online_node(i) | |
1231 | register_page_bootmem_info_node(NODE_DATA(i)); | |
1232 | #endif | |
1233 | } | |
1234 | ||
1da177e4 LT |
1235 | void __init mem_init(void) |
1236 | { | |
0dc243ae | 1237 | pci_iommu_alloc(); |
1da177e4 | 1238 | |
48ddb154 | 1239 | /* clear_bss() already clear the empty_zero_page */ |
1da177e4 | 1240 | |
bced0e32 | 1241 | /* this will put all memory onto the freelists */ |
c6ffc5ca | 1242 | memblock_free_all(); |
1da177e4 | 1243 | after_bootmem = 1; |
6f84f8d1 | 1244 | x86_init.hyper.init_after_bootmem(); |
1da177e4 | 1245 | |
353b1e7b PT |
1246 | /* |
1247 | * Must be done after boot memory is put on freelist, because here we | |
1248 | * might set fields in deferred struct pages that have not yet been | |
c6ffc5ca | 1249 | * initialized, and memblock_free_all() initializes all the reserved |
353b1e7b PT |
1250 | * deferred pages for us. |
1251 | */ | |
1252 | register_page_bootmem_info(); | |
1253 | ||
1da177e4 | 1254 | /* Register memory areas for /proc/kcore */ |
cd026ca2 JZ |
1255 | if (get_gate_vma(&init_mm)) |
1256 | kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); | |
1da177e4 | 1257 | |
46a84132 | 1258 | mem_init_print_info(NULL); |
1da177e4 LT |
1259 | } |
1260 | ||
502f6604 | 1261 | int kernel_set_to_readonly; |
16239630 SR |
1262 | |
1263 | void set_kernel_text_rw(void) | |
1264 | { | |
b9af7c0d | 1265 | unsigned long start = PFN_ALIGN(_text); |
e7d23dde | 1266 | unsigned long end = PFN_ALIGN(__stop___ex_table); |
16239630 SR |
1267 | |
1268 | if (!kernel_set_to_readonly) | |
1269 | return; | |
1270 | ||
1271 | pr_debug("Set kernel text: %lx - %lx for read write\n", | |
1272 | start, end); | |
1273 | ||
e7d23dde SS |
1274 | /* |
1275 | * Make the kernel identity mapping for text RW. Kernel text | |
1276 | * mapping will always be RO. Refer to the comment in | |
1277 | * static_protections() in pageattr.c | |
1278 | */ | |
16239630 SR |
1279 | set_memory_rw(start, (end - start) >> PAGE_SHIFT); |
1280 | } | |
1281 | ||
1282 | void set_kernel_text_ro(void) | |
1283 | { | |
b9af7c0d | 1284 | unsigned long start = PFN_ALIGN(_text); |
e7d23dde | 1285 | unsigned long end = PFN_ALIGN(__stop___ex_table); |
16239630 SR |
1286 | |
1287 | if (!kernel_set_to_readonly) | |
1288 | return; | |
1289 | ||
1290 | pr_debug("Set kernel text: %lx - %lx for read only\n", | |
1291 | start, end); | |
1292 | ||
e7d23dde SS |
1293 | /* |
1294 | * Set the kernel identity mapping for text RO. | |
1295 | */ | |
16239630 SR |
1296 | set_memory_ro(start, (end - start) >> PAGE_SHIFT); |
1297 | } | |
1298 | ||
67df197b AV |
1299 | void mark_rodata_ro(void) |
1300 | { | |
74e08179 | 1301 | unsigned long start = PFN_ALIGN(_text); |
fc8d7826 | 1302 | unsigned long rodata_start = PFN_ALIGN(__start_rodata); |
74e08179 | 1303 | unsigned long end = (unsigned long) &__end_rodata_hpage_align; |
fc8d7826 AD |
1304 | unsigned long text_end = PFN_ALIGN(&__stop___ex_table); |
1305 | unsigned long rodata_end = PFN_ALIGN(&__end_rodata); | |
45e2a9d4 | 1306 | unsigned long all_end; |
8f0f996e | 1307 | |
6fb14755 | 1308 | printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", |
e3ebadd9 | 1309 | (end - start) >> 10); |
984bb80d AV |
1310 | set_memory_ro(start, (end - start) >> PAGE_SHIFT); |
1311 | ||
16239630 SR |
1312 | kernel_set_to_readonly = 1; |
1313 | ||
984bb80d | 1314 | /* |
72212675 YL |
1315 | * The rodata/data/bss/brk section (but not the kernel text!) |
1316 | * should also be not-executable. | |
45e2a9d4 KC |
1317 | * |
1318 | * We align all_end to PMD_SIZE because the existing mapping | |
1319 | * is a full PMD. If we would align _brk_end to PAGE_SIZE we | |
1320 | * split the PMD and the reminder between _brk_end and the end | |
1321 | * of the PMD will remain mapped executable. | |
1322 | * | |
1323 | * Any PMD which was setup after the one which covers _brk_end | |
1324 | * has been zapped already via cleanup_highmem(). | |
984bb80d | 1325 | */ |
45e2a9d4 | 1326 | all_end = roundup((unsigned long)_brk_end, PMD_SIZE); |
ab76f7b4 | 1327 | set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); |
67df197b | 1328 | |
0c42f392 | 1329 | #ifdef CONFIG_CPA_DEBUG |
10f22dde | 1330 | printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); |
6d238cc4 | 1331 | set_memory_rw(start, (end-start) >> PAGE_SHIFT); |
0c42f392 | 1332 | |
10f22dde | 1333 | printk(KERN_INFO "Testing CPA: again\n"); |
6d238cc4 | 1334 | set_memory_ro(start, (end-start) >> PAGE_SHIFT); |
0c42f392 | 1335 | #endif |
74e08179 | 1336 | |
6ea2738e DH |
1337 | free_kernel_image_pages((void *)text_end, (void *)rodata_start); |
1338 | free_kernel_image_pages((void *)rodata_end, (void *)_sdata); | |
e1a58320 SS |
1339 | |
1340 | debug_checkwx(); | |
67df197b | 1341 | } |
4e4eee0e | 1342 | |
14a62c34 TG |
1343 | int kern_addr_valid(unsigned long addr) |
1344 | { | |
1da177e4 | 1345 | unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT; |
14a62c34 | 1346 | pgd_t *pgd; |
f2a6a705 | 1347 | p4d_t *p4d; |
14a62c34 TG |
1348 | pud_t *pud; |
1349 | pmd_t *pmd; | |
1350 | pte_t *pte; | |
1da177e4 LT |
1351 | |
1352 | if (above != 0 && above != -1UL) | |
14a62c34 TG |
1353 | return 0; |
1354 | ||
1da177e4 LT |
1355 | pgd = pgd_offset_k(addr); |
1356 | if (pgd_none(*pgd)) | |
1357 | return 0; | |
1358 | ||
f2a6a705 KS |
1359 | p4d = p4d_offset(pgd, addr); |
1360 | if (p4d_none(*p4d)) | |
1361 | return 0; | |
1362 | ||
1363 | pud = pud_offset(p4d, addr); | |
1da177e4 | 1364 | if (pud_none(*pud)) |
14a62c34 | 1365 | return 0; |
1da177e4 | 1366 | |
0ee364eb MG |
1367 | if (pud_large(*pud)) |
1368 | return pfn_valid(pud_pfn(*pud)); | |
1369 | ||
1da177e4 LT |
1370 | pmd = pmd_offset(pud, addr); |
1371 | if (pmd_none(*pmd)) | |
1372 | return 0; | |
14a62c34 | 1373 | |
1da177e4 LT |
1374 | if (pmd_large(*pmd)) |
1375 | return pfn_valid(pmd_pfn(*pmd)); | |
1376 | ||
1377 | pte = pte_offset_kernel(pmd, addr); | |
1378 | if (pte_none(*pte)) | |
1379 | return 0; | |
14a62c34 | 1380 | |
1da177e4 LT |
1381 | return pfn_valid(pte_pfn(*pte)); |
1382 | } | |
1383 | ||
078eb6aa PT |
1384 | /* |
1385 | * Block size is the minimum amount of memory which can be hotplugged or | |
1386 | * hotremoved. It must be power of two and must be equal or larger than | |
1387 | * MIN_MEMORY_BLOCK_SIZE. | |
1388 | */ | |
1389 | #define MAX_BLOCK_SIZE (2UL << 30) | |
1390 | ||
1391 | /* Amount of ram needed to start using large blocks */ | |
1392 | #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30) | |
1393 | ||
f642fb58 | 1394 | /* Adjustable memory block size */ |
1395 | static unsigned long set_memory_block_size; | |
1396 | int __init set_memory_block_size_order(unsigned int order) | |
1397 | { | |
1398 | unsigned long size = 1UL << order; | |
1399 | ||
1400 | if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE) | |
1401 | return -EINVAL; | |
1402 | ||
1403 | set_memory_block_size = size; | |
1404 | return 0; | |
1405 | } | |
1406 | ||
982792c7 | 1407 | static unsigned long probe_memory_block_size(void) |
1dc41aa6 | 1408 | { |
078eb6aa PT |
1409 | unsigned long boot_mem_end = max_pfn << PAGE_SHIFT; |
1410 | unsigned long bz; | |
982792c7 | 1411 | |
f642fb58 | 1412 | /* If memory block size has been set, then use it */ |
1413 | bz = set_memory_block_size; | |
1414 | if (bz) | |
078eb6aa | 1415 | goto done; |
982792c7 | 1416 | |
078eb6aa PT |
1417 | /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */ |
1418 | if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) { | |
1419 | bz = MIN_MEMORY_BLOCK_SIZE; | |
1420 | goto done; | |
1421 | } | |
1422 | ||
1423 | /* Find the largest allowed block size that aligns to memory end */ | |
1424 | for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) { | |
1425 | if (IS_ALIGNED(boot_mem_end, bz)) | |
1426 | break; | |
1427 | } | |
1428 | done: | |
43c75f93 | 1429 | pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); |
982792c7 YL |
1430 | |
1431 | return bz; | |
1432 | } | |
1433 | ||
1434 | static unsigned long memory_block_size_probed; | |
1435 | unsigned long memory_block_size_bytes(void) | |
1436 | { | |
1437 | if (!memory_block_size_probed) | |
1438 | memory_block_size_probed = probe_memory_block_size(); | |
1439 | ||
1440 | return memory_block_size_probed; | |
1441 | } | |
1442 | ||
0889eba5 CL |
1443 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
1444 | /* | |
1445 | * Initialise the sparsemem vmemmap using huge-pages at the PMD level. | |
1446 | */ | |
c2b91e2e YL |
1447 | static long __meminitdata addr_start, addr_end; |
1448 | static void __meminitdata *p_start, *p_end; | |
1449 | static int __meminitdata node_start; | |
1450 | ||
e8216da5 | 1451 | static int __meminit vmemmap_populate_hugepages(unsigned long start, |
4b94ffdc | 1452 | unsigned long end, int node, struct vmem_altmap *altmap) |
0889eba5 | 1453 | { |
0aad818b | 1454 | unsigned long addr; |
0889eba5 CL |
1455 | unsigned long next; |
1456 | pgd_t *pgd; | |
f2a6a705 | 1457 | p4d_t *p4d; |
0889eba5 CL |
1458 | pud_t *pud; |
1459 | pmd_t *pmd; | |
1460 | ||
0aad818b | 1461 | for (addr = start; addr < end; addr = next) { |
e8216da5 | 1462 | next = pmd_addr_end(addr, end); |
0889eba5 CL |
1463 | |
1464 | pgd = vmemmap_pgd_populate(addr, node); | |
1465 | if (!pgd) | |
1466 | return -ENOMEM; | |
14a62c34 | 1467 | |
f2a6a705 KS |
1468 | p4d = vmemmap_p4d_populate(pgd, addr, node); |
1469 | if (!p4d) | |
1470 | return -ENOMEM; | |
1471 | ||
1472 | pud = vmemmap_pud_populate(p4d, addr, node); | |
0889eba5 CL |
1473 | if (!pud) |
1474 | return -ENOMEM; | |
1475 | ||
e8216da5 JW |
1476 | pmd = pmd_offset(pud, addr); |
1477 | if (pmd_none(*pmd)) { | |
e8216da5 | 1478 | void *p; |
14a62c34 | 1479 | |
a8fc357b CH |
1480 | if (altmap) |
1481 | p = altmap_alloc_block_buf(PMD_SIZE, altmap); | |
1482 | else | |
1483 | p = vmemmap_alloc_block_buf(PMD_SIZE, node); | |
8e2cdbcb JW |
1484 | if (p) { |
1485 | pte_t entry; | |
1486 | ||
1487 | entry = pfn_pte(__pa(p) >> PAGE_SHIFT, | |
1488 | PAGE_KERNEL_LARGE); | |
1489 | set_pmd(pmd, __pmd(pte_val(entry))); | |
1490 | ||
1491 | /* check to see if we have contiguous blocks */ | |
1492 | if (p_end != p || node_start != node) { | |
1493 | if (p_start) | |
c9cdaeb2 | 1494 | pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", |
8e2cdbcb JW |
1495 | addr_start, addr_end-1, p_start, p_end-1, node_start); |
1496 | addr_start = addr; | |
1497 | node_start = node; | |
1498 | p_start = p; | |
1499 | } | |
7c934d39 | 1500 | |
8e2cdbcb JW |
1501 | addr_end = addr + PMD_SIZE; |
1502 | p_end = p + PMD_SIZE; | |
1503 | continue; | |
4b94ffdc DW |
1504 | } else if (altmap) |
1505 | return -ENOMEM; /* no fallback */ | |
8e2cdbcb | 1506 | } else if (pmd_large(*pmd)) { |
e8216da5 | 1507 | vmemmap_verify((pte_t *)pmd, node, addr, next); |
8e2cdbcb JW |
1508 | continue; |
1509 | } | |
8e2cdbcb JW |
1510 | if (vmemmap_populate_basepages(addr, next, node)) |
1511 | return -ENOMEM; | |
0889eba5 | 1512 | } |
0889eba5 CL |
1513 | return 0; |
1514 | } | |
c2b91e2e | 1515 | |
7b73d978 CH |
1516 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
1517 | struct vmem_altmap *altmap) | |
e8216da5 JW |
1518 | { |
1519 | int err; | |
1520 | ||
16bf9226 | 1521 | if (boot_cpu_has(X86_FEATURE_PSE)) |
4b94ffdc DW |
1522 | err = vmemmap_populate_hugepages(start, end, node, altmap); |
1523 | else if (altmap) { | |
1524 | pr_err_once("%s: no cpu support for altmap allocations\n", | |
1525 | __func__); | |
1526 | err = -ENOMEM; | |
1527 | } else | |
e8216da5 JW |
1528 | err = vmemmap_populate_basepages(start, end, node); |
1529 | if (!err) | |
5372e155 | 1530 | sync_global_pgds(start, end - 1); |
e8216da5 JW |
1531 | return err; |
1532 | } | |
1533 | ||
46723bfa YI |
1534 | #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE) |
1535 | void register_page_bootmem_memmap(unsigned long section_nr, | |
15670bfe | 1536 | struct page *start_page, unsigned long nr_pages) |
46723bfa YI |
1537 | { |
1538 | unsigned long addr = (unsigned long)start_page; | |
15670bfe | 1539 | unsigned long end = (unsigned long)(start_page + nr_pages); |
46723bfa YI |
1540 | unsigned long next; |
1541 | pgd_t *pgd; | |
f2a6a705 | 1542 | p4d_t *p4d; |
46723bfa YI |
1543 | pud_t *pud; |
1544 | pmd_t *pmd; | |
15670bfe | 1545 | unsigned int nr_pmd_pages; |
46723bfa YI |
1546 | struct page *page; |
1547 | ||
1548 | for (; addr < end; addr = next) { | |
1549 | pte_t *pte = NULL; | |
1550 | ||
1551 | pgd = pgd_offset_k(addr); | |
1552 | if (pgd_none(*pgd)) { | |
1553 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
1554 | continue; | |
1555 | } | |
1556 | get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO); | |
1557 | ||
f2a6a705 KS |
1558 | p4d = p4d_offset(pgd, addr); |
1559 | if (p4d_none(*p4d)) { | |
1560 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
1561 | continue; | |
1562 | } | |
1563 | get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO); | |
1564 | ||
1565 | pud = pud_offset(p4d, addr); | |
46723bfa YI |
1566 | if (pud_none(*pud)) { |
1567 | next = (addr + PAGE_SIZE) & PAGE_MASK; | |
1568 | continue; | |
1569 | } | |
1570 | get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO); | |
1571 | ||
16bf9226 | 1572 | if (!boot_cpu_has(X86_FEATURE_PSE)) { |
46723bfa YI |
1573 | next = (addr + PAGE_SIZE) & PAGE_MASK; |
1574 | pmd = pmd_offset(pud, addr); | |
1575 | if (pmd_none(*pmd)) | |
1576 | continue; | |
1577 | get_page_bootmem(section_nr, pmd_page(*pmd), | |
1578 | MIX_SECTION_INFO); | |
1579 | ||
1580 | pte = pte_offset_kernel(pmd, addr); | |
1581 | if (pte_none(*pte)) | |
1582 | continue; | |
1583 | get_page_bootmem(section_nr, pte_page(*pte), | |
1584 | SECTION_INFO); | |
1585 | } else { | |
1586 | next = pmd_addr_end(addr, end); | |
1587 | ||
1588 | pmd = pmd_offset(pud, addr); | |
1589 | if (pmd_none(*pmd)) | |
1590 | continue; | |
1591 | ||
15670bfe | 1592 | nr_pmd_pages = 1 << get_order(PMD_SIZE); |
46723bfa | 1593 | page = pmd_page(*pmd); |
15670bfe | 1594 | while (nr_pmd_pages--) |
46723bfa YI |
1595 | get_page_bootmem(section_nr, page++, |
1596 | SECTION_INFO); | |
1597 | } | |
1598 | } | |
1599 | } | |
1600 | #endif | |
1601 | ||
c2b91e2e YL |
1602 | void __meminit vmemmap_populate_print_last(void) |
1603 | { | |
1604 | if (p_start) { | |
c9cdaeb2 | 1605 | pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", |
c2b91e2e YL |
1606 | addr_start, addr_end-1, p_start, p_end-1, node_start); |
1607 | p_start = NULL; | |
1608 | p_end = NULL; | |
1609 | node_start = 0; | |
1610 | } | |
1611 | } | |
0889eba5 | 1612 | #endif |