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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Re-map IO memory to kernel address space so that we can access it. |
3 | * This is needed for high PCI addresses that aren't mapped in the | |
4 | * 640k-1MB IO memory area on PC's | |
5 | * | |
6 | * (C) Copyright 1995 1996 Linus Torvalds | |
7 | */ | |
8 | ||
e9332cac | 9 | #include <linux/bootmem.h> |
1da177e4 | 10 | #include <linux/init.h> |
a148ecfd | 11 | #include <linux/io.h> |
3cbd09e4 TG |
12 | #include <linux/module.h> |
13 | #include <linux/slab.h> | |
14 | #include <linux/vmalloc.h> | |
d61fc448 | 15 | #include <linux/mmiotrace.h> |
3cbd09e4 | 16 | |
1da177e4 | 17 | #include <asm/cacheflush.h> |
3cbd09e4 TG |
18 | #include <asm/e820.h> |
19 | #include <asm/fixmap.h> | |
1da177e4 | 20 | #include <asm/pgtable.h> |
3cbd09e4 | 21 | #include <asm/tlbflush.h> |
f6df72e7 | 22 | #include <asm/pgalloc.h> |
d7677d40 | 23 | #include <asm/pat.h> |
1da177e4 | 24 | |
13c6c532 | 25 | static inline int phys_addr_valid(resource_size_t addr) |
240d3a7c | 26 | { |
13c6c532 JB |
27 | #ifdef CONFIG_PHYS_ADDR_T_64BIT |
28 | return !(addr >> boot_cpu_data.x86_phys_bits); | |
29 | #else | |
30 | return 1; | |
31 | #endif | |
240d3a7c | 32 | } |
240d3a7c | 33 | |
13c6c532 JB |
34 | #ifdef CONFIG_X86_64 |
35 | ||
59ea7463 | 36 | unsigned long __phys_addr(unsigned long x) |
e3100c82 | 37 | { |
59ea7463 JS |
38 | if (x >= __START_KERNEL_map) { |
39 | x -= __START_KERNEL_map; | |
40 | VIRTUAL_BUG_ON(x >= KERNEL_IMAGE_SIZE); | |
41 | x += phys_base; | |
42 | } else { | |
43 | VIRTUAL_BUG_ON(x < PAGE_OFFSET); | |
44 | x -= PAGE_OFFSET; | |
ed26dbe5 | 45 | VIRTUAL_BUG_ON(!phys_addr_valid(x)); |
59ea7463 JS |
46 | } |
47 | return x; | |
e3100c82 | 48 | } |
59ea7463 | 49 | EXPORT_SYMBOL(__phys_addr); |
e3100c82 | 50 | |
af5c2bd1 VN |
51 | bool __virt_addr_valid(unsigned long x) |
52 | { | |
53 | if (x >= __START_KERNEL_map) { | |
54 | x -= __START_KERNEL_map; | |
55 | if (x >= KERNEL_IMAGE_SIZE) | |
56 | return false; | |
57 | x += phys_base; | |
58 | } else { | |
59 | if (x < PAGE_OFFSET) | |
60 | return false; | |
61 | x -= PAGE_OFFSET; | |
ed26dbe5 | 62 | if (!phys_addr_valid(x)) |
af5c2bd1 | 63 | return false; |
af5c2bd1 VN |
64 | } |
65 | ||
66 | return pfn_valid(x >> PAGE_SHIFT); | |
67 | } | |
68 | EXPORT_SYMBOL(__virt_addr_valid); | |
69 | ||
e3100c82 TG |
70 | #else |
71 | ||
a1bf9631 | 72 | #ifdef CONFIG_DEBUG_VIRTUAL |
59ea7463 JS |
73 | unsigned long __phys_addr(unsigned long x) |
74 | { | |
dc16ecf7 | 75 | /* VMALLOC_* aren't constants */ |
af5c2bd1 | 76 | VIRTUAL_BUG_ON(x < PAGE_OFFSET); |
dc16ecf7 | 77 | VIRTUAL_BUG_ON(__vmalloc_start_set && is_vmalloc_addr((void *) x)); |
59ea7463 JS |
78 | return x - PAGE_OFFSET; |
79 | } | |
80 | EXPORT_SYMBOL(__phys_addr); | |
a1bf9631 | 81 | #endif |
59ea7463 | 82 | |
af5c2bd1 VN |
83 | bool __virt_addr_valid(unsigned long x) |
84 | { | |
85 | if (x < PAGE_OFFSET) | |
86 | return false; | |
dc16ecf7 | 87 | if (__vmalloc_start_set && is_vmalloc_addr((void *) x)) |
af5c2bd1 | 88 | return false; |
0feca851 JF |
89 | if (x >= FIXADDR_START) |
90 | return false; | |
af5c2bd1 VN |
91 | return pfn_valid((x - PAGE_OFFSET) >> PAGE_SHIFT); |
92 | } | |
93 | EXPORT_SYMBOL(__virt_addr_valid); | |
94 | ||
240d3a7c TG |
95 | #endif |
96 | ||
5f5192b9 TG |
97 | int page_is_ram(unsigned long pagenr) |
98 | { | |
756a6c68 | 99 | resource_size_t addr, end; |
5f5192b9 TG |
100 | int i; |
101 | ||
d8a9e6a5 AV |
102 | /* |
103 | * A special case is the first 4Kb of memory; | |
104 | * This is a BIOS owned area, not kernel ram, but generally | |
105 | * not listed as such in the E820 table. | |
106 | */ | |
107 | if (pagenr == 0) | |
108 | return 0; | |
109 | ||
156fbc3f AV |
110 | /* |
111 | * Second special case: Some BIOSen report the PC BIOS | |
112 | * area (640->1Mb) as ram even though it is not. | |
113 | */ | |
114 | if (pagenr >= (BIOS_BEGIN >> PAGE_SHIFT) && | |
115 | pagenr < (BIOS_END >> PAGE_SHIFT)) | |
116 | return 0; | |
d8a9e6a5 | 117 | |
5f5192b9 TG |
118 | for (i = 0; i < e820.nr_map; i++) { |
119 | /* | |
120 | * Not usable memory: | |
121 | */ | |
122 | if (e820.map[i].type != E820_RAM) | |
123 | continue; | |
5f5192b9 TG |
124 | addr = (e820.map[i].addr + PAGE_SIZE-1) >> PAGE_SHIFT; |
125 | end = (e820.map[i].addr + e820.map[i].size) >> PAGE_SHIFT; | |
950f9d95 | 126 | |
950f9d95 | 127 | |
5f5192b9 TG |
128 | if ((pagenr >= addr) && (pagenr < end)) |
129 | return 1; | |
130 | } | |
131 | return 0; | |
132 | } | |
133 | ||
e9332cac TG |
134 | /* |
135 | * Fix up the linear direct mapping of the kernel to avoid cache attribute | |
136 | * conflicts. | |
137 | */ | |
3a96ce8c | 138 | int ioremap_change_attr(unsigned long vaddr, unsigned long size, |
139 | unsigned long prot_val) | |
e9332cac | 140 | { |
d806e5ee | 141 | unsigned long nrpages = size >> PAGE_SHIFT; |
93809be8 | 142 | int err; |
e9332cac | 143 | |
3a96ce8c | 144 | switch (prot_val) { |
145 | case _PAGE_CACHE_UC: | |
d806e5ee | 146 | default: |
1219333d | 147 | err = _set_memory_uc(vaddr, nrpages); |
d806e5ee | 148 | break; |
b310f381 | 149 | case _PAGE_CACHE_WC: |
150 | err = _set_memory_wc(vaddr, nrpages); | |
151 | break; | |
3a96ce8c | 152 | case _PAGE_CACHE_WB: |
1219333d | 153 | err = _set_memory_wb(vaddr, nrpages); |
d806e5ee TG |
154 | break; |
155 | } | |
e9332cac TG |
156 | |
157 | return err; | |
158 | } | |
159 | ||
1da177e4 LT |
160 | /* |
161 | * Remap an arbitrary physical address space into the kernel virtual | |
162 | * address space. Needed when the kernel wants to access high addresses | |
163 | * directly. | |
164 | * | |
165 | * NOTE! We need to allow non-page-aligned mappings too: we will obviously | |
166 | * have to convert them into an offset in a page-aligned mapping, but the | |
167 | * caller shouldn't need to know that small detail. | |
168 | */ | |
23016969 CL |
169 | static void __iomem *__ioremap_caller(resource_size_t phys_addr, |
170 | unsigned long size, unsigned long prot_val, void *caller) | |
1da177e4 | 171 | { |
756a6c68 IM |
172 | unsigned long pfn, offset, vaddr; |
173 | resource_size_t last_addr; | |
87e547fe PP |
174 | const resource_size_t unaligned_phys_addr = phys_addr; |
175 | const unsigned long unaligned_size = size; | |
91eebf40 | 176 | struct vm_struct *area; |
d7677d40 | 177 | unsigned long new_prot_val; |
d806e5ee | 178 | pgprot_t prot; |
dee7cbb2 | 179 | int retval; |
d61fc448 | 180 | void __iomem *ret_addr; |
1da177e4 LT |
181 | |
182 | /* Don't allow wraparound or zero size */ | |
183 | last_addr = phys_addr + size - 1; | |
184 | if (!size || last_addr < phys_addr) | |
185 | return NULL; | |
186 | ||
e3100c82 | 187 | if (!phys_addr_valid(phys_addr)) { |
6997ab49 | 188 | printk(KERN_WARNING "ioremap: invalid physical address %llx\n", |
4c8337ac | 189 | (unsigned long long)phys_addr); |
e3100c82 TG |
190 | WARN_ON_ONCE(1); |
191 | return NULL; | |
192 | } | |
193 | ||
1da177e4 LT |
194 | /* |
195 | * Don't remap the low PCI/ISA area, it's always mapped.. | |
196 | */ | |
bcc643dc | 197 | if (is_ISA_range(phys_addr, last_addr)) |
4b40fcee | 198 | return (__force void __iomem *)phys_to_virt(phys_addr); |
1da177e4 | 199 | |
379daf62 SS |
200 | /* |
201 | * Check if the request spans more than any BAR in the iomem resource | |
202 | * tree. | |
203 | */ | |
8808500f IM |
204 | WARN_ONCE(iomem_map_sanity_check(phys_addr, size), |
205 | KERN_INFO "Info: mapping multiple BARs. Your kernel is fine."); | |
379daf62 | 206 | |
1da177e4 LT |
207 | /* |
208 | * Don't allow anybody to remap normal RAM that we're using.. | |
209 | */ | |
cb8ab687 AS |
210 | for (pfn = phys_addr >> PAGE_SHIFT; |
211 | (pfn << PAGE_SHIFT) < (last_addr & PAGE_MASK); | |
212 | pfn++) { | |
bdd3cee2 | 213 | |
ba748d22 IM |
214 | int is_ram = page_is_ram(pfn); |
215 | ||
216 | if (is_ram && pfn_valid(pfn) && !PageReserved(pfn_to_page(pfn))) | |
266b9f87 | 217 | return NULL; |
ba748d22 | 218 | WARN_ON_ONCE(is_ram); |
1da177e4 LT |
219 | } |
220 | ||
d7677d40 | 221 | /* |
222 | * Mappings have to be page-aligned | |
223 | */ | |
224 | offset = phys_addr & ~PAGE_MASK; | |
225 | phys_addr &= PAGE_MASK; | |
226 | size = PAGE_ALIGN(last_addr+1) - phys_addr; | |
227 | ||
e213e877 | 228 | retval = reserve_memtype(phys_addr, (u64)phys_addr + size, |
dee7cbb2 VP |
229 | prot_val, &new_prot_val); |
230 | if (retval) { | |
b450e5e8 | 231 | pr_debug("Warning: reserve_memtype returned %d\n", retval); |
dee7cbb2 VP |
232 | return NULL; |
233 | } | |
234 | ||
235 | if (prot_val != new_prot_val) { | |
d7677d40 | 236 | /* |
237 | * Do not fallback to certain memory types with certain | |
238 | * requested type: | |
de33c442 SS |
239 | * - request is uc-, return cannot be write-back |
240 | * - request is uc-, return cannot be write-combine | |
b310f381 | 241 | * - request is write-combine, return cannot be write-back |
d7677d40 | 242 | */ |
de33c442 | 243 | if ((prot_val == _PAGE_CACHE_UC_MINUS && |
b310f381 | 244 | (new_prot_val == _PAGE_CACHE_WB || |
245 | new_prot_val == _PAGE_CACHE_WC)) || | |
246 | (prot_val == _PAGE_CACHE_WC && | |
d7677d40 | 247 | new_prot_val == _PAGE_CACHE_WB)) { |
b450e5e8 | 248 | pr_debug( |
6997ab49 | 249 | "ioremap error for 0x%llx-0x%llx, requested 0x%lx, got 0x%lx\n", |
4c8337ac RD |
250 | (unsigned long long)phys_addr, |
251 | (unsigned long long)(phys_addr + size), | |
6997ab49 | 252 | prot_val, new_prot_val); |
d7677d40 | 253 | free_memtype(phys_addr, phys_addr + size); |
254 | return NULL; | |
255 | } | |
256 | prot_val = new_prot_val; | |
257 | } | |
258 | ||
3a96ce8c | 259 | switch (prot_val) { |
260 | case _PAGE_CACHE_UC: | |
d806e5ee | 261 | default: |
be43d728 | 262 | prot = PAGE_KERNEL_IO_NOCACHE; |
d806e5ee | 263 | break; |
de33c442 | 264 | case _PAGE_CACHE_UC_MINUS: |
be43d728 | 265 | prot = PAGE_KERNEL_IO_UC_MINUS; |
de33c442 | 266 | break; |
b310f381 | 267 | case _PAGE_CACHE_WC: |
be43d728 | 268 | prot = PAGE_KERNEL_IO_WC; |
b310f381 | 269 | break; |
3a96ce8c | 270 | case _PAGE_CACHE_WB: |
be43d728 | 271 | prot = PAGE_KERNEL_IO; |
d806e5ee TG |
272 | break; |
273 | } | |
a148ecfd | 274 | |
1da177e4 LT |
275 | /* |
276 | * Ok, go for it.. | |
277 | */ | |
23016969 | 278 | area = get_vm_area_caller(size, VM_IOREMAP, caller); |
1da177e4 LT |
279 | if (!area) |
280 | return NULL; | |
281 | area->phys_addr = phys_addr; | |
e66aadbe TG |
282 | vaddr = (unsigned long) area->addr; |
283 | if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot)) { | |
d7677d40 | 284 | free_memtype(phys_addr, phys_addr + size); |
b16bf712 | 285 | free_vm_area(area); |
1da177e4 LT |
286 | return NULL; |
287 | } | |
e9332cac | 288 | |
3a96ce8c | 289 | if (ioremap_change_attr(vaddr, size, prot_val) < 0) { |
d7677d40 | 290 | free_memtype(phys_addr, phys_addr + size); |
e66aadbe | 291 | vunmap(area->addr); |
e9332cac TG |
292 | return NULL; |
293 | } | |
294 | ||
d61fc448 | 295 | ret_addr = (void __iomem *) (vaddr + offset); |
87e547fe | 296 | mmiotrace_ioremap(unaligned_phys_addr, unaligned_size, ret_addr); |
d61fc448 PP |
297 | |
298 | return ret_addr; | |
1da177e4 | 299 | } |
1da177e4 LT |
300 | |
301 | /** | |
302 | * ioremap_nocache - map bus memory into CPU space | |
303 | * @offset: bus address of the memory | |
304 | * @size: size of the resource to map | |
305 | * | |
306 | * ioremap_nocache performs a platform specific sequence of operations to | |
307 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | |
308 | * writew/writel functions and the other mmio helpers. The returned | |
309 | * address is not guaranteed to be usable directly as a virtual | |
91eebf40 | 310 | * address. |
1da177e4 LT |
311 | * |
312 | * This version of ioremap ensures that the memory is marked uncachable | |
313 | * on the CPU as well as honouring existing caching rules from things like | |
91eebf40 | 314 | * the PCI bus. Note that there are other caches and buffers on many |
1da177e4 LT |
315 | * busses. In particular driver authors should read up on PCI writes |
316 | * | |
317 | * It's useful if some control registers are in such an area and | |
318 | * write combining or read caching is not desirable: | |
91eebf40 | 319 | * |
1da177e4 LT |
320 | * Must be freed with iounmap. |
321 | */ | |
b9e76a00 | 322 | void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size) |
1da177e4 | 323 | { |
de33c442 SS |
324 | /* |
325 | * Ideally, this should be: | |
499f8f84 | 326 | * pat_enabled ? _PAGE_CACHE_UC : _PAGE_CACHE_UC_MINUS; |
de33c442 SS |
327 | * |
328 | * Till we fix all X drivers to use ioremap_wc(), we will use | |
329 | * UC MINUS. | |
330 | */ | |
331 | unsigned long val = _PAGE_CACHE_UC_MINUS; | |
332 | ||
333 | return __ioremap_caller(phys_addr, size, val, | |
23016969 | 334 | __builtin_return_address(0)); |
1da177e4 | 335 | } |
129f6946 | 336 | EXPORT_SYMBOL(ioremap_nocache); |
1da177e4 | 337 | |
b310f381 | 338 | /** |
339 | * ioremap_wc - map memory into CPU space write combined | |
340 | * @offset: bus address of the memory | |
341 | * @size: size of the resource to map | |
342 | * | |
343 | * This version of ioremap ensures that the memory is marked write combining. | |
344 | * Write combining allows faster writes to some hardware devices. | |
345 | * | |
346 | * Must be freed with iounmap. | |
347 | */ | |
d639bab8 | 348 | void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size) |
b310f381 | 349 | { |
499f8f84 | 350 | if (pat_enabled) |
23016969 CL |
351 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC, |
352 | __builtin_return_address(0)); | |
b310f381 | 353 | else |
354 | return ioremap_nocache(phys_addr, size); | |
355 | } | |
356 | EXPORT_SYMBOL(ioremap_wc); | |
357 | ||
b9e76a00 | 358 | void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size) |
5f868152 | 359 | { |
23016969 CL |
360 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WB, |
361 | __builtin_return_address(0)); | |
5f868152 TG |
362 | } |
363 | EXPORT_SYMBOL(ioremap_cache); | |
364 | ||
a361ee5c VP |
365 | static void __iomem *ioremap_default(resource_size_t phys_addr, |
366 | unsigned long size) | |
367 | { | |
368 | unsigned long flags; | |
1d6cf1fe | 369 | void __iomem *ret; |
a361ee5c VP |
370 | int err; |
371 | ||
372 | /* | |
373 | * - WB for WB-able memory and no other conflicting mappings | |
374 | * - UC_MINUS for non-WB-able memory with no other conflicting mappings | |
375 | * - Inherit from confliting mappings otherwise | |
376 | */ | |
377 | err = reserve_memtype(phys_addr, phys_addr + size, -1, &flags); | |
378 | if (err < 0) | |
379 | return NULL; | |
380 | ||
1d6cf1fe HH |
381 | ret = __ioremap_caller(phys_addr, size, flags, |
382 | __builtin_return_address(0)); | |
a361ee5c VP |
383 | |
384 | free_memtype(phys_addr, phys_addr + size); | |
1d6cf1fe | 385 | return ret; |
a361ee5c VP |
386 | } |
387 | ||
28b2ee20 RR |
388 | void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size, |
389 | unsigned long prot_val) | |
390 | { | |
391 | return __ioremap_caller(phys_addr, size, (prot_val & _PAGE_CACHE_MASK), | |
392 | __builtin_return_address(0)); | |
393 | } | |
394 | EXPORT_SYMBOL(ioremap_prot); | |
395 | ||
bf5421c3 AK |
396 | /** |
397 | * iounmap - Free a IO remapping | |
398 | * @addr: virtual address from ioremap_* | |
399 | * | |
400 | * Caller must ensure there is only one unmapping for the same pointer. | |
401 | */ | |
1da177e4 LT |
402 | void iounmap(volatile void __iomem *addr) |
403 | { | |
bf5421c3 | 404 | struct vm_struct *p, *o; |
c23a4e96 AM |
405 | |
406 | if ((void __force *)addr <= high_memory) | |
1da177e4 LT |
407 | return; |
408 | ||
409 | /* | |
410 | * __ioremap special-cases the PCI/ISA range by not instantiating a | |
411 | * vm_area and by simply returning an address into the kernel mapping | |
412 | * of ISA space. So handle that here. | |
413 | */ | |
6e92a5a6 TG |
414 | if ((void __force *)addr >= phys_to_virt(ISA_START_ADDRESS) && |
415 | (void __force *)addr < phys_to_virt(ISA_END_ADDRESS)) | |
1da177e4 LT |
416 | return; |
417 | ||
91eebf40 TG |
418 | addr = (volatile void __iomem *) |
419 | (PAGE_MASK & (unsigned long __force)addr); | |
bf5421c3 | 420 | |
d61fc448 PP |
421 | mmiotrace_iounmap(addr); |
422 | ||
bf5421c3 AK |
423 | /* Use the vm area unlocked, assuming the caller |
424 | ensures there isn't another iounmap for the same address | |
425 | in parallel. Reuse of the virtual address is prevented by | |
426 | leaving it in the global lists until we're done with it. | |
427 | cpa takes care of the direct mappings. */ | |
428 | read_lock(&vmlist_lock); | |
429 | for (p = vmlist; p; p = p->next) { | |
6e92a5a6 | 430 | if (p->addr == (void __force *)addr) |
bf5421c3 AK |
431 | break; |
432 | } | |
433 | read_unlock(&vmlist_lock); | |
434 | ||
435 | if (!p) { | |
91eebf40 | 436 | printk(KERN_ERR "iounmap: bad address %p\n", addr); |
c23a4e96 | 437 | dump_stack(); |
bf5421c3 | 438 | return; |
1da177e4 LT |
439 | } |
440 | ||
d7677d40 | 441 | free_memtype(p->phys_addr, p->phys_addr + get_vm_area_size(p)); |
442 | ||
bf5421c3 | 443 | /* Finally remove it */ |
6e92a5a6 | 444 | o = remove_vm_area((void __force *)addr); |
bf5421c3 | 445 | BUG_ON(p != o || o == NULL); |
91eebf40 | 446 | kfree(p); |
1da177e4 | 447 | } |
129f6946 | 448 | EXPORT_SYMBOL(iounmap); |
1da177e4 | 449 | |
e045fb2a | 450 | /* |
451 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
452 | * access | |
453 | */ | |
454 | void *xlate_dev_mem_ptr(unsigned long phys) | |
455 | { | |
456 | void *addr; | |
457 | unsigned long start = phys & PAGE_MASK; | |
458 | ||
459 | /* If page is RAM, we can use __va. Otherwise ioremap and unmap. */ | |
460 | if (page_is_ram(start >> PAGE_SHIFT)) | |
461 | return __va(phys); | |
462 | ||
ae94b807 | 463 | addr = (void __force *)ioremap_default(start, PAGE_SIZE); |
e045fb2a | 464 | if (addr) |
465 | addr = (void *)((unsigned long)addr | (phys & ~PAGE_MASK)); | |
466 | ||
467 | return addr; | |
468 | } | |
469 | ||
470 | void unxlate_dev_mem_ptr(unsigned long phys, void *addr) | |
471 | { | |
472 | if (page_is_ram(phys >> PAGE_SHIFT)) | |
473 | return; | |
474 | ||
475 | iounmap((void __iomem *)((unsigned long)addr & PAGE_MASK)); | |
476 | return; | |
477 | } | |
478 | ||
4b6e9f27 | 479 | static int __initdata early_ioremap_debug; |
d18d6d65 IM |
480 | |
481 | static int __init early_ioremap_debug_setup(char *str) | |
482 | { | |
483 | early_ioremap_debug = 1; | |
484 | ||
793b24a2 | 485 | return 0; |
d18d6d65 | 486 | } |
793b24a2 | 487 | early_param("early_ioremap_debug", early_ioremap_debug_setup); |
d18d6d65 | 488 | |
0947b2f3 | 489 | static __initdata int after_paging_init; |
45c7b28f | 490 | static pte_t bm_pte[PAGE_SIZE/sizeof(pte_t)] __page_aligned_bss; |
0947b2f3 | 491 | |
551889a6 | 492 | static inline pmd_t * __init early_ioremap_pmd(unsigned long addr) |
0947b2f3 | 493 | { |
37cc8d7f JF |
494 | /* Don't assume we're using swapper_pg_dir at this point */ |
495 | pgd_t *base = __va(read_cr3()); | |
496 | pgd_t *pgd = &base[pgd_index(addr)]; | |
551889a6 IC |
497 | pud_t *pud = pud_offset(pgd, addr); |
498 | pmd_t *pmd = pmd_offset(pud, addr); | |
499 | ||
500 | return pmd; | |
0947b2f3 HY |
501 | } |
502 | ||
551889a6 | 503 | static inline pte_t * __init early_ioremap_pte(unsigned long addr) |
0947b2f3 | 504 | { |
551889a6 | 505 | return &bm_pte[pte_index(addr)]; |
0947b2f3 HY |
506 | } |
507 | ||
8827247f WC |
508 | static unsigned long slot_virt[FIX_BTMAPS_SLOTS] __initdata; |
509 | ||
beacfaac | 510 | void __init early_ioremap_init(void) |
0947b2f3 | 511 | { |
551889a6 | 512 | pmd_t *pmd; |
8827247f | 513 | int i; |
0947b2f3 | 514 | |
d18d6d65 | 515 | if (early_ioremap_debug) |
adafdf6a | 516 | printk(KERN_INFO "early_ioremap_init()\n"); |
d18d6d65 | 517 | |
8827247f | 518 | for (i = 0; i < FIX_BTMAPS_SLOTS; i++) |
9f4f25c8 | 519 | slot_virt[i] = __fix_to_virt(FIX_BTMAP_BEGIN - NR_FIX_BTMAPS*i); |
8827247f | 520 | |
551889a6 | 521 | pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)); |
45c7b28f JF |
522 | memset(bm_pte, 0, sizeof(bm_pte)); |
523 | pmd_populate_kernel(&init_mm, pmd, bm_pte); | |
551889a6 | 524 | |
0e3a9549 | 525 | /* |
551889a6 | 526 | * The boot-ioremap range spans multiple pmds, for which |
0e3a9549 IM |
527 | * we are not prepared: |
528 | */ | |
551889a6 | 529 | if (pmd != early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))) { |
0e3a9549 | 530 | WARN_ON(1); |
551889a6 IC |
531 | printk(KERN_WARNING "pmd %p != %p\n", |
532 | pmd, early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))); | |
91eebf40 | 533 | printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
551889a6 | 534 | fix_to_virt(FIX_BTMAP_BEGIN)); |
91eebf40 | 535 | printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_END): %08lx\n", |
551889a6 | 536 | fix_to_virt(FIX_BTMAP_END)); |
91eebf40 TG |
537 | |
538 | printk(KERN_WARNING "FIX_BTMAP_END: %d\n", FIX_BTMAP_END); | |
539 | printk(KERN_WARNING "FIX_BTMAP_BEGIN: %d\n", | |
540 | FIX_BTMAP_BEGIN); | |
0e3a9549 | 541 | } |
0947b2f3 HY |
542 | } |
543 | ||
beacfaac | 544 | void __init early_ioremap_reset(void) |
0947b2f3 | 545 | { |
0947b2f3 | 546 | after_paging_init = 1; |
0947b2f3 HY |
547 | } |
548 | ||
beacfaac | 549 | static void __init __early_set_fixmap(enum fixed_addresses idx, |
0947b2f3 HY |
550 | unsigned long phys, pgprot_t flags) |
551 | { | |
551889a6 IC |
552 | unsigned long addr = __fix_to_virt(idx); |
553 | pte_t *pte; | |
0947b2f3 HY |
554 | |
555 | if (idx >= __end_of_fixed_addresses) { | |
556 | BUG(); | |
557 | return; | |
558 | } | |
beacfaac | 559 | pte = early_ioremap_pte(addr); |
4583ed51 | 560 | |
0947b2f3 | 561 | if (pgprot_val(flags)) |
551889a6 | 562 | set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); |
0947b2f3 | 563 | else |
4f9c11dd | 564 | pte_clear(&init_mm, addr, pte); |
0947b2f3 HY |
565 | __flush_tlb_one(addr); |
566 | } | |
567 | ||
beacfaac | 568 | static inline void __init early_set_fixmap(enum fixed_addresses idx, |
14941779 | 569 | unsigned long phys, pgprot_t prot) |
0947b2f3 HY |
570 | { |
571 | if (after_paging_init) | |
14941779 | 572 | __set_fixmap(idx, phys, prot); |
0947b2f3 | 573 | else |
14941779 | 574 | __early_set_fixmap(idx, phys, prot); |
0947b2f3 HY |
575 | } |
576 | ||
beacfaac | 577 | static inline void __init early_clear_fixmap(enum fixed_addresses idx) |
0947b2f3 HY |
578 | { |
579 | if (after_paging_init) | |
580 | clear_fixmap(idx); | |
581 | else | |
beacfaac | 582 | __early_set_fixmap(idx, 0, __pgprot(0)); |
0947b2f3 HY |
583 | } |
584 | ||
1d6cf1fe | 585 | static void __iomem *prev_map[FIX_BTMAPS_SLOTS] __initdata; |
c1a2f4b1 | 586 | static unsigned long prev_size[FIX_BTMAPS_SLOTS] __initdata; |
8827247f | 587 | |
d690b2af IM |
588 | static int __init check_early_ioremap_leak(void) |
589 | { | |
c1a2f4b1 YL |
590 | int count = 0; |
591 | int i; | |
592 | ||
593 | for (i = 0; i < FIX_BTMAPS_SLOTS; i++) | |
594 | if (prev_map[i]) | |
595 | count++; | |
596 | ||
597 | if (!count) | |
d690b2af | 598 | return 0; |
0c072bb4 | 599 | WARN(1, KERN_WARNING |
91eebf40 | 600 | "Debug warning: early ioremap leak of %d areas detected.\n", |
c1a2f4b1 | 601 | count); |
d690b2af | 602 | printk(KERN_WARNING |
0c072bb4 | 603 | "please boot with early_ioremap_debug and report the dmesg.\n"); |
d690b2af IM |
604 | |
605 | return 1; | |
606 | } | |
607 | late_initcall(check_early_ioremap_leak); | |
608 | ||
8827247f WC |
609 | static void __init __iomem * |
610 | __early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot) | |
1da177e4 LT |
611 | { |
612 | unsigned long offset, last_addr; | |
c1a2f4b1 | 613 | unsigned int nrpages; |
1b42f516 | 614 | enum fixed_addresses idx0, idx; |
c1a2f4b1 | 615 | int i, slot; |
1b42f516 IM |
616 | |
617 | WARN_ON(system_state != SYSTEM_BOOTING); | |
618 | ||
c1a2f4b1 YL |
619 | slot = -1; |
620 | for (i = 0; i < FIX_BTMAPS_SLOTS; i++) { | |
621 | if (!prev_map[i]) { | |
622 | slot = i; | |
623 | break; | |
624 | } | |
625 | } | |
626 | ||
627 | if (slot < 0) { | |
628 | printk(KERN_INFO "early_iomap(%08lx, %08lx) not found slot\n", | |
629 | phys_addr, size); | |
630 | WARN_ON(1); | |
631 | return NULL; | |
632 | } | |
633 | ||
d18d6d65 | 634 | if (early_ioremap_debug) { |
adafdf6a | 635 | printk(KERN_INFO "early_ioremap(%08lx, %08lx) [%d] => ", |
c1a2f4b1 | 636 | phys_addr, size, slot); |
d18d6d65 IM |
637 | dump_stack(); |
638 | } | |
1da177e4 LT |
639 | |
640 | /* Don't allow wraparound or zero size */ | |
641 | last_addr = phys_addr + size - 1; | |
bd796ed0 IM |
642 | if (!size || last_addr < phys_addr) { |
643 | WARN_ON(1); | |
1da177e4 | 644 | return NULL; |
bd796ed0 | 645 | } |
1da177e4 | 646 | |
c1a2f4b1 | 647 | prev_size[slot] = size; |
1da177e4 LT |
648 | /* |
649 | * Mappings have to be page-aligned | |
650 | */ | |
651 | offset = phys_addr & ~PAGE_MASK; | |
652 | phys_addr &= PAGE_MASK; | |
c613ec1a | 653 | size = PAGE_ALIGN(last_addr + 1) - phys_addr; |
1da177e4 LT |
654 | |
655 | /* | |
656 | * Mappings have to fit in the FIX_BTMAP area. | |
657 | */ | |
658 | nrpages = size >> PAGE_SHIFT; | |
bd796ed0 IM |
659 | if (nrpages > NR_FIX_BTMAPS) { |
660 | WARN_ON(1); | |
1da177e4 | 661 | return NULL; |
bd796ed0 | 662 | } |
1da177e4 LT |
663 | |
664 | /* | |
665 | * Ok, go for it.. | |
666 | */ | |
c1a2f4b1 | 667 | idx0 = FIX_BTMAP_BEGIN - NR_FIX_BTMAPS*slot; |
1b42f516 | 668 | idx = idx0; |
1da177e4 | 669 | while (nrpages > 0) { |
14941779 | 670 | early_set_fixmap(idx, phys_addr, prot); |
1da177e4 LT |
671 | phys_addr += PAGE_SIZE; |
672 | --idx; | |
673 | --nrpages; | |
674 | } | |
d18d6d65 | 675 | if (early_ioremap_debug) |
8827247f | 676 | printk(KERN_CONT "%08lx + %08lx\n", offset, slot_virt[slot]); |
1b42f516 | 677 | |
8827247f | 678 | prev_map[slot] = (void __iomem *)(offset + slot_virt[slot]); |
c1a2f4b1 | 679 | return prev_map[slot]; |
1da177e4 LT |
680 | } |
681 | ||
14941779 | 682 | /* Remap an IO device */ |
1d6cf1fe | 683 | void __init __iomem *early_ioremap(unsigned long phys_addr, unsigned long size) |
14941779 JF |
684 | { |
685 | return __early_ioremap(phys_addr, size, PAGE_KERNEL_IO); | |
686 | } | |
687 | ||
688 | /* Remap memory */ | |
1d6cf1fe | 689 | void __init __iomem *early_memremap(unsigned long phys_addr, unsigned long size) |
14941779 JF |
690 | { |
691 | return __early_ioremap(phys_addr, size, PAGE_KERNEL); | |
692 | } | |
693 | ||
1d6cf1fe | 694 | void __init early_iounmap(void __iomem *addr, unsigned long size) |
1da177e4 LT |
695 | { |
696 | unsigned long virt_addr; | |
697 | unsigned long offset; | |
698 | unsigned int nrpages; | |
699 | enum fixed_addresses idx; | |
c1a2f4b1 YL |
700 | int i, slot; |
701 | ||
702 | slot = -1; | |
703 | for (i = 0; i < FIX_BTMAPS_SLOTS; i++) { | |
704 | if (prev_map[i] == addr) { | |
705 | slot = i; | |
706 | break; | |
707 | } | |
708 | } | |
1b42f516 | 709 | |
c1a2f4b1 YL |
710 | if (slot < 0) { |
711 | printk(KERN_INFO "early_iounmap(%p, %08lx) not found slot\n", | |
712 | addr, size); | |
713 | WARN_ON(1); | |
714 | return; | |
715 | } | |
716 | ||
717 | if (prev_size[slot] != size) { | |
718 | printk(KERN_INFO "early_iounmap(%p, %08lx) [%d] size not consistent %08lx\n", | |
719 | addr, size, slot, prev_size[slot]); | |
720 | WARN_ON(1); | |
226e9a93 | 721 | return; |
c1a2f4b1 | 722 | } |
1da177e4 | 723 | |
d18d6d65 | 724 | if (early_ioremap_debug) { |
adafdf6a | 725 | printk(KERN_INFO "early_iounmap(%p, %08lx) [%d]\n", addr, |
c1a2f4b1 | 726 | size, slot); |
d18d6d65 IM |
727 | dump_stack(); |
728 | } | |
729 | ||
1da177e4 | 730 | virt_addr = (unsigned long)addr; |
bd796ed0 IM |
731 | if (virt_addr < fix_to_virt(FIX_BTMAP_BEGIN)) { |
732 | WARN_ON(1); | |
1da177e4 | 733 | return; |
bd796ed0 | 734 | } |
1da177e4 LT |
735 | offset = virt_addr & ~PAGE_MASK; |
736 | nrpages = PAGE_ALIGN(offset + size - 1) >> PAGE_SHIFT; | |
737 | ||
c1a2f4b1 | 738 | idx = FIX_BTMAP_BEGIN - NR_FIX_BTMAPS*slot; |
1da177e4 | 739 | while (nrpages > 0) { |
beacfaac | 740 | early_clear_fixmap(idx); |
1da177e4 LT |
741 | --idx; |
742 | --nrpages; | |
743 | } | |
1d6cf1fe | 744 | prev_map[slot] = NULL; |
1da177e4 | 745 | } |