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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Re-map IO memory to kernel address space so that we can access it. |
3 | * This is needed for high PCI addresses that aren't mapped in the | |
4 | * 640k-1MB IO memory area on PC's | |
5 | * | |
6 | * (C) Copyright 1995 1996 Linus Torvalds | |
7 | */ | |
8 | ||
57c8a661 | 9 | #include <linux/memblock.h> |
1da177e4 | 10 | #include <linux/init.h> |
a148ecfd | 11 | #include <linux/io.h> |
9de94dbb | 12 | #include <linux/ioport.h> |
3cbd09e4 TG |
13 | #include <linux/slab.h> |
14 | #include <linux/vmalloc.h> | |
d61fc448 | 15 | #include <linux/mmiotrace.h> |
8f716c9b TL |
16 | #include <linux/mem_encrypt.h> |
17 | #include <linux/efi.h> | |
3cbd09e4 | 18 | |
d1163651 | 19 | #include <asm/set_memory.h> |
66441bd3 | 20 | #include <asm/e820/api.h> |
3cbd09e4 | 21 | #include <asm/fixmap.h> |
1da177e4 | 22 | #include <asm/pgtable.h> |
3cbd09e4 | 23 | #include <asm/tlbflush.h> |
f6df72e7 | 24 | #include <asm/pgalloc.h> |
d7677d40 | 25 | #include <asm/pat.h> |
8f716c9b | 26 | #include <asm/setup.h> |
1da177e4 | 27 | |
78c86e5e | 28 | #include "physaddr.h" |
240d3a7c | 29 | |
0e4c12b4 TL |
30 | struct ioremap_mem_flags { |
31 | bool system_ram; | |
32 | bool desc_other; | |
33 | }; | |
34 | ||
e9332cac TG |
35 | /* |
36 | * Fix up the linear direct mapping of the kernel to avoid cache attribute | |
37 | * conflicts. | |
38 | */ | |
3a96ce8c | 39 | int ioremap_change_attr(unsigned long vaddr, unsigned long size, |
b14097bd | 40 | enum page_cache_mode pcm) |
e9332cac | 41 | { |
d806e5ee | 42 | unsigned long nrpages = size >> PAGE_SHIFT; |
93809be8 | 43 | int err; |
e9332cac | 44 | |
b14097bd JG |
45 | switch (pcm) { |
46 | case _PAGE_CACHE_MODE_UC: | |
d806e5ee | 47 | default: |
1219333d | 48 | err = _set_memory_uc(vaddr, nrpages); |
d806e5ee | 49 | break; |
b14097bd | 50 | case _PAGE_CACHE_MODE_WC: |
b310f381 | 51 | err = _set_memory_wc(vaddr, nrpages); |
52 | break; | |
623dffb2 TK |
53 | case _PAGE_CACHE_MODE_WT: |
54 | err = _set_memory_wt(vaddr, nrpages); | |
55 | break; | |
b14097bd | 56 | case _PAGE_CACHE_MODE_WB: |
1219333d | 57 | err = _set_memory_wb(vaddr, nrpages); |
d806e5ee TG |
58 | break; |
59 | } | |
e9332cac TG |
60 | |
61 | return err; | |
62 | } | |
63 | ||
0e4c12b4 | 64 | static bool __ioremap_check_ram(struct resource *res) |
c81c8a1e | 65 | { |
0e4c12b4 | 66 | unsigned long start_pfn, stop_pfn; |
c81c8a1e RD |
67 | unsigned long i; |
68 | ||
0e4c12b4 TL |
69 | if ((res->flags & IORESOURCE_SYSTEM_RAM) != IORESOURCE_SYSTEM_RAM) |
70 | return false; | |
71 | ||
72 | start_pfn = (res->start + PAGE_SIZE - 1) >> PAGE_SHIFT; | |
73 | stop_pfn = (res->end + 1) >> PAGE_SHIFT; | |
74 | if (stop_pfn > start_pfn) { | |
75 | for (i = 0; i < (stop_pfn - start_pfn); ++i) | |
76 | if (pfn_valid(start_pfn + i) && | |
77 | !PageReserved(pfn_to_page(start_pfn + i))) | |
78 | return true; | |
79 | } | |
80 | ||
81 | return false; | |
82 | } | |
83 | ||
84 | static int __ioremap_check_desc_other(struct resource *res) | |
85 | { | |
86 | return (res->desc != IORES_DESC_NONE); | |
87 | } | |
88 | ||
89 | static int __ioremap_res_check(struct resource *res, void *arg) | |
90 | { | |
91 | struct ioremap_mem_flags *flags = arg; | |
92 | ||
93 | if (!flags->system_ram) | |
94 | flags->system_ram = __ioremap_check_ram(res); | |
95 | ||
96 | if (!flags->desc_other) | |
97 | flags->desc_other = __ioremap_check_desc_other(res); | |
c81c8a1e | 98 | |
0e4c12b4 TL |
99 | return flags->system_ram && flags->desc_other; |
100 | } | |
101 | ||
102 | /* | |
103 | * To avoid multiple resource walks, this function walks resources marked as | |
104 | * IORESOURCE_MEM and IORESOURCE_BUSY and looking for system RAM and/or a | |
105 | * resource described not as IORES_DESC_NONE (e.g. IORES_DESC_ACPI_TABLES). | |
106 | */ | |
107 | static void __ioremap_check_mem(resource_size_t addr, unsigned long size, | |
108 | struct ioremap_mem_flags *flags) | |
109 | { | |
110 | u64 start, end; | |
111 | ||
112 | start = (u64)addr; | |
113 | end = start + size - 1; | |
114 | memset(flags, 0, sizeof(*flags)); | |
115 | ||
116 | walk_mem_res(start, end, flags, __ioremap_res_check); | |
c81c8a1e RD |
117 | } |
118 | ||
1da177e4 LT |
119 | /* |
120 | * Remap an arbitrary physical address space into the kernel virtual | |
5d72b4fb TK |
121 | * address space. It transparently creates kernel huge I/O mapping when |
122 | * the physical address is aligned by a huge page size (1GB or 2MB) and | |
123 | * the requested size is at least the huge page size. | |
124 | * | |
125 | * NOTE: MTRRs can override PAT memory types with a 4KB granularity. | |
126 | * Therefore, the mapping code falls back to use a smaller page toward 4KB | |
127 | * when a mapping range is covered by non-WB type of MTRRs. | |
1da177e4 LT |
128 | * |
129 | * NOTE! We need to allow non-page-aligned mappings too: we will obviously | |
130 | * have to convert them into an offset in a page-aligned mapping, but the | |
131 | * caller shouldn't need to know that small detail. | |
132 | */ | |
23016969 | 133 | static void __iomem *__ioremap_caller(resource_size_t phys_addr, |
c3a7a61c LJ |
134 | unsigned long size, enum page_cache_mode pcm, |
135 | void *caller, bool encrypted) | |
1da177e4 | 136 | { |
ffa71f33 | 137 | unsigned long offset, vaddr; |
0e4c12b4 | 138 | resource_size_t last_addr; |
87e547fe PP |
139 | const resource_size_t unaligned_phys_addr = phys_addr; |
140 | const unsigned long unaligned_size = size; | |
0e4c12b4 | 141 | struct ioremap_mem_flags mem_flags; |
91eebf40 | 142 | struct vm_struct *area; |
b14097bd | 143 | enum page_cache_mode new_pcm; |
d806e5ee | 144 | pgprot_t prot; |
dee7cbb2 | 145 | int retval; |
d61fc448 | 146 | void __iomem *ret_addr; |
1da177e4 LT |
147 | |
148 | /* Don't allow wraparound or zero size */ | |
149 | last_addr = phys_addr + size - 1; | |
150 | if (!size || last_addr < phys_addr) | |
151 | return NULL; | |
152 | ||
e3100c82 | 153 | if (!phys_addr_valid(phys_addr)) { |
6997ab49 | 154 | printk(KERN_WARNING "ioremap: invalid physical address %llx\n", |
4c8337ac | 155 | (unsigned long long)phys_addr); |
e3100c82 TG |
156 | WARN_ON_ONCE(1); |
157 | return NULL; | |
158 | } | |
159 | ||
0e4c12b4 TL |
160 | __ioremap_check_mem(phys_addr, size, &mem_flags); |
161 | ||
1da177e4 LT |
162 | /* |
163 | * Don't allow anybody to remap normal RAM that we're using.. | |
164 | */ | |
0e4c12b4 | 165 | if (mem_flags.system_ram) { |
8a0a5da6 TG |
166 | WARN_ONCE(1, "ioremap on RAM at %pa - %pa\n", |
167 | &phys_addr, &last_addr); | |
9a58eebe | 168 | return NULL; |
906e36c5 | 169 | } |
9a58eebe | 170 | |
d7677d40 | 171 | /* |
172 | * Mappings have to be page-aligned | |
173 | */ | |
174 | offset = phys_addr & ~PAGE_MASK; | |
ffa71f33 | 175 | phys_addr &= PHYSICAL_PAGE_MASK; |
d7677d40 | 176 | size = PAGE_ALIGN(last_addr+1) - phys_addr; |
177 | ||
e213e877 | 178 | retval = reserve_memtype(phys_addr, (u64)phys_addr + size, |
e00c8cc9 | 179 | pcm, &new_pcm); |
dee7cbb2 | 180 | if (retval) { |
279e669b | 181 | printk(KERN_ERR "ioremap reserve_memtype failed %d\n", retval); |
dee7cbb2 VP |
182 | return NULL; |
183 | } | |
184 | ||
b14097bd JG |
185 | if (pcm != new_pcm) { |
186 | if (!is_new_memtype_allowed(phys_addr, size, pcm, new_pcm)) { | |
279e669b | 187 | printk(KERN_ERR |
b14097bd | 188 | "ioremap error for 0x%llx-0x%llx, requested 0x%x, got 0x%x\n", |
4c8337ac RD |
189 | (unsigned long long)phys_addr, |
190 | (unsigned long long)(phys_addr + size), | |
b14097bd | 191 | pcm, new_pcm); |
de2a47cf | 192 | goto err_free_memtype; |
d7677d40 | 193 | } |
b14097bd | 194 | pcm = new_pcm; |
d7677d40 | 195 | } |
196 | ||
0e4c12b4 TL |
197 | /* |
198 | * If the page being mapped is in memory and SEV is active then | |
199 | * make sure the memory encryption attribute is enabled in the | |
200 | * resulting mapping. | |
201 | */ | |
b14097bd | 202 | prot = PAGE_KERNEL_IO; |
c3a7a61c | 203 | if ((sev_active() && mem_flags.desc_other) || encrypted) |
0e4c12b4 TL |
204 | prot = pgprot_encrypted(prot); |
205 | ||
b14097bd JG |
206 | switch (pcm) { |
207 | case _PAGE_CACHE_MODE_UC: | |
d806e5ee | 208 | default: |
b14097bd JG |
209 | prot = __pgprot(pgprot_val(prot) | |
210 | cachemode2protval(_PAGE_CACHE_MODE_UC)); | |
d806e5ee | 211 | break; |
b14097bd JG |
212 | case _PAGE_CACHE_MODE_UC_MINUS: |
213 | prot = __pgprot(pgprot_val(prot) | | |
214 | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS)); | |
de33c442 | 215 | break; |
b14097bd JG |
216 | case _PAGE_CACHE_MODE_WC: |
217 | prot = __pgprot(pgprot_val(prot) | | |
218 | cachemode2protval(_PAGE_CACHE_MODE_WC)); | |
b310f381 | 219 | break; |
d838270e TK |
220 | case _PAGE_CACHE_MODE_WT: |
221 | prot = __pgprot(pgprot_val(prot) | | |
222 | cachemode2protval(_PAGE_CACHE_MODE_WT)); | |
223 | break; | |
b14097bd | 224 | case _PAGE_CACHE_MODE_WB: |
d806e5ee TG |
225 | break; |
226 | } | |
a148ecfd | 227 | |
1da177e4 LT |
228 | /* |
229 | * Ok, go for it.. | |
230 | */ | |
23016969 | 231 | area = get_vm_area_caller(size, VM_IOREMAP, caller); |
1da177e4 | 232 | if (!area) |
de2a47cf | 233 | goto err_free_memtype; |
1da177e4 | 234 | area->phys_addr = phys_addr; |
e66aadbe | 235 | vaddr = (unsigned long) area->addr; |
43a432b1 | 236 | |
b14097bd | 237 | if (kernel_map_sync_memtype(phys_addr, size, pcm)) |
de2a47cf | 238 | goto err_free_area; |
e9332cac | 239 | |
de2a47cf XF |
240 | if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot)) |
241 | goto err_free_area; | |
e9332cac | 242 | |
d61fc448 | 243 | ret_addr = (void __iomem *) (vaddr + offset); |
87e547fe | 244 | mmiotrace_ioremap(unaligned_phys_addr, unaligned_size, ret_addr); |
d61fc448 | 245 | |
c7a7b814 TG |
246 | /* |
247 | * Check if the request spans more than any BAR in the iomem resource | |
248 | * tree. | |
249 | */ | |
9abb0ecd LA |
250 | if (iomem_map_sanity_check(unaligned_phys_addr, unaligned_size)) |
251 | pr_warn("caller %pS mapping multiple BARs\n", caller); | |
c7a7b814 | 252 | |
d61fc448 | 253 | return ret_addr; |
de2a47cf XF |
254 | err_free_area: |
255 | free_vm_area(area); | |
256 | err_free_memtype: | |
257 | free_memtype(phys_addr, phys_addr + size); | |
258 | return NULL; | |
1da177e4 | 259 | } |
1da177e4 LT |
260 | |
261 | /** | |
262 | * ioremap_nocache - map bus memory into CPU space | |
9efc31b8 | 263 | * @phys_addr: bus address of the memory |
1da177e4 LT |
264 | * @size: size of the resource to map |
265 | * | |
266 | * ioremap_nocache performs a platform specific sequence of operations to | |
267 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | |
268 | * writew/writel functions and the other mmio helpers. The returned | |
269 | * address is not guaranteed to be usable directly as a virtual | |
91eebf40 | 270 | * address. |
1da177e4 LT |
271 | * |
272 | * This version of ioremap ensures that the memory is marked uncachable | |
273 | * on the CPU as well as honouring existing caching rules from things like | |
91eebf40 | 274 | * the PCI bus. Note that there are other caches and buffers on many |
1da177e4 LT |
275 | * busses. In particular driver authors should read up on PCI writes |
276 | * | |
277 | * It's useful if some control registers are in such an area and | |
278 | * write combining or read caching is not desirable: | |
91eebf40 | 279 | * |
1da177e4 LT |
280 | * Must be freed with iounmap. |
281 | */ | |
b9e76a00 | 282 | void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size) |
1da177e4 | 283 | { |
de33c442 SS |
284 | /* |
285 | * Ideally, this should be: | |
cb32edf6 | 286 | * pat_enabled() ? _PAGE_CACHE_MODE_UC : _PAGE_CACHE_MODE_UC_MINUS; |
de33c442 SS |
287 | * |
288 | * Till we fix all X drivers to use ioremap_wc(), we will use | |
e4b6be33 LR |
289 | * UC MINUS. Drivers that are certain they need or can already |
290 | * be converted over to strong UC can use ioremap_uc(). | |
de33c442 | 291 | */ |
b14097bd | 292 | enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC_MINUS; |
de33c442 | 293 | |
b14097bd | 294 | return __ioremap_caller(phys_addr, size, pcm, |
c3a7a61c | 295 | __builtin_return_address(0), false); |
1da177e4 | 296 | } |
129f6946 | 297 | EXPORT_SYMBOL(ioremap_nocache); |
1da177e4 | 298 | |
e4b6be33 LR |
299 | /** |
300 | * ioremap_uc - map bus memory into CPU space as strongly uncachable | |
301 | * @phys_addr: bus address of the memory | |
302 | * @size: size of the resource to map | |
303 | * | |
304 | * ioremap_uc performs a platform specific sequence of operations to | |
305 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | |
306 | * writew/writel functions and the other mmio helpers. The returned | |
307 | * address is not guaranteed to be usable directly as a virtual | |
308 | * address. | |
309 | * | |
310 | * This version of ioremap ensures that the memory is marked with a strong | |
311 | * preference as completely uncachable on the CPU when possible. For non-PAT | |
312 | * systems this ends up setting page-attribute flags PCD=1, PWT=1. For PAT | |
313 | * systems this will set the PAT entry for the pages as strong UC. This call | |
314 | * will honor existing caching rules from things like the PCI bus. Note that | |
315 | * there are other caches and buffers on many busses. In particular driver | |
316 | * authors should read up on PCI writes. | |
317 | * | |
318 | * It's useful if some control registers are in such an area and | |
319 | * write combining or read caching is not desirable: | |
320 | * | |
321 | * Must be freed with iounmap. | |
322 | */ | |
323 | void __iomem *ioremap_uc(resource_size_t phys_addr, unsigned long size) | |
324 | { | |
325 | enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC; | |
326 | ||
327 | return __ioremap_caller(phys_addr, size, pcm, | |
c3a7a61c | 328 | __builtin_return_address(0), false); |
e4b6be33 LR |
329 | } |
330 | EXPORT_SYMBOL_GPL(ioremap_uc); | |
331 | ||
b310f381 | 332 | /** |
333 | * ioremap_wc - map memory into CPU space write combined | |
9efc31b8 | 334 | * @phys_addr: bus address of the memory |
b310f381 | 335 | * @size: size of the resource to map |
336 | * | |
337 | * This version of ioremap ensures that the memory is marked write combining. | |
338 | * Write combining allows faster writes to some hardware devices. | |
339 | * | |
340 | * Must be freed with iounmap. | |
341 | */ | |
d639bab8 | 342 | void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size) |
b310f381 | 343 | { |
7202fdb1 | 344 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WC, |
c3a7a61c | 345 | __builtin_return_address(0), false); |
b310f381 | 346 | } |
347 | EXPORT_SYMBOL(ioremap_wc); | |
348 | ||
d838270e TK |
349 | /** |
350 | * ioremap_wt - map memory into CPU space write through | |
351 | * @phys_addr: bus address of the memory | |
352 | * @size: size of the resource to map | |
353 | * | |
354 | * This version of ioremap ensures that the memory is marked write through. | |
355 | * Write through stores data into memory while keeping the cache up-to-date. | |
356 | * | |
357 | * Must be freed with iounmap. | |
358 | */ | |
359 | void __iomem *ioremap_wt(resource_size_t phys_addr, unsigned long size) | |
360 | { | |
361 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WT, | |
c3a7a61c | 362 | __builtin_return_address(0), false); |
d838270e TK |
363 | } |
364 | EXPORT_SYMBOL(ioremap_wt); | |
365 | ||
c3a7a61c LJ |
366 | void __iomem *ioremap_encrypted(resource_size_t phys_addr, unsigned long size) |
367 | { | |
368 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WB, | |
369 | __builtin_return_address(0), true); | |
370 | } | |
371 | EXPORT_SYMBOL(ioremap_encrypted); | |
372 | ||
b9e76a00 | 373 | void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size) |
5f868152 | 374 | { |
b14097bd | 375 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WB, |
c3a7a61c | 376 | __builtin_return_address(0), false); |
5f868152 TG |
377 | } |
378 | EXPORT_SYMBOL(ioremap_cache); | |
379 | ||
28b2ee20 RR |
380 | void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size, |
381 | unsigned long prot_val) | |
382 | { | |
b14097bd JG |
383 | return __ioremap_caller(phys_addr, size, |
384 | pgprot2cachemode(__pgprot(prot_val)), | |
c3a7a61c | 385 | __builtin_return_address(0), false); |
28b2ee20 RR |
386 | } |
387 | EXPORT_SYMBOL(ioremap_prot); | |
388 | ||
bf5421c3 AK |
389 | /** |
390 | * iounmap - Free a IO remapping | |
391 | * @addr: virtual address from ioremap_* | |
392 | * | |
393 | * Caller must ensure there is only one unmapping for the same pointer. | |
394 | */ | |
1da177e4 LT |
395 | void iounmap(volatile void __iomem *addr) |
396 | { | |
bf5421c3 | 397 | struct vm_struct *p, *o; |
c23a4e96 AM |
398 | |
399 | if ((void __force *)addr <= high_memory) | |
1da177e4 LT |
400 | return; |
401 | ||
402 | /* | |
33c2b803 TL |
403 | * The PCI/ISA range special-casing was removed from __ioremap() |
404 | * so this check, in theory, can be removed. However, there are | |
405 | * cases where iounmap() is called for addresses not obtained via | |
406 | * ioremap() (vga16fb for example). Add a warning so that these | |
407 | * cases can be caught and fixed. | |
1da177e4 | 408 | */ |
6e92a5a6 | 409 | if ((void __force *)addr >= phys_to_virt(ISA_START_ADDRESS) && |
33c2b803 TL |
410 | (void __force *)addr < phys_to_virt(ISA_END_ADDRESS)) { |
411 | WARN(1, "iounmap() called for ISA range not obtained using ioremap()\n"); | |
1da177e4 | 412 | return; |
33c2b803 | 413 | } |
1da177e4 | 414 | |
6d60ce38 KH |
415 | mmiotrace_iounmap(addr); |
416 | ||
91eebf40 TG |
417 | addr = (volatile void __iomem *) |
418 | (PAGE_MASK & (unsigned long __force)addr); | |
bf5421c3 AK |
419 | |
420 | /* Use the vm area unlocked, assuming the caller | |
421 | ensures there isn't another iounmap for the same address | |
422 | in parallel. Reuse of the virtual address is prevented by | |
423 | leaving it in the global lists until we're done with it. | |
424 | cpa takes care of the direct mappings. */ | |
ef932473 | 425 | p = find_vm_area((void __force *)addr); |
bf5421c3 AK |
426 | |
427 | if (!p) { | |
91eebf40 | 428 | printk(KERN_ERR "iounmap: bad address %p\n", addr); |
c23a4e96 | 429 | dump_stack(); |
bf5421c3 | 430 | return; |
1da177e4 LT |
431 | } |
432 | ||
d7677d40 | 433 | free_memtype(p->phys_addr, p->phys_addr + get_vm_area_size(p)); |
434 | ||
bf5421c3 | 435 | /* Finally remove it */ |
6e92a5a6 | 436 | o = remove_vm_area((void __force *)addr); |
bf5421c3 | 437 | BUG_ON(p != o || o == NULL); |
91eebf40 | 438 | kfree(p); |
1da177e4 | 439 | } |
129f6946 | 440 | EXPORT_SYMBOL(iounmap); |
1da177e4 | 441 | |
1e6277de | 442 | int __init arch_ioremap_pud_supported(void) |
5d72b4fb TK |
443 | { |
444 | #ifdef CONFIG_X86_64 | |
b8291adc | 445 | return boot_cpu_has(X86_FEATURE_GBPAGES); |
5d72b4fb TK |
446 | #else |
447 | return 0; | |
448 | #endif | |
449 | } | |
450 | ||
1e6277de | 451 | int __init arch_ioremap_pmd_supported(void) |
5d72b4fb | 452 | { |
16bf9226 | 453 | return boot_cpu_has(X86_FEATURE_PSE); |
5d72b4fb TK |
454 | } |
455 | ||
e045fb2a | 456 | /* |
457 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
458 | * access | |
459 | */ | |
4707a341 | 460 | void *xlate_dev_mem_ptr(phys_addr_t phys) |
e045fb2a | 461 | { |
94d4b476 IM |
462 | unsigned long start = phys & PAGE_MASK; |
463 | unsigned long offset = phys & ~PAGE_MASK; | |
562bfca4 | 464 | void *vaddr; |
e045fb2a | 465 | |
8458bf94 TL |
466 | /* memremap() maps if RAM, otherwise falls back to ioremap() */ |
467 | vaddr = memremap(start, PAGE_SIZE, MEMREMAP_WB); | |
e045fb2a | 468 | |
8458bf94 | 469 | /* Only add the offset on success and return NULL if memremap() failed */ |
94d4b476 IM |
470 | if (vaddr) |
471 | vaddr += offset; | |
e045fb2a | 472 | |
562bfca4 | 473 | return vaddr; |
e045fb2a | 474 | } |
475 | ||
4707a341 | 476 | void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr) |
e045fb2a | 477 | { |
8458bf94 | 478 | memunmap((void *)((unsigned long)addr & PAGE_MASK)); |
e045fb2a | 479 | } |
480 | ||
8f716c9b TL |
481 | /* |
482 | * Examine the physical address to determine if it is an area of memory | |
483 | * that should be mapped decrypted. If the memory is not part of the | |
484 | * kernel usable area it was accessed and created decrypted, so these | |
1de32862 TL |
485 | * areas should be mapped decrypted. And since the encryption key can |
486 | * change across reboots, persistent memory should also be mapped | |
487 | * decrypted. | |
072f58c6 TL |
488 | * |
489 | * If SEV is active, that implies that BIOS/UEFI also ran encrypted so | |
490 | * only persistent memory should be mapped decrypted. | |
8f716c9b TL |
491 | */ |
492 | static bool memremap_should_map_decrypted(resource_size_t phys_addr, | |
493 | unsigned long size) | |
494 | { | |
1de32862 TL |
495 | int is_pmem; |
496 | ||
497 | /* | |
498 | * Check if the address is part of a persistent memory region. | |
499 | * This check covers areas added by E820, EFI and ACPI. | |
500 | */ | |
501 | is_pmem = region_intersects(phys_addr, size, IORESOURCE_MEM, | |
502 | IORES_DESC_PERSISTENT_MEMORY); | |
503 | if (is_pmem != REGION_DISJOINT) | |
504 | return true; | |
505 | ||
506 | /* | |
507 | * Check if the non-volatile attribute is set for an EFI | |
508 | * reserved area. | |
509 | */ | |
510 | if (efi_enabled(EFI_BOOT)) { | |
511 | switch (efi_mem_type(phys_addr)) { | |
512 | case EFI_RESERVED_TYPE: | |
513 | if (efi_mem_attributes(phys_addr) & EFI_MEMORY_NV) | |
514 | return true; | |
515 | break; | |
516 | default: | |
517 | break; | |
518 | } | |
519 | } | |
520 | ||
8f716c9b TL |
521 | /* Check if the address is outside kernel usable area */ |
522 | switch (e820__get_entry_type(phys_addr, phys_addr + size - 1)) { | |
523 | case E820_TYPE_RESERVED: | |
524 | case E820_TYPE_ACPI: | |
525 | case E820_TYPE_NVS: | |
526 | case E820_TYPE_UNUSABLE: | |
072f58c6 TL |
527 | /* For SEV, these areas are encrypted */ |
528 | if (sev_active()) | |
529 | break; | |
530 | /* Fallthrough */ | |
531 | ||
1de32862 | 532 | case E820_TYPE_PRAM: |
8f716c9b TL |
533 | return true; |
534 | default: | |
535 | break; | |
536 | } | |
537 | ||
538 | return false; | |
539 | } | |
540 | ||
541 | /* | |
542 | * Examine the physical address to determine if it is EFI data. Check | |
543 | * it against the boot params structure and EFI tables and memory types. | |
544 | */ | |
545 | static bool memremap_is_efi_data(resource_size_t phys_addr, | |
546 | unsigned long size) | |
547 | { | |
548 | u64 paddr; | |
549 | ||
550 | /* Check if the address is part of EFI boot/runtime data */ | |
551 | if (!efi_enabled(EFI_BOOT)) | |
552 | return false; | |
553 | ||
554 | paddr = boot_params.efi_info.efi_memmap_hi; | |
555 | paddr <<= 32; | |
556 | paddr |= boot_params.efi_info.efi_memmap; | |
557 | if (phys_addr == paddr) | |
558 | return true; | |
559 | ||
560 | paddr = boot_params.efi_info.efi_systab_hi; | |
561 | paddr <<= 32; | |
562 | paddr |= boot_params.efi_info.efi_systab; | |
563 | if (phys_addr == paddr) | |
564 | return true; | |
565 | ||
566 | if (efi_is_table_address(phys_addr)) | |
567 | return true; | |
568 | ||
569 | switch (efi_mem_type(phys_addr)) { | |
570 | case EFI_BOOT_SERVICES_DATA: | |
571 | case EFI_RUNTIME_SERVICES_DATA: | |
572 | return true; | |
573 | default: | |
574 | break; | |
575 | } | |
576 | ||
577 | return false; | |
578 | } | |
579 | ||
580 | /* | |
581 | * Examine the physical address to determine if it is boot data by checking | |
582 | * it against the boot params setup_data chain. | |
583 | */ | |
584 | static bool memremap_is_setup_data(resource_size_t phys_addr, | |
585 | unsigned long size) | |
586 | { | |
587 | struct setup_data *data; | |
588 | u64 paddr, paddr_next; | |
589 | ||
590 | paddr = boot_params.hdr.setup_data; | |
591 | while (paddr) { | |
592 | unsigned int len; | |
593 | ||
594 | if (phys_addr == paddr) | |
595 | return true; | |
596 | ||
597 | data = memremap(paddr, sizeof(*data), | |
598 | MEMREMAP_WB | MEMREMAP_DEC); | |
599 | ||
600 | paddr_next = data->next; | |
601 | len = data->len; | |
602 | ||
603 | memunmap(data); | |
604 | ||
605 | if ((phys_addr > paddr) && (phys_addr < (paddr + len))) | |
606 | return true; | |
607 | ||
608 | paddr = paddr_next; | |
609 | } | |
610 | ||
611 | return false; | |
612 | } | |
613 | ||
614 | /* | |
615 | * Examine the physical address to determine if it is boot data by checking | |
616 | * it against the boot params setup_data chain (early boot version). | |
617 | */ | |
618 | static bool __init early_memremap_is_setup_data(resource_size_t phys_addr, | |
619 | unsigned long size) | |
620 | { | |
621 | struct setup_data *data; | |
622 | u64 paddr, paddr_next; | |
623 | ||
624 | paddr = boot_params.hdr.setup_data; | |
625 | while (paddr) { | |
626 | unsigned int len; | |
627 | ||
628 | if (phys_addr == paddr) | |
629 | return true; | |
630 | ||
631 | data = early_memremap_decrypted(paddr, sizeof(*data)); | |
632 | ||
633 | paddr_next = data->next; | |
634 | len = data->len; | |
635 | ||
636 | early_memunmap(data, sizeof(*data)); | |
637 | ||
638 | if ((phys_addr > paddr) && (phys_addr < (paddr + len))) | |
639 | return true; | |
640 | ||
641 | paddr = paddr_next; | |
642 | } | |
643 | ||
644 | return false; | |
645 | } | |
646 | ||
647 | /* | |
648 | * Architecture function to determine if RAM remap is allowed. By default, a | |
649 | * RAM remap will map the data as encrypted. Determine if a RAM remap should | |
650 | * not be done so that the data will be mapped decrypted. | |
651 | */ | |
652 | bool arch_memremap_can_ram_remap(resource_size_t phys_addr, unsigned long size, | |
653 | unsigned long flags) | |
654 | { | |
072f58c6 | 655 | if (!mem_encrypt_active()) |
8f716c9b TL |
656 | return true; |
657 | ||
658 | if (flags & MEMREMAP_ENC) | |
659 | return true; | |
660 | ||
661 | if (flags & MEMREMAP_DEC) | |
662 | return false; | |
663 | ||
072f58c6 TL |
664 | if (sme_active()) { |
665 | if (memremap_is_setup_data(phys_addr, size) || | |
666 | memremap_is_efi_data(phys_addr, size)) | |
667 | return false; | |
668 | } | |
8f716c9b | 669 | |
072f58c6 | 670 | return !memremap_should_map_decrypted(phys_addr, size); |
8f716c9b TL |
671 | } |
672 | ||
673 | /* | |
674 | * Architecture override of __weak function to adjust the protection attributes | |
675 | * used when remapping memory. By default, early_memremap() will map the data | |
676 | * as encrypted. Determine if an encrypted mapping should not be done and set | |
677 | * the appropriate protection attributes. | |
678 | */ | |
679 | pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr, | |
680 | unsigned long size, | |
681 | pgprot_t prot) | |
682 | { | |
072f58c6 TL |
683 | bool encrypted_prot; |
684 | ||
685 | if (!mem_encrypt_active()) | |
8f716c9b TL |
686 | return prot; |
687 | ||
072f58c6 TL |
688 | encrypted_prot = true; |
689 | ||
690 | if (sme_active()) { | |
691 | if (early_memremap_is_setup_data(phys_addr, size) || | |
692 | memremap_is_efi_data(phys_addr, size)) | |
693 | encrypted_prot = false; | |
694 | } | |
695 | ||
696 | if (encrypted_prot && memremap_should_map_decrypted(phys_addr, size)) | |
697 | encrypted_prot = false; | |
8f716c9b | 698 | |
072f58c6 TL |
699 | return encrypted_prot ? pgprot_encrypted(prot) |
700 | : pgprot_decrypted(prot); | |
8f716c9b TL |
701 | } |
702 | ||
8458bf94 TL |
703 | bool phys_mem_access_encrypted(unsigned long phys_addr, unsigned long size) |
704 | { | |
705 | return arch_memremap_can_ram_remap(phys_addr, size, 0); | |
706 | } | |
707 | ||
ce9084ba | 708 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
f88a68fa TL |
709 | /* Remap memory with encryption */ |
710 | void __init *early_memremap_encrypted(resource_size_t phys_addr, | |
711 | unsigned long size) | |
712 | { | |
713 | return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC); | |
714 | } | |
715 | ||
716 | /* | |
717 | * Remap memory with encryption and write-protected - cannot be called | |
718 | * before pat_init() is called | |
719 | */ | |
720 | void __init *early_memremap_encrypted_wp(resource_size_t phys_addr, | |
721 | unsigned long size) | |
722 | { | |
723 | /* Be sure the write-protect PAT entry is set for write-protect */ | |
724 | if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP) | |
725 | return NULL; | |
726 | ||
727 | return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC_WP); | |
728 | } | |
729 | ||
730 | /* Remap memory without encryption */ | |
731 | void __init *early_memremap_decrypted(resource_size_t phys_addr, | |
732 | unsigned long size) | |
733 | { | |
734 | return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC); | |
735 | } | |
736 | ||
737 | /* | |
738 | * Remap memory without encryption and write-protected - cannot be called | |
739 | * before pat_init() is called | |
740 | */ | |
741 | void __init *early_memremap_decrypted_wp(resource_size_t phys_addr, | |
742 | unsigned long size) | |
743 | { | |
744 | /* Be sure the write-protect PAT entry is set for write-protect */ | |
745 | if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP) | |
746 | return NULL; | |
747 | ||
748 | return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC_WP); | |
749 | } | |
ce9084ba | 750 | #endif /* CONFIG_AMD_MEM_ENCRYPT */ |
f88a68fa | 751 | |
45c7b28f | 752 | static pte_t bm_pte[PAGE_SIZE/sizeof(pte_t)] __page_aligned_bss; |
0947b2f3 | 753 | |
551889a6 | 754 | static inline pmd_t * __init early_ioremap_pmd(unsigned long addr) |
0947b2f3 | 755 | { |
37cc8d7f | 756 | /* Don't assume we're using swapper_pg_dir at this point */ |
6c690ee1 | 757 | pgd_t *base = __va(read_cr3_pa()); |
37cc8d7f | 758 | pgd_t *pgd = &base[pgd_index(addr)]; |
e0c4f675 KS |
759 | p4d_t *p4d = p4d_offset(pgd, addr); |
760 | pud_t *pud = pud_offset(p4d, addr); | |
551889a6 IC |
761 | pmd_t *pmd = pmd_offset(pud, addr); |
762 | ||
763 | return pmd; | |
0947b2f3 HY |
764 | } |
765 | ||
551889a6 | 766 | static inline pte_t * __init early_ioremap_pte(unsigned long addr) |
0947b2f3 | 767 | { |
551889a6 | 768 | return &bm_pte[pte_index(addr)]; |
0947b2f3 HY |
769 | } |
770 | ||
fef5ba79 JF |
771 | bool __init is_early_ioremap_ptep(pte_t *ptep) |
772 | { | |
773 | return ptep >= &bm_pte[0] && ptep < &bm_pte[PAGE_SIZE/sizeof(pte_t)]; | |
774 | } | |
775 | ||
beacfaac | 776 | void __init early_ioremap_init(void) |
0947b2f3 | 777 | { |
551889a6 | 778 | pmd_t *pmd; |
0947b2f3 | 779 | |
73159fdc AL |
780 | #ifdef CONFIG_X86_64 |
781 | BUILD_BUG_ON((fix_to_virt(0) + PAGE_SIZE) & ((1 << PMD_SHIFT) - 1)); | |
782 | #else | |
783 | WARN_ON((fix_to_virt(0) + PAGE_SIZE) & ((1 << PMD_SHIFT) - 1)); | |
784 | #endif | |
785 | ||
5b7c73e0 | 786 | early_ioremap_setup(); |
8827247f | 787 | |
551889a6 | 788 | pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)); |
45c7b28f JF |
789 | memset(bm_pte, 0, sizeof(bm_pte)); |
790 | pmd_populate_kernel(&init_mm, pmd, bm_pte); | |
551889a6 | 791 | |
0e3a9549 | 792 | /* |
551889a6 | 793 | * The boot-ioremap range spans multiple pmds, for which |
0e3a9549 IM |
794 | * we are not prepared: |
795 | */ | |
499a5f1e JB |
796 | #define __FIXADDR_TOP (-PAGE_SIZE) |
797 | BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) | |
798 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); | |
799 | #undef __FIXADDR_TOP | |
551889a6 | 800 | if (pmd != early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))) { |
0e3a9549 | 801 | WARN_ON(1); |
551889a6 IC |
802 | printk(KERN_WARNING "pmd %p != %p\n", |
803 | pmd, early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))); | |
91eebf40 | 804 | printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
551889a6 | 805 | fix_to_virt(FIX_BTMAP_BEGIN)); |
91eebf40 | 806 | printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_END): %08lx\n", |
551889a6 | 807 | fix_to_virt(FIX_BTMAP_END)); |
91eebf40 TG |
808 | |
809 | printk(KERN_WARNING "FIX_BTMAP_END: %d\n", FIX_BTMAP_END); | |
810 | printk(KERN_WARNING "FIX_BTMAP_BEGIN: %d\n", | |
811 | FIX_BTMAP_BEGIN); | |
0e3a9549 | 812 | } |
0947b2f3 HY |
813 | } |
814 | ||
5b7c73e0 MS |
815 | void __init __early_set_fixmap(enum fixed_addresses idx, |
816 | phys_addr_t phys, pgprot_t flags) | |
0947b2f3 | 817 | { |
551889a6 IC |
818 | unsigned long addr = __fix_to_virt(idx); |
819 | pte_t *pte; | |
0947b2f3 HY |
820 | |
821 | if (idx >= __end_of_fixed_addresses) { | |
822 | BUG(); | |
823 | return; | |
824 | } | |
beacfaac | 825 | pte = early_ioremap_pte(addr); |
4583ed51 | 826 | |
fb43d6cb | 827 | /* Sanitize 'prot' against any unsupported bits: */ |
510bb96f | 828 | pgprot_val(flags) &= __supported_pte_mask; |
fb43d6cb | 829 | |
0947b2f3 | 830 | if (pgprot_val(flags)) |
551889a6 | 831 | set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); |
0947b2f3 | 832 | else |
4f9c11dd | 833 | pte_clear(&init_mm, addr, pte); |
1299ef1d | 834 | __flush_tlb_one_kernel(addr); |
0947b2f3 | 835 | } |