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Commit | Line | Data |
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2e5d9c85 | 1 | /* |
2 | * Handle caching attributes in page tables (PAT) | |
3 | * | |
4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | |
5 | * Suresh B Siddha <suresh.b.siddha@intel.com> | |
6 | * | |
7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. | |
8 | */ | |
9 | ||
ad2cde16 IM |
10 | #include <linux/seq_file.h> |
11 | #include <linux/bootmem.h> | |
12 | #include <linux/debugfs.h> | |
2e5d9c85 | 13 | #include <linux/kernel.h> |
92b9af9e | 14 | #include <linux/module.h> |
2e5d9c85 | 15 | #include <linux/gfp.h> |
ad2cde16 | 16 | #include <linux/mm.h> |
2e5d9c85 | 17 | #include <linux/fs.h> |
18 | ||
ad2cde16 | 19 | #include <asm/cacheflush.h> |
2e5d9c85 | 20 | #include <asm/processor.h> |
ad2cde16 | 21 | #include <asm/tlbflush.h> |
2e5d9c85 | 22 | #include <asm/pgtable.h> |
2e5d9c85 | 23 | #include <asm/fcntl.h> |
ad2cde16 | 24 | #include <asm/e820.h> |
2e5d9c85 | 25 | #include <asm/mtrr.h> |
ad2cde16 IM |
26 | #include <asm/page.h> |
27 | #include <asm/msr.h> | |
28 | #include <asm/pat.h> | |
e7f260a2 | 29 | #include <asm/io.h> |
2e5d9c85 | 30 | |
8d4a4300 | 31 | #ifdef CONFIG_X86_PAT |
499f8f84 | 32 | int __read_mostly pat_enabled = 1; |
2e5d9c85 | 33 | |
75a04811 | 34 | void __cpuinit pat_disable(const char *reason) |
2e5d9c85 | 35 | { |
499f8f84 | 36 | pat_enabled = 0; |
8d4a4300 | 37 | printk(KERN_INFO "%s\n", reason); |
2e5d9c85 | 38 | } |
2e5d9c85 | 39 | |
be524fb9 | 40 | static int __init nopat(char *str) |
2e5d9c85 | 41 | { |
8d4a4300 | 42 | pat_disable("PAT support disabled."); |
2e5d9c85 | 43 | return 0; |
44 | } | |
8d4a4300 | 45 | early_param("nopat", nopat); |
75a04811 PA |
46 | #else |
47 | static inline void pat_disable(const char *reason) | |
48 | { | |
49 | (void)reason; | |
50 | } | |
8d4a4300 TG |
51 | #endif |
52 | ||
77b52b4c VP |
53 | |
54 | static int debug_enable; | |
ad2cde16 | 55 | |
77b52b4c VP |
56 | static int __init pat_debug_setup(char *str) |
57 | { | |
58 | debug_enable = 1; | |
59 | return 0; | |
60 | } | |
61 | __setup("debugpat", pat_debug_setup); | |
62 | ||
63 | #define dprintk(fmt, arg...) \ | |
64 | do { if (debug_enable) printk(KERN_INFO fmt, ##arg); } while (0) | |
65 | ||
66 | ||
8d4a4300 | 67 | static u64 __read_mostly boot_pat_state; |
2e5d9c85 | 68 | |
69 | enum { | |
70 | PAT_UC = 0, /* uncached */ | |
71 | PAT_WC = 1, /* Write combining */ | |
72 | PAT_WT = 4, /* Write Through */ | |
73 | PAT_WP = 5, /* Write Protected */ | |
74 | PAT_WB = 6, /* Write Back (default) */ | |
75 | PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ | |
76 | }; | |
77 | ||
cd7a4e93 | 78 | #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) |
2e5d9c85 | 79 | |
80 | void pat_init(void) | |
81 | { | |
82 | u64 pat; | |
83 | ||
499f8f84 | 84 | if (!pat_enabled) |
2e5d9c85 | 85 | return; |
86 | ||
75a04811 PA |
87 | if (!cpu_has_pat) { |
88 | if (!boot_pat_state) { | |
89 | pat_disable("PAT not supported by CPU."); | |
90 | return; | |
91 | } else { | |
92 | /* | |
93 | * If this happens we are on a secondary CPU, but | |
94 | * switched to PAT on the boot CPU. We have no way to | |
95 | * undo PAT. | |
96 | */ | |
97 | printk(KERN_ERR "PAT enabled, " | |
98 | "but not supported by secondary CPU\n"); | |
99 | BUG(); | |
100 | } | |
8d4a4300 | 101 | } |
2e5d9c85 | 102 | |
103 | /* Set PWT to Write-Combining. All other bits stay the same */ | |
104 | /* | |
105 | * PTE encoding used in Linux: | |
106 | * PAT | |
107 | * |PCD | |
108 | * ||PWT | |
109 | * ||| | |
110 | * 000 WB _PAGE_CACHE_WB | |
111 | * 001 WC _PAGE_CACHE_WC | |
112 | * 010 UC- _PAGE_CACHE_UC_MINUS | |
113 | * 011 UC _PAGE_CACHE_UC | |
114 | * PAT bit unused | |
115 | */ | |
cd7a4e93 AH |
116 | pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | |
117 | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC); | |
2e5d9c85 | 118 | |
119 | /* Boot CPU check */ | |
8d4a4300 | 120 | if (!boot_pat_state) |
2e5d9c85 | 121 | rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); |
2e5d9c85 | 122 | |
123 | wrmsrl(MSR_IA32_CR_PAT, pat); | |
124 | printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", | |
125 | smp_processor_id(), boot_pat_state, pat); | |
126 | } | |
127 | ||
128 | #undef PAT | |
129 | ||
130 | static char *cattr_name(unsigned long flags) | |
131 | { | |
132 | switch (flags & _PAGE_CACHE_MASK) { | |
cd7a4e93 AH |
133 | case _PAGE_CACHE_UC: return "uncached"; |
134 | case _PAGE_CACHE_UC_MINUS: return "uncached-minus"; | |
135 | case _PAGE_CACHE_WB: return "write-back"; | |
136 | case _PAGE_CACHE_WC: return "write-combining"; | |
137 | default: return "broken"; | |
2e5d9c85 | 138 | } |
139 | } | |
140 | ||
141 | /* | |
142 | * The global memtype list keeps track of memory type for specific | |
143 | * physical memory areas. Conflicting memory types in different | |
144 | * mappings can cause CPU cache corruption. To avoid this we keep track. | |
145 | * | |
146 | * The list is sorted based on starting address and can contain multiple | |
147 | * entries for each address (this allows reference counting for overlapping | |
148 | * areas). All the aliases have the same cache attributes of course. | |
149 | * Zero attributes are represented as holes. | |
150 | * | |
151 | * Currently the data structure is a list because the number of mappings | |
152 | * are expected to be relatively small. If this should be a problem | |
153 | * it could be changed to a rbtree or similar. | |
154 | * | |
155 | * memtype_lock protects the whole list. | |
156 | */ | |
157 | ||
158 | struct memtype { | |
ad2cde16 IM |
159 | u64 start; |
160 | u64 end; | |
161 | unsigned long type; | |
162 | struct list_head nd; | |
2e5d9c85 | 163 | }; |
164 | ||
165 | static LIST_HEAD(memtype_list); | |
ad2cde16 | 166 | static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */ |
2e5d9c85 | 167 | |
168 | /* | |
169 | * Does intersection of PAT memory type and MTRR memory type and returns | |
170 | * the resulting memory type as PAT understands it. | |
171 | * (Type in pat and mtrr will not have same value) | |
172 | * The intersection is based on "Effective Memory Type" tables in IA-32 | |
173 | * SDM vol 3a | |
174 | */ | |
6cf514fc | 175 | static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type) |
2e5d9c85 | 176 | { |
c26421d0 VP |
177 | /* |
178 | * Look for MTRR hint to get the effective type in case where PAT | |
179 | * request is for WB. | |
180 | */ | |
dd0c7c49 AH |
181 | if (req_type == _PAGE_CACHE_WB) { |
182 | u8 mtrr_type; | |
183 | ||
184 | mtrr_type = mtrr_type_lookup(start, end); | |
185 | if (mtrr_type == MTRR_TYPE_UNCACHABLE) | |
186 | return _PAGE_CACHE_UC; | |
187 | if (mtrr_type == MTRR_TYPE_WRCOMB) | |
188 | return _PAGE_CACHE_WC; | |
189 | } | |
190 | ||
191 | return req_type; | |
2e5d9c85 | 192 | } |
193 | ||
ad2cde16 IM |
194 | static int |
195 | chk_conflict(struct memtype *new, struct memtype *entry, unsigned long *type) | |
64fe44c3 AH |
196 | { |
197 | if (new->type != entry->type) { | |
198 | if (type) { | |
199 | new->type = entry->type; | |
200 | *type = entry->type; | |
201 | } else | |
202 | goto conflict; | |
203 | } | |
204 | ||
205 | /* check overlaps with more than one entry in the list */ | |
206 | list_for_each_entry_continue(entry, &memtype_list, nd) { | |
207 | if (new->end <= entry->start) | |
208 | break; | |
209 | else if (new->type != entry->type) | |
210 | goto conflict; | |
211 | } | |
212 | return 0; | |
213 | ||
214 | conflict: | |
215 | printk(KERN_INFO "%s:%d conflicting memory types " | |
216 | "%Lx-%Lx %s<->%s\n", current->comm, current->pid, new->start, | |
217 | new->end, cattr_name(new->type), cattr_name(entry->type)); | |
218 | return -EBUSY; | |
219 | } | |
220 | ||
80c5e73d VP |
221 | static struct memtype *cached_entry; |
222 | static u64 cached_start; | |
223 | ||
be03d9e8 SS |
224 | static int pat_pagerange_is_ram(unsigned long start, unsigned long end) |
225 | { | |
226 | int ram_page = 0, not_rampage = 0; | |
227 | unsigned long page_nr; | |
228 | ||
229 | for (page_nr = (start >> PAGE_SHIFT); page_nr < (end >> PAGE_SHIFT); | |
230 | ++page_nr) { | |
231 | /* | |
232 | * For legacy reasons, physical address range in the legacy ISA | |
233 | * region is tracked as non-RAM. This will allow users of | |
234 | * /dev/mem to map portions of legacy ISA region, even when | |
235 | * some of those portions are listed(or not even listed) with | |
236 | * different e820 types(RAM/reserved/..) | |
237 | */ | |
238 | if (page_nr >= (ISA_END_ADDRESS >> PAGE_SHIFT) && | |
239 | page_is_ram(page_nr)) | |
240 | ram_page = 1; | |
241 | else | |
242 | not_rampage = 1; | |
243 | ||
244 | if (ram_page == not_rampage) | |
245 | return -1; | |
246 | } | |
247 | ||
248 | return ram_page; | |
249 | } | |
250 | ||
9542ada8 SS |
251 | /* |
252 | * For RAM pages, mark the pages as non WB memory type using | |
253 | * PageNonWB (PG_arch_1). We allow only one set_memory_uc() or | |
254 | * set_memory_wc() on a RAM page at a time before marking it as WB again. | |
255 | * This is ok, because only one driver will be owning the page and | |
256 | * doing set_memory_*() calls. | |
257 | * | |
258 | * For now, we use PageNonWB to track that the RAM page is being mapped | |
259 | * as non WB. In future, we will have to use one more flag | |
260 | * (or some other mechanism in page_struct) to distinguish between | |
261 | * UC and WC mapping. | |
262 | */ | |
263 | static int reserve_ram_pages_type(u64 start, u64 end, unsigned long req_type, | |
ad2cde16 | 264 | unsigned long *new_type) |
9542ada8 SS |
265 | { |
266 | struct page *page; | |
267 | u64 pfn, end_pfn; | |
268 | ||
269 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
270 | page = pfn_to_page(pfn); | |
271 | if (page_mapped(page) || PageNonWB(page)) | |
272 | goto out; | |
273 | ||
274 | SetPageNonWB(page); | |
275 | } | |
276 | return 0; | |
277 | ||
278 | out: | |
279 | end_pfn = pfn; | |
280 | for (pfn = (start >> PAGE_SHIFT); pfn < end_pfn; ++pfn) { | |
281 | page = pfn_to_page(pfn); | |
282 | ClearPageNonWB(page); | |
283 | } | |
284 | ||
285 | return -EINVAL; | |
286 | } | |
287 | ||
288 | static int free_ram_pages_type(u64 start, u64 end) | |
289 | { | |
290 | struct page *page; | |
291 | u64 pfn, end_pfn; | |
292 | ||
293 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
294 | page = pfn_to_page(pfn); | |
295 | if (page_mapped(page) || !PageNonWB(page)) | |
296 | goto out; | |
297 | ||
298 | ClearPageNonWB(page); | |
299 | } | |
300 | return 0; | |
301 | ||
302 | out: | |
303 | end_pfn = pfn; | |
304 | for (pfn = (start >> PAGE_SHIFT); pfn < end_pfn; ++pfn) { | |
305 | page = pfn_to_page(pfn); | |
306 | SetPageNonWB(page); | |
307 | } | |
308 | return -EINVAL; | |
309 | } | |
310 | ||
e7f260a2 | 311 | /* |
312 | * req_type typically has one of the: | |
313 | * - _PAGE_CACHE_WB | |
314 | * - _PAGE_CACHE_WC | |
315 | * - _PAGE_CACHE_UC_MINUS | |
316 | * - _PAGE_CACHE_UC | |
317 | * | |
318 | * req_type will have a special case value '-1', when requester want to inherit | |
319 | * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS. | |
320 | * | |
ac97991e AH |
321 | * If new_type is NULL, function will return an error if it cannot reserve the |
322 | * region with req_type. If new_type is non-NULL, function will return | |
323 | * available type in new_type in case of no error. In case of any error | |
e7f260a2 | 324 | * it will return a negative return value. |
325 | */ | |
2e5d9c85 | 326 | int reserve_memtype(u64 start, u64 end, unsigned long req_type, |
ad2cde16 | 327 | unsigned long *new_type) |
2e5d9c85 | 328 | { |
ac97991e | 329 | struct memtype *new, *entry; |
2e5d9c85 | 330 | unsigned long actual_type; |
f6887264 | 331 | struct list_head *where; |
9542ada8 | 332 | int is_range_ram; |
ad2cde16 | 333 | int err = 0; |
2e5d9c85 | 334 | |
ad2cde16 | 335 | BUG_ON(start >= end); /* end is exclusive */ |
69e26be9 | 336 | |
499f8f84 | 337 | if (!pat_enabled) { |
e7f260a2 | 338 | /* This is identical to page table setting without PAT */ |
ac97991e AH |
339 | if (new_type) { |
340 | if (req_type == -1) | |
341 | *new_type = _PAGE_CACHE_WB; | |
342 | else | |
343 | *new_type = req_type & _PAGE_CACHE_MASK; | |
e7f260a2 | 344 | } |
2e5d9c85 | 345 | return 0; |
346 | } | |
347 | ||
348 | /* Low ISA region is always mapped WB in page table. No need to track */ | |
bcc643dc | 349 | if (is_ISA_range(start, end - 1)) { |
ac97991e AH |
350 | if (new_type) |
351 | *new_type = _PAGE_CACHE_WB; | |
2e5d9c85 | 352 | return 0; |
353 | } | |
354 | ||
e7f260a2 | 355 | if (req_type == -1) { |
356 | /* | |
c26421d0 VP |
357 | * Call mtrr_lookup to get the type hint. This is an |
358 | * optimization for /dev/mem mmap'ers into WB memory (BIOS | |
359 | * tools and ACPI tools). Use WB request for WB memory and use | |
360 | * UC_MINUS otherwise. | |
e7f260a2 | 361 | */ |
362 | u8 mtrr_type = mtrr_type_lookup(start, end); | |
e7f260a2 | 363 | |
69e26be9 | 364 | if (mtrr_type == MTRR_TYPE_WRBACK) |
e7f260a2 | 365 | actual_type = _PAGE_CACHE_WB; |
69e26be9 | 366 | else |
e7f260a2 | 367 | actual_type = _PAGE_CACHE_UC_MINUS; |
ad2cde16 | 368 | } else { |
69e26be9 AH |
369 | actual_type = pat_x_mtrr_type(start, end, |
370 | req_type & _PAGE_CACHE_MASK); | |
ad2cde16 | 371 | } |
2e5d9c85 | 372 | |
95971342 SS |
373 | if (new_type) |
374 | *new_type = actual_type; | |
375 | ||
be03d9e8 | 376 | is_range_ram = pat_pagerange_is_ram(start, end); |
9542ada8 | 377 | if (is_range_ram == 1) |
be03d9e8 SS |
378 | return reserve_ram_pages_type(start, end, req_type, |
379 | new_type); | |
9542ada8 SS |
380 | else if (is_range_ram < 0) |
381 | return -EINVAL; | |
382 | ||
ac97991e AH |
383 | new = kmalloc(sizeof(struct memtype), GFP_KERNEL); |
384 | if (!new) | |
2e5d9c85 | 385 | return -ENOMEM; |
386 | ||
ad2cde16 IM |
387 | new->start = start; |
388 | new->end = end; | |
389 | new->type = actual_type; | |
2e5d9c85 | 390 | |
2e5d9c85 | 391 | spin_lock(&memtype_lock); |
392 | ||
80c5e73d VP |
393 | if (cached_entry && start >= cached_start) |
394 | entry = cached_entry; | |
395 | else | |
396 | entry = list_entry(&memtype_list, struct memtype, nd); | |
397 | ||
2e5d9c85 | 398 | /* Search for existing mapping that overlaps the current range */ |
f6887264 | 399 | where = NULL; |
80c5e73d | 400 | list_for_each_entry_continue(entry, &memtype_list, nd) { |
33af9039 | 401 | if (end <= entry->start) { |
f6887264 | 402 | where = entry->nd.prev; |
80c5e73d | 403 | cached_entry = list_entry(where, struct memtype, nd); |
2e5d9c85 | 404 | break; |
33af9039 | 405 | } else if (start <= entry->start) { /* end > entry->start */ |
64fe44c3 | 406 | err = chk_conflict(new, entry, new_type); |
33af9039 AH |
407 | if (!err) { |
408 | dprintk("Overlap at 0x%Lx-0x%Lx\n", | |
409 | entry->start, entry->end); | |
410 | where = entry->nd.prev; | |
80c5e73d VP |
411 | cached_entry = list_entry(where, |
412 | struct memtype, nd); | |
2e5d9c85 | 413 | } |
2e5d9c85 | 414 | break; |
33af9039 | 415 | } else if (start < entry->end) { /* start > entry->start */ |
64fe44c3 | 416 | err = chk_conflict(new, entry, new_type); |
33af9039 AH |
417 | if (!err) { |
418 | dprintk("Overlap at 0x%Lx-0x%Lx\n", | |
419 | entry->start, entry->end); | |
80c5e73d VP |
420 | cached_entry = list_entry(entry->nd.prev, |
421 | struct memtype, nd); | |
422 | ||
423 | /* | |
424 | * Move to right position in the linked | |
425 | * list to add this new entry | |
426 | */ | |
427 | list_for_each_entry_continue(entry, | |
428 | &memtype_list, nd) { | |
429 | if (start <= entry->start) { | |
430 | where = entry->nd.prev; | |
431 | break; | |
432 | } | |
433 | } | |
2e5d9c85 | 434 | } |
2e5d9c85 | 435 | break; |
436 | } | |
437 | } | |
438 | ||
439 | if (err) { | |
3e9c83b3 AH |
440 | printk(KERN_INFO "reserve_memtype failed 0x%Lx-0x%Lx, " |
441 | "track %s, req %s\n", | |
442 | start, end, cattr_name(new->type), cattr_name(req_type)); | |
ac97991e | 443 | kfree(new); |
2e5d9c85 | 444 | spin_unlock(&memtype_lock); |
ad2cde16 | 445 | |
2e5d9c85 | 446 | return err; |
447 | } | |
448 | ||
80c5e73d VP |
449 | cached_start = start; |
450 | ||
f6887264 AH |
451 | if (where) |
452 | list_add(&new->nd, where); | |
453 | else | |
ac97991e | 454 | list_add_tail(&new->nd, &memtype_list); |
6997ab49 | 455 | |
2e5d9c85 | 456 | spin_unlock(&memtype_lock); |
3e9c83b3 AH |
457 | |
458 | dprintk("reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n", | |
459 | start, end, cattr_name(new->type), cattr_name(req_type), | |
460 | new_type ? cattr_name(*new_type) : "-"); | |
461 | ||
2e5d9c85 | 462 | return err; |
463 | } | |
464 | ||
465 | int free_memtype(u64 start, u64 end) | |
466 | { | |
ac97991e | 467 | struct memtype *entry; |
2e5d9c85 | 468 | int err = -EINVAL; |
9542ada8 | 469 | int is_range_ram; |
2e5d9c85 | 470 | |
69e26be9 | 471 | if (!pat_enabled) |
2e5d9c85 | 472 | return 0; |
2e5d9c85 | 473 | |
474 | /* Low ISA region is always mapped WB. No need to track */ | |
bcc643dc | 475 | if (is_ISA_range(start, end - 1)) |
2e5d9c85 | 476 | return 0; |
2e5d9c85 | 477 | |
be03d9e8 | 478 | is_range_ram = pat_pagerange_is_ram(start, end); |
9542ada8 SS |
479 | if (is_range_ram == 1) |
480 | return free_ram_pages_type(start, end); | |
481 | else if (is_range_ram < 0) | |
482 | return -EINVAL; | |
483 | ||
2e5d9c85 | 484 | spin_lock(&memtype_lock); |
ac97991e AH |
485 | list_for_each_entry(entry, &memtype_list, nd) { |
486 | if (entry->start == start && entry->end == end) { | |
80c5e73d VP |
487 | if (cached_entry == entry || cached_start == start) |
488 | cached_entry = NULL; | |
489 | ||
ac97991e AH |
490 | list_del(&entry->nd); |
491 | kfree(entry); | |
2e5d9c85 | 492 | err = 0; |
493 | break; | |
494 | } | |
495 | } | |
496 | spin_unlock(&memtype_lock); | |
497 | ||
498 | if (err) { | |
28eb559b | 499 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", |
2e5d9c85 | 500 | current->comm, current->pid, start, end); |
501 | } | |
6997ab49 | 502 | |
77b52b4c | 503 | dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end); |
ad2cde16 | 504 | |
2e5d9c85 | 505 | return err; |
506 | } | |
507 | ||
f0970c13 | 508 | |
f0970c13 | 509 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
510 | unsigned long size, pgprot_t vma_prot) | |
511 | { | |
512 | return vma_prot; | |
513 | } | |
514 | ||
d092633b IM |
515 | #ifdef CONFIG_STRICT_DEVMEM |
516 | /* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM*/ | |
0124cecf VP |
517 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
518 | { | |
519 | return 1; | |
520 | } | |
521 | #else | |
9e41bff2 | 522 | /* This check is needed to avoid cache aliasing when PAT is enabled */ |
0124cecf VP |
523 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
524 | { | |
525 | u64 from = ((u64)pfn) << PAGE_SHIFT; | |
526 | u64 to = from + size; | |
527 | u64 cursor = from; | |
528 | ||
9e41bff2 RT |
529 | if (!pat_enabled) |
530 | return 1; | |
531 | ||
0124cecf VP |
532 | while (cursor < to) { |
533 | if (!devmem_is_allowed(pfn)) { | |
534 | printk(KERN_INFO | |
535 | "Program %s tried to access /dev/mem between %Lx->%Lx.\n", | |
536 | current->comm, from, to); | |
537 | return 0; | |
538 | } | |
539 | cursor += PAGE_SIZE; | |
540 | pfn++; | |
541 | } | |
542 | return 1; | |
543 | } | |
d092633b | 544 | #endif /* CONFIG_STRICT_DEVMEM */ |
0124cecf | 545 | |
f0970c13 | 546 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
547 | unsigned long size, pgprot_t *vma_prot) | |
548 | { | |
e7f260a2 | 549 | u64 offset = ((u64) pfn) << PAGE_SHIFT; |
28df82eb | 550 | unsigned long flags = -1; |
e7f260a2 | 551 | int retval; |
f0970c13 | 552 | |
0124cecf VP |
553 | if (!range_is_allowed(pfn, size)) |
554 | return 0; | |
555 | ||
f0970c13 | 556 | if (file->f_flags & O_SYNC) { |
28df82eb | 557 | flags = _PAGE_CACHE_UC_MINUS; |
f0970c13 | 558 | } |
559 | ||
560 | #ifdef CONFIG_X86_32 | |
561 | /* | |
562 | * On the PPro and successors, the MTRRs are used to set | |
563 | * memory types for physical addresses outside main memory, | |
564 | * so blindly setting UC or PWT on those pages is wrong. | |
565 | * For Pentiums and earlier, the surround logic should disable | |
566 | * caching for the high addresses through the KEN pin, but | |
567 | * we maintain the tradition of paranoia in this code. | |
568 | */ | |
499f8f84 | 569 | if (!pat_enabled && |
cd7a4e93 AH |
570 | !(boot_cpu_has(X86_FEATURE_MTRR) || |
571 | boot_cpu_has(X86_FEATURE_K6_MTRR) || | |
572 | boot_cpu_has(X86_FEATURE_CYRIX_ARR) || | |
573 | boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) && | |
574 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { | |
e7f260a2 | 575 | flags = _PAGE_CACHE_UC; |
f0970c13 | 576 | } |
577 | #endif | |
578 | ||
e7f260a2 | 579 | /* |
28df82eb | 580 | * With O_SYNC, we can only take UC_MINUS mapping. Fail if we cannot. |
581 | * | |
e7f260a2 | 582 | * Without O_SYNC, we want to get |
583 | * - WB for WB-able memory and no other conflicting mappings | |
584 | * - UC_MINUS for non-WB-able memory with no other conflicting mappings | |
585 | * - Inherit from confliting mappings otherwise | |
586 | */ | |
28df82eb | 587 | if (flags != -1) { |
e7f260a2 | 588 | retval = reserve_memtype(offset, offset + size, flags, NULL); |
589 | } else { | |
f022bfd5 | 590 | retval = reserve_memtype(offset, offset + size, -1, &flags); |
e7f260a2 | 591 | } |
592 | ||
593 | if (retval < 0) | |
594 | return 0; | |
595 | ||
b5db0e38 LT |
596 | if (((pfn < max_low_pfn_mapped) || |
597 | (pfn >= (1UL<<(32 - PAGE_SHIFT)) && pfn < max_pfn_mapped)) && | |
598 | ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) { | |
e7f260a2 | 599 | free_memtype(offset, offset + size); |
28eb559b | 600 | printk(KERN_INFO |
e7f260a2 | 601 | "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n", |
602 | current->comm, current->pid, | |
603 | cattr_name(flags), | |
afc85343 | 604 | offset, (unsigned long long)(offset + size)); |
e7f260a2 | 605 | return 0; |
606 | } | |
607 | ||
608 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | | |
609 | flags); | |
f0970c13 | 610 | return 1; |
611 | } | |
e7f260a2 | 612 | |
613 | void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | |
614 | { | |
ad2cde16 | 615 | unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK); |
e7f260a2 | 616 | u64 addr = (u64)pfn << PAGE_SHIFT; |
617 | unsigned long flags; | |
e7f260a2 | 618 | |
619 | reserve_memtype(addr, addr + size, want_flags, &flags); | |
620 | if (flags != want_flags) { | |
28eb559b | 621 | printk(KERN_INFO |
e7f260a2 | 622 | "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n", |
623 | current->comm, current->pid, | |
624 | cattr_name(want_flags), | |
afc85343 | 625 | addr, (unsigned long long)(addr + size), |
e7f260a2 | 626 | cattr_name(flags)); |
627 | } | |
628 | } | |
629 | ||
630 | void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | |
631 | { | |
632 | u64 addr = (u64)pfn << PAGE_SHIFT; | |
633 | ||
634 | free_memtype(addr, addr + size); | |
635 | } | |
636 | ||
7880f746 VP |
637 | /* |
638 | * Change the memory type for the physial address range in kernel identity | |
639 | * mapping space if that range is a part of identity map. | |
640 | */ | |
641 | int kernel_map_sync_memtype(u64 base, unsigned long size, unsigned long flags) | |
642 | { | |
643 | unsigned long id_sz; | |
644 | ||
645 | if (!pat_enabled || base >= __pa(high_memory)) | |
646 | return 0; | |
647 | ||
648 | id_sz = (__pa(high_memory) < base + size) ? | |
649 | __pa(high_memory) - base : | |
650 | size; | |
651 | ||
652 | if (ioremap_change_attr((unsigned long)__va(base), id_sz, flags) < 0) { | |
653 | printk(KERN_INFO | |
654 | "%s:%d ioremap_change_attr failed %s " | |
655 | "for %Lx-%Lx\n", | |
656 | current->comm, current->pid, | |
657 | cattr_name(flags), | |
658 | base, (unsigned long long)(base + size)); | |
659 | return -EINVAL; | |
660 | } | |
661 | return 0; | |
662 | } | |
663 | ||
5899329b | 664 | /* |
665 | * Internal interface to reserve a range of physical memory with prot. | |
666 | * Reserved non RAM regions only and after successful reserve_memtype, | |
667 | * this func also keeps identity mapping (if any) in sync with this new prot. | |
668 | */ | |
cdecff68 | 669 | static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, |
670 | int strict_prot) | |
5899329b | 671 | { |
672 | int is_ram = 0; | |
7880f746 | 673 | int ret; |
5899329b | 674 | unsigned long flags; |
cdecff68 | 675 | unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK); |
5899329b | 676 | |
be03d9e8 | 677 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 678 | |
be03d9e8 | 679 | /* |
4bb9c5c0 PV |
680 | * reserve_pfn_range() doesn't support RAM pages. Maintain the current |
681 | * behavior with RAM pages by returning success. | |
be03d9e8 SS |
682 | */ |
683 | if (is_ram != 0) | |
4bb9c5c0 | 684 | return 0; |
5899329b | 685 | |
686 | ret = reserve_memtype(paddr, paddr + size, want_flags, &flags); | |
687 | if (ret) | |
688 | return ret; | |
689 | ||
690 | if (flags != want_flags) { | |
cdecff68 | 691 | if (strict_prot || !is_new_memtype_allowed(want_flags, flags)) { |
692 | free_memtype(paddr, paddr + size); | |
693 | printk(KERN_ERR "%s:%d map pfn expected mapping type %s" | |
694 | " for %Lx-%Lx, got %s\n", | |
695 | current->comm, current->pid, | |
696 | cattr_name(want_flags), | |
697 | (unsigned long long)paddr, | |
698 | (unsigned long long)(paddr + size), | |
699 | cattr_name(flags)); | |
700 | return -EINVAL; | |
701 | } | |
702 | /* | |
703 | * We allow returning different type than the one requested in | |
704 | * non strict case. | |
705 | */ | |
706 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & | |
707 | (~_PAGE_CACHE_MASK)) | | |
708 | flags); | |
5899329b | 709 | } |
710 | ||
7880f746 | 711 | if (kernel_map_sync_memtype(paddr, size, flags) < 0) { |
5899329b | 712 | free_memtype(paddr, paddr + size); |
5899329b | 713 | return -EINVAL; |
714 | } | |
715 | return 0; | |
716 | } | |
717 | ||
718 | /* | |
719 | * Internal interface to free a range of physical memory. | |
720 | * Frees non RAM regions only. | |
721 | */ | |
722 | static void free_pfn_range(u64 paddr, unsigned long size) | |
723 | { | |
724 | int is_ram; | |
725 | ||
be03d9e8 | 726 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 727 | if (is_ram == 0) |
728 | free_memtype(paddr, paddr + size); | |
729 | } | |
730 | ||
731 | /* | |
732 | * track_pfn_vma_copy is called when vma that is covering the pfnmap gets | |
733 | * copied through copy_page_range(). | |
734 | * | |
735 | * If the vma has a linear pfn mapping for the entire range, we get the prot | |
736 | * from pte and reserve the entire vma range with single reserve_pfn_range call. | |
737 | * Otherwise, we reserve the entire vma range, my ging through the PTEs page | |
738 | * by page to get physical address and protection. | |
739 | */ | |
740 | int track_pfn_vma_copy(struct vm_area_struct *vma) | |
741 | { | |
742 | int retval = 0; | |
743 | unsigned long i, j; | |
c1c15b65 | 744 | resource_size_t paddr; |
982d789a | 745 | unsigned long prot; |
5899329b | 746 | unsigned long vma_start = vma->vm_start; |
747 | unsigned long vma_end = vma->vm_end; | |
748 | unsigned long vma_size = vma_end - vma_start; | |
cdecff68 | 749 | pgprot_t pgprot; |
5899329b | 750 | |
751 | if (!pat_enabled) | |
752 | return 0; | |
753 | ||
754 | if (is_linear_pfn_mapping(vma)) { | |
755 | /* | |
982d789a | 756 | * reserve the whole chunk covered by vma. We need the |
757 | * starting address and protection from pte. | |
5899329b | 758 | */ |
982d789a | 759 | if (follow_phys(vma, vma_start, 0, &prot, &paddr)) { |
5899329b | 760 | WARN_ON_ONCE(1); |
982d789a | 761 | return -EINVAL; |
5899329b | 762 | } |
cdecff68 | 763 | pgprot = __pgprot(prot); |
764 | return reserve_pfn_range(paddr, vma_size, &pgprot, 1); | |
5899329b | 765 | } |
766 | ||
767 | /* reserve entire vma page by page, using pfn and prot from pte */ | |
768 | for (i = 0; i < vma_size; i += PAGE_SIZE) { | |
982d789a | 769 | if (follow_phys(vma, vma_start + i, 0, &prot, &paddr)) |
5899329b | 770 | continue; |
771 | ||
cdecff68 | 772 | pgprot = __pgprot(prot); |
773 | retval = reserve_pfn_range(paddr, PAGE_SIZE, &pgprot, 1); | |
5899329b | 774 | if (retval) |
775 | goto cleanup_ret; | |
776 | } | |
777 | return 0; | |
778 | ||
779 | cleanup_ret: | |
780 | /* Reserve error: Cleanup partial reservation and return error */ | |
781 | for (j = 0; j < i; j += PAGE_SIZE) { | |
982d789a | 782 | if (follow_phys(vma, vma_start + j, 0, &prot, &paddr)) |
5899329b | 783 | continue; |
784 | ||
5899329b | 785 | free_pfn_range(paddr, PAGE_SIZE); |
786 | } | |
787 | ||
788 | return retval; | |
789 | } | |
790 | ||
791 | /* | |
792 | * track_pfn_vma_new is called when a _new_ pfn mapping is being established | |
793 | * for physical range indicated by pfn and size. | |
794 | * | |
795 | * prot is passed in as a parameter for the new mapping. If the vma has a | |
796 | * linear pfn mapping for the entire range reserve the entire vma range with | |
797 | * single reserve_pfn_range call. | |
798 | * Otherwise, we look t the pfn and size and reserve only the specified range | |
799 | * page by page. | |
800 | * | |
801 | * Note that this function can be called with caller trying to map only a | |
802 | * subrange/page inside the vma. | |
803 | */ | |
e4b866ed | 804 | int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot, |
5899329b | 805 | unsigned long pfn, unsigned long size) |
806 | { | |
807 | int retval = 0; | |
808 | unsigned long i, j; | |
c1c15b65 PA |
809 | resource_size_t base_paddr; |
810 | resource_size_t paddr; | |
5899329b | 811 | unsigned long vma_start = vma->vm_start; |
812 | unsigned long vma_end = vma->vm_end; | |
813 | unsigned long vma_size = vma_end - vma_start; | |
814 | ||
815 | if (!pat_enabled) | |
816 | return 0; | |
817 | ||
818 | if (is_linear_pfn_mapping(vma)) { | |
819 | /* reserve the whole chunk starting from vm_pgoff */ | |
c1c15b65 | 820 | paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT; |
cdecff68 | 821 | return reserve_pfn_range(paddr, vma_size, prot, 0); |
5899329b | 822 | } |
823 | ||
824 | /* reserve page by page using pfn and size */ | |
c1c15b65 | 825 | base_paddr = (resource_size_t)pfn << PAGE_SHIFT; |
5899329b | 826 | for (i = 0; i < size; i += PAGE_SIZE) { |
827 | paddr = base_paddr + i; | |
cdecff68 | 828 | retval = reserve_pfn_range(paddr, PAGE_SIZE, prot, 0); |
5899329b | 829 | if (retval) |
830 | goto cleanup_ret; | |
831 | } | |
832 | return 0; | |
833 | ||
834 | cleanup_ret: | |
835 | /* Reserve error: Cleanup partial reservation and return error */ | |
836 | for (j = 0; j < i; j += PAGE_SIZE) { | |
837 | paddr = base_paddr + j; | |
838 | free_pfn_range(paddr, PAGE_SIZE); | |
839 | } | |
840 | ||
841 | return retval; | |
842 | } | |
843 | ||
844 | /* | |
845 | * untrack_pfn_vma is called while unmapping a pfnmap for a region. | |
846 | * untrack can be called for a specific region indicated by pfn and size or | |
847 | * can be for the entire vma (in which case size can be zero). | |
848 | */ | |
849 | void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn, | |
850 | unsigned long size) | |
851 | { | |
852 | unsigned long i; | |
c1c15b65 | 853 | resource_size_t paddr; |
982d789a | 854 | unsigned long prot; |
5899329b | 855 | unsigned long vma_start = vma->vm_start; |
856 | unsigned long vma_end = vma->vm_end; | |
857 | unsigned long vma_size = vma_end - vma_start; | |
858 | ||
859 | if (!pat_enabled) | |
860 | return; | |
861 | ||
862 | if (is_linear_pfn_mapping(vma)) { | |
863 | /* free the whole chunk starting from vm_pgoff */ | |
c1c15b65 | 864 | paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT; |
5899329b | 865 | free_pfn_range(paddr, vma_size); |
866 | return; | |
867 | } | |
868 | ||
869 | if (size != 0 && size != vma_size) { | |
870 | /* free page by page, using pfn and size */ | |
c1c15b65 | 871 | paddr = (resource_size_t)pfn << PAGE_SHIFT; |
5899329b | 872 | for (i = 0; i < size; i += PAGE_SIZE) { |
873 | paddr = paddr + i; | |
874 | free_pfn_range(paddr, PAGE_SIZE); | |
875 | } | |
876 | } else { | |
877 | /* free entire vma, page by page, using the pfn from pte */ | |
878 | for (i = 0; i < vma_size; i += PAGE_SIZE) { | |
982d789a | 879 | if (follow_phys(vma, vma_start + i, 0, &prot, &paddr)) |
5899329b | 880 | continue; |
881 | ||
5899329b | 882 | free_pfn_range(paddr, PAGE_SIZE); |
883 | } | |
884 | } | |
885 | } | |
886 | ||
2520bd31 | 887 | pgprot_t pgprot_writecombine(pgprot_t prot) |
888 | { | |
889 | if (pat_enabled) | |
890 | return __pgprot(pgprot_val(prot) | _PAGE_CACHE_WC); | |
891 | else | |
892 | return pgprot_noncached(prot); | |
893 | } | |
92b9af9e | 894 | EXPORT_SYMBOL_GPL(pgprot_writecombine); |
2520bd31 | 895 | |
012f09e7 | 896 | #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) |
fec0962e | 897 | |
898 | /* get Nth element of the linked list */ | |
899 | static struct memtype *memtype_get_idx(loff_t pos) | |
900 | { | |
901 | struct memtype *list_node, *print_entry; | |
902 | int i = 1; | |
903 | ||
904 | print_entry = kmalloc(sizeof(struct memtype), GFP_KERNEL); | |
905 | if (!print_entry) | |
906 | return NULL; | |
907 | ||
908 | spin_lock(&memtype_lock); | |
909 | list_for_each_entry(list_node, &memtype_list, nd) { | |
910 | if (pos == i) { | |
911 | *print_entry = *list_node; | |
912 | spin_unlock(&memtype_lock); | |
913 | return print_entry; | |
914 | } | |
915 | ++i; | |
916 | } | |
917 | spin_unlock(&memtype_lock); | |
918 | kfree(print_entry); | |
ad2cde16 | 919 | |
fec0962e | 920 | return NULL; |
921 | } | |
922 | ||
923 | static void *memtype_seq_start(struct seq_file *seq, loff_t *pos) | |
924 | { | |
925 | if (*pos == 0) { | |
926 | ++*pos; | |
927 | seq_printf(seq, "PAT memtype list:\n"); | |
928 | } | |
929 | ||
930 | return memtype_get_idx(*pos); | |
931 | } | |
932 | ||
933 | static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |
934 | { | |
935 | ++*pos; | |
936 | return memtype_get_idx(*pos); | |
937 | } | |
938 | ||
939 | static void memtype_seq_stop(struct seq_file *seq, void *v) | |
940 | { | |
941 | } | |
942 | ||
943 | static int memtype_seq_show(struct seq_file *seq, void *v) | |
944 | { | |
945 | struct memtype *print_entry = (struct memtype *)v; | |
946 | ||
947 | seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type), | |
948 | print_entry->start, print_entry->end); | |
949 | kfree(print_entry); | |
ad2cde16 | 950 | |
fec0962e | 951 | return 0; |
952 | } | |
953 | ||
954 | static struct seq_operations memtype_seq_ops = { | |
955 | .start = memtype_seq_start, | |
956 | .next = memtype_seq_next, | |
957 | .stop = memtype_seq_stop, | |
958 | .show = memtype_seq_show, | |
959 | }; | |
960 | ||
961 | static int memtype_seq_open(struct inode *inode, struct file *file) | |
962 | { | |
963 | return seq_open(file, &memtype_seq_ops); | |
964 | } | |
965 | ||
966 | static const struct file_operations memtype_fops = { | |
967 | .open = memtype_seq_open, | |
968 | .read = seq_read, | |
969 | .llseek = seq_lseek, | |
970 | .release = seq_release, | |
971 | }; | |
972 | ||
973 | static int __init pat_memtype_list_init(void) | |
974 | { | |
975 | debugfs_create_file("pat_memtype_list", S_IRUSR, arch_debugfs_dir, | |
976 | NULL, &memtype_fops); | |
977 | return 0; | |
978 | } | |
979 | ||
980 | late_initcall(pat_memtype_list_init); | |
981 | ||
012f09e7 | 982 | #endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */ |