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2e5d9c85 | 1 | /* |
2 | * Handle caching attributes in page tables (PAT) | |
3 | * | |
4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | |
5 | * Suresh B Siddha <suresh.b.siddha@intel.com> | |
6 | * | |
7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. | |
8 | */ | |
9 | ||
ad2cde16 IM |
10 | #include <linux/seq_file.h> |
11 | #include <linux/bootmem.h> | |
12 | #include <linux/debugfs.h> | |
2e5d9c85 | 13 | #include <linux/kernel.h> |
92b9af9e | 14 | #include <linux/module.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
ad2cde16 | 16 | #include <linux/mm.h> |
2e5d9c85 | 17 | #include <linux/fs.h> |
335ef896 | 18 | #include <linux/rbtree.h> |
2e5d9c85 | 19 | |
ad2cde16 | 20 | #include <asm/cacheflush.h> |
2e5d9c85 | 21 | #include <asm/processor.h> |
ad2cde16 | 22 | #include <asm/tlbflush.h> |
fd12a0d6 | 23 | #include <asm/x86_init.h> |
2e5d9c85 | 24 | #include <asm/pgtable.h> |
2e5d9c85 | 25 | #include <asm/fcntl.h> |
ad2cde16 | 26 | #include <asm/e820.h> |
2e5d9c85 | 27 | #include <asm/mtrr.h> |
ad2cde16 IM |
28 | #include <asm/page.h> |
29 | #include <asm/msr.h> | |
30 | #include <asm/pat.h> | |
e7f260a2 | 31 | #include <asm/io.h> |
2e5d9c85 | 32 | |
be5a0c12 | 33 | #include "pat_internal.h" |
bd809af1 | 34 | #include "mm_internal.h" |
be5a0c12 | 35 | |
8d4a4300 | 36 | #ifdef CONFIG_X86_PAT |
499f8f84 | 37 | int __read_mostly pat_enabled = 1; |
2e5d9c85 | 38 | |
1ee4bd92 | 39 | static inline void pat_disable(const char *reason) |
2e5d9c85 | 40 | { |
499f8f84 | 41 | pat_enabled = 0; |
8d4a4300 | 42 | printk(KERN_INFO "%s\n", reason); |
2e5d9c85 | 43 | } |
2e5d9c85 | 44 | |
be524fb9 | 45 | static int __init nopat(char *str) |
2e5d9c85 | 46 | { |
8d4a4300 | 47 | pat_disable("PAT support disabled."); |
2e5d9c85 | 48 | return 0; |
49 | } | |
8d4a4300 | 50 | early_param("nopat", nopat); |
75a04811 PA |
51 | #else |
52 | static inline void pat_disable(const char *reason) | |
53 | { | |
54 | (void)reason; | |
55 | } | |
8d4a4300 TG |
56 | #endif |
57 | ||
77b52b4c | 58 | |
be5a0c12 | 59 | int pat_debug_enable; |
ad2cde16 | 60 | |
77b52b4c VP |
61 | static int __init pat_debug_setup(char *str) |
62 | { | |
be5a0c12 | 63 | pat_debug_enable = 1; |
77b52b4c VP |
64 | return 0; |
65 | } | |
66 | __setup("debugpat", pat_debug_setup); | |
67 | ||
8d4a4300 | 68 | static u64 __read_mostly boot_pat_state; |
2e5d9c85 | 69 | |
70 | enum { | |
71 | PAT_UC = 0, /* uncached */ | |
72 | PAT_WC = 1, /* Write combining */ | |
73 | PAT_WT = 4, /* Write Through */ | |
74 | PAT_WP = 5, /* Write Protected */ | |
75 | PAT_WB = 6, /* Write Back (default) */ | |
76 | PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ | |
77 | }; | |
78 | ||
bd809af1 JG |
79 | #define CM(c) (_PAGE_CACHE_MODE_ ## c) |
80 | ||
81 | static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg) | |
82 | { | |
83 | enum page_cache_mode cache; | |
84 | char *cache_mode; | |
85 | ||
86 | switch (pat_val) { | |
87 | case PAT_UC: cache = CM(UC); cache_mode = "UC "; break; | |
88 | case PAT_WC: cache = CM(WC); cache_mode = "WC "; break; | |
89 | case PAT_WT: cache = CM(WT); cache_mode = "WT "; break; | |
90 | case PAT_WP: cache = CM(WP); cache_mode = "WP "; break; | |
91 | case PAT_WB: cache = CM(WB); cache_mode = "WB "; break; | |
92 | case PAT_UC_MINUS: cache = CM(UC_MINUS); cache_mode = "UC- "; break; | |
93 | default: cache = CM(WB); cache_mode = "WB "; break; | |
94 | } | |
95 | ||
96 | memcpy(msg, cache_mode, 4); | |
97 | ||
98 | return cache; | |
99 | } | |
100 | ||
101 | #undef CM | |
102 | ||
103 | /* | |
104 | * Update the cache mode to pgprot translation tables according to PAT | |
105 | * configuration. | |
106 | * Using lower indices is preferred, so we start with highest index. | |
107 | */ | |
108 | void pat_init_cache_modes(void) | |
109 | { | |
110 | int i; | |
111 | enum page_cache_mode cache; | |
112 | char pat_msg[33]; | |
113 | u64 pat; | |
114 | ||
115 | rdmsrl(MSR_IA32_CR_PAT, pat); | |
116 | pat_msg[32] = 0; | |
117 | for (i = 7; i >= 0; i--) { | |
118 | cache = pat_get_cache_mode((pat >> (i * 8)) & 7, | |
119 | pat_msg + 4 * i); | |
120 | update_cache_mode_entry(i, cache); | |
121 | } | |
122 | pr_info("PAT configuration [0-7]: %s\n", pat_msg); | |
123 | } | |
124 | ||
cd7a4e93 | 125 | #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) |
2e5d9c85 | 126 | |
127 | void pat_init(void) | |
128 | { | |
129 | u64 pat; | |
e23a8b6a | 130 | bool boot_cpu = !boot_pat_state; |
2e5d9c85 | 131 | |
499f8f84 | 132 | if (!pat_enabled) |
2e5d9c85 | 133 | return; |
134 | ||
75a04811 PA |
135 | if (!cpu_has_pat) { |
136 | if (!boot_pat_state) { | |
137 | pat_disable("PAT not supported by CPU."); | |
138 | return; | |
139 | } else { | |
140 | /* | |
141 | * If this happens we are on a secondary CPU, but | |
142 | * switched to PAT on the boot CPU. We have no way to | |
143 | * undo PAT. | |
144 | */ | |
145 | printk(KERN_ERR "PAT enabled, " | |
146 | "but not supported by secondary CPU\n"); | |
147 | BUG(); | |
148 | } | |
8d4a4300 | 149 | } |
2e5d9c85 | 150 | |
151 | /* Set PWT to Write-Combining. All other bits stay the same */ | |
152 | /* | |
153 | * PTE encoding used in Linux: | |
154 | * PAT | |
155 | * |PCD | |
156 | * ||PWT | |
157 | * ||| | |
158 | * 000 WB _PAGE_CACHE_WB | |
159 | * 001 WC _PAGE_CACHE_WC | |
160 | * 010 UC- _PAGE_CACHE_UC_MINUS | |
161 | * 011 UC _PAGE_CACHE_UC | |
162 | * PAT bit unused | |
163 | */ | |
cd7a4e93 AH |
164 | pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | |
165 | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC); | |
2e5d9c85 | 166 | |
167 | /* Boot CPU check */ | |
8d4a4300 | 168 | if (!boot_pat_state) |
2e5d9c85 | 169 | rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); |
2e5d9c85 | 170 | |
171 | wrmsrl(MSR_IA32_CR_PAT, pat); | |
e23a8b6a RD |
172 | |
173 | if (boot_cpu) | |
bd809af1 | 174 | pat_init_cache_modes(); |
2e5d9c85 | 175 | } |
176 | ||
177 | #undef PAT | |
178 | ||
9e41a49a | 179 | static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */ |
335ef896 | 180 | |
2e5d9c85 | 181 | /* |
182 | * Does intersection of PAT memory type and MTRR memory type and returns | |
183 | * the resulting memory type as PAT understands it. | |
184 | * (Type in pat and mtrr will not have same value) | |
185 | * The intersection is based on "Effective Memory Type" tables in IA-32 | |
186 | * SDM vol 3a | |
187 | */ | |
e00c8cc9 JG |
188 | static unsigned long pat_x_mtrr_type(u64 start, u64 end, |
189 | enum page_cache_mode req_type) | |
2e5d9c85 | 190 | { |
c26421d0 VP |
191 | /* |
192 | * Look for MTRR hint to get the effective type in case where PAT | |
193 | * request is for WB. | |
194 | */ | |
e00c8cc9 | 195 | if (req_type == _PAGE_CACHE_MODE_WB) { |
dd0c7c49 AH |
196 | u8 mtrr_type; |
197 | ||
198 | mtrr_type = mtrr_type_lookup(start, end); | |
b6ff32d9 | 199 | if (mtrr_type != MTRR_TYPE_WRBACK) |
e00c8cc9 | 200 | return _PAGE_CACHE_MODE_UC_MINUS; |
b6ff32d9 | 201 | |
e00c8cc9 | 202 | return _PAGE_CACHE_MODE_WB; |
dd0c7c49 AH |
203 | } |
204 | ||
205 | return req_type; | |
2e5d9c85 | 206 | } |
207 | ||
fa83523f JD |
208 | struct pagerange_state { |
209 | unsigned long cur_pfn; | |
210 | int ram; | |
211 | int not_ram; | |
212 | }; | |
213 | ||
214 | static int | |
215 | pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg) | |
216 | { | |
217 | struct pagerange_state *state = arg; | |
218 | ||
219 | state->not_ram |= initial_pfn > state->cur_pfn; | |
220 | state->ram |= total_nr_pages > 0; | |
221 | state->cur_pfn = initial_pfn + total_nr_pages; | |
222 | ||
223 | return state->ram && state->not_ram; | |
224 | } | |
225 | ||
3709c857 | 226 | static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end) |
be03d9e8 | 227 | { |
fa83523f JD |
228 | int ret = 0; |
229 | unsigned long start_pfn = start >> PAGE_SHIFT; | |
230 | unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; | |
231 | struct pagerange_state state = {start_pfn, 0, 0}; | |
232 | ||
233 | /* | |
234 | * For legacy reasons, physical address range in the legacy ISA | |
235 | * region is tracked as non-RAM. This will allow users of | |
236 | * /dev/mem to map portions of legacy ISA region, even when | |
237 | * some of those portions are listed(or not even listed) with | |
238 | * different e820 types(RAM/reserved/..) | |
239 | */ | |
240 | if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT) | |
241 | start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT; | |
242 | ||
243 | if (start_pfn < end_pfn) { | |
244 | ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn, | |
245 | &state, pagerange_is_ram_callback); | |
be03d9e8 SS |
246 | } |
247 | ||
fa83523f | 248 | return (ret > 0) ? -1 : (state.ram ? 1 : 0); |
be03d9e8 SS |
249 | } |
250 | ||
9542ada8 | 251 | /* |
f5841740 VP |
252 | * For RAM pages, we use page flags to mark the pages with appropriate type. |
253 | * Here we do two pass: | |
254 | * - Find the memtype of all the pages in the range, look for any conflicts | |
255 | * - In case of no conflicts, set the new memtype for pages in the range | |
9542ada8 | 256 | */ |
e00c8cc9 JG |
257 | static int reserve_ram_pages_type(u64 start, u64 end, |
258 | enum page_cache_mode req_type, | |
259 | enum page_cache_mode *new_type) | |
9542ada8 SS |
260 | { |
261 | struct page *page; | |
f5841740 VP |
262 | u64 pfn; |
263 | ||
e00c8cc9 | 264 | if (req_type == _PAGE_CACHE_MODE_UC) { |
f5841740 VP |
265 | /* We do not support strong UC */ |
266 | WARN_ON_ONCE(1); | |
e00c8cc9 | 267 | req_type = _PAGE_CACHE_MODE_UC_MINUS; |
f5841740 | 268 | } |
9542ada8 SS |
269 | |
270 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
e00c8cc9 | 271 | enum page_cache_mode type; |
9542ada8 | 272 | |
f5841740 VP |
273 | page = pfn_to_page(pfn); |
274 | type = get_page_memtype(page); | |
275 | if (type != -1) { | |
e00c8cc9 | 276 | pr_info("reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n", |
365811d6 | 277 | start, end - 1, type, req_type); |
f5841740 VP |
278 | if (new_type) |
279 | *new_type = type; | |
280 | ||
281 | return -EBUSY; | |
282 | } | |
9542ada8 | 283 | } |
9542ada8 | 284 | |
f5841740 VP |
285 | if (new_type) |
286 | *new_type = req_type; | |
287 | ||
288 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
9542ada8 | 289 | page = pfn_to_page(pfn); |
f5841740 | 290 | set_page_memtype(page, req_type); |
9542ada8 | 291 | } |
f5841740 | 292 | return 0; |
9542ada8 SS |
293 | } |
294 | ||
295 | static int free_ram_pages_type(u64 start, u64 end) | |
296 | { | |
297 | struct page *page; | |
f5841740 | 298 | u64 pfn; |
9542ada8 SS |
299 | |
300 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { | |
301 | page = pfn_to_page(pfn); | |
f5841740 | 302 | set_page_memtype(page, -1); |
9542ada8 SS |
303 | } |
304 | return 0; | |
9542ada8 SS |
305 | } |
306 | ||
e7f260a2 | 307 | /* |
308 | * req_type typically has one of the: | |
e00c8cc9 JG |
309 | * - _PAGE_CACHE_MODE_WB |
310 | * - _PAGE_CACHE_MODE_WC | |
311 | * - _PAGE_CACHE_MODE_UC_MINUS | |
312 | * - _PAGE_CACHE_MODE_UC | |
e7f260a2 | 313 | * |
ac97991e AH |
314 | * If new_type is NULL, function will return an error if it cannot reserve the |
315 | * region with req_type. If new_type is non-NULL, function will return | |
316 | * available type in new_type in case of no error. In case of any error | |
e7f260a2 | 317 | * it will return a negative return value. |
318 | */ | |
e00c8cc9 JG |
319 | int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type, |
320 | enum page_cache_mode *new_type) | |
2e5d9c85 | 321 | { |
be5a0c12 | 322 | struct memtype *new; |
e00c8cc9 | 323 | enum page_cache_mode actual_type; |
9542ada8 | 324 | int is_range_ram; |
ad2cde16 | 325 | int err = 0; |
2e5d9c85 | 326 | |
ad2cde16 | 327 | BUG_ON(start >= end); /* end is exclusive */ |
69e26be9 | 328 | |
499f8f84 | 329 | if (!pat_enabled) { |
e7f260a2 | 330 | /* This is identical to page table setting without PAT */ |
ac97991e | 331 | if (new_type) { |
e00c8cc9 JG |
332 | if (req_type == _PAGE_CACHE_MODE_WC) |
333 | *new_type = _PAGE_CACHE_MODE_UC_MINUS; | |
ac97991e | 334 | else |
e00c8cc9 | 335 | *new_type = req_type; |
e7f260a2 | 336 | } |
2e5d9c85 | 337 | return 0; |
338 | } | |
339 | ||
340 | /* Low ISA region is always mapped WB in page table. No need to track */ | |
8a271389 | 341 | if (x86_platform.is_untracked_pat_range(start, end)) { |
ac97991e | 342 | if (new_type) |
e00c8cc9 | 343 | *new_type = _PAGE_CACHE_MODE_WB; |
2e5d9c85 | 344 | return 0; |
345 | } | |
346 | ||
b6ff32d9 SS |
347 | /* |
348 | * Call mtrr_lookup to get the type hint. This is an | |
349 | * optimization for /dev/mem mmap'ers into WB memory (BIOS | |
350 | * tools and ACPI tools). Use WB request for WB memory and use | |
351 | * UC_MINUS otherwise. | |
352 | */ | |
e00c8cc9 | 353 | actual_type = pat_x_mtrr_type(start, end, req_type); |
2e5d9c85 | 354 | |
95971342 SS |
355 | if (new_type) |
356 | *new_type = actual_type; | |
357 | ||
be03d9e8 | 358 | is_range_ram = pat_pagerange_is_ram(start, end); |
f5841740 VP |
359 | if (is_range_ram == 1) { |
360 | ||
f5841740 | 361 | err = reserve_ram_pages_type(start, end, req_type, new_type); |
f5841740 VP |
362 | |
363 | return err; | |
364 | } else if (is_range_ram < 0) { | |
9542ada8 | 365 | return -EINVAL; |
f5841740 | 366 | } |
9542ada8 | 367 | |
6a4f3b52 | 368 | new = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
ac97991e | 369 | if (!new) |
2e5d9c85 | 370 | return -ENOMEM; |
371 | ||
ad2cde16 IM |
372 | new->start = start; |
373 | new->end = end; | |
374 | new->type = actual_type; | |
2e5d9c85 | 375 | |
2e5d9c85 | 376 | spin_lock(&memtype_lock); |
377 | ||
9e41a49a | 378 | err = rbt_memtype_check_insert(new, new_type); |
2e5d9c85 | 379 | if (err) { |
365811d6 BH |
380 | printk(KERN_INFO "reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n", |
381 | start, end - 1, | |
382 | cattr_name(new->type), cattr_name(req_type)); | |
ac97991e | 383 | kfree(new); |
2e5d9c85 | 384 | spin_unlock(&memtype_lock); |
ad2cde16 | 385 | |
2e5d9c85 | 386 | return err; |
387 | } | |
388 | ||
2e5d9c85 | 389 | spin_unlock(&memtype_lock); |
3e9c83b3 | 390 | |
365811d6 BH |
391 | dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n", |
392 | start, end - 1, cattr_name(new->type), cattr_name(req_type), | |
3e9c83b3 AH |
393 | new_type ? cattr_name(*new_type) : "-"); |
394 | ||
2e5d9c85 | 395 | return err; |
396 | } | |
397 | ||
398 | int free_memtype(u64 start, u64 end) | |
399 | { | |
2e5d9c85 | 400 | int err = -EINVAL; |
9542ada8 | 401 | int is_range_ram; |
20413f27 | 402 | struct memtype *entry; |
2e5d9c85 | 403 | |
69e26be9 | 404 | if (!pat_enabled) |
2e5d9c85 | 405 | return 0; |
2e5d9c85 | 406 | |
407 | /* Low ISA region is always mapped WB. No need to track */ | |
8a271389 | 408 | if (x86_platform.is_untracked_pat_range(start, end)) |
2e5d9c85 | 409 | return 0; |
2e5d9c85 | 410 | |
be03d9e8 | 411 | is_range_ram = pat_pagerange_is_ram(start, end); |
f5841740 VP |
412 | if (is_range_ram == 1) { |
413 | ||
f5841740 | 414 | err = free_ram_pages_type(start, end); |
f5841740 VP |
415 | |
416 | return err; | |
417 | } else if (is_range_ram < 0) { | |
9542ada8 | 418 | return -EINVAL; |
f5841740 | 419 | } |
9542ada8 | 420 | |
2e5d9c85 | 421 | spin_lock(&memtype_lock); |
20413f27 | 422 | entry = rbt_memtype_erase(start, end); |
2e5d9c85 | 423 | spin_unlock(&memtype_lock); |
424 | ||
20413f27 | 425 | if (!entry) { |
365811d6 BH |
426 | printk(KERN_INFO "%s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n", |
427 | current->comm, current->pid, start, end - 1); | |
20413f27 | 428 | return -EINVAL; |
2e5d9c85 | 429 | } |
6997ab49 | 430 | |
20413f27 XF |
431 | kfree(entry); |
432 | ||
365811d6 | 433 | dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1); |
ad2cde16 | 434 | |
20413f27 | 435 | return 0; |
2e5d9c85 | 436 | } |
437 | ||
f0970c13 | 438 | |
637b86e7 VP |
439 | /** |
440 | * lookup_memtype - Looksup the memory type for a physical address | |
441 | * @paddr: physical address of which memory type needs to be looked up | |
442 | * | |
443 | * Only to be called when PAT is enabled | |
444 | * | |
2a374698 JG |
445 | * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS |
446 | * or _PAGE_CACHE_MODE_UC | |
637b86e7 | 447 | */ |
2a374698 | 448 | static enum page_cache_mode lookup_memtype(u64 paddr) |
637b86e7 | 449 | { |
2a374698 | 450 | enum page_cache_mode rettype = _PAGE_CACHE_MODE_WB; |
637b86e7 VP |
451 | struct memtype *entry; |
452 | ||
8a271389 | 453 | if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE)) |
637b86e7 VP |
454 | return rettype; |
455 | ||
456 | if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) { | |
457 | struct page *page; | |
637b86e7 | 458 | page = pfn_to_page(paddr >> PAGE_SHIFT); |
e00c8cc9 | 459 | rettype = get_page_memtype(page); |
637b86e7 VP |
460 | /* |
461 | * -1 from get_page_memtype() implies RAM page is in its | |
462 | * default state and not reserved, and hence of type WB | |
463 | */ | |
464 | if (rettype == -1) | |
2a374698 | 465 | rettype = _PAGE_CACHE_MODE_WB; |
637b86e7 VP |
466 | |
467 | return rettype; | |
468 | } | |
469 | ||
470 | spin_lock(&memtype_lock); | |
471 | ||
9e41a49a | 472 | entry = rbt_memtype_lookup(paddr); |
637b86e7 | 473 | if (entry != NULL) |
e00c8cc9 | 474 | rettype = entry->type; |
637b86e7 | 475 | else |
2a374698 | 476 | rettype = _PAGE_CACHE_MODE_UC_MINUS; |
637b86e7 VP |
477 | |
478 | spin_unlock(&memtype_lock); | |
479 | return rettype; | |
480 | } | |
481 | ||
9fd126bc VP |
482 | /** |
483 | * io_reserve_memtype - Request a memory type mapping for a region of memory | |
484 | * @start: start (physical address) of the region | |
485 | * @end: end (physical address) of the region | |
486 | * @type: A pointer to memtype, with requested type. On success, requested | |
487 | * or any other compatible type that was available for the region is returned | |
488 | * | |
489 | * On success, returns 0 | |
490 | * On failure, returns non-zero | |
491 | */ | |
492 | int io_reserve_memtype(resource_size_t start, resource_size_t end, | |
49a3b3cb | 493 | enum page_cache_mode *type) |
9fd126bc | 494 | { |
b855192c | 495 | resource_size_t size = end - start; |
49a3b3cb JG |
496 | enum page_cache_mode req_type = *type; |
497 | enum page_cache_mode new_type; | |
9fd126bc VP |
498 | int ret; |
499 | ||
b855192c | 500 | WARN_ON_ONCE(iomem_map_sanity_check(start, size)); |
9fd126bc | 501 | |
e00c8cc9 | 502 | ret = reserve_memtype(start, end, req_type, &new_type); |
9fd126bc VP |
503 | if (ret) |
504 | goto out_err; | |
505 | ||
49a3b3cb | 506 | if (!is_new_memtype_allowed(start, size, req_type, new_type)) |
9fd126bc VP |
507 | goto out_free; |
508 | ||
b14097bd | 509 | if (kernel_map_sync_memtype(start, size, new_type) < 0) |
9fd126bc VP |
510 | goto out_free; |
511 | ||
512 | *type = new_type; | |
513 | return 0; | |
514 | ||
515 | out_free: | |
516 | free_memtype(start, end); | |
517 | ret = -EBUSY; | |
518 | out_err: | |
519 | return ret; | |
520 | } | |
521 | ||
522 | /** | |
523 | * io_free_memtype - Release a memory type mapping for a region of memory | |
524 | * @start: start (physical address) of the region | |
525 | * @end: end (physical address) of the region | |
526 | */ | |
527 | void io_free_memtype(resource_size_t start, resource_size_t end) | |
528 | { | |
529 | free_memtype(start, end); | |
530 | } | |
531 | ||
f0970c13 | 532 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
533 | unsigned long size, pgprot_t vma_prot) | |
534 | { | |
535 | return vma_prot; | |
536 | } | |
537 | ||
d092633b IM |
538 | #ifdef CONFIG_STRICT_DEVMEM |
539 | /* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM*/ | |
0124cecf VP |
540 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
541 | { | |
542 | return 1; | |
543 | } | |
544 | #else | |
9e41bff2 | 545 | /* This check is needed to avoid cache aliasing when PAT is enabled */ |
0124cecf VP |
546 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
547 | { | |
548 | u64 from = ((u64)pfn) << PAGE_SHIFT; | |
549 | u64 to = from + size; | |
550 | u64 cursor = from; | |
551 | ||
9e41bff2 RT |
552 | if (!pat_enabled) |
553 | return 1; | |
554 | ||
0124cecf VP |
555 | while (cursor < to) { |
556 | if (!devmem_is_allowed(pfn)) { | |
365811d6 BH |
557 | printk(KERN_INFO "Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx]\n", |
558 | current->comm, from, to - 1); | |
0124cecf VP |
559 | return 0; |
560 | } | |
561 | cursor += PAGE_SIZE; | |
562 | pfn++; | |
563 | } | |
564 | return 1; | |
565 | } | |
d092633b | 566 | #endif /* CONFIG_STRICT_DEVMEM */ |
0124cecf | 567 | |
f0970c13 | 568 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
569 | unsigned long size, pgprot_t *vma_prot) | |
570 | { | |
e00c8cc9 | 571 | enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB; |
f0970c13 | 572 | |
0124cecf VP |
573 | if (!range_is_allowed(pfn, size)) |
574 | return 0; | |
575 | ||
6b2f3d1f | 576 | if (file->f_flags & O_DSYNC) |
e00c8cc9 | 577 | pcm = _PAGE_CACHE_MODE_UC_MINUS; |
f0970c13 | 578 | |
579 | #ifdef CONFIG_X86_32 | |
580 | /* | |
581 | * On the PPro and successors, the MTRRs are used to set | |
582 | * memory types for physical addresses outside main memory, | |
583 | * so blindly setting UC or PWT on those pages is wrong. | |
584 | * For Pentiums and earlier, the surround logic should disable | |
585 | * caching for the high addresses through the KEN pin, but | |
586 | * we maintain the tradition of paranoia in this code. | |
587 | */ | |
499f8f84 | 588 | if (!pat_enabled && |
cd7a4e93 AH |
589 | !(boot_cpu_has(X86_FEATURE_MTRR) || |
590 | boot_cpu_has(X86_FEATURE_K6_MTRR) || | |
591 | boot_cpu_has(X86_FEATURE_CYRIX_ARR) || | |
592 | boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) && | |
593 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { | |
e00c8cc9 | 594 | pcm = _PAGE_CACHE_MODE_UC; |
f0970c13 | 595 | } |
596 | #endif | |
597 | ||
e7f260a2 | 598 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | |
e00c8cc9 | 599 | cachemode2protval(pcm)); |
f0970c13 | 600 | return 1; |
601 | } | |
e7f260a2 | 602 | |
7880f746 VP |
603 | /* |
604 | * Change the memory type for the physial address range in kernel identity | |
605 | * mapping space if that range is a part of identity map. | |
606 | */ | |
b14097bd JG |
607 | int kernel_map_sync_memtype(u64 base, unsigned long size, |
608 | enum page_cache_mode pcm) | |
7880f746 VP |
609 | { |
610 | unsigned long id_sz; | |
611 | ||
a25b9316 | 612 | if (base > __pa(high_memory-1)) |
7880f746 VP |
613 | return 0; |
614 | ||
60f583d5 DH |
615 | /* |
616 | * some areas in the middle of the kernel identity range | |
617 | * are not mapped, like the PCI space. | |
618 | */ | |
619 | if (!page_is_ram(base >> PAGE_SHIFT)) | |
620 | return 0; | |
621 | ||
a25b9316 | 622 | id_sz = (__pa(high_memory-1) <= base + size) ? |
7880f746 VP |
623 | __pa(high_memory) - base : |
624 | size; | |
625 | ||
b14097bd | 626 | if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) < 0) { |
365811d6 BH |
627 | printk(KERN_INFO "%s:%d ioremap_change_attr failed %s " |
628 | "for [mem %#010Lx-%#010Lx]\n", | |
7880f746 | 629 | current->comm, current->pid, |
e00c8cc9 | 630 | cattr_name(pcm), |
365811d6 | 631 | base, (unsigned long long)(base + size-1)); |
7880f746 VP |
632 | return -EINVAL; |
633 | } | |
634 | return 0; | |
635 | } | |
636 | ||
5899329b | 637 | /* |
638 | * Internal interface to reserve a range of physical memory with prot. | |
639 | * Reserved non RAM regions only and after successful reserve_memtype, | |
640 | * this func also keeps identity mapping (if any) in sync with this new prot. | |
641 | */ | |
cdecff68 | 642 | static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, |
643 | int strict_prot) | |
5899329b | 644 | { |
645 | int is_ram = 0; | |
7880f746 | 646 | int ret; |
e00c8cc9 JG |
647 | enum page_cache_mode want_pcm = pgprot2cachemode(*vma_prot); |
648 | enum page_cache_mode pcm = want_pcm; | |
5899329b | 649 | |
be03d9e8 | 650 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 651 | |
be03d9e8 | 652 | /* |
d886c73c VP |
653 | * reserve_pfn_range() for RAM pages. We do not refcount to keep |
654 | * track of number of mappings of RAM pages. We can assert that | |
655 | * the type requested matches the type of first page in the range. | |
be03d9e8 | 656 | */ |
d886c73c VP |
657 | if (is_ram) { |
658 | if (!pat_enabled) | |
659 | return 0; | |
660 | ||
e00c8cc9 JG |
661 | pcm = lookup_memtype(paddr); |
662 | if (want_pcm != pcm) { | |
365811d6 | 663 | printk(KERN_WARNING "%s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n", |
d886c73c | 664 | current->comm, current->pid, |
e00c8cc9 | 665 | cattr_name(want_pcm), |
d886c73c | 666 | (unsigned long long)paddr, |
365811d6 | 667 | (unsigned long long)(paddr + size - 1), |
e00c8cc9 | 668 | cattr_name(pcm)); |
d886c73c | 669 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & |
e00c8cc9 JG |
670 | (~_PAGE_CACHE_MASK)) | |
671 | cachemode2protval(pcm)); | |
d886c73c | 672 | } |
4bb9c5c0 | 673 | return 0; |
d886c73c | 674 | } |
5899329b | 675 | |
e00c8cc9 | 676 | ret = reserve_memtype(paddr, paddr + size, want_pcm, &pcm); |
5899329b | 677 | if (ret) |
678 | return ret; | |
679 | ||
e00c8cc9 | 680 | if (pcm != want_pcm) { |
1adcaafe | 681 | if (strict_prot || |
e00c8cc9 | 682 | !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) { |
cdecff68 | 683 | free_memtype(paddr, paddr + size); |
684 | printk(KERN_ERR "%s:%d map pfn expected mapping type %s" | |
365811d6 | 685 | " for [mem %#010Lx-%#010Lx], got %s\n", |
cdecff68 | 686 | current->comm, current->pid, |
e00c8cc9 | 687 | cattr_name(want_pcm), |
cdecff68 | 688 | (unsigned long long)paddr, |
365811d6 | 689 | (unsigned long long)(paddr + size - 1), |
e00c8cc9 | 690 | cattr_name(pcm)); |
cdecff68 | 691 | return -EINVAL; |
692 | } | |
693 | /* | |
694 | * We allow returning different type than the one requested in | |
695 | * non strict case. | |
696 | */ | |
697 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & | |
698 | (~_PAGE_CACHE_MASK)) | | |
e00c8cc9 | 699 | cachemode2protval(pcm)); |
5899329b | 700 | } |
701 | ||
e00c8cc9 | 702 | if (kernel_map_sync_memtype(paddr, size, pcm) < 0) { |
5899329b | 703 | free_memtype(paddr, paddr + size); |
5899329b | 704 | return -EINVAL; |
705 | } | |
706 | return 0; | |
707 | } | |
708 | ||
709 | /* | |
710 | * Internal interface to free a range of physical memory. | |
711 | * Frees non RAM regions only. | |
712 | */ | |
713 | static void free_pfn_range(u64 paddr, unsigned long size) | |
714 | { | |
715 | int is_ram; | |
716 | ||
be03d9e8 | 717 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
5899329b | 718 | if (is_ram == 0) |
719 | free_memtype(paddr, paddr + size); | |
720 | } | |
721 | ||
722 | /* | |
5180da41 | 723 | * track_pfn_copy is called when vma that is covering the pfnmap gets |
5899329b | 724 | * copied through copy_page_range(). |
725 | * | |
726 | * If the vma has a linear pfn mapping for the entire range, we get the prot | |
727 | * from pte and reserve the entire vma range with single reserve_pfn_range call. | |
5899329b | 728 | */ |
5180da41 | 729 | int track_pfn_copy(struct vm_area_struct *vma) |
5899329b | 730 | { |
c1c15b65 | 731 | resource_size_t paddr; |
982d789a | 732 | unsigned long prot; |
4b065046 | 733 | unsigned long vma_size = vma->vm_end - vma->vm_start; |
cdecff68 | 734 | pgprot_t pgprot; |
5899329b | 735 | |
b3b9c293 | 736 | if (vma->vm_flags & VM_PAT) { |
5899329b | 737 | /* |
982d789a | 738 | * reserve the whole chunk covered by vma. We need the |
739 | * starting address and protection from pte. | |
5899329b | 740 | */ |
4b065046 | 741 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { |
5899329b | 742 | WARN_ON_ONCE(1); |
982d789a | 743 | return -EINVAL; |
5899329b | 744 | } |
cdecff68 | 745 | pgprot = __pgprot(prot); |
746 | return reserve_pfn_range(paddr, vma_size, &pgprot, 1); | |
5899329b | 747 | } |
748 | ||
5899329b | 749 | return 0; |
5899329b | 750 | } |
751 | ||
752 | /* | |
5899329b | 753 | * prot is passed in as a parameter for the new mapping. If the vma has a |
754 | * linear pfn mapping for the entire range reserve the entire vma range with | |
755 | * single reserve_pfn_range call. | |
5899329b | 756 | */ |
5180da41 | 757 | int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
b3b9c293 | 758 | unsigned long pfn, unsigned long addr, unsigned long size) |
5899329b | 759 | { |
b1a86e15 | 760 | resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT; |
2a374698 | 761 | enum page_cache_mode pcm; |
5899329b | 762 | |
b1a86e15 | 763 | /* reserve the whole chunk starting from paddr */ |
b3b9c293 KK |
764 | if (addr == vma->vm_start && size == (vma->vm_end - vma->vm_start)) { |
765 | int ret; | |
766 | ||
767 | ret = reserve_pfn_range(paddr, size, prot, 0); | |
768 | if (!ret) | |
769 | vma->vm_flags |= VM_PAT; | |
770 | return ret; | |
771 | } | |
5899329b | 772 | |
10876376 VP |
773 | if (!pat_enabled) |
774 | return 0; | |
775 | ||
5180da41 SS |
776 | /* |
777 | * For anything smaller than the vma size we set prot based on the | |
778 | * lookup. | |
779 | */ | |
2a374698 | 780 | pcm = lookup_memtype(paddr); |
5180da41 SS |
781 | |
782 | /* Check memtype for the remaining pages */ | |
783 | while (size > PAGE_SIZE) { | |
784 | size -= PAGE_SIZE; | |
785 | paddr += PAGE_SIZE; | |
2a374698 | 786 | if (pcm != lookup_memtype(paddr)) |
5180da41 SS |
787 | return -EINVAL; |
788 | } | |
789 | ||
790 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | | |
2a374698 | 791 | cachemode2protval(pcm)); |
5180da41 SS |
792 | |
793 | return 0; | |
794 | } | |
795 | ||
796 | int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, | |
797 | unsigned long pfn) | |
798 | { | |
2a374698 | 799 | enum page_cache_mode pcm; |
5180da41 SS |
800 | |
801 | if (!pat_enabled) | |
802 | return 0; | |
803 | ||
804 | /* Set prot based on lookup */ | |
2a374698 | 805 | pcm = lookup_memtype((resource_size_t)pfn << PAGE_SHIFT); |
10876376 | 806 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | |
2a374698 | 807 | cachemode2protval(pcm)); |
10876376 | 808 | |
5899329b | 809 | return 0; |
5899329b | 810 | } |
811 | ||
812 | /* | |
5180da41 | 813 | * untrack_pfn is called while unmapping a pfnmap for a region. |
5899329b | 814 | * untrack can be called for a specific region indicated by pfn and size or |
b1a86e15 | 815 | * can be for the entire vma (in which case pfn, size are zero). |
5899329b | 816 | */ |
5180da41 SS |
817 | void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, |
818 | unsigned long size) | |
5899329b | 819 | { |
c1c15b65 | 820 | resource_size_t paddr; |
b1a86e15 | 821 | unsigned long prot; |
5899329b | 822 | |
b3b9c293 | 823 | if (!(vma->vm_flags & VM_PAT)) |
5899329b | 824 | return; |
b1a86e15 SS |
825 | |
826 | /* free the chunk starting from pfn or the whole chunk */ | |
827 | paddr = (resource_size_t)pfn << PAGE_SHIFT; | |
828 | if (!paddr && !size) { | |
829 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { | |
830 | WARN_ON_ONCE(1); | |
831 | return; | |
832 | } | |
833 | ||
834 | size = vma->vm_end - vma->vm_start; | |
5899329b | 835 | } |
b1a86e15 | 836 | free_pfn_range(paddr, size); |
b3b9c293 | 837 | vma->vm_flags &= ~VM_PAT; |
5899329b | 838 | } |
839 | ||
2520bd31 | 840 | pgprot_t pgprot_writecombine(pgprot_t prot) |
841 | { | |
842 | if (pat_enabled) | |
e00c8cc9 JG |
843 | return __pgprot(pgprot_val(prot) | |
844 | cachemode2protval(_PAGE_CACHE_MODE_WC)); | |
2520bd31 | 845 | else |
846 | return pgprot_noncached(prot); | |
847 | } | |
92b9af9e | 848 | EXPORT_SYMBOL_GPL(pgprot_writecombine); |
2520bd31 | 849 | |
012f09e7 | 850 | #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) |
fec0962e | 851 | |
fec0962e | 852 | static struct memtype *memtype_get_idx(loff_t pos) |
853 | { | |
be5a0c12 | 854 | struct memtype *print_entry; |
855 | int ret; | |
fec0962e | 856 | |
be5a0c12 | 857 | print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
fec0962e | 858 | if (!print_entry) |
859 | return NULL; | |
860 | ||
861 | spin_lock(&memtype_lock); | |
9e41a49a | 862 | ret = rbt_memtype_copy_nth_element(print_entry, pos); |
fec0962e | 863 | spin_unlock(&memtype_lock); |
ad2cde16 | 864 | |
be5a0c12 | 865 | if (!ret) { |
866 | return print_entry; | |
867 | } else { | |
868 | kfree(print_entry); | |
869 | return NULL; | |
870 | } | |
fec0962e | 871 | } |
872 | ||
873 | static void *memtype_seq_start(struct seq_file *seq, loff_t *pos) | |
874 | { | |
875 | if (*pos == 0) { | |
876 | ++*pos; | |
877 | seq_printf(seq, "PAT memtype list:\n"); | |
878 | } | |
879 | ||
880 | return memtype_get_idx(*pos); | |
881 | } | |
882 | ||
883 | static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |
884 | { | |
885 | ++*pos; | |
886 | return memtype_get_idx(*pos); | |
887 | } | |
888 | ||
889 | static void memtype_seq_stop(struct seq_file *seq, void *v) | |
890 | { | |
891 | } | |
892 | ||
893 | static int memtype_seq_show(struct seq_file *seq, void *v) | |
894 | { | |
895 | struct memtype *print_entry = (struct memtype *)v; | |
896 | ||
897 | seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type), | |
898 | print_entry->start, print_entry->end); | |
899 | kfree(print_entry); | |
ad2cde16 | 900 | |
fec0962e | 901 | return 0; |
902 | } | |
903 | ||
d535e431 | 904 | static const struct seq_operations memtype_seq_ops = { |
fec0962e | 905 | .start = memtype_seq_start, |
906 | .next = memtype_seq_next, | |
907 | .stop = memtype_seq_stop, | |
908 | .show = memtype_seq_show, | |
909 | }; | |
910 | ||
911 | static int memtype_seq_open(struct inode *inode, struct file *file) | |
912 | { | |
913 | return seq_open(file, &memtype_seq_ops); | |
914 | } | |
915 | ||
916 | static const struct file_operations memtype_fops = { | |
917 | .open = memtype_seq_open, | |
918 | .read = seq_read, | |
919 | .llseek = seq_lseek, | |
920 | .release = seq_release, | |
921 | }; | |
922 | ||
923 | static int __init pat_memtype_list_init(void) | |
924 | { | |
dd4377b0 XF |
925 | if (pat_enabled) { |
926 | debugfs_create_file("pat_memtype_list", S_IRUSR, | |
927 | arch_debugfs_dir, NULL, &memtype_fops); | |
928 | } | |
fec0962e | 929 | return 0; |
930 | } | |
931 | ||
932 | late_initcall(pat_memtype_list_init); | |
933 | ||
012f09e7 | 934 | #endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */ |