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Commit | Line | Data |
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2e5d9c85 | 1 | /* |
2 | * Handle caching attributes in page tables (PAT) | |
3 | * | |
4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | |
5 | * Suresh B Siddha <suresh.b.siddha@intel.com> | |
6 | * | |
7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. | |
8 | */ | |
9 | ||
10 | #include <linux/mm.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/gfp.h> | |
13 | #include <linux/fs.h> | |
e7f260a2 | 14 | #include <linux/bootmem.h> |
2e5d9c85 | 15 | |
16 | #include <asm/msr.h> | |
17 | #include <asm/tlbflush.h> | |
18 | #include <asm/processor.h> | |
0124cecf | 19 | #include <asm/page.h> |
2e5d9c85 | 20 | #include <asm/pgtable.h> |
21 | #include <asm/pat.h> | |
22 | #include <asm/e820.h> | |
23 | #include <asm/cacheflush.h> | |
24 | #include <asm/fcntl.h> | |
25 | #include <asm/mtrr.h> | |
e7f260a2 | 26 | #include <asm/io.h> |
2e5d9c85 | 27 | |
8d4a4300 TG |
28 | #ifdef CONFIG_X86_PAT |
29 | int __read_mostly pat_wc_enabled = 1; | |
2e5d9c85 | 30 | |
31f4d870 | 31 | void __cpuinit pat_disable(char *reason) |
2e5d9c85 | 32 | { |
33 | pat_wc_enabled = 0; | |
8d4a4300 | 34 | printk(KERN_INFO "%s\n", reason); |
2e5d9c85 | 35 | } |
2e5d9c85 | 36 | |
be524fb9 | 37 | static int __init nopat(char *str) |
2e5d9c85 | 38 | { |
8d4a4300 | 39 | pat_disable("PAT support disabled."); |
2e5d9c85 | 40 | return 0; |
41 | } | |
8d4a4300 TG |
42 | early_param("nopat", nopat); |
43 | #endif | |
44 | ||
45 | static u64 __read_mostly boot_pat_state; | |
2e5d9c85 | 46 | |
47 | enum { | |
48 | PAT_UC = 0, /* uncached */ | |
49 | PAT_WC = 1, /* Write combining */ | |
50 | PAT_WT = 4, /* Write Through */ | |
51 | PAT_WP = 5, /* Write Protected */ | |
52 | PAT_WB = 6, /* Write Back (default) */ | |
53 | PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ | |
54 | }; | |
55 | ||
56 | #define PAT(x,y) ((u64)PAT_ ## y << ((x)*8)) | |
57 | ||
58 | void pat_init(void) | |
59 | { | |
60 | u64 pat; | |
61 | ||
8d4a4300 | 62 | if (!pat_wc_enabled) |
2e5d9c85 | 63 | return; |
64 | ||
8d4a4300 TG |
65 | /* Paranoia check. */ |
66 | if (!cpu_has_pat) { | |
67 | printk(KERN_ERR "PAT enabled, but CPU feature cleared\n"); | |
68 | /* | |
69 | * Panic if this happens on the secondary CPU, and we | |
70 | * switched to PAT on the boot CPU. We have no way to | |
71 | * undo PAT. | |
72 | */ | |
73 | BUG_ON(boot_pat_state); | |
74 | } | |
2e5d9c85 | 75 | |
76 | /* Set PWT to Write-Combining. All other bits stay the same */ | |
77 | /* | |
78 | * PTE encoding used in Linux: | |
79 | * PAT | |
80 | * |PCD | |
81 | * ||PWT | |
82 | * ||| | |
83 | * 000 WB _PAGE_CACHE_WB | |
84 | * 001 WC _PAGE_CACHE_WC | |
85 | * 010 UC- _PAGE_CACHE_UC_MINUS | |
86 | * 011 UC _PAGE_CACHE_UC | |
87 | * PAT bit unused | |
88 | */ | |
89 | pat = PAT(0,WB) | PAT(1,WC) | PAT(2,UC_MINUS) | PAT(3,UC) | | |
90 | PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC); | |
91 | ||
92 | /* Boot CPU check */ | |
8d4a4300 | 93 | if (!boot_pat_state) |
2e5d9c85 | 94 | rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); |
2e5d9c85 | 95 | |
96 | wrmsrl(MSR_IA32_CR_PAT, pat); | |
97 | printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", | |
98 | smp_processor_id(), boot_pat_state, pat); | |
99 | } | |
100 | ||
101 | #undef PAT | |
102 | ||
103 | static char *cattr_name(unsigned long flags) | |
104 | { | |
105 | switch (flags & _PAGE_CACHE_MASK) { | |
106 | case _PAGE_CACHE_UC: return "uncached"; | |
107 | case _PAGE_CACHE_UC_MINUS: return "uncached-minus"; | |
108 | case _PAGE_CACHE_WB: return "write-back"; | |
109 | case _PAGE_CACHE_WC: return "write-combining"; | |
110 | default: return "broken"; | |
111 | } | |
112 | } | |
113 | ||
114 | /* | |
115 | * The global memtype list keeps track of memory type for specific | |
116 | * physical memory areas. Conflicting memory types in different | |
117 | * mappings can cause CPU cache corruption. To avoid this we keep track. | |
118 | * | |
119 | * The list is sorted based on starting address and can contain multiple | |
120 | * entries for each address (this allows reference counting for overlapping | |
121 | * areas). All the aliases have the same cache attributes of course. | |
122 | * Zero attributes are represented as holes. | |
123 | * | |
124 | * Currently the data structure is a list because the number of mappings | |
125 | * are expected to be relatively small. If this should be a problem | |
126 | * it could be changed to a rbtree or similar. | |
127 | * | |
128 | * memtype_lock protects the whole list. | |
129 | */ | |
130 | ||
131 | struct memtype { | |
132 | u64 start; | |
133 | u64 end; | |
134 | unsigned long type; | |
135 | struct list_head nd; | |
136 | }; | |
137 | ||
138 | static LIST_HEAD(memtype_list); | |
139 | static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */ | |
140 | ||
141 | /* | |
142 | * Does intersection of PAT memory type and MTRR memory type and returns | |
143 | * the resulting memory type as PAT understands it. | |
144 | * (Type in pat and mtrr will not have same value) | |
145 | * The intersection is based on "Effective Memory Type" tables in IA-32 | |
146 | * SDM vol 3a | |
147 | */ | |
148 | static int pat_x_mtrr_type(u64 start, u64 end, unsigned long prot, | |
149 | unsigned long *ret_prot) | |
150 | { | |
151 | unsigned long pat_type; | |
152 | u8 mtrr_type; | |
153 | ||
2e5d9c85 | 154 | pat_type = prot & _PAGE_CACHE_MASK; |
155 | prot &= (~_PAGE_CACHE_MASK); | |
156 | ||
282c454c VP |
157 | /* |
158 | * We return the PAT request directly for types where PAT takes | |
159 | * precedence with respect to MTRR and for UC_MINUS. | |
160 | * Consistency checks with other PAT requests is done later | |
161 | * while going through memtype list. | |
162 | */ | |
2e5d9c85 | 163 | if (pat_type == _PAGE_CACHE_WC) { |
164 | *ret_prot = prot | _PAGE_CACHE_WC; | |
282c454c | 165 | return 0; |
2e5d9c85 | 166 | } else if (pat_type == _PAGE_CACHE_UC_MINUS) { |
167 | *ret_prot = prot | _PAGE_CACHE_UC_MINUS; | |
282c454c VP |
168 | return 0; |
169 | } else if (pat_type == _PAGE_CACHE_UC) { | |
170 | *ret_prot = prot | _PAGE_CACHE_UC; | |
171 | return 0; | |
172 | } | |
173 | ||
174 | /* | |
175 | * Look for MTRR hint to get the effective type in case where PAT | |
176 | * request is for WB. | |
177 | */ | |
178 | mtrr_type = mtrr_type_lookup(start, end); | |
179 | ||
180 | if (mtrr_type == MTRR_TYPE_UNCACHABLE) { | |
2e5d9c85 | 181 | *ret_prot = prot | _PAGE_CACHE_UC; |
182 | } else if (mtrr_type == MTRR_TYPE_WRCOMB) { | |
183 | *ret_prot = prot | _PAGE_CACHE_WC; | |
184 | } else { | |
185 | *ret_prot = prot | _PAGE_CACHE_WB; | |
186 | } | |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
e7f260a2 | 191 | /* |
192 | * req_type typically has one of the: | |
193 | * - _PAGE_CACHE_WB | |
194 | * - _PAGE_CACHE_WC | |
195 | * - _PAGE_CACHE_UC_MINUS | |
196 | * - _PAGE_CACHE_UC | |
197 | * | |
198 | * req_type will have a special case value '-1', when requester want to inherit | |
199 | * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS. | |
200 | * | |
201 | * If ret_type is NULL, function will return an error if it cannot reserve the | |
202 | * region with req_type. If ret_type is non-null, function will return | |
203 | * available type in ret_type in case of no error. In case of any error | |
204 | * it will return a negative return value. | |
205 | */ | |
2e5d9c85 | 206 | int reserve_memtype(u64 start, u64 end, unsigned long req_type, |
207 | unsigned long *ret_type) | |
208 | { | |
209 | struct memtype *new_entry = NULL; | |
210 | struct memtype *parse; | |
211 | unsigned long actual_type; | |
212 | int err = 0; | |
213 | ||
214 | /* Only track when pat_wc_enabled */ | |
215 | if (!pat_wc_enabled) { | |
e7f260a2 | 216 | /* This is identical to page table setting without PAT */ |
217 | if (ret_type) { | |
218 | if (req_type == -1) { | |
219 | *ret_type = _PAGE_CACHE_WB; | |
220 | } else { | |
221 | *ret_type = req_type; | |
222 | } | |
223 | } | |
2e5d9c85 | 224 | return 0; |
225 | } | |
226 | ||
227 | /* Low ISA region is always mapped WB in page table. No need to track */ | |
228 | if (start >= ISA_START_ADDRESS && (end - 1) <= ISA_END_ADDRESS) { | |
229 | if (ret_type) | |
230 | *ret_type = _PAGE_CACHE_WB; | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
e7f260a2 | 235 | if (req_type == -1) { |
236 | /* | |
282c454c VP |
237 | * Call mtrr_lookup to get the type hint. This is an |
238 | * optimization for /dev/mem mmap'ers into WB memory (BIOS | |
239 | * tools and ACPI tools). Use WB request for WB memory and use | |
240 | * UC_MINUS otherwise. | |
e7f260a2 | 241 | */ |
242 | u8 mtrr_type = mtrr_type_lookup(start, end); | |
e7f260a2 | 243 | |
244 | if (mtrr_type == MTRR_TYPE_WRBACK) { | |
245 | req_type = _PAGE_CACHE_WB; | |
246 | actual_type = _PAGE_CACHE_WB; | |
247 | } else { | |
248 | req_type = _PAGE_CACHE_UC_MINUS; | |
249 | actual_type = _PAGE_CACHE_UC_MINUS; | |
250 | } | |
251 | } else { | |
252 | req_type &= _PAGE_CACHE_MASK; | |
253 | err = pat_x_mtrr_type(start, end, req_type, &actual_type); | |
254 | } | |
255 | ||
2e5d9c85 | 256 | if (err) { |
257 | if (ret_type) | |
258 | *ret_type = actual_type; | |
259 | ||
260 | return -EINVAL; | |
261 | } | |
262 | ||
263 | new_entry = kmalloc(sizeof(struct memtype), GFP_KERNEL); | |
264 | if (!new_entry) | |
265 | return -ENOMEM; | |
266 | ||
267 | new_entry->start = start; | |
268 | new_entry->end = end; | |
269 | new_entry->type = actual_type; | |
270 | ||
271 | if (ret_type) | |
272 | *ret_type = actual_type; | |
273 | ||
274 | spin_lock(&memtype_lock); | |
275 | ||
276 | /* Search for existing mapping that overlaps the current range */ | |
277 | list_for_each_entry(parse, &memtype_list, nd) { | |
278 | struct memtype *saved_ptr; | |
279 | ||
280 | if (parse->start >= end) { | |
28eb559b | 281 | pr_debug("New Entry\n"); |
2e5d9c85 | 282 | list_add(&new_entry->nd, parse->nd.prev); |
283 | new_entry = NULL; | |
284 | break; | |
285 | } | |
286 | ||
287 | if (start <= parse->start && end >= parse->start) { | |
288 | if (actual_type != parse->type && ret_type) { | |
289 | actual_type = parse->type; | |
290 | *ret_type = actual_type; | |
291 | new_entry->type = actual_type; | |
292 | } | |
293 | ||
294 | if (actual_type != parse->type) { | |
295 | printk( | |
296 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
297 | current->comm, current->pid, | |
298 | start, end, | |
299 | cattr_name(actual_type), | |
300 | cattr_name(parse->type)); | |
301 | err = -EBUSY; | |
302 | break; | |
303 | } | |
304 | ||
305 | saved_ptr = parse; | |
306 | /* | |
307 | * Check to see whether the request overlaps more | |
308 | * than one entry in the list | |
309 | */ | |
310 | list_for_each_entry_continue(parse, &memtype_list, nd) { | |
311 | if (end <= parse->start) { | |
312 | break; | |
313 | } | |
314 | ||
315 | if (actual_type != parse->type) { | |
316 | printk( | |
317 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
318 | current->comm, current->pid, | |
319 | start, end, | |
320 | cattr_name(actual_type), | |
321 | cattr_name(parse->type)); | |
322 | err = -EBUSY; | |
323 | break; | |
324 | } | |
325 | } | |
326 | ||
327 | if (err) { | |
328 | break; | |
329 | } | |
330 | ||
1ebcc654 | 331 | pr_debug("Overlap at 0x%Lx-0x%Lx\n", |
6997ab49 | 332 | saved_ptr->start, saved_ptr->end); |
2e5d9c85 | 333 | /* No conflict. Go ahead and add this new entry */ |
334 | list_add(&new_entry->nd, saved_ptr->nd.prev); | |
335 | new_entry = NULL; | |
336 | break; | |
337 | } | |
338 | ||
339 | if (start < parse->end) { | |
340 | if (actual_type != parse->type && ret_type) { | |
341 | actual_type = parse->type; | |
342 | *ret_type = actual_type; | |
343 | new_entry->type = actual_type; | |
344 | } | |
345 | ||
346 | if (actual_type != parse->type) { | |
347 | printk( | |
348 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
349 | current->comm, current->pid, | |
350 | start, end, | |
351 | cattr_name(actual_type), | |
352 | cattr_name(parse->type)); | |
353 | err = -EBUSY; | |
354 | break; | |
355 | } | |
356 | ||
357 | saved_ptr = parse; | |
358 | /* | |
359 | * Check to see whether the request overlaps more | |
360 | * than one entry in the list | |
361 | */ | |
362 | list_for_each_entry_continue(parse, &memtype_list, nd) { | |
363 | if (end <= parse->start) { | |
364 | break; | |
365 | } | |
366 | ||
367 | if (actual_type != parse->type) { | |
368 | printk( | |
369 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | |
370 | current->comm, current->pid, | |
371 | start, end, | |
372 | cattr_name(actual_type), | |
373 | cattr_name(parse->type)); | |
374 | err = -EBUSY; | |
375 | break; | |
376 | } | |
377 | } | |
378 | ||
379 | if (err) { | |
380 | break; | |
381 | } | |
382 | ||
86cf02f8 LT |
383 | pr_debug(KERN_INFO "Overlap at 0x%Lx-0x%Lx\n", |
384 | saved_ptr->start, saved_ptr->end); | |
2e5d9c85 | 385 | /* No conflict. Go ahead and add this new entry */ |
386 | list_add(&new_entry->nd, &saved_ptr->nd); | |
387 | new_entry = NULL; | |
388 | break; | |
389 | } | |
390 | } | |
391 | ||
392 | if (err) { | |
28eb559b | 393 | printk(KERN_INFO |
6997ab49 | 394 | "reserve_memtype failed 0x%Lx-0x%Lx, track %s, req %s\n", |
395 | start, end, cattr_name(new_entry->type), | |
396 | cattr_name(req_type)); | |
2e5d9c85 | 397 | kfree(new_entry); |
398 | spin_unlock(&memtype_lock); | |
399 | return err; | |
400 | } | |
401 | ||
402 | if (new_entry) { | |
403 | /* No conflict. Not yet added to the list. Add to the tail */ | |
404 | list_add_tail(&new_entry->nd, &memtype_list); | |
28eb559b IM |
405 | pr_debug("New Entry\n"); |
406 | } | |
6997ab49 | 407 | |
408 | if (ret_type) { | |
28eb559b | 409 | pr_debug( |
6997ab49 | 410 | "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n", |
411 | start, end, cattr_name(actual_type), | |
412 | cattr_name(req_type), cattr_name(*ret_type)); | |
413 | } else { | |
28eb559b | 414 | pr_debug( |
6997ab49 | 415 | "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s\n", |
416 | start, end, cattr_name(actual_type), | |
417 | cattr_name(req_type)); | |
2e5d9c85 | 418 | } |
419 | ||
420 | spin_unlock(&memtype_lock); | |
421 | return err; | |
422 | } | |
423 | ||
424 | int free_memtype(u64 start, u64 end) | |
425 | { | |
426 | struct memtype *ml; | |
427 | int err = -EINVAL; | |
428 | ||
429 | /* Only track when pat_wc_enabled */ | |
430 | if (!pat_wc_enabled) { | |
431 | return 0; | |
432 | } | |
433 | ||
434 | /* Low ISA region is always mapped WB. No need to track */ | |
435 | if (start >= ISA_START_ADDRESS && end <= ISA_END_ADDRESS) { | |
436 | return 0; | |
437 | } | |
438 | ||
439 | spin_lock(&memtype_lock); | |
440 | list_for_each_entry(ml, &memtype_list, nd) { | |
441 | if (ml->start == start && ml->end == end) { | |
442 | list_del(&ml->nd); | |
443 | kfree(ml); | |
444 | err = 0; | |
445 | break; | |
446 | } | |
447 | } | |
448 | spin_unlock(&memtype_lock); | |
449 | ||
450 | if (err) { | |
28eb559b | 451 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", |
2e5d9c85 | 452 | current->comm, current->pid, start, end); |
453 | } | |
6997ab49 | 454 | |
28eb559b | 455 | pr_debug("free_memtype request 0x%Lx-0x%Lx\n", start, end); |
2e5d9c85 | 456 | return err; |
457 | } | |
458 | ||
f0970c13 | 459 | |
e7f260a2 | 460 | /* |
461 | * /dev/mem mmap interface. The memtype used for mapping varies: | |
462 | * - Use UC for mappings with O_SYNC flag | |
463 | * - Without O_SYNC flag, if there is any conflict in reserve_memtype, | |
464 | * inherit the memtype from existing mapping. | |
465 | * - Else use UC_MINUS memtype (for backward compatibility with existing | |
466 | * X drivers. | |
467 | */ | |
f0970c13 | 468 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
469 | unsigned long size, pgprot_t vma_prot) | |
470 | { | |
471 | return vma_prot; | |
472 | } | |
473 | ||
0124cecf VP |
474 | #ifdef CONFIG_NONPROMISC_DEVMEM |
475 | /* This check is done in drivers/char/mem.c in case of NONPROMISC_DEVMEM*/ | |
476 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) | |
477 | { | |
478 | return 1; | |
479 | } | |
480 | #else | |
481 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) | |
482 | { | |
483 | u64 from = ((u64)pfn) << PAGE_SHIFT; | |
484 | u64 to = from + size; | |
485 | u64 cursor = from; | |
486 | ||
487 | while (cursor < to) { | |
488 | if (!devmem_is_allowed(pfn)) { | |
489 | printk(KERN_INFO | |
490 | "Program %s tried to access /dev/mem between %Lx->%Lx.\n", | |
491 | current->comm, from, to); | |
492 | return 0; | |
493 | } | |
494 | cursor += PAGE_SIZE; | |
495 | pfn++; | |
496 | } | |
497 | return 1; | |
498 | } | |
499 | #endif /* CONFIG_NONPROMISC_DEVMEM */ | |
500 | ||
f0970c13 | 501 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
502 | unsigned long size, pgprot_t *vma_prot) | |
503 | { | |
e7f260a2 | 504 | u64 offset = ((u64) pfn) << PAGE_SHIFT; |
505 | unsigned long flags = _PAGE_CACHE_UC_MINUS; | |
e7f260a2 | 506 | int retval; |
f0970c13 | 507 | |
0124cecf VP |
508 | if (!range_is_allowed(pfn, size)) |
509 | return 0; | |
510 | ||
f0970c13 | 511 | if (file->f_flags & O_SYNC) { |
e7f260a2 | 512 | flags = _PAGE_CACHE_UC; |
f0970c13 | 513 | } |
514 | ||
515 | #ifdef CONFIG_X86_32 | |
516 | /* | |
517 | * On the PPro and successors, the MTRRs are used to set | |
518 | * memory types for physical addresses outside main memory, | |
519 | * so blindly setting UC or PWT on those pages is wrong. | |
520 | * For Pentiums and earlier, the surround logic should disable | |
521 | * caching for the high addresses through the KEN pin, but | |
522 | * we maintain the tradition of paranoia in this code. | |
523 | */ | |
524 | if (!pat_wc_enabled && | |
525 | ! ( test_bit(X86_FEATURE_MTRR, boot_cpu_data.x86_capability) || | |
526 | test_bit(X86_FEATURE_K6_MTRR, boot_cpu_data.x86_capability) || | |
527 | test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) || | |
528 | test_bit(X86_FEATURE_CENTAUR_MCR, boot_cpu_data.x86_capability)) && | |
529 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { | |
e7f260a2 | 530 | flags = _PAGE_CACHE_UC; |
f0970c13 | 531 | } |
532 | #endif | |
533 | ||
e7f260a2 | 534 | /* |
535 | * With O_SYNC, we can only take UC mapping. Fail if we cannot. | |
536 | * Without O_SYNC, we want to get | |
537 | * - WB for WB-able memory and no other conflicting mappings | |
538 | * - UC_MINUS for non-WB-able memory with no other conflicting mappings | |
539 | * - Inherit from confliting mappings otherwise | |
540 | */ | |
541 | if (flags != _PAGE_CACHE_UC_MINUS) { | |
542 | retval = reserve_memtype(offset, offset + size, flags, NULL); | |
543 | } else { | |
f022bfd5 | 544 | retval = reserve_memtype(offset, offset + size, -1, &flags); |
e7f260a2 | 545 | } |
546 | ||
547 | if (retval < 0) | |
548 | return 0; | |
549 | ||
e7f260a2 | 550 | if (pfn <= max_pfn_mapped && |
551 | ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) { | |
552 | free_memtype(offset, offset + size); | |
28eb559b | 553 | printk(KERN_INFO |
e7f260a2 | 554 | "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n", |
555 | current->comm, current->pid, | |
556 | cattr_name(flags), | |
afc85343 | 557 | offset, (unsigned long long)(offset + size)); |
e7f260a2 | 558 | return 0; |
559 | } | |
560 | ||
561 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | | |
562 | flags); | |
f0970c13 | 563 | return 1; |
564 | } | |
e7f260a2 | 565 | |
566 | void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | |
567 | { | |
568 | u64 addr = (u64)pfn << PAGE_SHIFT; | |
569 | unsigned long flags; | |
570 | unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK); | |
571 | ||
572 | reserve_memtype(addr, addr + size, want_flags, &flags); | |
573 | if (flags != want_flags) { | |
28eb559b | 574 | printk(KERN_INFO |
e7f260a2 | 575 | "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n", |
576 | current->comm, current->pid, | |
577 | cattr_name(want_flags), | |
afc85343 | 578 | addr, (unsigned long long)(addr + size), |
e7f260a2 | 579 | cattr_name(flags)); |
580 | } | |
581 | } | |
582 | ||
583 | void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | |
584 | { | |
585 | u64 addr = (u64)pfn << PAGE_SHIFT; | |
586 | ||
587 | free_memtype(addr, addr + size); | |
588 | } | |
589 |