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x86/mm: Expand static page table for fixmap space
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b2441318 1// SPDX-License-Identifier: GPL-2.0
4f76cd38 2#include <linux/mm.h>
5a0e3ad6 3#include <linux/gfp.h>
63f990c7 4#include <linux/hugetlb.h>
4f76cd38 5#include <asm/pgalloc.h>
ee5aa8d3 6#include <asm/pgtable.h>
4f76cd38 7#include <asm/tlb.h>
a1d5a869 8#include <asm/fixmap.h>
6b637835 9#include <asm/mtrr.h>
4f76cd38 10
75f296d9 11#define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_ZERO)
9e730237 12
14315592
IC
13#ifdef CONFIG_HIGHPTE
14#define PGALLOC_USER_GFP __GFP_HIGHMEM
15#else
16#define PGALLOC_USER_GFP 0
17#endif
18
19gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP;
20
4f76cd38
JF
21pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
22{
3e79ec7d 23 return (pte_t *)__get_free_page(PGALLOC_GFP & ~__GFP_ACCOUNT);
4f76cd38
JF
24}
25
26pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
27{
28 struct page *pte;
29
14315592 30 pte = alloc_pages(__userpte_alloc_gfp, 0);
cecbd1b5
KS
31 if (!pte)
32 return NULL;
33 if (!pgtable_page_ctor(pte)) {
34 __free_page(pte);
35 return NULL;
36 }
4f76cd38
JF
37 return pte;
38}
39
14315592
IC
40static int __init setup_userpte(char *arg)
41{
42 if (!arg)
43 return -EINVAL;
44
45 /*
46 * "userpte=nohigh" disables allocation of user pagetables in
47 * high memory.
48 */
49 if (strcmp(arg, "nohigh") == 0)
50 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
51 else
52 return -EINVAL;
53 return 0;
54}
55early_param("userpte", setup_userpte);
56
9e1b32ca 57void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
397f687a
JF
58{
59 pgtable_page_dtor(pte);
6944a9c8 60 paravirt_release_pte(page_to_pfn(pte));
9e52fc2b 61 tlb_remove_table(tlb, pte);
397f687a
JF
62}
63
98233368 64#if CONFIG_PGTABLE_LEVELS > 2
9e1b32ca 65void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
170fdff7 66{
c283610e 67 struct page *page = virt_to_page(pmd);
6944a9c8 68 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
1de14c3c
DH
69 /*
70 * NOTE! For PAE, any changes to the top page-directory-pointer-table
71 * entries need a full cr3 reload to flush.
72 */
73#ifdef CONFIG_X86_PAE
74 tlb->need_flush_all = 1;
75#endif
c283610e 76 pgtable_pmd_page_dtor(page);
9e52fc2b 77 tlb_remove_table(tlb, page);
170fdff7 78}
5a5f8f42 79
98233368 80#if CONFIG_PGTABLE_LEVELS > 3
9e1b32ca 81void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
5a5f8f42 82{
2761fa09 83 paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
9e52fc2b 84 tlb_remove_table(tlb, virt_to_page(pud));
5a5f8f42 85}
b8504058
KS
86
87#if CONFIG_PGTABLE_LEVELS > 4
88void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d)
89{
90 paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT);
9e52fc2b 91 tlb_remove_table(tlb, virt_to_page(p4d));
b8504058
KS
92}
93#endif /* CONFIG_PGTABLE_LEVELS > 4 */
98233368
KS
94#endif /* CONFIG_PGTABLE_LEVELS > 3 */
95#endif /* CONFIG_PGTABLE_LEVELS > 2 */
170fdff7 96
4f76cd38
JF
97static inline void pgd_list_add(pgd_t *pgd)
98{
99 struct page *page = virt_to_page(pgd);
4f76cd38 100
4f76cd38 101 list_add(&page->lru, &pgd_list);
4f76cd38
JF
102}
103
104static inline void pgd_list_del(pgd_t *pgd)
105{
106 struct page *page = virt_to_page(pgd);
4f76cd38 107
4f76cd38 108 list_del(&page->lru);
4f76cd38
JF
109}
110
4f76cd38 111#define UNSHARED_PTRS_PER_PGD \
68db065c 112 (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
4f76cd38 113
617d34d9
JF
114
115static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)
116{
117 BUILD_BUG_ON(sizeof(virt_to_page(pgd)->index) < sizeof(mm));
118 virt_to_page(pgd)->index = (pgoff_t)mm;
119}
120
121struct mm_struct *pgd_page_get_mm(struct page *page)
122{
123 return (struct mm_struct *)page->index;
124}
125
126static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
4f76cd38 127{
4f76cd38
JF
128 /* If the pgd points to a shared pagetable level (either the
129 ptes in non-PAE, or shared PMD in PAE), then just copy the
130 references from swapper_pg_dir. */
98233368
KS
131 if (CONFIG_PGTABLE_LEVELS == 2 ||
132 (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
b8504058 133 CONFIG_PGTABLE_LEVELS >= 4) {
68db065c
JF
134 clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
135 swapper_pg_dir + KERNEL_PGD_BOUNDARY,
4f76cd38 136 KERNEL_PGD_PTRS);
4f76cd38
JF
137 }
138
139 /* list required to sync kernel mapping updates */
617d34d9
JF
140 if (!SHARED_KERNEL_PMD) {
141 pgd_set_mm(pgd, mm);
4f76cd38 142 pgd_list_add(pgd);
617d34d9 143 }
4f76cd38
JF
144}
145
17b74627 146static void pgd_dtor(pgd_t *pgd)
4f76cd38 147{
4f76cd38
JF
148 if (SHARED_KERNEL_PMD)
149 return;
150
a79e53d8 151 spin_lock(&pgd_lock);
4f76cd38 152 pgd_list_del(pgd);
a79e53d8 153 spin_unlock(&pgd_lock);
4f76cd38
JF
154}
155
85958b46
JF
156/*
157 * List of all pgd's needed for non-PAE so it can invalidate entries
158 * in both cached and uncached pgd's; not needed for PAE since the
159 * kernel pmd is shared. If PAE were not to share the pmd a similar
160 * tactic would be needed. This is essentially codepath-based locking
161 * against pageattr.c; it is the unique case in which a valid change
162 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
163 * vmalloc faults work because attached pagetables are never freed.
6d49e352 164 * -- nyc
85958b46
JF
165 */
166
4f76cd38 167#ifdef CONFIG_X86_PAE
d8d5900e
JF
168/*
169 * In PAE mode, we need to do a cr3 reload (=tlb flush) when
170 * updating the top-level pagetable entries to guarantee the
171 * processor notices the update. Since this is expensive, and
172 * all 4 top-level entries are used almost immediately in a
173 * new process's life, we just pre-populate them here.
174 *
175 * Also, if we're in a paravirt environment where the kernel pmd is
176 * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
177 * and initialize the kernel pmds here.
178 */
179#define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
180
23fe59e0
JR
181/*
182 * We allocate separate PMDs for the kernel part of the user page-table
183 * when PTI is enabled. We need them to map the per-process LDT into the
184 * user-space page-table.
185 */
186#define PREALLOCATED_USER_PMDS (static_cpu_has(X86_FEATURE_PTI) ? \
187 KERNEL_PGD_PTRS : 0)
188
d8d5900e
JF
189void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
190{
191 paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
192
193 /* Note: almost everything apart from _PAGE_PRESENT is
194 reserved at the pmd (PDPT) level. */
195 set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
196
197 /*
198 * According to Intel App note "TLBs, Paging-Structure Caches,
199 * and Their Invalidation", April 2007, document 317080-001,
200 * section 8.1: in PAE mode we explicitly have to flush the
201 * TLB via cr3 if the top-level pgd is changed...
202 */
4981d01e 203 flush_tlb_mm(mm);
d8d5900e
JF
204}
205#else /* !CONFIG_X86_PAE */
206
207/* No need to prepopulate any pagetable entries in non-PAE modes. */
208#define PREALLOCATED_PMDS 0
23fe59e0 209#define PREALLOCATED_USER_PMDS 0
d8d5900e
JF
210#endif /* CONFIG_X86_PAE */
211
23fe59e0 212static void free_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
d8d5900e
JF
213{
214 int i;
215
23fe59e0 216 for (i = 0; i < count; i++)
09ef4939
KS
217 if (pmds[i]) {
218 pgtable_pmd_page_dtor(virt_to_page(pmds[i]));
d8d5900e 219 free_page((unsigned long)pmds[i]);
dc6c9a35 220 mm_dec_nr_pmds(mm);
09ef4939 221 }
d8d5900e
JF
222}
223
23fe59e0 224static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
d8d5900e
JF
225{
226 int i;
227 bool failed = false;
3e79ec7d
VD
228 gfp_t gfp = PGALLOC_GFP;
229
230 if (mm == &init_mm)
231 gfp &= ~__GFP_ACCOUNT;
d8d5900e 232
23fe59e0 233 for (i = 0; i < count; i++) {
3e79ec7d 234 pmd_t *pmd = (pmd_t *)__get_free_page(gfp);
09ef4939 235 if (!pmd)
d8d5900e 236 failed = true;
09ef4939 237 if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {
2a46eed5 238 free_page((unsigned long)pmd);
09ef4939
KS
239 pmd = NULL;
240 failed = true;
241 }
dc6c9a35
KS
242 if (pmd)
243 mm_inc_nr_pmds(mm);
d8d5900e
JF
244 pmds[i] = pmd;
245 }
246
247 if (failed) {
23fe59e0 248 free_pmds(mm, pmds, count);
d8d5900e
JF
249 return -ENOMEM;
250 }
251
252 return 0;
253}
254
4f76cd38
JF
255/*
256 * Mop up any pmd pages which may still be attached to the pgd.
257 * Normally they will be freed by munmap/exit_mmap, but any pmd we
258 * preallocate which never got a corresponding vma will need to be
259 * freed manually.
260 */
23fe59e0
JR
261static void mop_up_one_pmd(struct mm_struct *mm, pgd_t *pgdp)
262{
263 pgd_t pgd = *pgdp;
264
265 if (pgd_val(pgd) != 0) {
266 pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
267
a4b345da 268 pgd_clear(pgdp);
23fe59e0
JR
269
270 paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
271 pmd_free(mm, pmd);
272 mm_dec_nr_pmds(mm);
273 }
274}
275
4f76cd38
JF
276static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
277{
278 int i;
279
23fe59e0
JR
280 for (i = 0; i < PREALLOCATED_PMDS; i++)
281 mop_up_one_pmd(mm, &pgdp[i]);
4f76cd38 282
23fe59e0 283#ifdef CONFIG_PAGE_TABLE_ISOLATION
4f76cd38 284
23fe59e0
JR
285 if (!static_cpu_has(X86_FEATURE_PTI))
286 return;
4f76cd38 287
23fe59e0
JR
288 pgdp = kernel_to_user_pgdp(pgdp);
289
290 for (i = 0; i < PREALLOCATED_USER_PMDS; i++)
291 mop_up_one_pmd(mm, &pgdp[i + KERNEL_PGD_BOUNDARY]);
292#endif
4f76cd38
JF
293}
294
d8d5900e 295static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
4f76cd38 296{
e0c4f675 297 p4d_t *p4d;
4f76cd38 298 pud_t *pud;
4f76cd38
JF
299 int i;
300
cf3e5050
JF
301 if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */
302 return;
303
e0c4f675
KS
304 p4d = p4d_offset(pgd, 0);
305 pud = pud_offset(p4d, 0);
4f76cd38 306
73b44ff4 307 for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
d8d5900e 308 pmd_t *pmd = pmds[i];
4f76cd38 309
68db065c 310 if (i >= KERNEL_PGD_BOUNDARY)
4f76cd38
JF
311 memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),
312 sizeof(pmd_t) * PTRS_PER_PMD);
313
314 pud_populate(mm, pud, pmd);
315 }
4f76cd38 316}
1ec1fe73 317
23fe59e0
JR
318#ifdef CONFIG_PAGE_TABLE_ISOLATION
319static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
320 pgd_t *k_pgd, pmd_t *pmds[])
321{
322 pgd_t *s_pgd = kernel_to_user_pgdp(swapper_pg_dir);
323 pgd_t *u_pgd = kernel_to_user_pgdp(k_pgd);
324 p4d_t *u_p4d;
325 pud_t *u_pud;
326 int i;
327
328 u_p4d = p4d_offset(u_pgd, 0);
329 u_pud = pud_offset(u_p4d, 0);
330
331 s_pgd += KERNEL_PGD_BOUNDARY;
332 u_pud += KERNEL_PGD_BOUNDARY;
333
334 for (i = 0; i < PREALLOCATED_USER_PMDS; i++, u_pud++, s_pgd++) {
335 pmd_t *pmd = pmds[i];
336
337 memcpy(pmd, (pmd_t *)pgd_page_vaddr(*s_pgd),
338 sizeof(pmd_t) * PTRS_PER_PMD);
339
340 pud_populate(mm, u_pud, pmd);
341 }
342
343}
344#else
345static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
346 pgd_t *k_pgd, pmd_t *pmds[])
347{
348}
349#endif
1db491f7
FY
350/*
351 * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
352 * assumes that pgd should be in one page.
353 *
354 * But kernel with PAE paging that is not running as a Xen domain
355 * only needs to allocate 32 bytes for pgd instead of one page.
356 */
357#ifdef CONFIG_X86_PAE
358
359#include <linux/slab.h>
360
361#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
362#define PGD_ALIGN 32
363
364static struct kmem_cache *pgd_cache;
365
366static int __init pgd_cache_init(void)
367{
368 /*
369 * When PAE kernel is running as a Xen domain, it does not use
370 * shared kernel pmd. And this requires a whole page for pgd.
371 */
372 if (!SHARED_KERNEL_PMD)
373 return 0;
374
375 /*
376 * when PAE kernel is not running as a Xen domain, it uses
377 * shared kernel pmd. Shared kernel pmd does not require a whole
378 * page for pgd. We are able to just allocate a 32-byte for pgd.
379 * During boot time, we create a 32-byte slab for pgd table allocation.
380 */
381 pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
382 SLAB_PANIC, NULL);
383 if (!pgd_cache)
384 return -ENOMEM;
385
386 return 0;
387}
388core_initcall(pgd_cache_init);
389
390static inline pgd_t *_pgd_alloc(void)
391{
392 /*
393 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
394 * We allocate one page for pgd.
395 */
396 if (!SHARED_KERNEL_PMD)
ec668b98
JR
397 return (pgd_t *)__get_free_pages(PGALLOC_GFP,
398 PGD_ALLOCATION_ORDER);
1db491f7
FY
399
400 /*
401 * Now PAE kernel is not running as a Xen domain. We can allocate
402 * a 32-byte slab for pgd to save memory space.
403 */
404 return kmem_cache_alloc(pgd_cache, PGALLOC_GFP);
405}
406
407static inline void _pgd_free(pgd_t *pgd)
408{
409 if (!SHARED_KERNEL_PMD)
ec668b98 410 free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
1db491f7
FY
411 else
412 kmem_cache_free(pgd_cache, pgd);
413}
414#else
d9e9a641 415
1db491f7
FY
416static inline pgd_t *_pgd_alloc(void)
417{
d9e9a641 418 return (pgd_t *)__get_free_pages(PGALLOC_GFP, PGD_ALLOCATION_ORDER);
1db491f7
FY
419}
420
421static inline void _pgd_free(pgd_t *pgd)
422{
d9e9a641 423 free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
1db491f7
FY
424}
425#endif /* CONFIG_X86_PAE */
426
d8d5900e 427pgd_t *pgd_alloc(struct mm_struct *mm)
1ec1fe73 428{
d8d5900e 429 pgd_t *pgd;
23fe59e0 430 pmd_t *u_pmds[PREALLOCATED_USER_PMDS];
d8d5900e 431 pmd_t *pmds[PREALLOCATED_PMDS];
1ec1fe73 432
1db491f7 433 pgd = _pgd_alloc();
d8d5900e
JF
434
435 if (pgd == NULL)
436 goto out;
437
438 mm->pgd = pgd;
439
23fe59e0 440 if (preallocate_pmds(mm, pmds, PREALLOCATED_PMDS) != 0)
d8d5900e
JF
441 goto out_free_pgd;
442
23fe59e0 443 if (preallocate_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS) != 0)
d8d5900e 444 goto out_free_pmds;
1ec1fe73 445
23fe59e0
JR
446 if (paravirt_pgd_alloc(mm) != 0)
447 goto out_free_user_pmds;
448
1ec1fe73 449 /*
d8d5900e
JF
450 * Make sure that pre-populating the pmds is atomic with
451 * respect to anything walking the pgd_list, so that they
452 * never see a partially populated pgd.
1ec1fe73 453 */
a79e53d8 454 spin_lock(&pgd_lock);
4f76cd38 455
617d34d9 456 pgd_ctor(mm, pgd);
d8d5900e 457 pgd_prepopulate_pmd(mm, pgd, pmds);
23fe59e0 458 pgd_prepopulate_user_pmd(mm, pgd, u_pmds);
4f76cd38 459
a79e53d8 460 spin_unlock(&pgd_lock);
4f76cd38
JF
461
462 return pgd;
d8d5900e 463
23fe59e0
JR
464out_free_user_pmds:
465 free_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS);
d8d5900e 466out_free_pmds:
23fe59e0 467 free_pmds(mm, pmds, PREALLOCATED_PMDS);
d8d5900e 468out_free_pgd:
1db491f7 469 _pgd_free(pgd);
d8d5900e
JF
470out:
471 return NULL;
4f76cd38
JF
472}
473
474void pgd_free(struct mm_struct *mm, pgd_t *pgd)
475{
476 pgd_mop_up_pmds(mm, pgd);
477 pgd_dtor(pgd);
eba0045f 478 paravirt_pgd_free(mm, pgd);
1db491f7 479 _pgd_free(pgd);
4f76cd38 480}
ee5aa8d3 481
0f9a921c
RR
482/*
483 * Used to set accessed or dirty bits in the page table entries
484 * on other architectures. On x86, the accessed and dirty bits
485 * are tracked by hardware. However, do_wp_page calls this function
486 * to also make the pte writeable at the same time the dirty bit is
487 * set. In that case we do actually need to write the PTE.
488 */
ee5aa8d3
JF
489int ptep_set_access_flags(struct vm_area_struct *vma,
490 unsigned long address, pte_t *ptep,
491 pte_t entry, int dirty)
492{
493 int changed = !pte_same(*ptep, entry);
494
87930019 495 if (changed && dirty)
a4b345da 496 set_pte(ptep, entry);
ee5aa8d3
JF
497
498 return changed;
499}
f9fbf1a3 500
db3eb96f
AA
501#ifdef CONFIG_TRANSPARENT_HUGEPAGE
502int pmdp_set_access_flags(struct vm_area_struct *vma,
503 unsigned long address, pmd_t *pmdp,
504 pmd_t entry, int dirty)
505{
506 int changed = !pmd_same(*pmdp, entry);
507
508 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
509
510 if (changed && dirty) {
a4b345da 511 set_pmd(pmdp, entry);
5e4bf1a5
IM
512 /*
513 * We had a write-protection fault here and changed the pmd
514 * to to more permissive. No need to flush the TLB for that,
515 * #PF is architecturally guaranteed to do that and in the
516 * worst-case we'll generate a spurious fault.
517 */
db3eb96f
AA
518 }
519
520 return changed;
521}
a00cc7d9
MW
522
523int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
524 pud_t *pudp, pud_t entry, int dirty)
525{
526 int changed = !pud_same(*pudp, entry);
527
528 VM_BUG_ON(address & ~HPAGE_PUD_MASK);
529
530 if (changed && dirty) {
a4b345da 531 set_pud(pudp, entry);
a00cc7d9
MW
532 /*
533 * We had a write-protection fault here and changed the pud
534 * to to more permissive. No need to flush the TLB for that,
535 * #PF is architecturally guaranteed to do that and in the
536 * worst-case we'll generate a spurious fault.
537 */
538 }
539
540 return changed;
541}
db3eb96f
AA
542#endif
543
f9fbf1a3
JF
544int ptep_test_and_clear_young(struct vm_area_struct *vma,
545 unsigned long addr, pte_t *ptep)
546{
547 int ret = 0;
548
549 if (pte_young(*ptep))
550 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
48e23957 551 (unsigned long *) &ptep->pte);
f9fbf1a3 552
f9fbf1a3
JF
553 return ret;
554}
c20311e1 555
db3eb96f
AA
556#ifdef CONFIG_TRANSPARENT_HUGEPAGE
557int pmdp_test_and_clear_young(struct vm_area_struct *vma,
558 unsigned long addr, pmd_t *pmdp)
559{
560 int ret = 0;
561
562 if (pmd_young(*pmdp))
563 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
f2d6bfe9 564 (unsigned long *)pmdp);
db3eb96f 565
db3eb96f
AA
566 return ret;
567}
a00cc7d9
MW
568int pudp_test_and_clear_young(struct vm_area_struct *vma,
569 unsigned long addr, pud_t *pudp)
570{
571 int ret = 0;
572
573 if (pud_young(*pudp))
574 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
575 (unsigned long *)pudp);
576
577 return ret;
578}
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AA
579#endif
580
c20311e1
JF
581int ptep_clear_flush_young(struct vm_area_struct *vma,
582 unsigned long address, pte_t *ptep)
583{
b13b1d2d
SL
584 /*
585 * On x86 CPUs, clearing the accessed bit without a TLB flush
586 * doesn't cause data corruption. [ It could cause incorrect
587 * page aging and the (mistaken) reclaim of hot pages, but the
588 * chance of that should be relatively low. ]
589 *
590 * So as a performance optimization don't flush the TLB when
591 * clearing the accessed bit, it will eventually be flushed by
592 * a context switch or a VM operation anyway. [ In the rare
593 * event of it not getting flushed for a long time the delay
594 * shouldn't really matter because there's no real memory
595 * pressure for swapout to react to. ]
596 */
597 return ptep_test_and_clear_young(vma, address, ptep);
c20311e1 598}
7c7e6e07 599
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AA
600#ifdef CONFIG_TRANSPARENT_HUGEPAGE
601int pmdp_clear_flush_young(struct vm_area_struct *vma,
602 unsigned long address, pmd_t *pmdp)
603{
604 int young;
605
606 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
607
608 young = pmdp_test_and_clear_young(vma, address, pmdp);
609 if (young)
610 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
611
612 return young;
613}
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AA
614#endif
615
fd862dde
GP
616/**
617 * reserve_top_address - reserves a hole in the top of kernel address space
618 * @reserve - size of hole to reserve
619 *
620 * Can be used to relocate the fixmap area and poke a hole in the top
621 * of kernel address space to make room for a hypervisor.
622 */
623void __init reserve_top_address(unsigned long reserve)
624{
625#ifdef CONFIG_X86_32
626 BUG_ON(fixmaps_set > 0);
73159fdc
AL
627 __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;
628 printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
629 -reserve, __FIXADDR_TOP + PAGE_SIZE);
fd862dde
GP
630#endif
631}
632
7c7e6e07
JF
633int fixmaps_set;
634
aeaaa59c 635void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
7c7e6e07
JF
636{
637 unsigned long address = __fix_to_virt(idx);
638
568823f9
FT
639#ifdef CONFIG_X86_64
640 /*
641 * Ensure that the static initial page tables are covering the
642 * fixmap completely.
643 */
644 BUILD_BUG_ON(__end_of_permanent_fixed_addresses >
645 (FIXMAP_PMD_NUM * PTRS_PER_PTE));
646#endif
647
7c7e6e07
JF
648 if (idx >= __end_of_fixed_addresses) {
649 BUG();
650 return;
651 }
aeaaa59c 652 set_pte_vaddr(address, pte);
7c7e6e07
JF
653 fixmaps_set++;
654}
aeaaa59c 655
3b3809ac
MH
656void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
657 pgprot_t flags)
aeaaa59c 658{
78fb5523
DH
659 /* Sanitize 'prot' against any unsupported bits: */
660 pgprot_val(flags) &= __default_kernel_pte_mask;
661
aeaaa59c
JF
662 __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
663}
6b637835
TK
664
665#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
b8504058
KS
666#ifdef CONFIG_X86_5LEVEL
667/**
668 * p4d_set_huge - setup kernel P4D mapping
669 *
670 * No 512GB pages yet -- always return 0
671 */
672int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
673{
674 return 0;
675}
676
677/**
678 * p4d_clear_huge - clear kernel P4D mapping when it is set
679 *
680 * No 512GB pages yet -- always return 0
681 */
682int p4d_clear_huge(p4d_t *p4d)
683{
684 return 0;
685}
686#endif
687
3d3ca416
TK
688/**
689 * pud_set_huge - setup kernel PUD mapping
690 *
b73522e0
TK
691 * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
692 * function sets up a huge page only if any of the following conditions are met:
693 *
694 * - MTRRs are disabled, or
695 *
696 * - MTRRs are enabled and the range is completely covered by a single MTRR, or
697 *
698 * - MTRRs are enabled and the corresponding MTRR memory type is WB, which
699 * has no effect on the requested PAT memory type.
700 *
701 * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
702 * page mapping attempt fails.
3d3ca416
TK
703 *
704 * Returns 1 on success and 0 on failure.
705 */
6b637835
TK
706int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
707{
b73522e0 708 u8 mtrr, uniform;
6b637835 709
b73522e0
TK
710 mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform);
711 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
712 (mtrr != MTRR_TYPE_WRBACK))
6b637835
TK
713 return 0;
714
63f990c7
JR
715 /* Bail out if we are we on a populated non-leaf entry: */
716 if (pud_present(*pud) && !pud_huge(*pud))
717 return 0;
718
6b637835
TK
719 prot = pgprot_4k_2_large(prot);
720
721 set_pte((pte_t *)pud, pfn_pte(
722 (u64)addr >> PAGE_SHIFT,
723 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
724
725 return 1;
726}
727
3d3ca416
TK
728/**
729 * pmd_set_huge - setup kernel PMD mapping
730 *
b73522e0 731 * See text over pud_set_huge() above.
3d3ca416
TK
732 *
733 * Returns 1 on success and 0 on failure.
734 */
6b637835
TK
735int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
736{
b73522e0 737 u8 mtrr, uniform;
6b637835 738
b73522e0
TK
739 mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform);
740 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
741 (mtrr != MTRR_TYPE_WRBACK)) {
742 pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
743 __func__, addr, addr + PMD_SIZE);
6b637835 744 return 0;
b73522e0 745 }
6b637835 746
63f990c7
JR
747 /* Bail out if we are we on a populated non-leaf entry: */
748 if (pmd_present(*pmd) && !pmd_huge(*pmd))
749 return 0;
750
6b637835
TK
751 prot = pgprot_4k_2_large(prot);
752
753 set_pte((pte_t *)pmd, pfn_pte(
754 (u64)addr >> PAGE_SHIFT,
755 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
756
757 return 1;
758}
759
3d3ca416
TK
760/**
761 * pud_clear_huge - clear kernel PUD mapping when it is set
762 *
763 * Returns 1 on success and 0 on failure (no PUD map is found).
764 */
6b637835
TK
765int pud_clear_huge(pud_t *pud)
766{
767 if (pud_large(*pud)) {
768 pud_clear(pud);
769 return 1;
770 }
771
772 return 0;
773}
774
3d3ca416
TK
775/**
776 * pmd_clear_huge - clear kernel PMD mapping when it is set
777 *
778 * Returns 1 on success and 0 on failure (no PMD map is found).
779 */
6b637835
TK
780int pmd_clear_huge(pmd_t *pmd)
781{
782 if (pmd_large(*pmd)) {
783 pmd_clear(pmd);
784 return 1;
785 }
786
787 return 0;
788}
d9aaf32a 789
a581005b 790#ifdef CONFIG_X86_64
d9aaf32a
TK
791/**
792 * pud_free_pmd_page - Clear pud entry and free pmd page.
793 * @pud: Pointer to a PUD.
51fd23e9 794 * @addr: Virtual address associated with pud.
d9aaf32a 795 *
30da0ca9 796 * Context: The pud range has been unmapped and TLB purged.
d9aaf32a 797 * Return: 1 if clearing the entry succeeded. 0 otherwise.
30da0ca9
TK
798 *
799 * NOTE: Callers must allow a single page allocation.
d9aaf32a 800 */
51fd23e9 801int pud_free_pmd_page(pud_t *pud, unsigned long addr)
d9aaf32a 802{
30da0ca9
TK
803 pmd_t *pmd, *pmd_sv;
804 pte_t *pte;
db118675
TK
805 int i;
806
807 if (pud_none(*pud))
808 return 1;
809
810 pmd = (pmd_t *)pud_page_vaddr(*pud);
30da0ca9
TK
811 pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL);
812 if (!pmd_sv)
813 return 0;
db118675 814
30da0ca9
TK
815 for (i = 0; i < PTRS_PER_PMD; i++) {
816 pmd_sv[i] = pmd[i];
817 if (!pmd_none(pmd[i]))
818 pmd_clear(&pmd[i]);
819 }
db118675
TK
820
821 pud_clear(pud);
30da0ca9
TK
822
823 /* INVLPG to clear all paging-structure caches */
824 flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
825
826 for (i = 0; i < PTRS_PER_PMD; i++) {
827 if (!pmd_none(pmd_sv[i])) {
828 pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]);
829 free_page((unsigned long)pte);
830 }
831 }
832
833 free_page((unsigned long)pmd_sv);
db118675
TK
834 free_page((unsigned long)pmd);
835
836 return 1;
d9aaf32a
TK
837}
838
839/**
840 * pmd_free_pte_page - Clear pmd entry and free pte page.
841 * @pmd: Pointer to a PMD.
51fd23e9 842 * @addr: Virtual address associated with pmd.
d9aaf32a 843 *
30da0ca9 844 * Context: The pmd range has been unmapped and TLB purged.
d9aaf32a
TK
845 * Return: 1 if clearing the entry succeeded. 0 otherwise.
846 */
51fd23e9 847int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
d9aaf32a 848{
db118675
TK
849 pte_t *pte;
850
851 if (pmd_none(*pmd))
852 return 1;
853
854 pte = (pte_t *)pmd_page_vaddr(*pmd);
855 pmd_clear(pmd);
30da0ca9
TK
856
857 /* INVLPG to clear all paging-structure caches */
858 flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
859
db118675
TK
860 free_page((unsigned long)pte);
861
862 return 1;
d9aaf32a 863}
a581005b
TK
864
865#else /* !CONFIG_X86_64 */
866
51fd23e9 867int pud_free_pmd_page(pud_t *pud, unsigned long addr)
a581005b
TK
868{
869 return pud_none(*pud);
870}
871
872/*
873 * Disable free page handling on x86-PAE. This assures that ioremap()
874 * does not update sync'd pmd entries. See vmalloc_sync_one().
875 */
51fd23e9 876int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
a581005b
TK
877{
878 return pmd_none(*pmd);
879}
880
881#endif /* CONFIG_X86_64 */
6b637835 882#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */