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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
4f76cd38 | 2 | #include <linux/mm.h> |
5a0e3ad6 | 3 | #include <linux/gfp.h> |
e3e28812 | 4 | #include <linux/hugetlb.h> |
4f76cd38 JF |
5 | #include <asm/pgalloc.h> |
6 | #include <asm/tlb.h> | |
a1d5a869 | 7 | #include <asm/fixmap.h> |
6b637835 | 8 | #include <asm/mtrr.h> |
4f76cd38 | 9 | |
94d49eb3 KS |
10 | #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK |
11 | phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1; | |
12 | EXPORT_SYMBOL(physical_mask); | |
13 | #endif | |
14 | ||
14315592 | 15 | #ifdef CONFIG_HIGHPTE |
5fba4af4 | 16 | #define PGTABLE_HIGHMEM __GFP_HIGHMEM |
14315592 | 17 | #else |
5fba4af4 | 18 | #define PGTABLE_HIGHMEM 0 |
14315592 IC |
19 | #endif |
20 | ||
69de6c1a TG |
21 | #ifndef CONFIG_PARAVIRT |
22 | static inline | |
23 | void paravirt_tlb_remove_table(struct mmu_gather *tlb, void *table) | |
24 | { | |
25 | tlb_remove_page(tlb, table); | |
26 | } | |
27 | #endif | |
28 | ||
5fba4af4 | 29 | gfp_t __userpte_alloc_gfp = GFP_PGTABLE_USER | PGTABLE_HIGHMEM; |
4f76cd38 | 30 | |
4cf58924 | 31 | pgtable_t pte_alloc_one(struct mm_struct *mm) |
4f76cd38 | 32 | { |
5fba4af4 | 33 | return __pte_alloc_one(mm, __userpte_alloc_gfp); |
4f76cd38 JF |
34 | } |
35 | ||
14315592 IC |
36 | static int __init setup_userpte(char *arg) |
37 | { | |
38 | if (!arg) | |
39 | return -EINVAL; | |
40 | ||
41 | /* | |
42 | * "userpte=nohigh" disables allocation of user pagetables in | |
43 | * high memory. | |
44 | */ | |
45 | if (strcmp(arg, "nohigh") == 0) | |
46 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
47 | else | |
48 | return -EINVAL; | |
49 | return 0; | |
50 | } | |
51 | early_param("userpte", setup_userpte); | |
52 | ||
9e1b32ca | 53 | void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte) |
397f687a | 54 | { |
b4ed71f5 | 55 | pgtable_pte_page_dtor(pte); |
6944a9c8 | 56 | paravirt_release_pte(page_to_pfn(pte)); |
48a8b97c | 57 | paravirt_tlb_remove_table(tlb, pte); |
397f687a JF |
58 | } |
59 | ||
98233368 | 60 | #if CONFIG_PGTABLE_LEVELS > 2 |
9e1b32ca | 61 | void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) |
170fdff7 | 62 | { |
c283610e | 63 | struct page *page = virt_to_page(pmd); |
6944a9c8 | 64 | paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT); |
1de14c3c DH |
65 | /* |
66 | * NOTE! For PAE, any changes to the top page-directory-pointer-table | |
67 | * entries need a full cr3 reload to flush. | |
68 | */ | |
69 | #ifdef CONFIG_X86_PAE | |
70 | tlb->need_flush_all = 1; | |
71 | #endif | |
c283610e | 72 | pgtable_pmd_page_dtor(page); |
48a8b97c | 73 | paravirt_tlb_remove_table(tlb, page); |
170fdff7 | 74 | } |
5a5f8f42 | 75 | |
98233368 | 76 | #if CONFIG_PGTABLE_LEVELS > 3 |
9e1b32ca | 77 | void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud) |
5a5f8f42 | 78 | { |
2761fa09 | 79 | paravirt_release_pud(__pa(pud) >> PAGE_SHIFT); |
48a8b97c | 80 | paravirt_tlb_remove_table(tlb, virt_to_page(pud)); |
5a5f8f42 | 81 | } |
b8504058 KS |
82 | |
83 | #if CONFIG_PGTABLE_LEVELS > 4 | |
84 | void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d) | |
85 | { | |
86 | paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT); | |
48a8b97c | 87 | paravirt_tlb_remove_table(tlb, virt_to_page(p4d)); |
b8504058 KS |
88 | } |
89 | #endif /* CONFIG_PGTABLE_LEVELS > 4 */ | |
98233368 KS |
90 | #endif /* CONFIG_PGTABLE_LEVELS > 3 */ |
91 | #endif /* CONFIG_PGTABLE_LEVELS > 2 */ | |
170fdff7 | 92 | |
4f76cd38 JF |
93 | static inline void pgd_list_add(pgd_t *pgd) |
94 | { | |
95 | struct page *page = virt_to_page(pgd); | |
4f76cd38 | 96 | |
4f76cd38 | 97 | list_add(&page->lru, &pgd_list); |
4f76cd38 JF |
98 | } |
99 | ||
100 | static inline void pgd_list_del(pgd_t *pgd) | |
101 | { | |
102 | struct page *page = virt_to_page(pgd); | |
4f76cd38 | 103 | |
4f76cd38 | 104 | list_del(&page->lru); |
4f76cd38 JF |
105 | } |
106 | ||
4f76cd38 | 107 | #define UNSHARED_PTRS_PER_PGD \ |
68db065c | 108 | (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD) |
184d47f0 KC |
109 | #define MAX_UNSHARED_PTRS_PER_PGD \ |
110 | max_t(size_t, KERNEL_PGD_BOUNDARY, PTRS_PER_PGD) | |
4f76cd38 | 111 | |
617d34d9 JF |
112 | |
113 | static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm) | |
114 | { | |
a052f0a5 | 115 | virt_to_page(pgd)->pt_mm = mm; |
617d34d9 JF |
116 | } |
117 | ||
118 | struct mm_struct *pgd_page_get_mm(struct page *page) | |
119 | { | |
a052f0a5 | 120 | return page->pt_mm; |
617d34d9 JF |
121 | } |
122 | ||
123 | static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd) | |
4f76cd38 | 124 | { |
4f76cd38 JF |
125 | /* If the pgd points to a shared pagetable level (either the |
126 | ptes in non-PAE, or shared PMD in PAE), then just copy the | |
127 | references from swapper_pg_dir. */ | |
98233368 KS |
128 | if (CONFIG_PGTABLE_LEVELS == 2 || |
129 | (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) || | |
b8504058 | 130 | CONFIG_PGTABLE_LEVELS >= 4) { |
68db065c JF |
131 | clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY, |
132 | swapper_pg_dir + KERNEL_PGD_BOUNDARY, | |
4f76cd38 | 133 | KERNEL_PGD_PTRS); |
4f76cd38 JF |
134 | } |
135 | ||
136 | /* list required to sync kernel mapping updates */ | |
617d34d9 JF |
137 | if (!SHARED_KERNEL_PMD) { |
138 | pgd_set_mm(pgd, mm); | |
4f76cd38 | 139 | pgd_list_add(pgd); |
617d34d9 | 140 | } |
4f76cd38 JF |
141 | } |
142 | ||
17b74627 | 143 | static void pgd_dtor(pgd_t *pgd) |
4f76cd38 | 144 | { |
4f76cd38 JF |
145 | if (SHARED_KERNEL_PMD) |
146 | return; | |
147 | ||
a79e53d8 | 148 | spin_lock(&pgd_lock); |
4f76cd38 | 149 | pgd_list_del(pgd); |
a79e53d8 | 150 | spin_unlock(&pgd_lock); |
4f76cd38 JF |
151 | } |
152 | ||
85958b46 JF |
153 | /* |
154 | * List of all pgd's needed for non-PAE so it can invalidate entries | |
155 | * in both cached and uncached pgd's; not needed for PAE since the | |
156 | * kernel pmd is shared. If PAE were not to share the pmd a similar | |
157 | * tactic would be needed. This is essentially codepath-based locking | |
158 | * against pageattr.c; it is the unique case in which a valid change | |
159 | * of kernel pagetables can't be lazily synchronized by vmalloc faults. | |
160 | * vmalloc faults work because attached pagetables are never freed. | |
6d49e352 | 161 | * -- nyc |
85958b46 JF |
162 | */ |
163 | ||
4f76cd38 | 164 | #ifdef CONFIG_X86_PAE |
d8d5900e JF |
165 | /* |
166 | * In PAE mode, we need to do a cr3 reload (=tlb flush) when | |
167 | * updating the top-level pagetable entries to guarantee the | |
168 | * processor notices the update. Since this is expensive, and | |
169 | * all 4 top-level entries are used almost immediately in a | |
170 | * new process's life, we just pre-populate them here. | |
171 | * | |
172 | * Also, if we're in a paravirt environment where the kernel pmd is | |
173 | * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate | |
174 | * and initialize the kernel pmds here. | |
175 | */ | |
176 | #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD | |
184d47f0 | 177 | #define MAX_PREALLOCATED_PMDS MAX_UNSHARED_PTRS_PER_PGD |
d8d5900e | 178 | |
f59dbe9c JR |
179 | /* |
180 | * We allocate separate PMDs for the kernel part of the user page-table | |
181 | * when PTI is enabled. We need them to map the per-process LDT into the | |
182 | * user-space page-table. | |
183 | */ | |
28e3ace7 | 184 | #define PREALLOCATED_USER_PMDS (boot_cpu_has(X86_FEATURE_PTI) ? \ |
f59dbe9c | 185 | KERNEL_PGD_PTRS : 0) |
184d47f0 | 186 | #define MAX_PREALLOCATED_USER_PMDS KERNEL_PGD_PTRS |
f59dbe9c | 187 | |
d8d5900e JF |
188 | void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) |
189 | { | |
190 | paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT); | |
191 | ||
192 | /* Note: almost everything apart from _PAGE_PRESENT is | |
193 | reserved at the pmd (PDPT) level. */ | |
194 | set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT)); | |
195 | ||
196 | /* | |
197 | * According to Intel App note "TLBs, Paging-Structure Caches, | |
198 | * and Their Invalidation", April 2007, document 317080-001, | |
199 | * section 8.1: in PAE mode we explicitly have to flush the | |
200 | * TLB via cr3 if the top-level pgd is changed... | |
201 | */ | |
4981d01e | 202 | flush_tlb_mm(mm); |
d8d5900e JF |
203 | } |
204 | #else /* !CONFIG_X86_PAE */ | |
205 | ||
206 | /* No need to prepopulate any pagetable entries in non-PAE modes. */ | |
207 | #define PREALLOCATED_PMDS 0 | |
184d47f0 | 208 | #define MAX_PREALLOCATED_PMDS 0 |
f59dbe9c | 209 | #define PREALLOCATED_USER_PMDS 0 |
184d47f0 | 210 | #define MAX_PREALLOCATED_USER_PMDS 0 |
d8d5900e JF |
211 | #endif /* CONFIG_X86_PAE */ |
212 | ||
f59dbe9c | 213 | static void free_pmds(struct mm_struct *mm, pmd_t *pmds[], int count) |
d8d5900e JF |
214 | { |
215 | int i; | |
216 | ||
f59dbe9c | 217 | for (i = 0; i < count; i++) |
09ef4939 KS |
218 | if (pmds[i]) { |
219 | pgtable_pmd_page_dtor(virt_to_page(pmds[i])); | |
d8d5900e | 220 | free_page((unsigned long)pmds[i]); |
dc6c9a35 | 221 | mm_dec_nr_pmds(mm); |
09ef4939 | 222 | } |
d8d5900e JF |
223 | } |
224 | ||
f59dbe9c | 225 | static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[], int count) |
d8d5900e JF |
226 | { |
227 | int i; | |
228 | bool failed = false; | |
5fba4af4 | 229 | gfp_t gfp = GFP_PGTABLE_USER; |
3e79ec7d VD |
230 | |
231 | if (mm == &init_mm) | |
232 | gfp &= ~__GFP_ACCOUNT; | |
d8d5900e | 233 | |
f59dbe9c | 234 | for (i = 0; i < count; i++) { |
3e79ec7d | 235 | pmd_t *pmd = (pmd_t *)__get_free_page(gfp); |
09ef4939 | 236 | if (!pmd) |
d8d5900e | 237 | failed = true; |
09ef4939 | 238 | if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) { |
2a46eed5 | 239 | free_page((unsigned long)pmd); |
09ef4939 KS |
240 | pmd = NULL; |
241 | failed = true; | |
242 | } | |
dc6c9a35 KS |
243 | if (pmd) |
244 | mm_inc_nr_pmds(mm); | |
d8d5900e JF |
245 | pmds[i] = pmd; |
246 | } | |
247 | ||
248 | if (failed) { | |
f59dbe9c | 249 | free_pmds(mm, pmds, count); |
d8d5900e JF |
250 | return -ENOMEM; |
251 | } | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
4f76cd38 JF |
256 | /* |
257 | * Mop up any pmd pages which may still be attached to the pgd. | |
258 | * Normally they will be freed by munmap/exit_mmap, but any pmd we | |
259 | * preallocate which never got a corresponding vma will need to be | |
260 | * freed manually. | |
261 | */ | |
f59dbe9c JR |
262 | static void mop_up_one_pmd(struct mm_struct *mm, pgd_t *pgdp) |
263 | { | |
264 | pgd_t pgd = *pgdp; | |
265 | ||
266 | if (pgd_val(pgd) != 0) { | |
267 | pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd); | |
268 | ||
9bc4f28a | 269 | pgd_clear(pgdp); |
f59dbe9c JR |
270 | |
271 | paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT); | |
272 | pmd_free(mm, pmd); | |
273 | mm_dec_nr_pmds(mm); | |
274 | } | |
275 | } | |
276 | ||
4f76cd38 JF |
277 | static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp) |
278 | { | |
279 | int i; | |
280 | ||
f59dbe9c JR |
281 | for (i = 0; i < PREALLOCATED_PMDS; i++) |
282 | mop_up_one_pmd(mm, &pgdp[i]); | |
4f76cd38 | 283 | |
f59dbe9c | 284 | #ifdef CONFIG_PAGE_TABLE_ISOLATION |
4f76cd38 | 285 | |
28e3ace7 | 286 | if (!boot_cpu_has(X86_FEATURE_PTI)) |
f59dbe9c | 287 | return; |
4f76cd38 | 288 | |
f59dbe9c JR |
289 | pgdp = kernel_to_user_pgdp(pgdp); |
290 | ||
291 | for (i = 0; i < PREALLOCATED_USER_PMDS; i++) | |
292 | mop_up_one_pmd(mm, &pgdp[i + KERNEL_PGD_BOUNDARY]); | |
293 | #endif | |
4f76cd38 JF |
294 | } |
295 | ||
d8d5900e | 296 | static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[]) |
4f76cd38 | 297 | { |
e0c4f675 | 298 | p4d_t *p4d; |
4f76cd38 | 299 | pud_t *pud; |
4f76cd38 JF |
300 | int i; |
301 | ||
cf3e5050 JF |
302 | if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */ |
303 | return; | |
304 | ||
e0c4f675 KS |
305 | p4d = p4d_offset(pgd, 0); |
306 | pud = pud_offset(p4d, 0); | |
4f76cd38 | 307 | |
73b44ff4 | 308 | for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) { |
d8d5900e | 309 | pmd_t *pmd = pmds[i]; |
4f76cd38 | 310 | |
68db065c | 311 | if (i >= KERNEL_PGD_BOUNDARY) |
4f76cd38 JF |
312 | memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]), |
313 | sizeof(pmd_t) * PTRS_PER_PMD); | |
314 | ||
315 | pud_populate(mm, pud, pmd); | |
316 | } | |
4f76cd38 | 317 | } |
1ec1fe73 | 318 | |
f59dbe9c JR |
319 | #ifdef CONFIG_PAGE_TABLE_ISOLATION |
320 | static void pgd_prepopulate_user_pmd(struct mm_struct *mm, | |
321 | pgd_t *k_pgd, pmd_t *pmds[]) | |
322 | { | |
323 | pgd_t *s_pgd = kernel_to_user_pgdp(swapper_pg_dir); | |
324 | pgd_t *u_pgd = kernel_to_user_pgdp(k_pgd); | |
325 | p4d_t *u_p4d; | |
326 | pud_t *u_pud; | |
327 | int i; | |
328 | ||
329 | u_p4d = p4d_offset(u_pgd, 0); | |
330 | u_pud = pud_offset(u_p4d, 0); | |
331 | ||
332 | s_pgd += KERNEL_PGD_BOUNDARY; | |
333 | u_pud += KERNEL_PGD_BOUNDARY; | |
334 | ||
335 | for (i = 0; i < PREALLOCATED_USER_PMDS; i++, u_pud++, s_pgd++) { | |
336 | pmd_t *pmd = pmds[i]; | |
337 | ||
338 | memcpy(pmd, (pmd_t *)pgd_page_vaddr(*s_pgd), | |
339 | sizeof(pmd_t) * PTRS_PER_PMD); | |
340 | ||
341 | pud_populate(mm, u_pud, pmd); | |
342 | } | |
343 | ||
344 | } | |
345 | #else | |
346 | static void pgd_prepopulate_user_pmd(struct mm_struct *mm, | |
347 | pgd_t *k_pgd, pmd_t *pmds[]) | |
348 | { | |
349 | } | |
350 | #endif | |
1db491f7 FY |
351 | /* |
352 | * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also | |
353 | * assumes that pgd should be in one page. | |
354 | * | |
355 | * But kernel with PAE paging that is not running as a Xen domain | |
356 | * only needs to allocate 32 bytes for pgd instead of one page. | |
357 | */ | |
358 | #ifdef CONFIG_X86_PAE | |
359 | ||
360 | #include <linux/slab.h> | |
361 | ||
362 | #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) | |
363 | #define PGD_ALIGN 32 | |
364 | ||
365 | static struct kmem_cache *pgd_cache; | |
366 | ||
782de70c | 367 | void __init pgtable_cache_init(void) |
1db491f7 FY |
368 | { |
369 | /* | |
370 | * When PAE kernel is running as a Xen domain, it does not use | |
371 | * shared kernel pmd. And this requires a whole page for pgd. | |
372 | */ | |
373 | if (!SHARED_KERNEL_PMD) | |
caa84136 | 374 | return; |
1db491f7 FY |
375 | |
376 | /* | |
377 | * when PAE kernel is not running as a Xen domain, it uses | |
378 | * shared kernel pmd. Shared kernel pmd does not require a whole | |
379 | * page for pgd. We are able to just allocate a 32-byte for pgd. | |
380 | * During boot time, we create a 32-byte slab for pgd table allocation. | |
381 | */ | |
382 | pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN, | |
383 | SLAB_PANIC, NULL); | |
1db491f7 | 384 | } |
1db491f7 FY |
385 | |
386 | static inline pgd_t *_pgd_alloc(void) | |
387 | { | |
388 | /* | |
389 | * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain. | |
390 | * We allocate one page for pgd. | |
391 | */ | |
392 | if (!SHARED_KERNEL_PMD) | |
5fba4af4 | 393 | return (pgd_t *)__get_free_pages(GFP_PGTABLE_USER, |
e3238faf | 394 | PGD_ALLOCATION_ORDER); |
1db491f7 FY |
395 | |
396 | /* | |
397 | * Now PAE kernel is not running as a Xen domain. We can allocate | |
398 | * a 32-byte slab for pgd to save memory space. | |
399 | */ | |
5fba4af4 | 400 | return kmem_cache_alloc(pgd_cache, GFP_PGTABLE_USER); |
1db491f7 FY |
401 | } |
402 | ||
403 | static inline void _pgd_free(pgd_t *pgd) | |
404 | { | |
405 | if (!SHARED_KERNEL_PMD) | |
e3238faf | 406 | free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER); |
1db491f7 FY |
407 | else |
408 | kmem_cache_free(pgd_cache, pgd); | |
409 | } | |
410 | #else | |
d9e9a641 | 411 | |
1db491f7 FY |
412 | static inline pgd_t *_pgd_alloc(void) |
413 | { | |
5fba4af4 MR |
414 | return (pgd_t *)__get_free_pages(GFP_PGTABLE_USER, |
415 | PGD_ALLOCATION_ORDER); | |
1db491f7 FY |
416 | } |
417 | ||
418 | static inline void _pgd_free(pgd_t *pgd) | |
419 | { | |
d9e9a641 | 420 | free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER); |
1db491f7 FY |
421 | } |
422 | #endif /* CONFIG_X86_PAE */ | |
423 | ||
d8d5900e | 424 | pgd_t *pgd_alloc(struct mm_struct *mm) |
1ec1fe73 | 425 | { |
d8d5900e | 426 | pgd_t *pgd; |
184d47f0 KC |
427 | pmd_t *u_pmds[MAX_PREALLOCATED_USER_PMDS]; |
428 | pmd_t *pmds[MAX_PREALLOCATED_PMDS]; | |
1ec1fe73 | 429 | |
1db491f7 | 430 | pgd = _pgd_alloc(); |
d8d5900e JF |
431 | |
432 | if (pgd == NULL) | |
433 | goto out; | |
434 | ||
435 | mm->pgd = pgd; | |
436 | ||
f59dbe9c | 437 | if (preallocate_pmds(mm, pmds, PREALLOCATED_PMDS) != 0) |
d8d5900e JF |
438 | goto out_free_pgd; |
439 | ||
f59dbe9c | 440 | if (preallocate_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS) != 0) |
d8d5900e | 441 | goto out_free_pmds; |
1ec1fe73 | 442 | |
f59dbe9c JR |
443 | if (paravirt_pgd_alloc(mm) != 0) |
444 | goto out_free_user_pmds; | |
445 | ||
1ec1fe73 | 446 | /* |
d8d5900e JF |
447 | * Make sure that pre-populating the pmds is atomic with |
448 | * respect to anything walking the pgd_list, so that they | |
449 | * never see a partially populated pgd. | |
1ec1fe73 | 450 | */ |
a79e53d8 | 451 | spin_lock(&pgd_lock); |
4f76cd38 | 452 | |
617d34d9 | 453 | pgd_ctor(mm, pgd); |
d8d5900e | 454 | pgd_prepopulate_pmd(mm, pgd, pmds); |
f59dbe9c | 455 | pgd_prepopulate_user_pmd(mm, pgd, u_pmds); |
4f76cd38 | 456 | |
a79e53d8 | 457 | spin_unlock(&pgd_lock); |
4f76cd38 JF |
458 | |
459 | return pgd; | |
d8d5900e | 460 | |
f59dbe9c JR |
461 | out_free_user_pmds: |
462 | free_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS); | |
d8d5900e | 463 | out_free_pmds: |
f59dbe9c | 464 | free_pmds(mm, pmds, PREALLOCATED_PMDS); |
d8d5900e | 465 | out_free_pgd: |
1db491f7 | 466 | _pgd_free(pgd); |
d8d5900e JF |
467 | out: |
468 | return NULL; | |
4f76cd38 JF |
469 | } |
470 | ||
471 | void pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
472 | { | |
473 | pgd_mop_up_pmds(mm, pgd); | |
474 | pgd_dtor(pgd); | |
eba0045f | 475 | paravirt_pgd_free(mm, pgd); |
1db491f7 | 476 | _pgd_free(pgd); |
4f76cd38 | 477 | } |
ee5aa8d3 | 478 | |
0f9a921c RR |
479 | /* |
480 | * Used to set accessed or dirty bits in the page table entries | |
481 | * on other architectures. On x86, the accessed and dirty bits | |
482 | * are tracked by hardware. However, do_wp_page calls this function | |
483 | * to also make the pte writeable at the same time the dirty bit is | |
484 | * set. In that case we do actually need to write the PTE. | |
485 | */ | |
ee5aa8d3 JF |
486 | int ptep_set_access_flags(struct vm_area_struct *vma, |
487 | unsigned long address, pte_t *ptep, | |
488 | pte_t entry, int dirty) | |
489 | { | |
490 | int changed = !pte_same(*ptep, entry); | |
491 | ||
87930019 | 492 | if (changed && dirty) |
9bc4f28a | 493 | set_pte(ptep, entry); |
ee5aa8d3 JF |
494 | |
495 | return changed; | |
496 | } | |
f9fbf1a3 | 497 | |
db3eb96f AA |
498 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
499 | int pmdp_set_access_flags(struct vm_area_struct *vma, | |
500 | unsigned long address, pmd_t *pmdp, | |
501 | pmd_t entry, int dirty) | |
502 | { | |
503 | int changed = !pmd_same(*pmdp, entry); | |
504 | ||
505 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
506 | ||
507 | if (changed && dirty) { | |
9bc4f28a | 508 | set_pmd(pmdp, entry); |
5e4bf1a5 IM |
509 | /* |
510 | * We had a write-protection fault here and changed the pmd | |
511 | * to to more permissive. No need to flush the TLB for that, | |
512 | * #PF is architecturally guaranteed to do that and in the | |
513 | * worst-case we'll generate a spurious fault. | |
514 | */ | |
db3eb96f AA |
515 | } |
516 | ||
517 | return changed; | |
518 | } | |
a00cc7d9 MW |
519 | |
520 | int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address, | |
521 | pud_t *pudp, pud_t entry, int dirty) | |
522 | { | |
523 | int changed = !pud_same(*pudp, entry); | |
524 | ||
525 | VM_BUG_ON(address & ~HPAGE_PUD_MASK); | |
526 | ||
527 | if (changed && dirty) { | |
9bc4f28a | 528 | set_pud(pudp, entry); |
a00cc7d9 MW |
529 | /* |
530 | * We had a write-protection fault here and changed the pud | |
531 | * to to more permissive. No need to flush the TLB for that, | |
532 | * #PF is architecturally guaranteed to do that and in the | |
533 | * worst-case we'll generate a spurious fault. | |
534 | */ | |
535 | } | |
536 | ||
537 | return changed; | |
538 | } | |
db3eb96f AA |
539 | #endif |
540 | ||
f9fbf1a3 JF |
541 | int ptep_test_and_clear_young(struct vm_area_struct *vma, |
542 | unsigned long addr, pte_t *ptep) | |
543 | { | |
544 | int ret = 0; | |
545 | ||
546 | if (pte_young(*ptep)) | |
547 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
48e23957 | 548 | (unsigned long *) &ptep->pte); |
f9fbf1a3 | 549 | |
f9fbf1a3 JF |
550 | return ret; |
551 | } | |
c20311e1 | 552 | |
db3eb96f AA |
553 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
554 | int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
555 | unsigned long addr, pmd_t *pmdp) | |
556 | { | |
557 | int ret = 0; | |
558 | ||
559 | if (pmd_young(*pmdp)) | |
560 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
f2d6bfe9 | 561 | (unsigned long *)pmdp); |
db3eb96f | 562 | |
db3eb96f AA |
563 | return ret; |
564 | } | |
a00cc7d9 MW |
565 | int pudp_test_and_clear_young(struct vm_area_struct *vma, |
566 | unsigned long addr, pud_t *pudp) | |
567 | { | |
568 | int ret = 0; | |
569 | ||
570 | if (pud_young(*pudp)) | |
571 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
572 | (unsigned long *)pudp); | |
573 | ||
574 | return ret; | |
575 | } | |
db3eb96f AA |
576 | #endif |
577 | ||
c20311e1 JF |
578 | int ptep_clear_flush_young(struct vm_area_struct *vma, |
579 | unsigned long address, pte_t *ptep) | |
580 | { | |
b13b1d2d SL |
581 | /* |
582 | * On x86 CPUs, clearing the accessed bit without a TLB flush | |
583 | * doesn't cause data corruption. [ It could cause incorrect | |
584 | * page aging and the (mistaken) reclaim of hot pages, but the | |
585 | * chance of that should be relatively low. ] | |
586 | * | |
587 | * So as a performance optimization don't flush the TLB when | |
588 | * clearing the accessed bit, it will eventually be flushed by | |
589 | * a context switch or a VM operation anyway. [ In the rare | |
590 | * event of it not getting flushed for a long time the delay | |
591 | * shouldn't really matter because there's no real memory | |
592 | * pressure for swapout to react to. ] | |
593 | */ | |
594 | return ptep_test_and_clear_young(vma, address, ptep); | |
c20311e1 | 595 | } |
7c7e6e07 | 596 | |
db3eb96f AA |
597 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
598 | int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
599 | unsigned long address, pmd_t *pmdp) | |
600 | { | |
601 | int young; | |
602 | ||
603 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
604 | ||
605 | young = pmdp_test_and_clear_young(vma, address, pmdp); | |
606 | if (young) | |
607 | flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE); | |
608 | ||
609 | return young; | |
610 | } | |
db3eb96f AA |
611 | #endif |
612 | ||
fd862dde GP |
613 | /** |
614 | * reserve_top_address - reserves a hole in the top of kernel address space | |
615 | * @reserve - size of hole to reserve | |
616 | * | |
617 | * Can be used to relocate the fixmap area and poke a hole in the top | |
618 | * of kernel address space to make room for a hypervisor. | |
619 | */ | |
620 | void __init reserve_top_address(unsigned long reserve) | |
621 | { | |
622 | #ifdef CONFIG_X86_32 | |
623 | BUG_ON(fixmaps_set > 0); | |
73159fdc AL |
624 | __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE; |
625 | printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n", | |
626 | -reserve, __FIXADDR_TOP + PAGE_SIZE); | |
fd862dde GP |
627 | #endif |
628 | } | |
629 | ||
7c7e6e07 JF |
630 | int fixmaps_set; |
631 | ||
aeaaa59c | 632 | void __native_set_fixmap(enum fixed_addresses idx, pte_t pte) |
7c7e6e07 JF |
633 | { |
634 | unsigned long address = __fix_to_virt(idx); | |
635 | ||
05ab1d8a FT |
636 | #ifdef CONFIG_X86_64 |
637 | /* | |
638 | * Ensure that the static initial page tables are covering the | |
639 | * fixmap completely. | |
640 | */ | |
641 | BUILD_BUG_ON(__end_of_permanent_fixed_addresses > | |
642 | (FIXMAP_PMD_NUM * PTRS_PER_PTE)); | |
643 | #endif | |
644 | ||
7c7e6e07 JF |
645 | if (idx >= __end_of_fixed_addresses) { |
646 | BUG(); | |
647 | return; | |
648 | } | |
aeaaa59c | 649 | set_pte_vaddr(address, pte); |
7c7e6e07 JF |
650 | fixmaps_set++; |
651 | } | |
aeaaa59c | 652 | |
f53e2cd0 ST |
653 | void native_set_fixmap(unsigned /* enum fixed_addresses */ idx, |
654 | phys_addr_t phys, pgprot_t flags) | |
aeaaa59c | 655 | { |
fb43d6cb DH |
656 | /* Sanitize 'prot' against any unsupported bits: */ |
657 | pgprot_val(flags) &= __default_kernel_pte_mask; | |
658 | ||
aeaaa59c JF |
659 | __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags)); |
660 | } | |
6b637835 TK |
661 | |
662 | #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP | |
b8504058 KS |
663 | #ifdef CONFIG_X86_5LEVEL |
664 | /** | |
665 | * p4d_set_huge - setup kernel P4D mapping | |
666 | * | |
667 | * No 512GB pages yet -- always return 0 | |
668 | */ | |
669 | int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) | |
670 | { | |
671 | return 0; | |
672 | } | |
673 | ||
674 | /** | |
675 | * p4d_clear_huge - clear kernel P4D mapping when it is set | |
676 | * | |
677 | * No 512GB pages yet -- always return 0 | |
678 | */ | |
679 | int p4d_clear_huge(p4d_t *p4d) | |
680 | { | |
681 | return 0; | |
682 | } | |
683 | #endif | |
684 | ||
3d3ca416 TK |
685 | /** |
686 | * pud_set_huge - setup kernel PUD mapping | |
687 | * | |
b73522e0 TK |
688 | * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this |
689 | * function sets up a huge page only if any of the following conditions are met: | |
690 | * | |
691 | * - MTRRs are disabled, or | |
692 | * | |
693 | * - MTRRs are enabled and the range is completely covered by a single MTRR, or | |
694 | * | |
695 | * - MTRRs are enabled and the corresponding MTRR memory type is WB, which | |
696 | * has no effect on the requested PAT memory type. | |
697 | * | |
698 | * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger | |
699 | * page mapping attempt fails. | |
3d3ca416 TK |
700 | * |
701 | * Returns 1 on success and 0 on failure. | |
702 | */ | |
6b637835 TK |
703 | int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) |
704 | { | |
b73522e0 | 705 | u8 mtrr, uniform; |
6b637835 | 706 | |
b73522e0 TK |
707 | mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform); |
708 | if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) && | |
709 | (mtrr != MTRR_TYPE_WRBACK)) | |
6b637835 TK |
710 | return 0; |
711 | ||
e3e28812 JR |
712 | /* Bail out if we are we on a populated non-leaf entry: */ |
713 | if (pud_present(*pud) && !pud_huge(*pud)) | |
714 | return 0; | |
715 | ||
6b637835 TK |
716 | set_pte((pte_t *)pud, pfn_pte( |
717 | (u64)addr >> PAGE_SHIFT, | |
d0735693 | 718 | __pgprot(protval_4k_2_large(pgprot_val(prot)) | _PAGE_PSE))); |
6b637835 TK |
719 | |
720 | return 1; | |
721 | } | |
722 | ||
3d3ca416 TK |
723 | /** |
724 | * pmd_set_huge - setup kernel PMD mapping | |
725 | * | |
b73522e0 | 726 | * See text over pud_set_huge() above. |
3d3ca416 TK |
727 | * |
728 | * Returns 1 on success and 0 on failure. | |
729 | */ | |
6b637835 TK |
730 | int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) |
731 | { | |
b73522e0 | 732 | u8 mtrr, uniform; |
6b637835 | 733 | |
b73522e0 TK |
734 | mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform); |
735 | if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) && | |
736 | (mtrr != MTRR_TYPE_WRBACK)) { | |
737 | pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n", | |
738 | __func__, addr, addr + PMD_SIZE); | |
6b637835 | 739 | return 0; |
b73522e0 | 740 | } |
6b637835 | 741 | |
e3e28812 JR |
742 | /* Bail out if we are we on a populated non-leaf entry: */ |
743 | if (pmd_present(*pmd) && !pmd_huge(*pmd)) | |
744 | return 0; | |
745 | ||
6b637835 TK |
746 | set_pte((pte_t *)pmd, pfn_pte( |
747 | (u64)addr >> PAGE_SHIFT, | |
d0735693 | 748 | __pgprot(protval_4k_2_large(pgprot_val(prot)) | _PAGE_PSE))); |
6b637835 TK |
749 | |
750 | return 1; | |
751 | } | |
752 | ||
d8a71905 JM |
753 | /** |
754 | * pud_clear_huge - clear kernel PUD mapping when it is set | |
755 | * | |
756 | * Returns 1 on success and 0 on failure (no PUD map is found). | |
757 | */ | |
758 | int pud_clear_huge(pud_t *pud) | |
759 | { | |
760 | if (pud_large(*pud)) { | |
761 | pud_clear(pud); | |
762 | return 1; | |
763 | } | |
764 | ||
765 | return 0; | |
766 | } | |
767 | ||
3d3ca416 TK |
768 | /** |
769 | * pmd_clear_huge - clear kernel PMD mapping when it is set | |
770 | * | |
771 | * Returns 1 on success and 0 on failure (no PMD map is found). | |
772 | */ | |
6b637835 TK |
773 | int pmd_clear_huge(pmd_t *pmd) |
774 | { | |
775 | if (pmd_large(*pmd)) { | |
776 | pmd_clear(pmd); | |
777 | return 1; | |
778 | } | |
779 | ||
780 | return 0; | |
781 | } | |
b6bdb751 | 782 | |
f967db0b | 783 | #ifdef CONFIG_X86_64 |
b6bdb751 TK |
784 | /** |
785 | * pud_free_pmd_page - Clear pud entry and free pmd page. | |
786 | * @pud: Pointer to a PUD. | |
785a19f9 | 787 | * @addr: Virtual address associated with pud. |
b6bdb751 | 788 | * |
5e0fb5df | 789 | * Context: The pud range has been unmapped and TLB purged. |
b6bdb751 | 790 | * Return: 1 if clearing the entry succeeded. 0 otherwise. |
5e0fb5df TK |
791 | * |
792 | * NOTE: Callers must allow a single page allocation. | |
b6bdb751 | 793 | */ |
785a19f9 | 794 | int pud_free_pmd_page(pud_t *pud, unsigned long addr) |
b6bdb751 | 795 | { |
5e0fb5df TK |
796 | pmd_t *pmd, *pmd_sv; |
797 | pte_t *pte; | |
28ee90fe TK |
798 | int i; |
799 | ||
9cf6fa24 | 800 | pmd = pud_pgtable(*pud); |
5e0fb5df TK |
801 | pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL); |
802 | if (!pmd_sv) | |
803 | return 0; | |
28ee90fe | 804 | |
5e0fb5df TK |
805 | for (i = 0; i < PTRS_PER_PMD; i++) { |
806 | pmd_sv[i] = pmd[i]; | |
807 | if (!pmd_none(pmd[i])) | |
808 | pmd_clear(&pmd[i]); | |
809 | } | |
28ee90fe TK |
810 | |
811 | pud_clear(pud); | |
5e0fb5df TK |
812 | |
813 | /* INVLPG to clear all paging-structure caches */ | |
814 | flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1); | |
815 | ||
816 | for (i = 0; i < PTRS_PER_PMD; i++) { | |
817 | if (!pmd_none(pmd_sv[i])) { | |
818 | pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]); | |
819 | free_page((unsigned long)pte); | |
820 | } | |
821 | } | |
822 | ||
823 | free_page((unsigned long)pmd_sv); | |
d1c5246e DW |
824 | |
825 | pgtable_pmd_page_dtor(virt_to_page(pmd)); | |
28ee90fe TK |
826 | free_page((unsigned long)pmd); |
827 | ||
828 | return 1; | |
b6bdb751 TK |
829 | } |
830 | ||
831 | /** | |
832 | * pmd_free_pte_page - Clear pmd entry and free pte page. | |
833 | * @pmd: Pointer to a PMD. | |
785a19f9 | 834 | * @addr: Virtual address associated with pmd. |
b6bdb751 | 835 | * |
5e0fb5df | 836 | * Context: The pmd range has been unmapped and TLB purged. |
b6bdb751 TK |
837 | * Return: 1 if clearing the entry succeeded. 0 otherwise. |
838 | */ | |
785a19f9 | 839 | int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) |
b6bdb751 | 840 | { |
28ee90fe TK |
841 | pte_t *pte; |
842 | ||
28ee90fe TK |
843 | pte = (pte_t *)pmd_page_vaddr(*pmd); |
844 | pmd_clear(pmd); | |
5e0fb5df TK |
845 | |
846 | /* INVLPG to clear all paging-structure caches */ | |
847 | flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1); | |
848 | ||
28ee90fe TK |
849 | free_page((unsigned long)pte); |
850 | ||
851 | return 1; | |
b6bdb751 | 852 | } |
f967db0b TK |
853 | |
854 | #else /* !CONFIG_X86_64 */ | |
855 | ||
f967db0b TK |
856 | /* |
857 | * Disable free page handling on x86-PAE. This assures that ioremap() | |
858 | * does not update sync'd pmd entries. See vmalloc_sync_one(). | |
859 | */ | |
785a19f9 | 860 | int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) |
f967db0b TK |
861 | { |
862 | return pmd_none(*pmd); | |
863 | } | |
864 | ||
865 | #endif /* CONFIG_X86_64 */ | |
6b637835 | 866 | #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ |