projects / mirror_ubuntu-kernels.git / blame
| Commit | Line | Data |
|---|---|---|
| 2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 3f6ea84a IS |
2 | /* |
| 3 | * Read address ranges from a Broadcom CNB20LE Host Bridge | |
| 4 | * | |
| 5 | * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> | |
| 3f6ea84a IS |
6 | */ |
| 7 | ||
| 30e664af | 8 | #include <linux/acpi.h> |
| 3f6ea84a IS |
9 | #include <linux/delay.h> |
| 10 | #include <linux/dmi.h> | |
| 11 | #include <linux/pci.h> | |
| 12 | #include <linux/init.h> | |
| 13 | #include <asm/pci_x86.h> | |
| 6361d72b | 14 | #include <asm/pci-direct.h> |
| 3f6ea84a IS |
15 | |
| 16 | #include "bus_numa.h" | |
| 17 | ||
| 6361d72b | 18 | static void __init cnb20le_res(u8 bus, u8 slot, u8 func) |
| 3f6ea84a IS |
19 | { |
| 20 | struct pci_root_info *info; | |
| d28e5ac2 | 21 | struct pci_root_res *root_res; |
| 3f6ea84a IS |
22 | struct resource res; |
| 23 | u16 word1, word2; | |
| 24 | u8 fbus, lbus; | |
| 3f6ea84a IS |
25 | |
| 26 | /* read the PCI bus numbers */ | |
| 6361d72b BH |
27 | fbus = read_pci_config_byte(bus, slot, func, 0x44); |
| 28 | lbus = read_pci_config_byte(bus, slot, func, 0x45); | |
| d28e5ac2 | 29 | info = alloc_pci_root_info(fbus, lbus, 0, 0); |
| 3f6ea84a IS |
30 | |
| 31 | /* | |
| 32 | * Add the legacy IDE ports on bus 0 | |
| 33 | * | |
| 34 | * These do not exist anywhere in the bridge registers, AFAICT. I do | |
| 35 | * not have the datasheet, so this is the best I can do. | |
| 36 | */ | |
| 37 | if (fbus == 0) { | |
| 38 | update_res(info, 0x01f0, 0x01f7, IORESOURCE_IO, 0); | |
| 39 | update_res(info, 0x03f6, 0x03f6, IORESOURCE_IO, 0); | |
| 40 | update_res(info, 0x0170, 0x0177, IORESOURCE_IO, 0); | |
| 41 | update_res(info, 0x0376, 0x0376, IORESOURCE_IO, 0); | |
| 42 | update_res(info, 0xffa0, 0xffaf, IORESOURCE_IO, 0); | |
| 43 | } | |
| 44 | ||
| 45 | /* read the non-prefetchable memory window */ | |
| 6361d72b BH |
46 | word1 = read_pci_config_16(bus, slot, func, 0xc0); |
| 47 | word2 = read_pci_config_16(bus, slot, func, 0xc2); | |
| 3f6ea84a | 48 | if (word1 != word2) { |
| 53bb565f CIK |
49 | res.start = ((resource_size_t) word1 << 16) | 0x0000; |
| 50 | res.end = ((resource_size_t) word2 << 16) | 0xffff; | |
| 3f6ea84a IS |
51 | res.flags = IORESOURCE_MEM; |
| 52 | update_res(info, res.start, res.end, res.flags, 0); | |
| 53 | } | |
| 54 | ||
| 55 | /* read the prefetchable memory window */ | |
| 6361d72b BH |
56 | word1 = read_pci_config_16(bus, slot, func, 0xc4); |
| 57 | word2 = read_pci_config_16(bus, slot, func, 0xc6); | |
| 3f6ea84a | 58 | if (word1 != word2) { |
| 0b2d7076 BH |
59 | res.start = ((resource_size_t) word1 << 16) | 0x0000; |
| 60 | res.end = ((resource_size_t) word2 << 16) | 0xffff; | |
| 3f6ea84a IS |
61 | res.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
| 62 | update_res(info, res.start, res.end, res.flags, 0); | |
| 63 | } | |
| 64 | ||
| 65 | /* read the IO port window */ | |
| 6361d72b BH |
66 | word1 = read_pci_config_16(bus, slot, func, 0xd0); |
| 67 | word2 = read_pci_config_16(bus, slot, func, 0xd2); | |
| 3f6ea84a IS |
68 | if (word1 != word2) { |
| 69 | res.start = word1; | |
| 70 | res.end = word2; | |
| 71 | res.flags = IORESOURCE_IO; | |
| 72 | update_res(info, res.start, res.end, res.flags, 0); | |
| 73 | } | |
| 74 | ||
| 75 | /* print information about this host bridge */ | |
| 76 | res.start = fbus; | |
| 77 | res.end = lbus; | |
| 78 | res.flags = IORESOURCE_BUS; | |
| 6361d72b | 79 | printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &res); |
| 3f6ea84a | 80 | |
| d28e5ac2 YL |
81 | list_for_each_entry(root_res, &info->resources, list) |
| 82 | printk(KERN_INFO "host bridge window %pR\n", &root_res->res); | |
| 3f6ea84a IS |
83 | } |
| 84 | ||
| 6361d72b BH |
85 | static int __init broadcom_postcore_init(void) |
| 86 | { | |
| 87 | u8 bus = 0, slot = 0; | |
| 88 | u32 id; | |
| 89 | u16 vendor, device; | |
| 90 | ||
| 91 | #ifdef CONFIG_ACPI | |
| 92 | /* | |
| 93 | * We should get host bridge information from ACPI unless the BIOS | |
| 94 | * doesn't support it. | |
| 95 | */ | |
| ddec3bde | 96 | if (!acpi_disabled && acpi_os_get_root_pointer()) |
| 6361d72b BH |
97 | return 0; |
| 98 | #endif | |
| 99 | ||
| 100 | id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); | |
| 101 | vendor = id & 0xffff; | |
| 102 | device = (id >> 16) & 0xffff; | |
| 103 | ||
| 104 | if (vendor == PCI_VENDOR_ID_SERVERWORKS && | |
| 105 | device == PCI_DEVICE_ID_SERVERWORKS_LE) { | |
| 106 | cnb20le_res(bus, slot, 0); | |
| 107 | cnb20le_res(bus, slot, 1); | |
| 108 | } | |
| 109 | return 0; | |
| 110 | } | |
| 3f6ea84a | 111 | |
| 6361d72b | 112 | postcore_initcall(broadcom_postcore_init); |