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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Low-Level PCI Support for PC | |
3 | * | |
4 | * (c) 1999--2000 Martin Mares <mj@ucw.cz> | |
5 | */ | |
6 | ||
7 | #include <linux/sched.h> | |
8 | #include <linux/pci.h> | |
89016506 | 9 | #include <linux/pci-acpi.h> |
1da177e4 LT |
10 | #include <linux/ioport.h> |
11 | #include <linux/init.h> | |
8c4b2cf9 | 12 | #include <linux/dmi.h> |
5a0e3ad6 | 13 | #include <linux/slab.h> |
1da177e4 | 14 | |
284f5f9d | 15 | #include <asm-generic/pci-bridge.h> |
1da177e4 LT |
16 | #include <asm/acpi.h> |
17 | #include <asm/segment.h> | |
18 | #include <asm/io.h> | |
19 | #include <asm/smp.h> | |
82487711 | 20 | #include <asm/pci_x86.h> |
f9a37be0 | 21 | #include <asm/setup.h> |
1da177e4 | 22 | |
1da177e4 LT |
23 | unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | |
24 | PCI_PROBE_MMCONF; | |
25 | ||
e3f2baeb | 26 | unsigned int pci_early_dump_regs; |
2b290da0 | 27 | static int pci_bf_sort; |
6e8af08d | 28 | static int smbios_type_b1_flag; |
1da177e4 | 29 | int pci_routeirq; |
a9322f64 | 30 | int noioapicquirk; |
41b9eb26 SA |
31 | #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS |
32 | int noioapicreroute = 0; | |
33 | #else | |
9197979b | 34 | int noioapicreroute = 1; |
41b9eb26 | 35 | #endif |
1da177e4 | 36 | int pcibios_last_bus = -1; |
120bb424 | 37 | unsigned long pirq_table_addr; |
72da0b07 JB |
38 | const struct pci_raw_ops *__read_mostly raw_pci_ops; |
39 | const struct pci_raw_ops *__read_mostly raw_pci_ext_ops; | |
b6ce068a MW |
40 | |
41 | int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, | |
42 | int reg, int len, u32 *val) | |
43 | { | |
beef3129 | 44 | if (domain == 0 && reg < 256 && raw_pci_ops) |
b6ce068a MW |
45 | return raw_pci_ops->read(domain, bus, devfn, reg, len, val); |
46 | if (raw_pci_ext_ops) | |
47 | return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val); | |
48 | return -EINVAL; | |
49 | } | |
50 | ||
51 | int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, | |
52 | int reg, int len, u32 val) | |
53 | { | |
beef3129 | 54 | if (domain == 0 && reg < 256 && raw_pci_ops) |
b6ce068a MW |
55 | return raw_pci_ops->write(domain, bus, devfn, reg, len, val); |
56 | if (raw_pci_ext_ops) | |
57 | return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val); | |
58 | return -EINVAL; | |
59 | } | |
1da177e4 LT |
60 | |
61 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) | |
62 | { | |
b6ce068a | 63 | return raw_pci_read(pci_domain_nr(bus), bus->number, |
a79e4198 | 64 | devfn, where, size, value); |
1da177e4 LT |
65 | } |
66 | ||
67 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) | |
68 | { | |
b6ce068a | 69 | return raw_pci_write(pci_domain_nr(bus), bus->number, |
a79e4198 | 70 | devfn, where, size, value); |
1da177e4 LT |
71 | } |
72 | ||
73 | struct pci_ops pci_root_ops = { | |
74 | .read = pci_read, | |
75 | .write = pci_write, | |
76 | }; | |
77 | ||
1da177e4 LT |
78 | /* |
79 | * This interrupt-safe spinlock protects all accesses to PCI | |
80 | * configuration space. | |
81 | */ | |
d19f61f0 | 82 | DEFINE_RAW_SPINLOCK(pci_config_lock); |
1da177e4 | 83 | |
a18e3690 | 84 | static int can_skip_ioresource_align(const struct dmi_system_id *d) |
13a6ddb0 YL |
85 | { |
86 | pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; | |
87 | printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident); | |
88 | return 0; | |
89 | } | |
90 | ||
a18e3690 | 91 | static const struct dmi_system_id can_skip_pciprobe_dmi_table[] = { |
13a6ddb0 YL |
92 | /* |
93 | * Systems where PCI IO resource ISA alignment can be skipped | |
94 | * when the ISA enable bit in the bridge control is not set | |
95 | */ | |
96 | { | |
97 | .callback = can_skip_ioresource_align, | |
98 | .ident = "IBM System x3800", | |
99 | .matches = { | |
100 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
101 | DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), | |
102 | }, | |
103 | }, | |
104 | { | |
105 | .callback = can_skip_ioresource_align, | |
106 | .ident = "IBM System x3850", | |
107 | .matches = { | |
108 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
109 | DMI_MATCH(DMI_PRODUCT_NAME, "x3850"), | |
110 | }, | |
111 | }, | |
112 | { | |
113 | .callback = can_skip_ioresource_align, | |
114 | .ident = "IBM System x3950", | |
115 | .matches = { | |
116 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
117 | DMI_MATCH(DMI_PRODUCT_NAME, "x3950"), | |
118 | }, | |
119 | }, | |
120 | {} | |
121 | }; | |
122 | ||
123 | void __init dmi_check_skip_isa_align(void) | |
124 | { | |
125 | dmi_check_system(can_skip_pciprobe_dmi_table); | |
126 | } | |
127 | ||
a18e3690 | 128 | static void pcibios_fixup_device_resources(struct pci_dev *dev) |
bb71ad88 GH |
129 | { |
130 | struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE]; | |
7bd1c365 MH |
131 | struct resource *bar_r; |
132 | int bar; | |
133 | ||
134 | if (pci_probe & PCI_NOASSIGN_BARS) { | |
135 | /* | |
136 | * If the BIOS did not assign the BAR, zero out the | |
137 | * resource so the kernel doesn't attmept to assign | |
138 | * it later on in pci_assign_unassigned_resources | |
139 | */ | |
140 | for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) { | |
141 | bar_r = &dev->resource[bar]; | |
142 | if (bar_r->start == 0 && bar_r->end != 0) { | |
143 | bar_r->flags = 0; | |
144 | bar_r->end = 0; | |
145 | } | |
146 | } | |
147 | } | |
bb71ad88 GH |
148 | |
149 | if (pci_probe & PCI_NOASSIGN_ROMS) { | |
150 | if (rom_r->parent) | |
151 | return; | |
152 | if (rom_r->start) { | |
153 | /* we deal with BIOS assigned ROM later */ | |
154 | return; | |
155 | } | |
156 | rom_r->start = rom_r->end = rom_r->flags = 0; | |
157 | } | |
158 | } | |
159 | ||
1da177e4 LT |
160 | /* |
161 | * Called after each bus is probed, but before its children | |
162 | * are examined. | |
163 | */ | |
164 | ||
a18e3690 | 165 | void pcibios_fixup_bus(struct pci_bus *b) |
1da177e4 | 166 | { |
bb71ad88 GH |
167 | struct pci_dev *dev; |
168 | ||
1da177e4 | 169 | pci_read_bridge_bases(b); |
bb71ad88 GH |
170 | list_for_each_entry(dev, &b->devices, bus_list) |
171 | pcibios_fixup_device_resources(dev); | |
1da177e4 LT |
172 | } |
173 | ||
89016506 JL |
174 | void pcibios_add_bus(struct pci_bus *bus) |
175 | { | |
176 | acpi_pci_add_bus(bus); | |
177 | } | |
178 | ||
179 | void pcibios_remove_bus(struct pci_bus *bus) | |
180 | { | |
181 | acpi_pci_remove_bus(bus); | |
182 | } | |
183 | ||
6b4b78fe MD |
184 | /* |
185 | * Only use DMI information to set this if nothing was passed | |
186 | * on the kernel command line (which was parsed earlier). | |
187 | */ | |
188 | ||
a18e3690 | 189 | static int set_bf_sort(const struct dmi_system_id *d) |
6b4b78fe MD |
190 | { |
191 | if (pci_bf_sort == pci_bf_sort_default) { | |
192 | pci_bf_sort = pci_dmi_bf; | |
193 | printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident); | |
194 | } | |
195 | return 0; | |
196 | } | |
197 | ||
a18e3690 | 198 | static void read_dmi_type_b1(const struct dmi_header *dm, |
6e8af08d ND |
199 | void *private_data) |
200 | { | |
201 | u8 *d = (u8 *)dm + 4; | |
202 | ||
203 | if (dm->type != 0xB1) | |
204 | return; | |
205 | switch (((*(u32 *)d) >> 9) & 0x03) { | |
206 | case 0x00: | |
207 | printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n"); | |
208 | break; | |
209 | case 0x01: /* set pci=bfsort */ | |
210 | smbios_type_b1_flag = 1; | |
211 | break; | |
212 | case 0x02: /* do not set pci=bfsort */ | |
213 | smbios_type_b1_flag = 2; | |
214 | break; | |
215 | default: | |
216 | break; | |
217 | } | |
218 | } | |
219 | ||
a18e3690 | 220 | static int find_sort_method(const struct dmi_system_id *d) |
6e8af08d ND |
221 | { |
222 | dmi_walk(read_dmi_type_b1, NULL); | |
223 | ||
224 | if (smbios_type_b1_flag == 1) { | |
225 | set_bf_sort(d); | |
226 | return 0; | |
227 | } | |
228 | return -1; | |
229 | } | |
230 | ||
8c4b2cf9 BK |
231 | /* |
232 | * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus) | |
233 | */ | |
234 | #ifdef __i386__ | |
a18e3690 | 235 | static int assign_all_busses(const struct dmi_system_id *d) |
8c4b2cf9 BK |
236 | { |
237 | pci_probe |= PCI_ASSIGN_ALL_BUSSES; | |
238 | printk(KERN_INFO "%s detected: enabling PCI bus# renumbering" | |
239 | " (pci=assign-busses)\n", d->ident); | |
240 | return 0; | |
241 | } | |
242 | #endif | |
243 | ||
a18e3690 | 244 | static int set_scan_all(const struct dmi_system_id *d) |
284f5f9d BH |
245 | { |
246 | printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n", | |
247 | d->ident); | |
248 | pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS); | |
249 | return 0; | |
250 | } | |
251 | ||
a18e3690 | 252 | static const struct dmi_system_id pciprobe_dmi_table[] = { |
6b4b78fe | 253 | #ifdef __i386__ |
8c4b2cf9 BK |
254 | /* |
255 | * Laptops which need pci=assign-busses to see Cardbus cards | |
256 | */ | |
8c4b2cf9 BK |
257 | { |
258 | .callback = assign_all_busses, | |
259 | .ident = "Samsung X20 Laptop", | |
260 | .matches = { | |
261 | DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"), | |
262 | DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"), | |
263 | }, | |
264 | }, | |
265 | #endif /* __i386__ */ | |
6b4b78fe MD |
266 | { |
267 | .callback = set_bf_sort, | |
268 | .ident = "Dell PowerEdge 1950", | |
269 | .matches = { | |
270 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
271 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"), | |
272 | }, | |
273 | }, | |
274 | { | |
275 | .callback = set_bf_sort, | |
276 | .ident = "Dell PowerEdge 1955", | |
277 | .matches = { | |
278 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
279 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"), | |
280 | }, | |
281 | }, | |
282 | { | |
283 | .callback = set_bf_sort, | |
284 | .ident = "Dell PowerEdge 2900", | |
285 | .matches = { | |
286 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
287 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"), | |
288 | }, | |
289 | }, | |
290 | { | |
291 | .callback = set_bf_sort, | |
292 | .ident = "Dell PowerEdge 2950", | |
293 | .matches = { | |
294 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
295 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"), | |
296 | }, | |
297 | }, | |
f7a9dae7 MD |
298 | { |
299 | .callback = set_bf_sort, | |
300 | .ident = "Dell PowerEdge R900", | |
301 | .matches = { | |
302 | DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
303 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"), | |
304 | }, | |
305 | }, | |
9b373ed1 ND |
306 | { |
307 | .callback = find_sort_method, | |
308 | .ident = "Dell System", | |
309 | .matches = { | |
310 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"), | |
311 | }, | |
312 | }, | |
f52383d3 AG |
313 | { |
314 | .callback = set_bf_sort, | |
315 | .ident = "HP ProLiant BL20p G3", | |
316 | .matches = { | |
317 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
318 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"), | |
319 | }, | |
320 | }, | |
321 | { | |
322 | .callback = set_bf_sort, | |
323 | .ident = "HP ProLiant BL20p G4", | |
324 | .matches = { | |
325 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
326 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"), | |
327 | }, | |
328 | }, | |
329 | { | |
330 | .callback = set_bf_sort, | |
331 | .ident = "HP ProLiant BL30p G1", | |
332 | .matches = { | |
333 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
334 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"), | |
335 | }, | |
336 | }, | |
337 | { | |
338 | .callback = set_bf_sort, | |
339 | .ident = "HP ProLiant BL25p G1", | |
340 | .matches = { | |
341 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
342 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"), | |
343 | }, | |
344 | }, | |
345 | { | |
346 | .callback = set_bf_sort, | |
347 | .ident = "HP ProLiant BL35p G1", | |
348 | .matches = { | |
349 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
350 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"), | |
351 | }, | |
352 | }, | |
353 | { | |
354 | .callback = set_bf_sort, | |
355 | .ident = "HP ProLiant BL45p G1", | |
356 | .matches = { | |
357 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
358 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"), | |
359 | }, | |
360 | }, | |
361 | { | |
362 | .callback = set_bf_sort, | |
363 | .ident = "HP ProLiant BL45p G2", | |
364 | .matches = { | |
365 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
366 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"), | |
367 | }, | |
368 | }, | |
369 | { | |
370 | .callback = set_bf_sort, | |
371 | .ident = "HP ProLiant BL460c G1", | |
372 | .matches = { | |
373 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
374 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"), | |
375 | }, | |
376 | }, | |
377 | { | |
378 | .callback = set_bf_sort, | |
379 | .ident = "HP ProLiant BL465c G1", | |
380 | .matches = { | |
381 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
382 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"), | |
383 | }, | |
384 | }, | |
385 | { | |
386 | .callback = set_bf_sort, | |
387 | .ident = "HP ProLiant BL480c G1", | |
388 | .matches = { | |
389 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
390 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"), | |
391 | }, | |
392 | }, | |
393 | { | |
394 | .callback = set_bf_sort, | |
395 | .ident = "HP ProLiant BL685c G1", | |
396 | .matches = { | |
397 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
398 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), | |
399 | }, | |
400 | }, | |
8f8ae1a7 MS |
401 | { |
402 | .callback = set_bf_sort, | |
8d64c781 | 403 | .ident = "HP ProLiant DL360", |
8f8ae1a7 MS |
404 | .matches = { |
405 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
8d64c781 | 406 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"), |
8f8ae1a7 MS |
407 | }, |
408 | }, | |
409 | { | |
410 | .callback = set_bf_sort, | |
8d64c781 | 411 | .ident = "HP ProLiant DL380", |
8f8ae1a7 MS |
412 | .matches = { |
413 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
8d64c781 | 414 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"), |
8f8ae1a7 MS |
415 | }, |
416 | }, | |
5b1ea82f JL |
417 | #ifdef __i386__ |
418 | { | |
419 | .callback = assign_all_busses, | |
420 | .ident = "Compaq EVO N800c", | |
421 | .matches = { | |
422 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
423 | DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"), | |
424 | }, | |
425 | }, | |
426 | #endif | |
c82bc5ad MS |
427 | { |
428 | .callback = set_bf_sort, | |
739db07f | 429 | .ident = "HP ProLiant DL385 G2", |
c82bc5ad MS |
430 | .matches = { |
431 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
739db07f | 432 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"), |
c82bc5ad MS |
433 | }, |
434 | }, | |
435 | { | |
436 | .callback = set_bf_sort, | |
739db07f | 437 | .ident = "HP ProLiant DL585 G2", |
c82bc5ad MS |
438 | .matches = { |
439 | DMI_MATCH(DMI_SYS_VENDOR, "HP"), | |
739db07f | 440 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"), |
c82bc5ad MS |
441 | }, |
442 | }, | |
284f5f9d BH |
443 | { |
444 | .callback = set_scan_all, | |
445 | .ident = "Stratus/NEC ftServer", | |
446 | .matches = { | |
1278998f MS |
447 | DMI_MATCH(DMI_SYS_VENDOR, "Stratus"), |
448 | DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"), | |
284f5f9d BH |
449 | }, |
450 | }, | |
8c4b2cf9 BK |
451 | {} |
452 | }; | |
1da177e4 | 453 | |
0df18ff3 YL |
454 | void __init dmi_check_pciprobe(void) |
455 | { | |
456 | dmi_check_system(pciprobe_dmi_table); | |
457 | } | |
458 | ||
a18e3690 | 459 | struct pci_bus *pcibios_scan_root(int busnum) |
1da177e4 | 460 | { |
c57ca65a YL |
461 | return pci_scan_bus_on_node(busnum, &pci_root_ops, |
462 | get_mp_bus_to_node(busnum)); | |
1da177e4 | 463 | } |
c57ca65a | 464 | |
44de3395 | 465 | void __init pcibios_set_cache_line_size(void) |
1da177e4 LT |
466 | { |
467 | struct cpuinfo_x86 *c = &boot_cpu_data; | |
468 | ||
1da177e4 | 469 | /* |
76b1a87b DJ |
470 | * Set PCI cacheline size to that of the CPU if the CPU has reported it. |
471 | * (For older CPUs that don't support cpuid, we se it to 32 bytes | |
472 | * It's also good for 386/486s (which actually have 16) | |
1da177e4 LT |
473 | * as quite a few PCI devices do not support smaller values. |
474 | */ | |
76b1a87b DJ |
475 | if (c->x86_clflush_size > 0) { |
476 | pci_dfl_cache_line_size = c->x86_clflush_size >> 2; | |
477 | printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n", | |
478 | pci_dfl_cache_line_size << 2); | |
479 | } else { | |
480 | pci_dfl_cache_line_size = 32 >> 2; | |
481 | printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n"); | |
482 | } | |
44de3395 AN |
483 | } |
484 | ||
485 | int __init pcibios_init(void) | |
486 | { | |
487 | if (!raw_pci_ops) { | |
488 | printk(KERN_WARNING "PCI: System does not support PCI\n"); | |
489 | return 0; | |
490 | } | |
1da177e4 | 491 | |
44de3395 | 492 | pcibios_set_cache_line_size(); |
1da177e4 LT |
493 | pcibios_resource_survey(); |
494 | ||
6b4b78fe MD |
495 | if (pci_bf_sort >= pci_force_bf) |
496 | pci_sort_breadthfirst(); | |
1da177e4 LT |
497 | return 0; |
498 | } | |
499 | ||
15fa325b | 500 | char * __init pcibios_setup(char *str) |
1da177e4 LT |
501 | { |
502 | if (!strcmp(str, "off")) { | |
503 | pci_probe = 0; | |
504 | return NULL; | |
6b4b78fe MD |
505 | } else if (!strcmp(str, "bfsort")) { |
506 | pci_bf_sort = pci_force_bf; | |
507 | return NULL; | |
508 | } else if (!strcmp(str, "nobfsort")) { | |
509 | pci_bf_sort = pci_force_nobf; | |
510 | return NULL; | |
1da177e4 LT |
511 | } |
512 | #ifdef CONFIG_PCI_BIOS | |
513 | else if (!strcmp(str, "bios")) { | |
514 | pci_probe = PCI_PROBE_BIOS; | |
515 | return NULL; | |
516 | } else if (!strcmp(str, "nobios")) { | |
517 | pci_probe &= ~PCI_PROBE_BIOS; | |
518 | return NULL; | |
1da177e4 LT |
519 | } else if (!strcmp(str, "biosirq")) { |
520 | pci_probe |= PCI_BIOS_IRQ_SCAN; | |
521 | return NULL; | |
120bb424 | 522 | } else if (!strncmp(str, "pirqaddr=", 9)) { |
523 | pirq_table_addr = simple_strtoul(str+9, NULL, 0); | |
524 | return NULL; | |
1da177e4 LT |
525 | } |
526 | #endif | |
527 | #ifdef CONFIG_PCI_DIRECT | |
528 | else if (!strcmp(str, "conf1")) { | |
529 | pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS; | |
530 | return NULL; | |
531 | } | |
532 | else if (!strcmp(str, "conf2")) { | |
533 | pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS; | |
534 | return NULL; | |
535 | } | |
536 | #endif | |
537 | #ifdef CONFIG_PCI_MMCONFIG | |
538 | else if (!strcmp(str, "nommconf")) { | |
539 | pci_probe &= ~PCI_PROBE_MMCONF; | |
540 | return NULL; | |
541 | } | |
5f0b2976 YL |
542 | else if (!strcmp(str, "check_enable_amd_mmconf")) { |
543 | pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF; | |
544 | return NULL; | |
545 | } | |
1da177e4 LT |
546 | #endif |
547 | else if (!strcmp(str, "noacpi")) { | |
548 | acpi_noirq_set(); | |
549 | return NULL; | |
550 | } | |
0637a70a AK |
551 | else if (!strcmp(str, "noearly")) { |
552 | pci_probe |= PCI_PROBE_NOEARLY; | |
553 | return NULL; | |
554 | } | |
1da177e4 LT |
555 | #ifndef CONFIG_X86_VISWS |
556 | else if (!strcmp(str, "usepirqmask")) { | |
557 | pci_probe |= PCI_USE_PIRQ_MASK; | |
558 | return NULL; | |
559 | } else if (!strncmp(str, "irqmask=", 8)) { | |
560 | pcibios_irq_mask = simple_strtol(str+8, NULL, 0); | |
561 | return NULL; | |
562 | } else if (!strncmp(str, "lastbus=", 8)) { | |
563 | pcibios_last_bus = simple_strtol(str+8, NULL, 0); | |
564 | return NULL; | |
565 | } | |
566 | #endif | |
567 | else if (!strcmp(str, "rom")) { | |
568 | pci_probe |= PCI_ASSIGN_ROMS; | |
569 | return NULL; | |
bb71ad88 GH |
570 | } else if (!strcmp(str, "norom")) { |
571 | pci_probe |= PCI_NOASSIGN_ROMS; | |
572 | return NULL; | |
7bd1c365 MH |
573 | } else if (!strcmp(str, "nobar")) { |
574 | pci_probe |= PCI_NOASSIGN_BARS; | |
575 | return NULL; | |
1da177e4 LT |
576 | } else if (!strcmp(str, "assign-busses")) { |
577 | pci_probe |= PCI_ASSIGN_ALL_BUSSES; | |
578 | return NULL; | |
236e946b LT |
579 | } else if (!strcmp(str, "use_crs")) { |
580 | pci_probe |= PCI_USE__CRS; | |
62f420f8 | 581 | return NULL; |
7bc5e3f2 BH |
582 | } else if (!strcmp(str, "nocrs")) { |
583 | pci_probe |= PCI_ROOT_NO_CRS; | |
584 | return NULL; | |
e3f2baeb YL |
585 | } else if (!strcmp(str, "earlydump")) { |
586 | pci_early_dump_regs = 1; | |
587 | return NULL; | |
1da177e4 LT |
588 | } else if (!strcmp(str, "routeirq")) { |
589 | pci_routeirq = 1; | |
590 | return NULL; | |
13a6ddb0 YL |
591 | } else if (!strcmp(str, "skip_isa_align")) { |
592 | pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; | |
593 | return NULL; | |
a9322f64 SA |
594 | } else if (!strcmp(str, "noioapicquirk")) { |
595 | noioapicquirk = 1; | |
596 | return NULL; | |
9197979b SA |
597 | } else if (!strcmp(str, "ioapicreroute")) { |
598 | if (noioapicreroute != -1) | |
599 | noioapicreroute = 0; | |
600 | return NULL; | |
41b9eb26 SA |
601 | } else if (!strcmp(str, "noioapicreroute")) { |
602 | if (noioapicreroute != -1) | |
603 | noioapicreroute = 1; | |
604 | return NULL; | |
1da177e4 LT |
605 | } |
606 | return str; | |
607 | } | |
608 | ||
609 | unsigned int pcibios_assign_all_busses(void) | |
610 | { | |
611 | return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; | |
612 | } | |
613 | ||
f9a37be0 MG |
614 | int pcibios_add_device(struct pci_dev *dev) |
615 | { | |
616 | struct setup_data *data; | |
617 | struct pci_setup_rom *rom; | |
618 | u64 pa_data; | |
619 | ||
620 | pa_data = boot_params.hdr.setup_data; | |
621 | while (pa_data) { | |
65694c5a MF |
622 | data = ioremap(pa_data, sizeof(*rom)); |
623 | if (!data) | |
624 | return -ENOMEM; | |
f9a37be0 MG |
625 | |
626 | if (data->type == SETUP_PCI) { | |
627 | rom = (struct pci_setup_rom *)data; | |
628 | ||
629 | if ((pci_domain_nr(dev->bus) == rom->segment) && | |
630 | (dev->bus->number == rom->bus) && | |
631 | (PCI_SLOT(dev->devfn) == rom->device) && | |
632 | (PCI_FUNC(dev->devfn) == rom->function) && | |
633 | (dev->vendor == rom->vendor) && | |
634 | (dev->device == rom->devid)) { | |
dbd3fc33 BH |
635 | dev->rom = pa_data + |
636 | offsetof(struct pci_setup_rom, romdata); | |
f9a37be0 MG |
637 | dev->romlen = rom->pcilen; |
638 | } | |
639 | } | |
640 | pa_data = data->next; | |
65694c5a | 641 | iounmap(data); |
f9a37be0 MG |
642 | } |
643 | return 0; | |
644 | } | |
645 | ||
1da177e4 LT |
646 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
647 | { | |
648 | int err; | |
649 | ||
b81d988c | 650 | if ((err = pci_enable_resources(dev, mask)) < 0) |
1da177e4 LT |
651 | return err; |
652 | ||
16cf0ebc | 653 | if (!pci_dev_msi_enabled(dev)) |
bba6f6fc EB |
654 | return pcibios_enable_irq(dev); |
655 | return 0; | |
1da177e4 | 656 | } |
87bec66b DSL |
657 | |
658 | void pcibios_disable_device (struct pci_dev *dev) | |
659 | { | |
16cf0ebc | 660 | if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq) |
87bec66b DSL |
661 | pcibios_disable_irq(dev); |
662 | } | |
73c59afc | 663 | |
642c92da | 664 | int pci_ext_cfg_avail(void) |
0ef5f8f6 AP |
665 | { |
666 | if (raw_pci_ext_ops) | |
667 | return 1; | |
668 | else | |
669 | return 0; | |
670 | } | |
671 | ||
a18e3690 | 672 | struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node) |
73c59afc | 673 | { |
2cd6975a | 674 | LIST_HEAD(resources); |
73c59afc MBY |
675 | struct pci_bus *bus = NULL; |
676 | struct pci_sysdata *sd; | |
677 | ||
678 | /* | |
679 | * Allocate per-root-bus (not per bus) arch-specific data. | |
680 | * TODO: leak; this memory is never freed. | |
681 | * It's arguable whether it's worth the trouble to care. | |
682 | */ | |
683 | sd = kzalloc(sizeof(*sd), GFP_KERNEL); | |
684 | if (!sd) { | |
685 | printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno); | |
686 | return NULL; | |
687 | } | |
871d5f8d | 688 | sd->node = node; |
2cd6975a | 689 | x86_pci_root_bus_resources(busno, &resources); |
c57ca65a | 690 | printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busno); |
2cd6975a BH |
691 | bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources); |
692 | if (!bus) { | |
693 | pci_free_resource_list(&resources); | |
73c59afc | 694 | kfree(sd); |
2cd6975a | 695 | } |
73c59afc MBY |
696 | |
697 | return bus; | |
698 | } | |
871d5f8d | 699 | |
2547089c JB |
700 | /* |
701 | * NUMA info for PCI busses | |
702 | * | |
703 | * Early arch code is responsible for filling in reasonable values here. | |
704 | * A node id of "-1" means "use current node". In other words, if a bus | |
705 | * has a -1 node id, it's not tightly coupled to any particular chunk | |
706 | * of memory (as is the case on some Nehalem systems). | |
707 | */ | |
708 | #ifdef CONFIG_NUMA | |
709 | ||
710 | #define BUS_NR 256 | |
711 | ||
712 | #ifdef CONFIG_X86_64 | |
713 | ||
714 | static int mp_bus_to_node[BUS_NR] = { | |
715 | [0 ... BUS_NR - 1] = -1 | |
716 | }; | |
717 | ||
718 | void set_mp_bus_to_node(int busnum, int node) | |
719 | { | |
720 | if (busnum >= 0 && busnum < BUS_NR) | |
721 | mp_bus_to_node[busnum] = node; | |
722 | } | |
723 | ||
724 | int get_mp_bus_to_node(int busnum) | |
725 | { | |
726 | int node = -1; | |
727 | ||
728 | if (busnum < 0 || busnum > (BUS_NR - 1)) | |
729 | return node; | |
730 | ||
731 | node = mp_bus_to_node[busnum]; | |
732 | ||
733 | /* | |
734 | * let numa_node_id to decide it later in dma_alloc_pages | |
735 | * if there is no ram on that node | |
736 | */ | |
737 | if (node != -1 && !node_online(node)) | |
738 | node = -1; | |
739 | ||
740 | return node; | |
741 | } | |
742 | ||
743 | #else /* CONFIG_X86_32 */ | |
744 | ||
76baeebf | 745 | static int mp_bus_to_node[BUS_NR] = { |
2547089c JB |
746 | [0 ... BUS_NR - 1] = -1 |
747 | }; | |
748 | ||
749 | void set_mp_bus_to_node(int busnum, int node) | |
750 | { | |
751 | if (busnum >= 0 && busnum < BUS_NR) | |
752 | mp_bus_to_node[busnum] = (unsigned char) node; | |
753 | } | |
754 | ||
755 | int get_mp_bus_to_node(int busnum) | |
756 | { | |
757 | int node; | |
758 | ||
759 | if (busnum < 0 || busnum > (BUS_NR - 1)) | |
760 | return 0; | |
761 | node = mp_bus_to_node[busnum]; | |
762 | return node; | |
763 | } | |
764 | ||
765 | #endif /* CONFIG_X86_32 */ | |
766 | ||
767 | #endif /* CONFIG_NUMA */ |