[mirror_ubuntu-jammy-kernel.git] / arch / x86 / pci / xen.c

/*
 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
 * 0xcf8 PCI configuration read/write.
 *
 *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
 *           Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
 *           Stefano Stabellini <stefano.stabellini@eu.citrix.com>
 */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/acpi.h>

#include <linux/io.h>
#include <asm/io_apic.h>
#include <asm/pci_x86.h>

#include <asm/xen/hypervisor.h>

#include <xen/features.h>
#include <xen/events.h>
#include <asm/xen/pci.h>

static int xen_pcifront_enable_irq(struct pci_dev *dev)
{
	int rc;
	int share = 1;
	int pirq;
	u8 gsi;

	rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
	if (rc < 0) {
		dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
			 rc);
		return rc;
	}
	/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
	pirq = gsi;

	if (gsi < NR_IRQS_LEGACY)
		share = 0;

	rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
	if (rc < 0) {
		dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
			 gsi, pirq, rc);
		return rc;
	}

	dev->irq = rc;
	dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
	return 0;
}

#ifdef CONFIG_ACPI
static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
			     bool set_pirq)
{
	int rc, pirq = -1, irq = -1;
	struct physdev_map_pirq map_irq;
	int shareable = 0;
	char *name;

	if (set_pirq)
		pirq = gsi;

	map_irq.domid = DOMID_SELF;
	map_irq.type = MAP_PIRQ_TYPE_GSI;
	map_irq.index = gsi;
	map_irq.pirq = pirq;

	rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
	if (rc) {
		printk(KERN_WARNING "xen map irq failed %d\n", rc);
		return -1;
	}

	if (triggering == ACPI_EDGE_SENSITIVE) {
		shareable = 0;
		name = "ioapic-edge";
	} else {
		shareable = 1;
		name = "ioapic-level";
	}

	if (gsi_override >= 0)
		gsi = gsi_override;

	irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
	if (irq < 0)
		goto out;

	printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
out:
	return irq;
}

static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
				     int trigger, int polarity)
{
	if (!xen_hvm_domain())
		return -1;

	return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
				 false /* no mapping of GSI to PIRQ */);
}

#ifdef CONFIG_XEN_DOM0
static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
{
	int rc, irq;
	struct physdev_setup_gsi setup_gsi;

	if (!xen_pv_domain())
		return -1;

	printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
			gsi, triggering, polarity);

	irq = xen_register_pirq(gsi, gsi_override, triggering, true);

	setup_gsi.gsi = gsi;
	setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
	setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);

	rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
	if (rc == -EEXIST)
		printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
	else if (rc) {
		printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
				gsi, rc);
	}

	return irq;
}

static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
				 int trigger, int polarity)
{
	return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
}
#endif
#endif

#if defined(CONFIG_PCI_MSI)
#include <linux/msi.h>
#include <asm/msidef.h>

struct xen_pci_frontend_ops *xen_pci_frontend;
EXPORT_SYMBOL_GPL(xen_pci_frontend);

static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
	int irq, ret, i;
	struct msi_desc *msidesc;
	int *v;

	v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
	if (!v)
		return -ENOMEM;

	if (type == PCI_CAP_ID_MSIX)
		ret = xen_pci_frontend_enable_msix(dev, v, nvec);
	else
		ret = xen_pci_frontend_enable_msi(dev, v);
	if (ret)
		goto error;
	i = 0;
	list_for_each_entry(msidesc, &dev->msi_list, list) {
		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0,
					       (type == PCI_CAP_ID_MSIX) ?
					       "pcifront-msi-x" :
					       "pcifront-msi",
						DOMID_SELF);
		if (irq < 0)
			goto free;
		i++;
	}
	kfree(v);
	return 0;

error:
	dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
free:
	kfree(v);
	return ret;
}

#define XEN_PIRQ_MSI_DATA  (MSI_DATA_TRIGGER_EDGE | \
		MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))

static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
		struct msi_msg *msg)
{
	/* We set vector == 0 to tell the hypervisor we don't care about it,
	 * but we want a pirq setup instead.
	 * We use the dest_id field to pass the pirq that we want. */
	msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
	msg->address_lo =
		MSI_ADDR_BASE_LO |
		MSI_ADDR_DEST_MODE_PHYSICAL |
		MSI_ADDR_REDIRECTION_CPU |
		MSI_ADDR_DEST_ID(pirq);

	msg->data = XEN_PIRQ_MSI_DATA;
}

static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
	int irq, pirq;
	struct msi_desc *msidesc;
	struct msi_msg msg;

	list_for_each_entry(msidesc, &dev->msi_list, list) {
		__read_msi_msg(msidesc, &msg);
		pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
			((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
		if (msg.data != XEN_PIRQ_MSI_DATA ||
		    xen_irq_from_pirq(pirq) < 0) {
			pirq = xen_allocate_pirq_msi(dev, msidesc);
			if (pirq < 0)
				goto error;
			xen_msi_compose_msg(dev, pirq, &msg);
			__write_msi_msg(msidesc, &msg);
			dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
		} else {
			dev_dbg(&dev->dev,
				"xen: msi already bound to pirq=%d\n", pirq);
		}
		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0,
					       (type == PCI_CAP_ID_MSIX) ?
					       "msi-x" : "msi",
					       DOMID_SELF);
		if (irq < 0)
			goto error;
		dev_dbg(&dev->dev,
			"xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
	}
	return 0;

error:
	dev_err(&dev->dev,
		"Xen PCI frontend has not registered MSI/MSI-X support!\n");
	return -ENODEV;
}

#ifdef CONFIG_XEN_DOM0
static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
	int ret = 0;
	struct msi_desc *msidesc;

	list_for_each_entry(msidesc, &dev->msi_list, list) {
		struct physdev_map_pirq map_irq;
		domid_t domid;

		domid = ret = xen_find_device_domain_owner(dev);
		/* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
		 * hence check ret value for < 0. */
		if (ret < 0)
			domid = DOMID_SELF;

		memset(&map_irq, 0, sizeof(map_irq));
		map_irq.domid = domid;
		map_irq.type = MAP_PIRQ_TYPE_MSI;
		map_irq.index = -1;
		map_irq.pirq = -1;
		map_irq.bus = dev->bus->number;
		map_irq.devfn = dev->devfn;

		if (type == PCI_CAP_ID_MSIX) {
			int pos;
			u32 table_offset, bir;

			pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);

			pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
					      &table_offset);
			bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);

			map_irq.table_base = pci_resource_start(dev, bir);
			map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
		}

		ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
		if (ret) {
			dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
				 ret, domid);
			goto out;
		}

		ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
					       map_irq.pirq, map_irq.index,
					       (type == PCI_CAP_ID_MSIX) ?
					       "msi-x" : "msi",
						domid);
		if (ret < 0)
			goto out;
	}
	ret = 0;
out:
	return ret;
}
#endif

static void xen_teardown_msi_irqs(struct pci_dev *dev)
{
	struct msi_desc *msidesc;

	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	if (msidesc->msi_attrib.is_msix)
		xen_pci_frontend_disable_msix(dev);
	else
		xen_pci_frontend_disable_msi(dev);

	/* Free the IRQ's and the msidesc using the generic code. */
	default_teardown_msi_irqs(dev);
}

static void xen_teardown_msi_irq(unsigned int irq)
{
	xen_destroy_irq(irq);
}

#endif

int __init pci_xen_init(void)
{
	if (!xen_pv_domain() || xen_initial_domain())
		return -ENODEV;

	printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");

	pcibios_set_cache_line_size();

	pcibios_enable_irq = xen_pcifront_enable_irq;
	pcibios_disable_irq = NULL;

#ifdef CONFIG_ACPI
	/* Keep ACPI out of the picture */
	acpi_noirq = 1;
#endif

#ifdef CONFIG_PCI_MSI
	x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
#endif
	return 0;
}

int __init pci_xen_hvm_init(void)
{
	if (!xen_feature(XENFEAT_hvm_pirqs))
		return 0;

#ifdef CONFIG_ACPI
	/*
	 * We don't want to change the actual ACPI delivery model,
	 * just how GSIs get registered.
	 */
	__acpi_register_gsi = acpi_register_gsi_xen_hvm;
#endif

#ifdef CONFIG_PCI_MSI
	x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
#endif
	return 0;
}

#ifdef CONFIG_XEN_DOM0
static __init void xen_setup_acpi_sci(void)
{
	int rc;
	int trigger, polarity;
	int gsi = acpi_sci_override_gsi;
	int irq = -1;
	int gsi_override = -1;

	if (!gsi)
		return;

	rc = acpi_get_override_irq(gsi, &trigger, &polarity);
	if (rc) {
		printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
				" sci, rc=%d\n", rc);
		return;
	}
	trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
	polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;

	printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
			"polarity=%d\n", gsi, trigger, polarity);

	/* Before we bind the GSI to a Linux IRQ, check whether
	 * we need to override it with bus_irq (IRQ) value. Usually for
	 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
	 *  ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
	 * but there are oddballs where the IRQ != GSI:
	 *  ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
	 * which ends up being: gsi_to_irq[9] == 20
	 * (which is what acpi_gsi_to_irq ends up calling when starting the
	 * the ACPI interpreter and keels over since IRQ 9 has not been
	 * setup as we had setup IRQ 20 for it).
	 */
	if (acpi_gsi_to_irq(gsi, &irq) == 0) {
		/* Use the provided value if it's valid. */
		if (irq >= 0)
			gsi_override = irq;
	}

	gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
	printk(KERN_INFO "xen: acpi sci %d\n", gsi);

	return;
}

int __init pci_xen_initial_domain(void)
{
	int irq;

#ifdef CONFIG_PCI_MSI
	x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
#endif
	xen_setup_acpi_sci();
	__acpi_register_gsi = acpi_register_gsi_xen;
	/* Pre-allocate legacy irqs */
	for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
		int trigger, polarity;

		if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
			continue;

		xen_register_pirq(irq, -1 /* no GSI override */,
			trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
			true /* Map GSI to PIRQ */);
	}
	if (0 == nr_ioapics) {
		for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
			xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
	}
	return 0;
}

struct xen_device_domain_owner {
	domid_t domain;
	struct pci_dev *dev;
	struct list_head list;
};

static DEFINE_SPINLOCK(dev_domain_list_spinlock);
static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);

static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
{
	struct xen_device_domain_owner *owner;

	list_for_each_entry(owner, &dev_domain_list, list) {
		if (owner->dev == dev)
			return owner;
	}
	return NULL;
}

int xen_find_device_domain_owner(struct pci_dev *dev)
{
	struct xen_device_domain_owner *owner;
	int domain = -ENODEV;

	spin_lock(&dev_domain_list_spinlock);
	owner = find_device(dev);
	if (owner)
		domain = owner->domain;
	spin_unlock(&dev_domain_list_spinlock);
	return domain;
}
EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);

int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
{
	struct xen_device_domain_owner *owner;

	owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
	if (!owner)
		return -ENODEV;

	spin_lock(&dev_domain_list_spinlock);
	if (find_device(dev)) {
		spin_unlock(&dev_domain_list_spinlock);
		kfree(owner);
		return -EEXIST;
	}
	owner->domain = domain;
	owner->dev = dev;
	list_add_tail(&owner->list, &dev_domain_list);
	spin_unlock(&dev_domain_list_spinlock);
	return 0;
}
EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);

int xen_unregister_device_domain_owner(struct pci_dev *dev)
{
	struct xen_device_domain_owner *owner;

	spin_lock(&dev_domain_list_spinlock);
	owner = find_device(dev);
	if (!owner) {
		spin_unlock(&dev_domain_list_spinlock);
		return -ENODEV;
	}
	list_del(&owner->list);
	spin_unlock(&dev_domain_list_spinlock);
	kfree(owner);
	return 0;
}
EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
#endif
Commit	Line	Data
b5401a96	1	/*
996c34ae KRW	2	* Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
	3	* initial domain support. We also handle the DSDT _PRT callbacks for GSI's
	4	* used in HVM and initial domain mode (PV does not parse ACPI, so it has no
	5	* concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
	6	* 0xcf8 PCI configuration read/write.
b5401a96 AN	7	*
b5401a96 AN	8	* Author: Ryan Wilson <hap9@epoch.ncsc.mil>
996c34ae KRW	9	* Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
996c34ae KRW	10	* Stefano Stabellini <stefano.stabellini@eu.citrix.com>
b5401a96 AN	11	*/
	12	#include <linux/module.h>
	13	#include <linux/init.h>
	14	#include <linux/pci.h>
	15	#include <linux/acpi.h>
	16
	17	#include <linux/io.h>
0e058e52	18	#include <asm/io_apic.h>
b5401a96 AN	19	#include <asm/pci_x86.h>
	20
	21	#include <asm/xen/hypervisor.h>
	22
3942b740	23	#include <xen/features.h>
b5401a96 AN	24	#include <xen/events.h>
	25	#include <asm/xen/pci.h>
	26
fef6e262 KRW	27	static int xen_pcifront_enable_irq(struct pci_dev *dev)
	28	{
	29	int rc;
	30	int share = 1;
	31	int pirq;
	32	u8 gsi;
	33
	34	rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
	35	if (rc < 0) {
	36	dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
	37	rc);
	38	return rc;
	39	}
78316ada KRW	40	/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
78316ada KRW	41	pirq = gsi;
fef6e262 KRW	42
	43	if (gsi < NR_IRQS_LEGACY)
	44	share = 0;
	45
	46	rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
	47	if (rc < 0) {
	48	dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
	49	gsi, pirq, rc);
	50	return rc;
	51	}
	52
	53	dev->irq = rc;
	54	dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
	55	return 0;
	56	}
	57
42a1de56	58	#ifdef CONFIG_ACPI
ed89eb63	59	static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
78316ada	60	bool set_pirq)
42a1de56	61	{
ed89eb63	62	int rc, pirq = -1, irq = -1;
42a1de56 SS	63	struct physdev_map_pirq map_irq;
	64	int shareable = 0;
	65	char *name;
	66
78316ada KRW	67	if (set_pirq)
	68	pirq = gsi;
	69
fef6e262 KRW	70	map_irq.domid = DOMID_SELF;
	71	map_irq.type = MAP_PIRQ_TYPE_GSI;
	72	map_irq.index = gsi;
	73	map_irq.pirq = pirq;
	74
	75	rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
	76	if (rc) {
	77	printk(KERN_WARNING "xen map irq failed %d\n", rc);
	78	return -1;
	79	}
	80
30bd35ed KRW	81	if (triggering == ACPI_EDGE_SENSITIVE) {
	82	shareable = 0;
	83	name = "ioapic-edge";
	84	} else {
	85	shareable = 1;
	86	name = "ioapic-level";
	87	}
	88
	89	if (gsi_override >= 0)
	90	gsi = gsi_override;
	91
ed89eb63	92	irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
30bd35ed KRW	93	if (irq < 0)
	94	goto out;
	95
ed89eb63	96	printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
fef6e262 KRW	97	out:
	98	return irq;
	99	}
	100
ed89eb63 KRW	101	static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
	102	int trigger, int polarity)
	103	{
	104	if (!xen_hvm_domain())
	105	return -1;
	106
78316ada KRW	107	return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
78316ada KRW	108	false /* no mapping of GSI to PIRQ */);
ed89eb63 KRW	109	}
	110
	111	#ifdef CONFIG_XEN_DOM0
fef6e262 KRW	112	static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
	113	{
	114	int rc, irq;
	115	struct physdev_setup_gsi setup_gsi;
	116
	117	if (!xen_pv_domain())
	118	return -1;
	119
	120	printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
	121	gsi, triggering, polarity);
	122
ed89eb63	123	irq = xen_register_pirq(gsi, gsi_override, triggering, true);
fef6e262 KRW	124
	125	setup_gsi.gsi = gsi;
	126	setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
	127	setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
	128
	129	rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
	130	if (rc == -EEXIST)
	131	printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
	132	else if (rc) {
	133	printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
	134	gsi, rc);
	135	}
	136
	137	return irq;
	138	}
	139
	140	static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
	141	int trigger, int polarity)
	142	{
	143	return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
	144	}
	145	#endif
d92edd81	146	#endif
fef6e262	147
b5401a96 AN	148	#if defined(CONFIG_PCI_MSI)
b5401a96 AN	149	#include <linux/msi.h>
809f9267	150	#include <asm/msidef.h>
b5401a96 AN	151
	152	struct xen_pci_frontend_ops *xen_pci_frontend;
	153	EXPORT_SYMBOL_GPL(xen_pci_frontend);
	154
fef6e262 KRW	155	static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
	156	{
	157	int irq, ret, i;
	158	struct msi_desc *msidesc;
	159	int *v;
	160
	161	v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
	162	if (!v)
	163	return -ENOMEM;
	164
	165	if (type == PCI_CAP_ID_MSIX)
	166	ret = xen_pci_frontend_enable_msix(dev, v, nvec);
	167	else
	168	ret = xen_pci_frontend_enable_msi(dev, v);
	169	if (ret)
	170	goto error;
	171	i = 0;
	172	list_for_each_entry(msidesc, &dev->msi_list, list) {
	173	irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0,
	174	(type == PCI_CAP_ID_MSIX) ?
	175	"pcifront-msi-x" :
	176	"pcifront-msi",
	177	DOMID_SELF);
	178	if (irq < 0)
	179	goto free;
	180	i++;
	181	}
	182	kfree(v);
	183	return 0;
	184
	185	error:
	186	dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
	187	free:
	188	kfree(v);
	189	return ret;
	190	}
	191
af42b8d1 SS	192	#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE \| \
	193	MSI_DATA_LEVEL_ASSERT \| (3 << 8) \| MSI_DATA_VECTOR(0))
	194
809f9267 SS	195	static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
	196	struct msi_msg *msg)
	197	{
	198	/* We set vector == 0 to tell the hypervisor we don't care about it,
	199	* but we want a pirq setup instead.
	200	* We use the dest_id field to pass the pirq that we want. */
	201	msg->address_hi = MSI_ADDR_BASE_HI \| MSI_ADDR_EXT_DEST_ID(pirq);
	202	msg->address_lo =
	203	MSI_ADDR_BASE_LO \|
	204	MSI_ADDR_DEST_MODE_PHYSICAL \|
	205	MSI_ADDR_REDIRECTION_CPU \|
	206	MSI_ADDR_DEST_ID(pirq);
	207
af42b8d1	208	msg->data = XEN_PIRQ_MSI_DATA;
809f9267 SS	209	}
	210
	211	static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
	212	{
bf480d95	213	int irq, pirq;
809f9267 SS	214	struct msi_desc *msidesc;
	215	struct msi_msg msg;
	216
	217	list_for_each_entry(msidesc, &dev->msi_list, list) {
af42b8d1 SS	218	__read_msi_msg(msidesc, &msg);
	219	pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) \|
	220	((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
bf480d95 IC	221	if (msg.data != XEN_PIRQ_MSI_DATA \|\|
	222	xen_irq_from_pirq(pirq) < 0) {
	223	pirq = xen_allocate_pirq_msi(dev, msidesc);
	224	if (pirq < 0)
af42b8d1	225	goto error;
bf480d95 IC	226	xen_msi_compose_msg(dev, pirq, &msg);
	227	__write_msi_msg(msidesc, &msg);
	228	dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
	229	} else {
	230	dev_dbg(&dev->dev,
	231	"xen: msi already bound to pirq=%d\n", pirq);
af42b8d1	232	}
ca1d8fe9	233	irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0,
bf480d95	234	(type == PCI_CAP_ID_MSIX) ?
beafbdc1 KRW	235	"msi-x" : "msi",
beafbdc1 KRW	236	DOMID_SELF);
bf480d95	237	if (irq < 0)
809f9267	238	goto error;
bf480d95 IC	239	dev_dbg(&dev->dev,
bf480d95 IC	240	"xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
809f9267 SS	241	}
	242	return 0;
	243
809f9267	244	error:
bf480d95 IC	245	dev_err(&dev->dev,
	246	"Xen PCI frontend has not registered MSI/MSI-X support!\n");
	247	return -ENODEV;
809f9267 SS	248	}
809f9267 SS	249
260a7d4c	250	#ifdef CONFIG_XEN_DOM0
f731e3ef QH	251	static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
f731e3ef QH	252	{
71eef7d1	253	int ret = 0;
f731e3ef QH	254	struct msi_desc *msidesc;
	255
	256	list_for_each_entry(msidesc, &dev->msi_list, list) {
71eef7d1	257	struct physdev_map_pirq map_irq;
beafbdc1 KRW	258	domid_t domid;
	259
	260	domid = ret = xen_find_device_domain_owner(dev);
	261	/* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
	262	* hence check ret value for < 0. */
	263	if (ret < 0)
	264	domid = DOMID_SELF;
71eef7d1 IC	265
71eef7d1 IC	266	memset(&map_irq, 0, sizeof(map_irq));
beafbdc1	267	map_irq.domid = domid;
71eef7d1 IC	268	map_irq.type = MAP_PIRQ_TYPE_MSI;
	269	map_irq.index = -1;
	270	map_irq.pirq = -1;
	271	map_irq.bus = dev->bus->number;
	272	map_irq.devfn = dev->devfn;
	273
	274	if (type == PCI_CAP_ID_MSIX) {
	275	int pos;
	276	u32 table_offset, bir;
	277
	278	pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
	279
	280	pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
	281	&table_offset);
	282	bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
	283
	284	map_irq.table_base = pci_resource_start(dev, bir);
	285	map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
	286	}
	287
	288	ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
	289	if (ret) {
beafbdc1 KRW	290	dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
beafbdc1 KRW	291	ret, domid);
71eef7d1 IC	292	goto out;
	293	}
	294
	295	ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
	296	map_irq.pirq, map_irq.index,
	297	(type == PCI_CAP_ID_MSIX) ?
beafbdc1 KRW	298	"msi-x" : "msi",
beafbdc1 KRW	299	domid);
71eef7d1 IC	300	if (ret < 0)
71eef7d1 IC	301	goto out;
f731e3ef	302	}
71eef7d1 IC	303	ret = 0;
	304	out:
	305	return ret;
f731e3ef	306	}
b5401a96 AN	307	#endif
b5401a96 AN	308
fef6e262	309	static void xen_teardown_msi_irqs(struct pci_dev *dev)
b5401a96	310	{
fef6e262	311	struct msi_desc *msidesc;
b5401a96	312
fef6e262 KRW	313	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	314	if (msidesc->msi_attrib.is_msix)
	315	xen_pci_frontend_disable_msix(dev);
	316	else
	317	xen_pci_frontend_disable_msi(dev);
b5401a96	318
fef6e262 KRW	319	/* Free the IRQ's and the msidesc using the generic code. */
	320	default_teardown_msi_irqs(dev);
	321	}
f4d0635b	322
fef6e262 KRW	323	static void xen_teardown_msi_irq(unsigned int irq)
	324	{
	325	xen_destroy_irq(irq);
	326	}
b5401a96	327
fef6e262	328	#endif
3f2a230c	329
b5401a96 AN	330	int __init pci_xen_init(void)
	331	{
	332	if (!xen_pv_domain() \|\| xen_initial_domain())
	333	return -ENODEV;
	334
	335	printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
	336
	337	pcibios_set_cache_line_size();
	338
	339	pcibios_enable_irq = xen_pcifront_enable_irq;
	340	pcibios_disable_irq = NULL;
	341
	342	#ifdef CONFIG_ACPI
	343	/* Keep ACPI out of the picture */
	344	acpi_noirq = 1;
	345	#endif
	346
b5401a96 AN	347	#ifdef CONFIG_PCI_MSI
	348	x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
	349	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	350	x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
	351	#endif
	352	return 0;
	353	}
3942b740 SS	354
	355	int __init pci_xen_hvm_init(void)
	356	{
	357	if (!xen_feature(XENFEAT_hvm_pirqs))
	358	return 0;
	359
	360	#ifdef CONFIG_ACPI
	361	/*
	362	* We don't want to change the actual ACPI delivery model,
	363	* just how GSIs get registered.
	364	*/
	365	__acpi_register_gsi = acpi_register_gsi_xen_hvm;
	366	#endif
809f9267 SS	367
	368	#ifdef CONFIG_PCI_MSI
	369	x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
	370	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	371	#endif
3942b740 SS	372	return 0;
3942b740 SS	373	}
38aa66fc JF	374
38aa66fc JF	375	#ifdef CONFIG_XEN_DOM0
38aa66fc JF	376	static __init void xen_setup_acpi_sci(void)
	377	{
	378	int rc;
	379	int trigger, polarity;
	380	int gsi = acpi_sci_override_gsi;
ee339fe6 KRW	381	int irq = -1;
ee339fe6 KRW	382	int gsi_override = -1;
38aa66fc JF	383
	384	if (!gsi)
	385	return;
	386
	387	rc = acpi_get_override_irq(gsi, &trigger, &polarity);
	388	if (rc) {
	389	printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
	390	" sci, rc=%d\n", rc);
	391	return;
	392	}
	393	trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
	394	polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
996c34ae	395
38aa66fc JF	396	printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
	397	"polarity=%d\n", gsi, trigger, polarity);
	398
ee339fe6 KRW	399	/* Before we bind the GSI to a Linux IRQ, check whether
	400	* we need to override it with bus_irq (IRQ) value. Usually for
	401	* IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
	402	* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
	403	* but there are oddballs where the IRQ != GSI:
	404	* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
	405	* which ends up being: gsi_to_irq[9] == 20
	406	* (which is what acpi_gsi_to_irq ends up calling when starting the
	407	* the ACPI interpreter and keels over since IRQ 9 has not been
	408	* setup as we had setup IRQ 20 for it).
	409	*/
ee339fe6	410	if (acpi_gsi_to_irq(gsi, &irq) == 0) {
97ffab1f KRW	411	/* Use the provided value if it's valid. */
97ffab1f KRW	412	if (irq >= 0)
ee339fe6 KRW	413	gsi_override = irq;
	414	}
	415
	416	gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
38aa66fc JF	417	printk(KERN_INFO "xen: acpi sci %d\n", gsi);
	418
	419	return;
	420	}
a0ee0567 KRW	421
a0ee0567 KRW	422	int __init pci_xen_initial_domain(void)
38aa66fc	423	{
78316ada	424	int irq;
a0ee0567	425
f731e3ef QH	426	#ifdef CONFIG_PCI_MSI
	427	x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
	428	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	429	#endif
38aa66fc JF	430	xen_setup_acpi_sci();
38aa66fc JF	431	__acpi_register_gsi = acpi_register_gsi_xen;
38aa66fc JF	432	/* Pre-allocate legacy irqs */
	433	for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
	434	int trigger, polarity;
	435
	436	if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
	437	continue;
	438
ee339fe6	439	xen_register_pirq(irq, -1 /* no GSI override */,
ed89eb63	440	trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
78316ada	441	true /* Map GSI to PIRQ */);
38aa66fc	442	}
9b6519db	443	if (0 == nr_ioapics) {
78316ada KRW	444	for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
78316ada KRW	445	xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
9b6519db	446	}
a0ee0567	447	return 0;
38aa66fc	448	}
c55fa78b KRW	449
	450	struct xen_device_domain_owner {
	451	domid_t domain;
	452	struct pci_dev *dev;
	453	struct list_head list;
	454	};
	455
	456	static DEFINE_SPINLOCK(dev_domain_list_spinlock);
	457	static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
	458
	459	static struct xen_device_domain_owner find_device(struct pci_dev dev)
	460	{
	461	struct xen_device_domain_owner *owner;
	462
	463	list_for_each_entry(owner, &dev_domain_list, list) {
	464	if (owner->dev == dev)
	465	return owner;
	466	}
	467	return NULL;
	468	}
	469
	470	int xen_find_device_domain_owner(struct pci_dev *dev)
	471	{
	472	struct xen_device_domain_owner *owner;
	473	int domain = -ENODEV;
	474
	475	spin_lock(&dev_domain_list_spinlock);
	476	owner = find_device(dev);
	477	if (owner)
	478	domain = owner->domain;
	479	spin_unlock(&dev_domain_list_spinlock);
	480	return domain;
	481	}
	482	EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
	483
	484	int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
	485	{
	486	struct xen_device_domain_owner *owner;
	487
	488	owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
	489	if (!owner)
	490	return -ENODEV;
	491
	492	spin_lock(&dev_domain_list_spinlock);
	493	if (find_device(dev)) {
	494	spin_unlock(&dev_domain_list_spinlock);
	495	kfree(owner);
	496	return -EEXIST;
	497	}
	498	owner->domain = domain;
	499	owner->dev = dev;
	500	list_add_tail(&owner->list, &dev_domain_list);
	501	spin_unlock(&dev_domain_list_spinlock);
	502	return 0;
	503	}
	504	EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
	505
	506	int xen_unregister_device_domain_owner(struct pci_dev *dev)
	507	{
	508	struct xen_device_domain_owner *owner;
	509
	510	spin_lock(&dev_domain_list_spinlock);
	511	owner = find_device(dev);
	512	if (!owner) {
513	spin_unlock(&dev_domain_list_spinlock);
514	return -ENODEV;
515	}
516	list_del(&owner->list);
517	spin_unlock(&dev_domain_list_spinlock);
518	kfree(owner);
519	return 0;
520	}
521	EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
7c1bfd68	522	#endif