]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - arch/x86/realmode/init.c
Merge branch 'spi-5.5' into spi-linus
[mirror_ubuntu-jammy-kernel.git] / arch / x86 / realmode / init.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
084ee1c6 2#include <linux/io.h>
5ff3e2c3 3#include <linux/slab.h>
084ee1c6 4#include <linux/memblock.h>
163ea3c8 5#include <linux/mem_encrypt.h>
084ee1c6 6
d1163651 7#include <asm/set_memory.h>
084ee1c6
JS
8#include <asm/pgtable.h>
9#include <asm/realmode.h>
18bc7bd5 10#include <asm/tlbflush.h>
6f599d84 11#include <asm/crash.h>
084ee1c6 12
b429dbf6 13struct real_mode_header *real_mode_header;
cda846f1 14u32 *trampoline_cr4_features;
084ee1c6 15
b234e8a0
TG
16/* Hold the pgd entry used on booting additional CPUs */
17pgd_t trampoline_pgd_entry;
18
4f7b9226 19void __init reserve_real_mode(void)
084ee1c6
JS
20{
21 phys_addr_t mem;
5ff3e2c3
AL
22 size_t size = real_mode_size_needed();
23
24 if (!size)
25 return;
26
27 WARN_ON(slab_is_available());
4f7b9226
YL
28
29 /* Has to be under 1M so we can execute real-mode AP code. */
30 mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
5ff3e2c3
AL
31 if (!mem) {
32 pr_info("No sub-1M memory is available for the trampoline\n");
33 return;
34 }
4f7b9226 35
4f7b9226 36 memblock_reserve(mem, size);
f560bd19 37 set_real_mode_mem(mem);
6f599d84 38 crash_reserve_low_1M();
4f7b9226
YL
39}
40
d0de0f68 41static void __init setup_real_mode(void)
4f7b9226 42{
084ee1c6 43 u16 real_mode_seg;
7306006f 44 const u32 *rel;
084ee1c6 45 u32 count;
b429dbf6 46 unsigned char *base;
7306006f 47 unsigned long phys_base;
f37240f1 48 struct trampoline_header *trampoline_header;
b429dbf6 49 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
f37240f1
JS
50#ifdef CONFIG_X86_64
51 u64 *trampoline_pgd;
638d957b 52 u64 efer;
f37240f1 53#endif
084ee1c6 54
4f7b9226 55 base = (unsigned char *)real_mode_header;
084ee1c6 56
163ea3c8
TL
57 /*
58 * If SME is active, the trampoline area will need to be in
59 * decrypted memory in order to bring up other processors
fcdcd6cd 60 * successfully. This is not needed for SEV.
163ea3c8 61 */
fcdcd6cd
TL
62 if (sme_active())
63 set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT);
163ea3c8 64
b429dbf6 65 memcpy(base, real_mode_blob, size);
084ee1c6 66
7306006f
PA
67 phys_base = __pa(base);
68 real_mode_seg = phys_base >> 4;
69
084ee1c6
JS
70 rel = (u32 *) real_mode_relocs;
71
72 /* 16-bit segment relocations. */
7306006f
PA
73 count = *rel++;
74 while (count--) {
75 u16 *seg = (u16 *) (base + *rel++);
084ee1c6
JS
76 *seg = real_mode_seg;
77 }
78
79 /* 32-bit linear relocations. */
7306006f
PA
80 count = *rel++;
81 while (count--) {
82 u32 *ptr = (u32 *) (base + *rel++);
83 *ptr += phys_base;
084ee1c6
JS
84 }
85
f37240f1
JS
86 /* Must be perfomed *after* relocation. */
87 trampoline_header = (struct trampoline_header *)
88 __va(real_mode_header->trampoline_header);
89
48927bbb 90#ifdef CONFIG_X86_32
fc8d7826 91 trampoline_header->start = __pa_symbol(startup_32_smp);
f37240f1 92 trampoline_header->gdt_limit = __BOOT_DS + 7;
fc8d7826 93 trampoline_header->gdt_base = __pa_symbol(boot_gdt);
48927bbb 94#else
79603879
PA
95 /*
96 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
97 * so we need to mask it out.
98 */
638d957b
PA
99 rdmsrl(MSR_EFER, efer);
100 trampoline_header->efer = efer & ~EFER_LMA;
cda846f1 101
f37240f1 102 trampoline_header->start = (u64) secondary_startup_64;
cda846f1 103 trampoline_cr4_features = &trampoline_header->cr4;
18bc7bd5 104 *trampoline_cr4_features = mmu_cr4_features;
cda846f1 105
46d010e0
TL
106 trampoline_header->flags = 0;
107 if (sme_active())
108 trampoline_header->flags |= TH_FLAGS_SME_ACTIVE;
109
f37240f1 110 trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
b234e8a0 111 trampoline_pgd[0] = trampoline_pgd_entry.pgd;
65ade2f8 112 trampoline_pgd[511] = init_top_pgt[511].pgd;
48927bbb 113#endif
084ee1c6
JS
114}
115
116/*
4f7b9226 117 * reserve_real_mode() gets called very early, to guarantee the
231b3642 118 * availability of low memory. This is before the proper kernel page
084ee1c6 119 * tables are set up, so we cannot set page permissions in that
231b3642
YL
120 * function. Also trampoline code will be executed by APs so we
121 * need to mark it executable at do_pre_smp_initcalls() at least,
122 * thus run it as a early_initcall().
084ee1c6 123 */
d0de0f68 124static void __init set_real_mode_permissions(void)
084ee1c6 125{
b429dbf6
JS
126 unsigned char *base = (unsigned char *) real_mode_header;
127 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
084ee1c6 128
f156ffc4 129 size_t ro_size =
b429dbf6
JS
130 PAGE_ALIGN(real_mode_header->ro_end) -
131 __pa(base);
f156ffc4
JS
132
133 size_t text_size =
b429dbf6
JS
134 PAGE_ALIGN(real_mode_header->ro_end) -
135 real_mode_header->text_start;
f156ffc4
JS
136
137 unsigned long text_start =
b429dbf6 138 (unsigned long) __va(real_mode_header->text_start);
f156ffc4 139
b429dbf6
JS
140 set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
141 set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
f156ffc4 142 set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
d0de0f68
AL
143}
144
145static int __init init_real_mode(void)
146{
147 if (!real_mode_header)
148 panic("Real mode trampoline was not allocated");
149
150 setup_real_mode();
151 set_real_mode_permissions();
f156ffc4 152
084ee1c6
JS
153 return 0;
154}
d0de0f68 155early_initcall(init_real_mode);