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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/preempt.h> | |
f120f13e | 18 | #include <linux/hardirq.h> |
5ead97c8 JF |
19 | #include <linux/percpu.h> |
20 | #include <linux/delay.h> | |
21 | #include <linux/start_kernel.h> | |
22 | #include <linux/sched.h> | |
23 | #include <linux/bootmem.h> | |
24 | #include <linux/module.h> | |
f4f97b3e JF |
25 | #include <linux/mm.h> |
26 | #include <linux/page-flags.h> | |
27 | #include <linux/highmem.h> | |
b8c2d3df | 28 | #include <linux/console.h> |
5ead97c8 JF |
29 | |
30 | #include <xen/interface/xen.h> | |
ecbf29cd | 31 | #include <xen/interface/version.h> |
5ead97c8 JF |
32 | #include <xen/interface/physdev.h> |
33 | #include <xen/interface/vcpu.h> | |
34 | #include <xen/features.h> | |
35 | #include <xen/page.h> | |
084a2a4e | 36 | #include <xen/hvc-console.h> |
5ead97c8 JF |
37 | |
38 | #include <asm/paravirt.h> | |
caf43bf7 | 39 | #include <asm/apic.h> |
5ead97c8 JF |
40 | #include <asm/page.h> |
41 | #include <asm/xen/hypercall.h> | |
42 | #include <asm/xen/hypervisor.h> | |
43 | #include <asm/fixmap.h> | |
44 | #include <asm/processor.h> | |
1153968a | 45 | #include <asm/msr-index.h> |
5ead97c8 JF |
46 | #include <asm/setup.h> |
47 | #include <asm/desc.h> | |
48 | #include <asm/pgtable.h> | |
f87e4cac | 49 | #include <asm/tlbflush.h> |
fefa629a | 50 | #include <asm/reboot.h> |
5ead97c8 JF |
51 | |
52 | #include "xen-ops.h" | |
3b827c1b | 53 | #include "mmu.h" |
5ead97c8 JF |
54 | #include "multicalls.h" |
55 | ||
56 | EXPORT_SYMBOL_GPL(hypercall_page); | |
57 | ||
5ead97c8 JF |
58 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
59 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 60 | |
6e833587 JF |
61 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
62 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
63 | ||
bf18bf94 JF |
64 | /* |
65 | * Identity map, in addition to plain kernel map. This needs to be | |
66 | * large enough to allocate page table pages to allocate the rest. | |
67 | * Each page can map 2MB. | |
68 | */ | |
69 | static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss; | |
70 | ||
71 | #ifdef CONFIG_X86_64 | |
72 | /* l3 pud for userspace vsyscall mapping */ | |
73 | static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; | |
74 | #endif /* CONFIG_X86_64 */ | |
75 | ||
9f79991d JF |
76 | /* |
77 | * Note about cr3 (pagetable base) values: | |
78 | * | |
79 | * xen_cr3 contains the current logical cr3 value; it contains the | |
80 | * last set cr3. This may not be the current effective cr3, because | |
81 | * its update may be being lazily deferred. However, a vcpu looking | |
82 | * at its own cr3 can use this value knowing that it everything will | |
83 | * be self-consistent. | |
84 | * | |
85 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | |
86 | * hypercall to set the vcpu cr3 is complete (so it may be a little | |
87 | * out of date, but it will never be set early). If one vcpu is | |
88 | * looking at another vcpu's cr3 value, it should use this variable. | |
89 | */ | |
90 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | |
91 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | |
5ead97c8 JF |
92 | |
93 | struct start_info *xen_start_info; | |
94 | EXPORT_SYMBOL_GPL(xen_start_info); | |
95 | ||
a0d695c8 | 96 | struct shared_info xen_dummy_shared_info; |
60223a32 JF |
97 | |
98 | /* | |
99 | * Point at some empty memory to start with. We map the real shared_info | |
100 | * page as soon as fixmap is up and running. | |
101 | */ | |
a0d695c8 | 102 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
103 | |
104 | /* | |
105 | * Flag to determine whether vcpu info placement is available on all | |
106 | * VCPUs. We assume it is to start with, and then set it to zero on | |
107 | * the first failure. This is because it can succeed on some VCPUs | |
108 | * and not others, since it can involve hypervisor memory allocation, | |
109 | * or because the guest failed to guarantee all the appropriate | |
110 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
111 | * | |
112 | * Note that any particular CPU may be using a placed vcpu structure, | |
113 | * but we can only optimise if the all are. | |
114 | * | |
115 | * 0: not available, 1: available | |
116 | */ | |
db053b86 JF |
117 | static int have_vcpu_info_placement = |
118 | #ifdef CONFIG_X86_32 | |
119 | 1 | |
120 | #else | |
121 | 0 | |
122 | #endif | |
123 | ; | |
124 | ||
60223a32 | 125 | |
9c7a7942 | 126 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 127 | { |
60223a32 JF |
128 | struct vcpu_register_vcpu_info info; |
129 | int err; | |
130 | struct vcpu_info *vcpup; | |
131 | ||
a0d695c8 | 132 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
5ead97c8 | 133 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
60223a32 JF |
134 | |
135 | if (!have_vcpu_info_placement) | |
136 | return; /* already tested, not available */ | |
137 | ||
138 | vcpup = &per_cpu(xen_vcpu_info, cpu); | |
139 | ||
140 | info.mfn = virt_to_mfn(vcpup); | |
141 | info.offset = offset_in_page(vcpup); | |
142 | ||
e3d26976 | 143 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
60223a32 JF |
144 | cpu, vcpup, info.mfn, info.offset); |
145 | ||
146 | /* Check to see if the hypervisor will put the vcpu_info | |
147 | structure where we want it, which allows direct access via | |
148 | a percpu-variable. */ | |
149 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
150 | ||
151 | if (err) { | |
152 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
153 | have_vcpu_info_placement = 0; | |
154 | } else { | |
155 | /* This cpu is using the registered vcpu info, even if | |
156 | later ones fail to. */ | |
157 | per_cpu(xen_vcpu, cpu) = vcpup; | |
6487673b | 158 | |
60223a32 JF |
159 | printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n", |
160 | cpu, vcpup); | |
161 | } | |
5ead97c8 JF |
162 | } |
163 | ||
9c7a7942 JF |
164 | /* |
165 | * On restore, set the vcpu placement up again. | |
166 | * If it fails, then we're in a bad state, since | |
167 | * we can't back out from using it... | |
168 | */ | |
169 | void xen_vcpu_restore(void) | |
170 | { | |
171 | if (have_vcpu_info_placement) { | |
172 | int cpu; | |
173 | ||
174 | for_each_online_cpu(cpu) { | |
175 | bool other_cpu = (cpu != smp_processor_id()); | |
176 | ||
177 | if (other_cpu && | |
178 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
179 | BUG(); | |
180 | ||
181 | xen_vcpu_setup(cpu); | |
182 | ||
183 | if (other_cpu && | |
184 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
185 | BUG(); | |
186 | } | |
187 | ||
188 | BUG_ON(!have_vcpu_info_placement); | |
189 | } | |
190 | } | |
191 | ||
5ead97c8 JF |
192 | static void __init xen_banner(void) |
193 | { | |
95c7c23b JF |
194 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
195 | struct xen_extraversion extra; | |
196 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
197 | ||
5ead97c8 | 198 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 199 | pv_info.name); |
95c7c23b JF |
200 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
201 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 202 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
203 | } |
204 | ||
65ea5b03 PA |
205 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
206 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 JF |
207 | { |
208 | unsigned maskedx = ~0; | |
209 | ||
210 | /* | |
211 | * Mask out inconvenient features, to try and disable as many | |
212 | * unsupported kernel subsystems as possible. | |
213 | */ | |
65ea5b03 | 214 | if (*ax == 1) |
5ead97c8 JF |
215 | maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */ |
216 | (1 << X86_FEATURE_ACPI) | /* disable ACPI */ | |
dbe9e994 JF |
217 | (1 << X86_FEATURE_MCE) | /* disable MCE */ |
218 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
5ead97c8 JF |
219 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
220 | ||
221 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
222 | : "=a" (*ax), |
223 | "=b" (*bx), | |
224 | "=c" (*cx), | |
225 | "=d" (*dx) | |
226 | : "0" (*ax), "2" (*cx)); | |
227 | *dx &= maskedx; | |
5ead97c8 JF |
228 | } |
229 | ||
230 | static void xen_set_debugreg(int reg, unsigned long val) | |
231 | { | |
232 | HYPERVISOR_set_debugreg(reg, val); | |
233 | } | |
234 | ||
235 | static unsigned long xen_get_debugreg(int reg) | |
236 | { | |
237 | return HYPERVISOR_get_debugreg(reg); | |
238 | } | |
239 | ||
8965c1c0 | 240 | static void xen_leave_lazy(void) |
5ead97c8 | 241 | { |
8965c1c0 | 242 | paravirt_leave_lazy(paravirt_get_lazy_mode()); |
5ead97c8 | 243 | xen_mc_flush(); |
5ead97c8 JF |
244 | } |
245 | ||
246 | static unsigned long xen_store_tr(void) | |
247 | { | |
248 | return 0; | |
249 | } | |
250 | ||
a05d2eba | 251 | /* |
cef43bf6 JF |
252 | * Set the page permissions for a particular virtual address. If the |
253 | * address is a vmalloc mapping (or other non-linear mapping), then | |
254 | * find the linear mapping of the page and also set its protections to | |
255 | * match. | |
a05d2eba JF |
256 | */ |
257 | static void set_aliased_prot(void *v, pgprot_t prot) | |
258 | { | |
259 | int level; | |
260 | pte_t *ptep; | |
261 | pte_t pte; | |
262 | unsigned long pfn; | |
263 | struct page *page; | |
264 | ||
265 | ptep = lookup_address((unsigned long)v, &level); | |
266 | BUG_ON(ptep == NULL); | |
267 | ||
268 | pfn = pte_pfn(*ptep); | |
269 | page = pfn_to_page(pfn); | |
270 | ||
271 | pte = pfn_pte(pfn, prot); | |
272 | ||
273 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
274 | BUG(); | |
275 | ||
276 | if (!PageHighMem(page)) { | |
277 | void *av = __va(PFN_PHYS(pfn)); | |
278 | ||
279 | if (av != v) | |
280 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
281 | BUG(); | |
282 | } else | |
283 | kmap_flush_unused(); | |
284 | } | |
285 | ||
38ffbe66 JF |
286 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
287 | { | |
a05d2eba | 288 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
289 | int i; |
290 | ||
a05d2eba JF |
291 | for(i = 0; i < entries; i += entries_per_page) |
292 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
293 | } |
294 | ||
295 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
296 | { | |
a05d2eba | 297 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
298 | int i; |
299 | ||
a05d2eba JF |
300 | for(i = 0; i < entries; i += entries_per_page) |
301 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
302 | } |
303 | ||
5ead97c8 JF |
304 | static void xen_set_ldt(const void *addr, unsigned entries) |
305 | { | |
5ead97c8 JF |
306 | struct mmuext_op *op; |
307 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
308 | ||
309 | op = mcs.args; | |
310 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 311 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
312 | op->arg2.nr_ents = entries; |
313 | ||
314 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
315 | ||
316 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
317 | } | |
318 | ||
6b68f01b | 319 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 JF |
320 | { |
321 | unsigned long *frames; | |
322 | unsigned long va = dtr->address; | |
323 | unsigned int size = dtr->size + 1; | |
324 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
325 | int f; | |
326 | struct multicall_space mcs; | |
327 | ||
328 | /* A GDT can be up to 64k in size, which corresponds to 8192 | |
329 | 8-byte entries, or 16 4k pages.. */ | |
330 | ||
331 | BUG_ON(size > 65536); | |
332 | BUG_ON(va & ~PAGE_MASK); | |
333 | ||
334 | mcs = xen_mc_entry(sizeof(*frames) * pages); | |
335 | frames = mcs.args; | |
336 | ||
337 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
338 | frames[f] = virt_to_mfn(va); | |
339 | make_lowmem_page_readonly((void *)va); | |
340 | } | |
341 | ||
342 | MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct)); | |
343 | ||
344 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
345 | } | |
346 | ||
347 | static void load_TLS_descriptor(struct thread_struct *t, | |
348 | unsigned int cpu, unsigned int i) | |
349 | { | |
350 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
351 | xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
352 | struct multicall_space mc = __xen_mc_entry(0); | |
353 | ||
354 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
355 | } | |
356 | ||
357 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
358 | { | |
8b84ad94 JF |
359 | /* |
360 | * XXX sleazy hack: If we're being called in a lazy-cpu zone, | |
361 | * it means we're in a context switch, and %gs has just been | |
362 | * saved. This means we can zero it out to prevent faults on | |
363 | * exit from the hypervisor if the next process has no %gs. | |
364 | * Either way, it has been saved, and the new value will get | |
365 | * loaded properly. This will go away as soon as Xen has been | |
366 | * modified to not save/restore %gs for normal hypercalls. | |
8a95408e EH |
367 | * |
368 | * On x86_64, this hack is not used for %gs, because gs points | |
369 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
370 | * must not zero %gs on x86_64 | |
371 | * | |
372 | * For x86_64, we need to zero %fs, otherwise we may get an | |
373 | * exception between the new %fs descriptor being loaded and | |
374 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 375 | */ |
8a95408e EH |
376 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
377 | #ifdef CONFIG_X86_32 | |
8b84ad94 | 378 | loadsegment(gs, 0); |
8a95408e EH |
379 | #else |
380 | loadsegment(fs, 0); | |
381 | #endif | |
382 | } | |
383 | ||
384 | xen_mc_batch(); | |
385 | ||
386 | load_TLS_descriptor(t, cpu, 0); | |
387 | load_TLS_descriptor(t, cpu, 1); | |
388 | load_TLS_descriptor(t, cpu, 2); | |
389 | ||
390 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
391 | } |
392 | ||
a8fc1089 EH |
393 | #ifdef CONFIG_X86_64 |
394 | static void xen_load_gs_index(unsigned int idx) | |
395 | { | |
396 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
397 | BUG(); | |
5ead97c8 | 398 | } |
a8fc1089 | 399 | #endif |
5ead97c8 JF |
400 | |
401 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 402 | const void *ptr) |
5ead97c8 | 403 | { |
cef43bf6 | 404 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 405 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 406 | |
f120f13e JF |
407 | preempt_disable(); |
408 | ||
5ead97c8 JF |
409 | xen_mc_flush(); |
410 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
411 | BUG(); | |
f120f13e JF |
412 | |
413 | preempt_enable(); | |
5ead97c8 JF |
414 | } |
415 | ||
e176d367 | 416 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
417 | struct trap_info *info) |
418 | { | |
e176d367 | 419 | if (val->type != 0xf && val->type != 0xe) |
5ead97c8 JF |
420 | return 0; |
421 | ||
422 | info->vector = vector; | |
e176d367 EH |
423 | info->address = gate_offset(*val); |
424 | info->cs = gate_segment(*val); | |
425 | info->flags = val->dpl; | |
5ead97c8 | 426 | /* interrupt gates clear IF */ |
e176d367 | 427 | if (val->type == 0xe) |
5ead97c8 JF |
428 | info->flags |= 4; |
429 | ||
430 | return 1; | |
431 | } | |
432 | ||
433 | /* Locations of each CPU's IDT */ | |
6b68f01b | 434 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
435 | |
436 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
437 | also update Xen. */ | |
8d947344 | 438 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 439 | { |
5ead97c8 | 440 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
441 | unsigned long start, end; |
442 | ||
443 | preempt_disable(); | |
444 | ||
445 | start = __get_cpu_var(idt_desc).address; | |
446 | end = start + __get_cpu_var(idt_desc).size + 1; | |
5ead97c8 JF |
447 | |
448 | xen_mc_flush(); | |
449 | ||
8d947344 | 450 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
451 | |
452 | if (p >= start && (p + 8) <= end) { | |
453 | struct trap_info info[2]; | |
454 | ||
455 | info[1].address = 0; | |
456 | ||
e176d367 | 457 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
458 | if (HYPERVISOR_set_trap_table(info)) |
459 | BUG(); | |
460 | } | |
f120f13e JF |
461 | |
462 | preempt_enable(); | |
5ead97c8 JF |
463 | } |
464 | ||
6b68f01b | 465 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 466 | struct trap_info *traps) |
5ead97c8 | 467 | { |
5ead97c8 JF |
468 | unsigned in, out, count; |
469 | ||
e176d367 | 470 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
471 | BUG_ON(count > 256); |
472 | ||
5ead97c8 | 473 | for (in = out = 0; in < count; in++) { |
e176d367 | 474 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 475 | |
e176d367 | 476 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
477 | out++; |
478 | } | |
479 | traps[out].address = 0; | |
f87e4cac JF |
480 | } |
481 | ||
482 | void xen_copy_trap_info(struct trap_info *traps) | |
483 | { | |
6b68f01b | 484 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
485 | |
486 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
487 | } |
488 | ||
489 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
490 | hold a spinlock to protect the static traps[] array (static because | |
491 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 492 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
493 | { |
494 | static DEFINE_SPINLOCK(lock); | |
495 | static struct trap_info traps[257]; | |
f87e4cac JF |
496 | |
497 | spin_lock(&lock); | |
498 | ||
f120f13e JF |
499 | __get_cpu_var(idt_desc) = *desc; |
500 | ||
f87e4cac | 501 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
502 | |
503 | xen_mc_flush(); | |
504 | if (HYPERVISOR_set_trap_table(traps)) | |
505 | BUG(); | |
506 | ||
507 | spin_unlock(&lock); | |
508 | } | |
509 | ||
510 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
511 | they're handled differently. */ | |
512 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 513 | const void *desc, int type) |
5ead97c8 | 514 | { |
f120f13e JF |
515 | preempt_disable(); |
516 | ||
014b15be GOC |
517 | switch (type) { |
518 | case DESC_LDT: | |
519 | case DESC_TSS: | |
5ead97c8 JF |
520 | /* ignore */ |
521 | break; | |
522 | ||
523 | default: { | |
524 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
5ead97c8 JF |
525 | |
526 | xen_mc_flush(); | |
014b15be | 527 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
528 | BUG(); |
529 | } | |
530 | ||
531 | } | |
f120f13e JF |
532 | |
533 | preempt_enable(); | |
5ead97c8 JF |
534 | } |
535 | ||
faca6227 | 536 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 537 | struct thread_struct *thread) |
5ead97c8 JF |
538 | { |
539 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 540 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
541 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
542 | } | |
543 | ||
544 | static void xen_set_iopl_mask(unsigned mask) | |
545 | { | |
546 | struct physdev_set_iopl set_iopl; | |
547 | ||
548 | /* Force the change at ring 0. */ | |
549 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
550 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
551 | } | |
552 | ||
553 | static void xen_io_delay(void) | |
554 | { | |
555 | } | |
556 | ||
557 | #ifdef CONFIG_X86_LOCAL_APIC | |
ad66dd34 | 558 | static u32 xen_apic_read(u32 reg) |
5ead97c8 JF |
559 | { |
560 | return 0; | |
561 | } | |
f87e4cac | 562 | |
ad66dd34 | 563 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
564 | { |
565 | /* Warn to see if there's any stray references */ | |
566 | WARN_ON(1); | |
567 | } | |
ad66dd34 | 568 | |
ad66dd34 SS |
569 | static u64 xen_apic_icr_read(void) |
570 | { | |
571 | return 0; | |
572 | } | |
573 | ||
574 | static void xen_apic_icr_write(u32 low, u32 id) | |
575 | { | |
576 | /* Warn to see if there's any stray references */ | |
577 | WARN_ON(1); | |
578 | } | |
579 | ||
580 | static void xen_apic_wait_icr_idle(void) | |
581 | { | |
582 | return; | |
583 | } | |
584 | ||
94a8c3c2 YL |
585 | static u32 xen_safe_apic_wait_icr_idle(void) |
586 | { | |
587 | return 0; | |
588 | } | |
589 | ||
ad66dd34 SS |
590 | static struct apic_ops xen_basic_apic_ops = { |
591 | .read = xen_apic_read, | |
592 | .write = xen_apic_write, | |
ad66dd34 SS |
593 | .icr_read = xen_apic_icr_read, |
594 | .icr_write = xen_apic_icr_write, | |
595 | .wait_icr_idle = xen_apic_wait_icr_idle, | |
94a8c3c2 | 596 | .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle, |
ad66dd34 | 597 | }; |
ad66dd34 | 598 | |
5ead97c8 JF |
599 | #endif |
600 | ||
601 | static void xen_flush_tlb(void) | |
602 | { | |
d66bf8fc | 603 | struct mmuext_op *op; |
41e332b2 JF |
604 | struct multicall_space mcs; |
605 | ||
606 | preempt_disable(); | |
607 | ||
608 | mcs = xen_mc_entry(sizeof(*op)); | |
5ead97c8 | 609 | |
d66bf8fc JF |
610 | op = mcs.args; |
611 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | |
612 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
613 | ||
614 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
41e332b2 JF |
615 | |
616 | preempt_enable(); | |
5ead97c8 JF |
617 | } |
618 | ||
619 | static void xen_flush_tlb_single(unsigned long addr) | |
620 | { | |
d66bf8fc | 621 | struct mmuext_op *op; |
41e332b2 JF |
622 | struct multicall_space mcs; |
623 | ||
624 | preempt_disable(); | |
5ead97c8 | 625 | |
41e332b2 | 626 | mcs = xen_mc_entry(sizeof(*op)); |
d66bf8fc JF |
627 | op = mcs.args; |
628 | op->cmd = MMUEXT_INVLPG_LOCAL; | |
629 | op->arg1.linear_addr = addr & PAGE_MASK; | |
630 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
631 | ||
632 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
41e332b2 JF |
633 | |
634 | preempt_enable(); | |
5ead97c8 JF |
635 | } |
636 | ||
4595f962 RR |
637 | static void xen_flush_tlb_others(const struct cpumask *cpus, |
638 | struct mm_struct *mm, unsigned long va) | |
f87e4cac | 639 | { |
d66bf8fc JF |
640 | struct { |
641 | struct mmuext_op op; | |
4595f962 | 642 | DECLARE_BITMAP(mask, NR_CPUS); |
d66bf8fc | 643 | } *args; |
d66bf8fc | 644 | struct multicall_space mcs; |
f87e4cac | 645 | |
4595f962 | 646 | BUG_ON(cpumask_empty(cpus)); |
f87e4cac JF |
647 | BUG_ON(!mm); |
648 | ||
d66bf8fc JF |
649 | mcs = xen_mc_entry(sizeof(*args)); |
650 | args = mcs.args; | |
4595f962 RR |
651 | args->op.arg2.vcpumask = to_cpumask(args->mask); |
652 | ||
653 | /* Remove us, and any offline CPUS. */ | |
654 | cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); | |
655 | cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); | |
656 | if (unlikely(cpumask_empty(to_cpumask(args->mask)))) | |
657 | goto issue; | |
d66bf8fc | 658 | |
f87e4cac | 659 | if (va == TLB_FLUSH_ALL) { |
d66bf8fc | 660 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; |
f87e4cac | 661 | } else { |
d66bf8fc JF |
662 | args->op.cmd = MMUEXT_INVLPG_MULTI; |
663 | args->op.arg1.linear_addr = va; | |
f87e4cac JF |
664 | } |
665 | ||
d66bf8fc JF |
666 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); |
667 | ||
4595f962 | 668 | issue: |
d66bf8fc | 669 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
f87e4cac JF |
670 | } |
671 | ||
7b1333aa JF |
672 | static void xen_clts(void) |
673 | { | |
674 | struct multicall_space mcs; | |
675 | ||
676 | mcs = xen_mc_entry(0); | |
677 | ||
678 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
679 | ||
680 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
681 | } | |
682 | ||
683 | static void xen_write_cr0(unsigned long cr0) | |
684 | { | |
685 | struct multicall_space mcs; | |
686 | ||
687 | /* Only pay attention to cr0.TS; everything else is | |
688 | ignored. */ | |
689 | mcs = xen_mc_entry(0); | |
690 | ||
691 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
692 | ||
693 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
694 | } | |
695 | ||
60223a32 JF |
696 | static void xen_write_cr2(unsigned long cr2) |
697 | { | |
6dbde353 | 698 | percpu_read(xen_vcpu)->arch.cr2 = cr2; |
60223a32 JF |
699 | } |
700 | ||
5ead97c8 JF |
701 | static unsigned long xen_read_cr2(void) |
702 | { | |
6dbde353 | 703 | return percpu_read(xen_vcpu)->arch.cr2; |
5ead97c8 JF |
704 | } |
705 | ||
60223a32 JF |
706 | static unsigned long xen_read_cr2_direct(void) |
707 | { | |
6dbde353 | 708 | return percpu_read(xen_vcpu_info.arch.cr2); |
60223a32 JF |
709 | } |
710 | ||
5ead97c8 JF |
711 | static void xen_write_cr4(unsigned long cr4) |
712 | { | |
2956a351 JF |
713 | cr4 &= ~X86_CR4_PGE; |
714 | cr4 &= ~X86_CR4_PSE; | |
715 | ||
716 | native_write_cr4(cr4); | |
5ead97c8 JF |
717 | } |
718 | ||
5ead97c8 JF |
719 | static unsigned long xen_read_cr3(void) |
720 | { | |
6dbde353 | 721 | return percpu_read(xen_cr3); |
5ead97c8 JF |
722 | } |
723 | ||
9f79991d JF |
724 | static void set_current_cr3(void *v) |
725 | { | |
6dbde353 | 726 | percpu_write(xen_current_cr3, (unsigned long)v); |
9f79991d JF |
727 | } |
728 | ||
d6182fbf | 729 | static void __xen_write_cr3(bool kernel, unsigned long cr3) |
5ead97c8 | 730 | { |
9f79991d JF |
731 | struct mmuext_op *op; |
732 | struct multicall_space mcs; | |
d6182fbf | 733 | unsigned long mfn; |
9f79991d | 734 | |
d6182fbf JF |
735 | if (cr3) |
736 | mfn = pfn_to_mfn(PFN_DOWN(cr3)); | |
737 | else | |
738 | mfn = 0; | |
f120f13e | 739 | |
d6182fbf | 740 | WARN_ON(mfn == 0 && kernel); |
5ead97c8 | 741 | |
d6182fbf | 742 | mcs = __xen_mc_entry(sizeof(*op)); |
5ead97c8 | 743 | |
9f79991d | 744 | op = mcs.args; |
d6182fbf | 745 | op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; |
9f79991d | 746 | op->arg1.mfn = mfn; |
5ead97c8 | 747 | |
9f79991d | 748 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); |
5ead97c8 | 749 | |
d6182fbf | 750 | if (kernel) { |
6dbde353 | 751 | percpu_write(xen_cr3, cr3); |
d6182fbf JF |
752 | |
753 | /* Update xen_current_cr3 once the batch has actually | |
754 | been submitted. */ | |
755 | xen_mc_callback(set_current_cr3, (void *)cr3); | |
756 | } | |
757 | } | |
758 | ||
759 | static void xen_write_cr3(unsigned long cr3) | |
760 | { | |
761 | BUG_ON(preemptible()); | |
762 | ||
763 | xen_mc_batch(); /* disables interrupts */ | |
764 | ||
765 | /* Update while interrupts are disabled, so its atomic with | |
766 | respect to ipis */ | |
6dbde353 | 767 | percpu_write(xen_cr3, cr3); |
d6182fbf JF |
768 | |
769 | __xen_write_cr3(true, cr3); | |
770 | ||
771 | #ifdef CONFIG_X86_64 | |
772 | { | |
773 | pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); | |
774 | if (user_pgd) | |
775 | __xen_write_cr3(false, __pa(user_pgd)); | |
776 | else | |
777 | __xen_write_cr3(false, 0); | |
778 | } | |
779 | #endif | |
5ead97c8 | 780 | |
9f79991d | 781 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ |
5ead97c8 JF |
782 | } |
783 | ||
1153968a JF |
784 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
785 | { | |
786 | int ret; | |
787 | ||
788 | ret = 0; | |
789 | ||
f63c2f24 | 790 | switch (msr) { |
1153968a JF |
791 | #ifdef CONFIG_X86_64 |
792 | unsigned which; | |
793 | u64 base; | |
794 | ||
795 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
796 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
797 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
798 | ||
799 | set: | |
800 | base = ((u64)high << 32) | low; | |
801 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
802 | ret = -EFAULT; | |
803 | break; | |
804 | #endif | |
d89961e2 JF |
805 | |
806 | case MSR_STAR: | |
807 | case MSR_CSTAR: | |
808 | case MSR_LSTAR: | |
809 | case MSR_SYSCALL_MASK: | |
810 | case MSR_IA32_SYSENTER_CS: | |
811 | case MSR_IA32_SYSENTER_ESP: | |
812 | case MSR_IA32_SYSENTER_EIP: | |
813 | /* Fast syscall setup is all done in hypercalls, so | |
814 | these are all ignored. Stub them out here to stop | |
815 | Xen console noise. */ | |
816 | break; | |
817 | ||
1153968a JF |
818 | default: |
819 | ret = native_write_msr_safe(msr, low, high); | |
820 | } | |
821 | ||
822 | return ret; | |
823 | } | |
824 | ||
f4f97b3e JF |
825 | /* Early in boot, while setting up the initial pagetable, assume |
826 | everything is pinned. */ | |
f8639939 | 827 | static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) |
5ead97c8 | 828 | { |
af7ae3b9 | 829 | #ifdef CONFIG_FLATMEM |
f4f97b3e | 830 | BUG_ON(mem_map); /* should only be used early */ |
af7ae3b9 | 831 | #endif |
5ead97c8 JF |
832 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); |
833 | } | |
834 | ||
6944a9c8 | 835 | /* Early release_pte assumes that all pts are pinned, since there's |
1c70e9bd | 836 | only init_mm and anything attached to that is pinned. */ |
f8639939 | 837 | static void xen_release_pte_init(unsigned long pfn) |
1c70e9bd JF |
838 | { |
839 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | |
840 | } | |
841 | ||
f6433706 | 842 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) |
74260714 JF |
843 | { |
844 | struct mmuext_op op; | |
f6433706 | 845 | op.cmd = cmd; |
74260714 JF |
846 | op.arg1.mfn = pfn_to_mfn(pfn); |
847 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | |
848 | BUG(); | |
849 | } | |
850 | ||
f4f97b3e JF |
851 | /* This needs to make sure the new pte page is pinned iff its being |
852 | attached to a pinned pagetable. */ | |
f8639939 | 853 | static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level) |
5ead97c8 | 854 | { |
f4f97b3e | 855 | struct page *page = pfn_to_page(pfn); |
5ead97c8 | 856 | |
f4f97b3e JF |
857 | if (PagePinned(virt_to_page(mm->pgd))) { |
858 | SetPagePinned(page); | |
859 | ||
d05fdf31 | 860 | vm_unmap_aliases(); |
74260714 | 861 | if (!PageHighMem(page)) { |
169ad16b | 862 | make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn))); |
6a9e9184 | 863 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) |
f6433706 | 864 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); |
d05fdf31 | 865 | } else { |
f4f97b3e JF |
866 | /* make sure there are no stray mappings of |
867 | this page */ | |
868 | kmap_flush_unused(); | |
d05fdf31 | 869 | } |
f4f97b3e | 870 | } |
5ead97c8 JF |
871 | } |
872 | ||
f8639939 | 873 | static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) |
1c70e9bd | 874 | { |
f6433706 | 875 | xen_alloc_ptpage(mm, pfn, PT_PTE); |
1c70e9bd JF |
876 | } |
877 | ||
f8639939 | 878 | static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) |
1c70e9bd | 879 | { |
f6433706 | 880 | xen_alloc_ptpage(mm, pfn, PT_PMD); |
1c70e9bd JF |
881 | } |
882 | ||
d6182fbf JF |
883 | static int xen_pgd_alloc(struct mm_struct *mm) |
884 | { | |
885 | pgd_t *pgd = mm->pgd; | |
886 | int ret = 0; | |
887 | ||
888 | BUG_ON(PagePinned(virt_to_page(pgd))); | |
889 | ||
890 | #ifdef CONFIG_X86_64 | |
891 | { | |
892 | struct page *page = virt_to_page(pgd); | |
bf18bf94 | 893 | pgd_t *user_pgd; |
d6182fbf JF |
894 | |
895 | BUG_ON(page->private != 0); | |
896 | ||
bf18bf94 JF |
897 | ret = -ENOMEM; |
898 | ||
899 | user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); | |
900 | page->private = (unsigned long)user_pgd; | |
901 | ||
902 | if (user_pgd != NULL) { | |
903 | user_pgd[pgd_index(VSYSCALL_START)] = | |
904 | __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); | |
905 | ret = 0; | |
906 | } | |
d6182fbf JF |
907 | |
908 | BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); | |
909 | } | |
910 | #endif | |
911 | ||
912 | return ret; | |
913 | } | |
914 | ||
915 | static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
916 | { | |
917 | #ifdef CONFIG_X86_64 | |
918 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
919 | ||
920 | if (user_pgd) | |
921 | free_page((unsigned long)user_pgd); | |
922 | #endif | |
923 | } | |
924 | ||
f4f97b3e | 925 | /* This should never happen until we're OK to use struct page */ |
f8639939 | 926 | static void xen_release_ptpage(unsigned long pfn, unsigned level) |
5ead97c8 | 927 | { |
f4f97b3e JF |
928 | struct page *page = pfn_to_page(pfn); |
929 | ||
930 | if (PagePinned(page)) { | |
74260714 | 931 | if (!PageHighMem(page)) { |
6a9e9184 | 932 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) |
a684d69d | 933 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); |
f4f97b3e | 934 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
74260714 | 935 | } |
c946c7de | 936 | ClearPagePinned(page); |
f4f97b3e | 937 | } |
5ead97c8 JF |
938 | } |
939 | ||
f8639939 | 940 | static void xen_release_pte(unsigned long pfn) |
f6433706 MM |
941 | { |
942 | xen_release_ptpage(pfn, PT_PTE); | |
943 | } | |
944 | ||
f8639939 | 945 | static void xen_release_pmd(unsigned long pfn) |
f6433706 MM |
946 | { |
947 | xen_release_ptpage(pfn, PT_PMD); | |
948 | } | |
949 | ||
f6e58732 | 950 | #if PAGETABLE_LEVELS == 4 |
f8639939 | 951 | static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) |
f6e58732 JF |
952 | { |
953 | xen_alloc_ptpage(mm, pfn, PT_PUD); | |
954 | } | |
955 | ||
f8639939 | 956 | static void xen_release_pud(unsigned long pfn) |
f6e58732 JF |
957 | { |
958 | xen_release_ptpage(pfn, PT_PUD); | |
959 | } | |
960 | #endif | |
961 | ||
f4f97b3e JF |
962 | #ifdef CONFIG_HIGHPTE |
963 | static void *xen_kmap_atomic_pte(struct page *page, enum km_type type) | |
5ead97c8 | 964 | { |
f4f97b3e JF |
965 | pgprot_t prot = PAGE_KERNEL; |
966 | ||
967 | if (PagePinned(page)) | |
968 | prot = PAGE_KERNEL_RO; | |
969 | ||
970 | if (0 && PageHighMem(page)) | |
971 | printk("mapping highpte %lx type %d prot %s\n", | |
972 | page_to_pfn(page), type, | |
973 | (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ"); | |
974 | ||
975 | return kmap_atomic_prot(page, type, prot); | |
5ead97c8 | 976 | } |
f4f97b3e | 977 | #endif |
5ead97c8 | 978 | |
db053b86 | 979 | #ifdef CONFIG_X86_32 |
9a4029fd JF |
980 | static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) |
981 | { | |
982 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ | |
983 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | |
984 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | |
985 | pte_val_ma(pte)); | |
986 | ||
987 | return pte; | |
988 | } | |
989 | ||
990 | /* Init-time set_pte while constructing initial pagetables, which | |
991 | doesn't allow RO pagetable pages to be remapped RW */ | |
992 | static __init void xen_set_pte_init(pte_t *ptep, pte_t pte) | |
993 | { | |
994 | pte = mask_rw_pte(ptep, pte); | |
995 | ||
996 | xen_set_pte(ptep, pte); | |
997 | } | |
db053b86 | 998 | #endif |
9a4029fd | 999 | |
5ead97c8 JF |
1000 | static __init void xen_pagetable_setup_start(pgd_t *base) |
1001 | { | |
5ead97c8 JF |
1002 | } |
1003 | ||
0e91398f | 1004 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1005 | { |
1006 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1007 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1008 | xen_start_info->shared_info); | |
1009 | ||
1010 | HYPERVISOR_shared_info = | |
1011 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1012 | } else |
1013 | HYPERVISOR_shared_info = | |
1014 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1015 | ||
2e8fe719 JF |
1016 | #ifndef CONFIG_SMP |
1017 | /* In UP this is as good a place as any to set up shared info */ | |
1018 | xen_setup_vcpu_info_placement(); | |
1019 | #endif | |
d5edbc1f JF |
1020 | |
1021 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1022 | } |
1023 | ||
1024 | static __init void xen_pagetable_setup_done(pgd_t *base) | |
1025 | { | |
0e91398f | 1026 | xen_setup_shared_info(); |
60223a32 | 1027 | } |
5ead97c8 | 1028 | |
e2426cf8 JF |
1029 | static __init void xen_post_allocator_init(void) |
1030 | { | |
8745f8b0 | 1031 | pv_mmu_ops.set_pte = xen_set_pte; |
e2426cf8 JF |
1032 | pv_mmu_ops.set_pmd = xen_set_pmd; |
1033 | pv_mmu_ops.set_pud = xen_set_pud; | |
f6e58732 JF |
1034 | #if PAGETABLE_LEVELS == 4 |
1035 | pv_mmu_ops.set_pgd = xen_set_pgd; | |
1036 | #endif | |
e2426cf8 | 1037 | |
2e8fe719 JF |
1038 | /* This will work as long as patching hasn't happened yet |
1039 | (which it hasn't) */ | |
6944a9c8 JF |
1040 | pv_mmu_ops.alloc_pte = xen_alloc_pte; |
1041 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | |
1042 | pv_mmu_ops.release_pte = xen_release_pte; | |
1043 | pv_mmu_ops.release_pmd = xen_release_pmd; | |
8745f8b0 JF |
1044 | #if PAGETABLE_LEVELS == 4 |
1045 | pv_mmu_ops.alloc_pud = xen_alloc_pud; | |
1046 | pv_mmu_ops.release_pud = xen_release_pud; | |
1047 | #endif | |
e2426cf8 | 1048 | |
bf18bf94 JF |
1049 | #ifdef CONFIG_X86_64 |
1050 | SetPagePinned(virt_to_page(level3_user_vsyscall)); | |
1051 | #endif | |
e2426cf8 JF |
1052 | xen_mark_init_mm_pinned(); |
1053 | } | |
1054 | ||
60223a32 | 1055 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 1056 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1057 | { |
1058 | int cpu; | |
1059 | ||
1060 | for_each_possible_cpu(cpu) | |
1061 | xen_vcpu_setup(cpu); | |
1062 | ||
1063 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1064 | percpu area for all cpus, so make use of it */ | |
1065 | if (have_vcpu_info_placement) { | |
1066 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | |
1067 | ||
93b1eab3 JF |
1068 | pv_irq_ops.save_fl = xen_save_fl_direct; |
1069 | pv_irq_ops.restore_fl = xen_restore_fl_direct; | |
1070 | pv_irq_ops.irq_disable = xen_irq_disable_direct; | |
1071 | pv_irq_ops.irq_enable = xen_irq_enable_direct; | |
1072 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; | |
60223a32 | 1073 | } |
5ead97c8 JF |
1074 | } |
1075 | ||
ab144f5e AK |
1076 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1077 | unsigned long addr, unsigned len) | |
6487673b JF |
1078 | { |
1079 | char *start, *end, *reloc; | |
1080 | unsigned ret; | |
1081 | ||
1082 | start = end = reloc = NULL; | |
1083 | ||
93b1eab3 JF |
1084 | #define SITE(op, x) \ |
1085 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1086 | if (have_vcpu_info_placement) { \ |
1087 | start = (char *)xen_##x##_direct; \ | |
1088 | end = xen_##x##_direct_end; \ | |
1089 | reloc = xen_##x##_direct_reloc; \ | |
1090 | } \ | |
1091 | goto patch_site | |
1092 | ||
1093 | switch (type) { | |
93b1eab3 JF |
1094 | SITE(pv_irq_ops, irq_enable); |
1095 | SITE(pv_irq_ops, irq_disable); | |
1096 | SITE(pv_irq_ops, save_fl); | |
1097 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1098 | #undef SITE |
1099 | ||
1100 | patch_site: | |
1101 | if (start == NULL || (end-start) > len) | |
1102 | goto default_patch; | |
1103 | ||
ab144f5e | 1104 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1105 | |
1106 | /* Note: because reloc is assigned from something that | |
1107 | appears to be an array, gcc assumes it's non-null, | |
1108 | but doesn't know its relationship with start and | |
1109 | end. */ | |
1110 | if (reloc > start && reloc < end) { | |
1111 | int reloc_off = reloc - start; | |
ab144f5e AK |
1112 | long *relocp = (long *)(insnbuf + reloc_off); |
1113 | long delta = start - (char *)addr; | |
6487673b JF |
1114 | |
1115 | *relocp += delta; | |
1116 | } | |
1117 | break; | |
1118 | ||
1119 | default_patch: | |
1120 | default: | |
ab144f5e AK |
1121 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1122 | addr, len); | |
6487673b JF |
1123 | break; |
1124 | } | |
1125 | ||
1126 | return ret; | |
1127 | } | |
1128 | ||
aeaaa59c JF |
1129 | static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot) |
1130 | { | |
1131 | pte_t pte; | |
1132 | ||
1133 | phys >>= PAGE_SHIFT; | |
1134 | ||
1135 | switch (idx) { | |
1136 | case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: | |
1137 | #ifdef CONFIG_X86_F00F_BUG | |
1138 | case FIX_F00F_IDT: | |
1139 | #endif | |
15664f96 | 1140 | #ifdef CONFIG_X86_32 |
aeaaa59c JF |
1141 | case FIX_WP_TEST: |
1142 | case FIX_VDSO: | |
b3fe1243 | 1143 | # ifdef CONFIG_HIGHMEM |
15664f96 | 1144 | case FIX_KMAP_BEGIN ... FIX_KMAP_END: |
b3fe1243 | 1145 | # endif |
15664f96 JF |
1146 | #else |
1147 | case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE: | |
1148 | #endif | |
aeaaa59c JF |
1149 | #ifdef CONFIG_X86_LOCAL_APIC |
1150 | case FIX_APIC_BASE: /* maps dummy local APIC */ | |
1151 | #endif | |
1152 | pte = pfn_pte(phys, prot); | |
1153 | break; | |
1154 | ||
1155 | default: | |
1156 | pte = mfn_pte(phys, prot); | |
1157 | break; | |
1158 | } | |
1159 | ||
1160 | __native_set_fixmap(idx, pte); | |
bf18bf94 JF |
1161 | |
1162 | #ifdef CONFIG_X86_64 | |
1163 | /* Replicate changes to map the vsyscall page into the user | |
1164 | pagetable vsyscall mapping. */ | |
1165 | if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) { | |
1166 | unsigned long vaddr = __fix_to_virt(idx); | |
1167 | set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); | |
1168 | } | |
1169 | #endif | |
aeaaa59c JF |
1170 | } |
1171 | ||
93b1eab3 | 1172 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
1173 | .paravirt_enabled = 1, |
1174 | .shared_kernel_pmd = 0, | |
1175 | ||
1176 | .name = "Xen", | |
93b1eab3 | 1177 | }; |
5ead97c8 | 1178 | |
93b1eab3 | 1179 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 1180 | .patch = xen_patch, |
5ead97c8 | 1181 | |
93b1eab3 | 1182 | .banner = xen_banner, |
5ead97c8 JF |
1183 | .memory_setup = xen_memory_setup, |
1184 | .arch_setup = xen_arch_setup, | |
e2426cf8 | 1185 | .post_allocator_init = xen_post_allocator_init, |
93b1eab3 | 1186 | }; |
5ead97c8 | 1187 | |
93b1eab3 | 1188 | static const struct pv_time_ops xen_time_ops __initdata = { |
15c84731 | 1189 | .time_init = xen_time_init, |
93b1eab3 | 1190 | |
15c84731 JF |
1191 | .set_wallclock = xen_set_wallclock, |
1192 | .get_wallclock = xen_get_wallclock, | |
e93ef949 | 1193 | .get_tsc_khz = xen_tsc_khz, |
ab550288 | 1194 | .sched_clock = xen_sched_clock, |
93b1eab3 | 1195 | }; |
15c84731 | 1196 | |
93b1eab3 | 1197 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
1198 | .cpuid = xen_cpuid, |
1199 | ||
1200 | .set_debugreg = xen_set_debugreg, | |
1201 | .get_debugreg = xen_get_debugreg, | |
1202 | ||
7b1333aa | 1203 | .clts = xen_clts, |
5ead97c8 JF |
1204 | |
1205 | .read_cr0 = native_read_cr0, | |
7b1333aa | 1206 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1207 | |
5ead97c8 JF |
1208 | .read_cr4 = native_read_cr4, |
1209 | .read_cr4_safe = native_read_cr4_safe, | |
1210 | .write_cr4 = xen_write_cr4, | |
1211 | ||
5ead97c8 JF |
1212 | .wbinvd = native_wbinvd, |
1213 | ||
1214 | .read_msr = native_read_msr_safe, | |
1153968a | 1215 | .write_msr = xen_write_msr_safe, |
5ead97c8 JF |
1216 | .read_tsc = native_read_tsc, |
1217 | .read_pmc = native_read_pmc, | |
1218 | ||
81e103f1 | 1219 | .iret = xen_iret, |
d75cd22f | 1220 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1221 | #ifdef CONFIG_X86_64 |
1222 | .usergs_sysret32 = xen_sysret32, | |
1223 | .usergs_sysret64 = xen_sysret64, | |
1224 | #endif | |
5ead97c8 JF |
1225 | |
1226 | .load_tr_desc = paravirt_nop, | |
1227 | .set_ldt = xen_set_ldt, | |
1228 | .load_gdt = xen_load_gdt, | |
1229 | .load_idt = xen_load_idt, | |
1230 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1231 | #ifdef CONFIG_X86_64 |
1232 | .load_gs_index = xen_load_gs_index, | |
1233 | #endif | |
5ead97c8 | 1234 | |
38ffbe66 JF |
1235 | .alloc_ldt = xen_alloc_ldt, |
1236 | .free_ldt = xen_free_ldt, | |
1237 | ||
5ead97c8 JF |
1238 | .store_gdt = native_store_gdt, |
1239 | .store_idt = native_store_idt, | |
1240 | .store_tr = xen_store_tr, | |
1241 | ||
1242 | .write_ldt_entry = xen_write_ldt_entry, | |
1243 | .write_gdt_entry = xen_write_gdt_entry, | |
1244 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1245 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1246 | |
1247 | .set_iopl_mask = xen_set_iopl_mask, | |
1248 | .io_delay = xen_io_delay, | |
1249 | ||
952d1d70 JF |
1250 | /* Xen takes care of %gs when switching to usermode for us */ |
1251 | .swapgs = paravirt_nop, | |
1252 | ||
8965c1c0 JF |
1253 | .lazy_mode = { |
1254 | .enter = paravirt_enter_lazy_cpu, | |
1255 | .leave = xen_leave_lazy, | |
1256 | }, | |
93b1eab3 JF |
1257 | }; |
1258 | ||
93b1eab3 | 1259 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 1260 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1261 | .setup_boot_clock = paravirt_nop, |
1262 | .setup_secondary_clock = paravirt_nop, | |
1263 | .startup_ipi_hook = paravirt_nop, | |
1264 | #endif | |
93b1eab3 JF |
1265 | }; |
1266 | ||
1267 | static const struct pv_mmu_ops xen_mmu_ops __initdata = { | |
1268 | .pagetable_setup_start = xen_pagetable_setup_start, | |
1269 | .pagetable_setup_done = xen_pagetable_setup_done, | |
1270 | ||
1271 | .read_cr2 = xen_read_cr2, | |
1272 | .write_cr2 = xen_write_cr2, | |
1273 | ||
1274 | .read_cr3 = xen_read_cr3, | |
1275 | .write_cr3 = xen_write_cr3, | |
5ead97c8 JF |
1276 | |
1277 | .flush_tlb_user = xen_flush_tlb, | |
1278 | .flush_tlb_kernel = xen_flush_tlb, | |
1279 | .flush_tlb_single = xen_flush_tlb_single, | |
f87e4cac | 1280 | .flush_tlb_others = xen_flush_tlb_others, |
5ead97c8 JF |
1281 | |
1282 | .pte_update = paravirt_nop, | |
1283 | .pte_update_defer = paravirt_nop, | |
1284 | ||
d6182fbf JF |
1285 | .pgd_alloc = xen_pgd_alloc, |
1286 | .pgd_free = xen_pgd_free, | |
eba0045f | 1287 | |
6944a9c8 JF |
1288 | .alloc_pte = xen_alloc_pte_init, |
1289 | .release_pte = xen_release_pte_init, | |
1290 | .alloc_pmd = xen_alloc_pte_init, | |
1291 | .alloc_pmd_clone = paravirt_nop, | |
1292 | .release_pmd = xen_release_pte_init, | |
f4f97b3e JF |
1293 | |
1294 | #ifdef CONFIG_HIGHPTE | |
1295 | .kmap_atomic_pte = xen_kmap_atomic_pte, | |
1296 | #endif | |
5ead97c8 | 1297 | |
22911b3f JF |
1298 | #ifdef CONFIG_X86_64 |
1299 | .set_pte = xen_set_pte, | |
1300 | #else | |
851fa3c4 | 1301 | .set_pte = xen_set_pte_init, |
22911b3f | 1302 | #endif |
3b827c1b | 1303 | .set_pte_at = xen_set_pte_at, |
e2426cf8 | 1304 | .set_pmd = xen_set_pmd_hyper, |
3b827c1b | 1305 | |
08b882c6 JF |
1306 | .ptep_modify_prot_start = __ptep_modify_prot_start, |
1307 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | |
1308 | ||
3b827c1b | 1309 | .pte_val = xen_pte_val, |
b56afe1d | 1310 | .pte_flags = native_pte_flags, |
3b827c1b JF |
1311 | .pgd_val = xen_pgd_val, |
1312 | ||
1313 | .make_pte = xen_make_pte, | |
1314 | .make_pgd = xen_make_pgd, | |
1315 | ||
f6e58732 | 1316 | #ifdef CONFIG_X86_PAE |
3b827c1b JF |
1317 | .set_pte_atomic = xen_set_pte_atomic, |
1318 | .set_pte_present = xen_set_pte_at, | |
3b827c1b JF |
1319 | .pte_clear = xen_pte_clear, |
1320 | .pmd_clear = xen_pmd_clear, | |
f6e58732 JF |
1321 | #endif /* CONFIG_X86_PAE */ |
1322 | .set_pud = xen_set_pud_hyper, | |
3b827c1b JF |
1323 | |
1324 | .make_pmd = xen_make_pmd, | |
1325 | .pmd_val = xen_pmd_val, | |
3b827c1b | 1326 | |
f6e58732 JF |
1327 | #if PAGETABLE_LEVELS == 4 |
1328 | .pud_val = xen_pud_val, | |
1329 | .make_pud = xen_make_pud, | |
1330 | .set_pgd = xen_set_pgd_hyper, | |
1331 | ||
1332 | .alloc_pud = xen_alloc_pte_init, | |
1333 | .release_pud = xen_release_pte_init, | |
1334 | #endif /* PAGETABLE_LEVELS == 4 */ | |
1335 | ||
3b827c1b JF |
1336 | .activate_mm = xen_activate_mm, |
1337 | .dup_mmap = xen_dup_mmap, | |
1338 | .exit_mmap = xen_exit_mmap, | |
1339 | ||
8965c1c0 JF |
1340 | .lazy_mode = { |
1341 | .enter = paravirt_enter_lazy_mmu, | |
1342 | .leave = xen_leave_lazy, | |
1343 | }, | |
aeaaa59c JF |
1344 | |
1345 | .set_fixmap = xen_set_fixmap, | |
5ead97c8 JF |
1346 | }; |
1347 | ||
fefa629a JF |
1348 | static void xen_reboot(int reason) |
1349 | { | |
349c709f JF |
1350 | struct sched_shutdown r = { .reason = reason }; |
1351 | ||
fefa629a JF |
1352 | #ifdef CONFIG_SMP |
1353 | smp_send_stop(); | |
1354 | #endif | |
1355 | ||
349c709f | 1356 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1357 | BUG(); |
1358 | } | |
1359 | ||
1360 | static void xen_restart(char *msg) | |
1361 | { | |
1362 | xen_reboot(SHUTDOWN_reboot); | |
1363 | } | |
1364 | ||
1365 | static void xen_emergency_restart(void) | |
1366 | { | |
1367 | xen_reboot(SHUTDOWN_reboot); | |
1368 | } | |
1369 | ||
1370 | static void xen_machine_halt(void) | |
1371 | { | |
1372 | xen_reboot(SHUTDOWN_poweroff); | |
1373 | } | |
1374 | ||
1375 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1376 | { | |
1377 | xen_reboot(SHUTDOWN_crash); | |
1378 | } | |
1379 | ||
1380 | static const struct machine_ops __initdata xen_machine_ops = { | |
1381 | .restart = xen_restart, | |
1382 | .halt = xen_machine_halt, | |
1383 | .power_off = xen_machine_halt, | |
1384 | .shutdown = xen_machine_halt, | |
1385 | .crash_shutdown = xen_crash_shutdown, | |
1386 | .emergency_restart = xen_emergency_restart, | |
1387 | }; | |
1388 | ||
6487673b | 1389 | |
fb1d8404 JF |
1390 | static void __init xen_reserve_top(void) |
1391 | { | |
f5d36de0 | 1392 | #ifdef CONFIG_X86_32 |
fb1d8404 JF |
1393 | unsigned long top = HYPERVISOR_VIRT_START; |
1394 | struct xen_platform_parameters pp; | |
1395 | ||
1396 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | |
1397 | top = pp.virt_start; | |
1398 | ||
5dc64a34 | 1399 | reserve_top_address(-top); |
f5d36de0 | 1400 | #endif /* CONFIG_X86_32 */ |
fb1d8404 JF |
1401 | } |
1402 | ||
084a2a4e JF |
1403 | /* |
1404 | * Like __va(), but returns address in the kernel mapping (which is | |
1405 | * all we have until the physical memory mapping has been set up. | |
1406 | */ | |
1407 | static void *__ka(phys_addr_t paddr) | |
1408 | { | |
39dbc5bd | 1409 | #ifdef CONFIG_X86_64 |
084a2a4e | 1410 | return (void *)(paddr + __START_KERNEL_map); |
39dbc5bd JF |
1411 | #else |
1412 | return __va(paddr); | |
1413 | #endif | |
fb1d8404 JF |
1414 | } |
1415 | ||
084a2a4e JF |
1416 | /* Convert a machine address to physical address */ |
1417 | static unsigned long m2p(phys_addr_t maddr) | |
1418 | { | |
1419 | phys_addr_t paddr; | |
1420 | ||
59438c9f | 1421 | maddr &= PTE_PFN_MASK; |
084a2a4e JF |
1422 | paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; |
1423 | ||
1424 | return paddr; | |
fb1d8404 JF |
1425 | } |
1426 | ||
084a2a4e JF |
1427 | /* Convert a machine address to kernel virtual */ |
1428 | static void *m2v(phys_addr_t maddr) | |
1429 | { | |
1430 | return __ka(m2p(maddr)); | |
1431 | } | |
1432 | ||
084a2a4e JF |
1433 | static void set_page_prot(void *addr, pgprot_t prot) |
1434 | { | |
1435 | unsigned long pfn = __pa(addr) >> PAGE_SHIFT; | |
1436 | pte_t pte = pfn_pte(pfn, prot); | |
1437 | ||
084a2a4e JF |
1438 | if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) |
1439 | BUG(); | |
1440 | } | |
1441 | ||
39dbc5bd | 1442 | static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) |
d114e198 JF |
1443 | { |
1444 | unsigned pmdidx, pteidx; | |
1445 | unsigned ident_pte; | |
1446 | unsigned long pfn; | |
1447 | ||
1448 | ident_pte = 0; | |
1449 | pfn = 0; | |
f63c2f24 | 1450 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { |
d114e198 JF |
1451 | pte_t *pte_page; |
1452 | ||
d114e198 | 1453 | /* Reuse or allocate a page of ptes */ |
39dbc5bd JF |
1454 | if (pmd_present(pmd[pmdidx])) |
1455 | pte_page = m2v(pmd[pmdidx].pmd); | |
d114e198 JF |
1456 | else { |
1457 | /* Check for free pte pages */ | |
1458 | if (ident_pte == ARRAY_SIZE(level1_ident_pgt)) | |
1459 | break; | |
1460 | ||
1461 | pte_page = &level1_ident_pgt[ident_pte]; | |
1462 | ident_pte += PTRS_PER_PTE; | |
1463 | ||
39dbc5bd | 1464 | pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); |
d114e198 JF |
1465 | } |
1466 | ||
1467 | /* Install mappings */ | |
f63c2f24 | 1468 | for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { |
d114e198 JF |
1469 | pte_t pte; |
1470 | ||
1471 | if (pfn > max_pfn_mapped) | |
1472 | max_pfn_mapped = pfn; | |
1473 | ||
1474 | if (!pte_none(pte_page[pteidx])) | |
1475 | continue; | |
1476 | ||
1477 | pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); | |
1478 | pte_page[pteidx] = pte; | |
1479 | } | |
1480 | } | |
1481 | ||
f63c2f24 | 1482 | for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) |
d114e198 | 1483 | set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); |
39dbc5bd JF |
1484 | |
1485 | set_page_prot(pmd, PAGE_KERNEL_RO); | |
1486 | } | |
1487 | ||
1488 | #ifdef CONFIG_X86_64 | |
1489 | static void convert_pfn_mfn(void *v) | |
1490 | { | |
1491 | pte_t *pte = v; | |
1492 | int i; | |
1493 | ||
1494 | /* All levels are converted the same way, so just treat them | |
1495 | as ptes. */ | |
f63c2f24 | 1496 | for (i = 0; i < PTRS_PER_PTE; i++) |
39dbc5bd | 1497 | pte[i] = xen_make_pte(pte[i].pte); |
d114e198 JF |
1498 | } |
1499 | ||
084a2a4e JF |
1500 | /* |
1501 | * Set up the inital kernel pagetable. | |
1502 | * | |
1503 | * We can construct this by grafting the Xen provided pagetable into | |
1504 | * head_64.S's preconstructed pagetables. We copy the Xen L2's into | |
1505 | * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This | |
1506 | * means that only the kernel has a physical mapping to start with - | |
1507 | * but that's enough to get __va working. We need to fill in the rest | |
1508 | * of the physical mapping once some sort of allocator has been set | |
1509 | * up. | |
1510 | */ | |
f63c2f24 T |
1511 | static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, |
1512 | unsigned long max_pfn) | |
084a2a4e JF |
1513 | { |
1514 | pud_t *l3; | |
1515 | pmd_t *l2; | |
1516 | ||
1517 | /* Zap identity mapping */ | |
1518 | init_level4_pgt[0] = __pgd(0); | |
1519 | ||
1520 | /* Pre-constructed entries are in pfn, so convert to mfn */ | |
1521 | convert_pfn_mfn(init_level4_pgt); | |
1522 | convert_pfn_mfn(level3_ident_pgt); | |
1523 | convert_pfn_mfn(level3_kernel_pgt); | |
1524 | ||
1525 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); | |
1526 | l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); | |
1527 | ||
1528 | memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1529 | memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1530 | ||
1531 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd); | |
1532 | l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud); | |
1533 | memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1534 | ||
d114e198 | 1535 | /* Set up identity map */ |
39dbc5bd | 1536 | xen_map_identity_early(level2_ident_pgt, max_pfn); |
d114e198 | 1537 | |
084a2a4e JF |
1538 | /* Make pagetable pieces RO */ |
1539 | set_page_prot(init_level4_pgt, PAGE_KERNEL_RO); | |
1540 | set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); | |
1541 | set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); | |
bf18bf94 | 1542 | set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); |
084a2a4e JF |
1543 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); |
1544 | set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); | |
1545 | ||
1546 | /* Pin down new L4 */ | |
39dbc5bd JF |
1547 | pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, |
1548 | PFN_DOWN(__pa_symbol(init_level4_pgt))); | |
084a2a4e JF |
1549 | |
1550 | /* Unpin Xen-provided one */ | |
1551 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1552 | ||
1553 | /* Switch over */ | |
1554 | pgd = init_level4_pgt; | |
d6182fbf JF |
1555 | |
1556 | /* | |
1557 | * At this stage there can be no user pgd, and no page | |
1558 | * structure to attach it to, so make sure we just set kernel | |
1559 | * pgd. | |
1560 | */ | |
1561 | xen_mc_batch(); | |
1562 | __xen_write_cr3(true, __pa(pgd)); | |
1563 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
084a2a4e | 1564 | |
d114e198 JF |
1565 | reserve_early(__pa(xen_start_info->pt_base), |
1566 | __pa(xen_start_info->pt_base + | |
1567 | xen_start_info->nr_pt_frames * PAGE_SIZE), | |
1568 | "XEN PAGETABLES"); | |
084a2a4e JF |
1569 | |
1570 | return pgd; | |
1571 | } | |
39dbc5bd JF |
1572 | #else /* !CONFIG_X86_64 */ |
1573 | static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss; | |
1574 | ||
f63c2f24 T |
1575 | static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, |
1576 | unsigned long max_pfn) | |
084a2a4e | 1577 | { |
39dbc5bd JF |
1578 | pmd_t *kernel_pmd; |
1579 | ||
084a2a4e JF |
1580 | init_pg_tables_start = __pa(pgd); |
1581 | init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE; | |
1582 | max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024); | |
1583 | ||
39dbc5bd JF |
1584 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); |
1585 | memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); | |
d114e198 | 1586 | |
39dbc5bd JF |
1587 | xen_map_identity_early(level2_kernel_pgt, max_pfn); |
1588 | ||
1589 | memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD); | |
1590 | set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY], | |
1591 | __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT)); | |
1592 | ||
1593 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | |
1594 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | |
1595 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); | |
1596 | ||
1597 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1598 | ||
1599 | xen_write_cr3(__pa(swapper_pg_dir)); | |
1600 | ||
1601 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir))); | |
1602 | ||
1603 | return swapper_pg_dir; | |
fb1d8404 | 1604 | } |
084a2a4e | 1605 | #endif /* CONFIG_X86_64 */ |
fb1d8404 | 1606 | |
5ead97c8 JF |
1607 | /* First C function to be called on Xen boot */ |
1608 | asmlinkage void __init xen_start_kernel(void) | |
1609 | { | |
1610 | pgd_t *pgd; | |
1611 | ||
1612 | if (!xen_start_info) | |
1613 | return; | |
1614 | ||
6e833587 JF |
1615 | xen_domain_type = XEN_PV_DOMAIN; |
1616 | ||
7999f4b4 | 1617 | BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0); |
5ead97c8 | 1618 | |
e57778a1 JF |
1619 | xen_setup_features(); |
1620 | ||
5ead97c8 | 1621 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1622 | pv_info = xen_info; |
1623 | pv_init_ops = xen_init_ops; | |
1624 | pv_time_ops = xen_time_ops; | |
1625 | pv_cpu_ops = xen_cpu_ops; | |
93b1eab3 JF |
1626 | pv_apic_ops = xen_apic_ops; |
1627 | pv_mmu_ops = xen_mmu_ops; | |
93b1eab3 | 1628 | |
0d1edf46 JF |
1629 | xen_init_irq_ops(); |
1630 | ||
94a8c3c2 | 1631 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1632 | /* |
94a8c3c2 | 1633 | * set up the basic apic ops. |
ad66dd34 SS |
1634 | */ |
1635 | apic_ops = &xen_basic_apic_ops; | |
1636 | #endif | |
93b1eab3 | 1637 | |
e57778a1 JF |
1638 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1639 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1640 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1641 | } | |
1642 | ||
fefa629a JF |
1643 | machine_ops = xen_machine_ops; |
1644 | ||
f5d36de0 JF |
1645 | #ifdef CONFIG_X86_64 |
1646 | /* Disable until direct per-cpu data access. */ | |
1647 | have_vcpu_info_placement = 0; | |
f87e4cac | 1648 | #endif |
5ead97c8 | 1649 | |
a9e7062d | 1650 | xen_smp_init(); |
5ead97c8 JF |
1651 | |
1652 | /* Get mfn list */ | |
1653 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
d451bb7a | 1654 | xen_build_dynamic_phys_to_machine(); |
5ead97c8 JF |
1655 | |
1656 | pgd = (pgd_t *)xen_start_info->pt_base; | |
1657 | ||
084a2a4e JF |
1658 | /* Prevent unwanted bits from being set in PTEs. */ |
1659 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
6e833587 | 1660 | if (!xen_initial_domain()) |
084a2a4e | 1661 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
60223a32 | 1662 | |
60223a32 | 1663 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1664 | possible map and a non-dummy shared_info. */ |
60223a32 | 1665 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1666 | |
084a2a4e | 1667 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1668 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1669 | |
084a2a4e | 1670 | init_mm.pgd = pgd; |
5ead97c8 JF |
1671 | |
1672 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1673 | ||
93b1eab3 | 1674 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1675 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1676 | pv_info.kernel_rpl = 0; |
5ead97c8 JF |
1677 | |
1678 | /* set the limit of our address space */ | |
fb1d8404 | 1679 | xen_reserve_top(); |
5ead97c8 | 1680 | |
7d087b68 | 1681 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1682 | /* set up basic CPUID stuff */ |
1683 | cpu_detect(&new_cpu_data); | |
1684 | new_cpu_data.hard_math = 1; | |
1685 | new_cpu_data.x86_capability[0] = cpuid_edx(1); | |
7d087b68 | 1686 | #endif |
5ead97c8 JF |
1687 | |
1688 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1689 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1690 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1691 | ? __pa(xen_start_info->mod_start) : 0; | |
1692 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1693 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1694 | |
6e833587 | 1695 | if (!xen_initial_domain()) { |
83abc70a | 1696 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1697 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1698 | add_preferred_console("hvc", 0, NULL); |
9e124fe1 | 1699 | } |
b8c2d3df | 1700 | |
084a2a4e JF |
1701 | xen_raw_console_write("about to get started...\n"); |
1702 | ||
5ead97c8 | 1703 | /* Start the world */ |
f5d36de0 | 1704 | #ifdef CONFIG_X86_32 |
f0d43100 | 1705 | i386_start_kernel(); |
f5d36de0 | 1706 | #else |
084a2a4e | 1707 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1708 | #endif |
5ead97c8 | 1709 | } |