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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
5ead97c8 | 34 | |
1ccbf534 | 35 | #include <xen/xen.h> |
5ead97c8 | 36 | #include <xen/interface/xen.h> |
ecbf29cd | 37 | #include <xen/interface/version.h> |
5ead97c8 JF |
38 | #include <xen/interface/physdev.h> |
39 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 40 | #include <xen/interface/memory.h> |
5ead97c8 JF |
41 | #include <xen/features.h> |
42 | #include <xen/page.h> | |
38e20b07 | 43 | #include <xen/hvm.h> |
084a2a4e | 44 | #include <xen/hvc-console.h> |
211063dc | 45 | #include <xen/acpi.h> |
5ead97c8 JF |
46 | |
47 | #include <asm/paravirt.h> | |
7b6aa335 | 48 | #include <asm/apic.h> |
5ead97c8 | 49 | #include <asm/page.h> |
b5401a96 | 50 | #include <asm/xen/pci.h> |
5ead97c8 JF |
51 | #include <asm/xen/hypercall.h> |
52 | #include <asm/xen/hypervisor.h> | |
53 | #include <asm/fixmap.h> | |
54 | #include <asm/processor.h> | |
707ebbc8 | 55 | #include <asm/proto.h> |
1153968a | 56 | #include <asm/msr-index.h> |
6cac5a92 | 57 | #include <asm/traps.h> |
5ead97c8 JF |
58 | #include <asm/setup.h> |
59 | #include <asm/desc.h> | |
817a824b | 60 | #include <asm/pgalloc.h> |
5ead97c8 | 61 | #include <asm/pgtable.h> |
f87e4cac | 62 | #include <asm/tlbflush.h> |
fefa629a | 63 | #include <asm/reboot.h> |
577eebea | 64 | #include <asm/stackprotector.h> |
bee6ab53 | 65 | #include <asm/hypervisor.h> |
73c154c6 | 66 | #include <asm/mwait.h> |
76a8df7b | 67 | #include <asm/pci_x86.h> |
73c154c6 KRW |
68 | |
69 | #ifdef CONFIG_ACPI | |
70 | #include <linux/acpi.h> | |
71 | #include <asm/acpi.h> | |
72 | #include <acpi/pdc_intel.h> | |
73 | #include <acpi/processor.h> | |
74 | #include <xen/interface/platform.h> | |
75 | #endif | |
5ead97c8 JF |
76 | |
77 | #include "xen-ops.h" | |
3b827c1b | 78 | #include "mmu.h" |
f447d56d | 79 | #include "smp.h" |
5ead97c8 JF |
80 | #include "multicalls.h" |
81 | ||
82 | EXPORT_SYMBOL_GPL(hypercall_page); | |
83 | ||
5ead97c8 JF |
84 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
85 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 86 | |
6e833587 JF |
87 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
88 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
89 | ||
7e77506a IC |
90 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
91 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
92 | unsigned long machine_to_phys_nr; |
93 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 94 | |
5ead97c8 JF |
95 | struct start_info *xen_start_info; |
96 | EXPORT_SYMBOL_GPL(xen_start_info); | |
97 | ||
a0d695c8 | 98 | struct shared_info xen_dummy_shared_info; |
60223a32 | 99 | |
38341432 JF |
100 | void *xen_initial_gdt; |
101 | ||
bee6ab53 | 102 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
103 | __read_mostly int xen_have_vector_callback; |
104 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 105 | |
60223a32 JF |
106 | /* |
107 | * Point at some empty memory to start with. We map the real shared_info | |
108 | * page as soon as fixmap is up and running. | |
109 | */ | |
a0d695c8 | 110 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
111 | |
112 | /* | |
113 | * Flag to determine whether vcpu info placement is available on all | |
114 | * VCPUs. We assume it is to start with, and then set it to zero on | |
115 | * the first failure. This is because it can succeed on some VCPUs | |
116 | * and not others, since it can involve hypervisor memory allocation, | |
117 | * or because the guest failed to guarantee all the appropriate | |
118 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
119 | * | |
120 | * Note that any particular CPU may be using a placed vcpu structure, | |
121 | * but we can only optimise if the all are. | |
122 | * | |
123 | * 0: not available, 1: available | |
124 | */ | |
e4d04071 | 125 | static int have_vcpu_info_placement = 1; |
60223a32 | 126 | |
c06ee78d MR |
127 | static void clamp_max_cpus(void) |
128 | { | |
129 | #ifdef CONFIG_SMP | |
130 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
131 | setup_max_cpus = MAX_VIRT_CPUS; | |
132 | #endif | |
133 | } | |
134 | ||
9c7a7942 | 135 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 136 | { |
60223a32 JF |
137 | struct vcpu_register_vcpu_info info; |
138 | int err; | |
139 | struct vcpu_info *vcpup; | |
140 | ||
a0d695c8 | 141 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 142 | |
c06ee78d MR |
143 | if (cpu < MAX_VIRT_CPUS) |
144 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 145 | |
c06ee78d MR |
146 | if (!have_vcpu_info_placement) { |
147 | if (cpu >= MAX_VIRT_CPUS) | |
148 | clamp_max_cpus(); | |
149 | return; | |
150 | } | |
60223a32 | 151 | |
c06ee78d | 152 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 153 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
154 | info.offset = offset_in_page(vcpup); |
155 | ||
60223a32 JF |
156 | /* Check to see if the hypervisor will put the vcpu_info |
157 | structure where we want it, which allows direct access via | |
158 | a percpu-variable. */ | |
159 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
160 | ||
161 | if (err) { | |
162 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
163 | have_vcpu_info_placement = 0; | |
c06ee78d | 164 | clamp_max_cpus(); |
60223a32 JF |
165 | } else { |
166 | /* This cpu is using the registered vcpu info, even if | |
167 | later ones fail to. */ | |
168 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 169 | } |
5ead97c8 JF |
170 | } |
171 | ||
9c7a7942 JF |
172 | /* |
173 | * On restore, set the vcpu placement up again. | |
174 | * If it fails, then we're in a bad state, since | |
175 | * we can't back out from using it... | |
176 | */ | |
177 | void xen_vcpu_restore(void) | |
178 | { | |
3905bb2a | 179 | int cpu; |
9c7a7942 | 180 | |
3905bb2a JF |
181 | for_each_online_cpu(cpu) { |
182 | bool other_cpu = (cpu != smp_processor_id()); | |
9c7a7942 | 183 | |
3905bb2a JF |
184 | if (other_cpu && |
185 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
186 | BUG(); | |
9c7a7942 | 187 | |
3905bb2a | 188 | xen_setup_runstate_info(cpu); |
9c7a7942 | 189 | |
3905bb2a | 190 | if (have_vcpu_info_placement) |
9c7a7942 | 191 | xen_vcpu_setup(cpu); |
9c7a7942 | 192 | |
3905bb2a JF |
193 | if (other_cpu && |
194 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
195 | BUG(); | |
9c7a7942 JF |
196 | } |
197 | } | |
198 | ||
5ead97c8 JF |
199 | static void __init xen_banner(void) |
200 | { | |
95c7c23b JF |
201 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
202 | struct xen_extraversion extra; | |
203 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
204 | ||
5ead97c8 | 205 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 206 | pv_info.name); |
95c7c23b JF |
207 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
208 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 209 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
210 | } |
211 | ||
e826fe1b JF |
212 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
213 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
214 | ||
73c154c6 KRW |
215 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
216 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
217 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
218 | ||
65ea5b03 PA |
219 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
220 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 221 | { |
82d64699 | 222 | unsigned maskebx = ~0; |
e826fe1b | 223 | unsigned maskecx = ~0; |
5ead97c8 | 224 | unsigned maskedx = ~0; |
73c154c6 | 225 | unsigned setecx = 0; |
5ead97c8 JF |
226 | /* |
227 | * Mask out inconvenient features, to try and disable as many | |
228 | * unsupported kernel subsystems as possible. | |
229 | */ | |
82d64699 JF |
230 | switch (*ax) { |
231 | case 1: | |
e826fe1b | 232 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 233 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 234 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
235 | break; |
236 | ||
73c154c6 KRW |
237 | case CPUID_MWAIT_LEAF: |
238 | /* Synthesize the values.. */ | |
239 | *ax = 0; | |
240 | *bx = 0; | |
241 | *cx = cpuid_leaf5_ecx_val; | |
242 | *dx = cpuid_leaf5_edx_val; | |
243 | return; | |
244 | ||
82d64699 JF |
245 | case 0xb: |
246 | /* Suppress extended topology stuff */ | |
247 | maskebx = 0; | |
248 | break; | |
e826fe1b | 249 | } |
5ead97c8 JF |
250 | |
251 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
252 | : "=a" (*ax), |
253 | "=b" (*bx), | |
254 | "=c" (*cx), | |
255 | "=d" (*dx) | |
256 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 257 | |
82d64699 | 258 | *bx &= maskebx; |
e826fe1b | 259 | *cx &= maskecx; |
73c154c6 | 260 | *cx |= setecx; |
65ea5b03 | 261 | *dx &= maskedx; |
73c154c6 | 262 | |
5ead97c8 JF |
263 | } |
264 | ||
73c154c6 KRW |
265 | static bool __init xen_check_mwait(void) |
266 | { | |
df88b2d9 KRW |
267 | #if defined(CONFIG_ACPI) && !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) && \ |
268 | !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE) | |
73c154c6 KRW |
269 | struct xen_platform_op op = { |
270 | .cmd = XENPF_set_processor_pminfo, | |
271 | .u.set_pminfo.id = -1, | |
272 | .u.set_pminfo.type = XEN_PM_PDC, | |
273 | }; | |
274 | uint32_t buf[3]; | |
275 | unsigned int ax, bx, cx, dx; | |
276 | unsigned int mwait_mask; | |
277 | ||
278 | /* We need to determine whether it is OK to expose the MWAIT | |
279 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
280 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
281 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
282 | * checks against). The hypervisor won't expose the MWAIT flag because | |
283 | * it would break backwards compatibility; so we will find out directly | |
284 | * from the hardware and hypercall. | |
285 | */ | |
286 | if (!xen_initial_domain()) | |
287 | return false; | |
288 | ||
289 | ax = 1; | |
290 | cx = 0; | |
291 | ||
292 | native_cpuid(&ax, &bx, &cx, &dx); | |
293 | ||
294 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
295 | (1 << (X86_FEATURE_MWAIT % 32)); | |
296 | ||
297 | if ((cx & mwait_mask) != mwait_mask) | |
298 | return false; | |
299 | ||
300 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
301 | * ecx and edx. The hypercall provides only partial information. | |
302 | */ | |
303 | ||
304 | ax = CPUID_MWAIT_LEAF; | |
305 | bx = 0; | |
306 | cx = 0; | |
307 | dx = 0; | |
308 | ||
309 | native_cpuid(&ax, &bx, &cx, &dx); | |
310 | ||
311 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
312 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
313 | */ | |
314 | buf[0] = ACPI_PDC_REVISION_ID; | |
315 | buf[1] = 1; | |
316 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
317 | ||
318 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
319 | ||
320 | if ((HYPERVISOR_dom0_op(&op) == 0) && | |
321 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
322 | cpuid_leaf5_ecx_val = cx; | |
323 | cpuid_leaf5_edx_val = dx; | |
324 | } | |
325 | return true; | |
326 | #else | |
327 | return false; | |
328 | #endif | |
329 | } | |
ad3062a0 | 330 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
331 | { |
332 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 333 | unsigned int xsave_mask; |
e826fe1b JF |
334 | |
335 | cpuid_leaf1_edx_mask = | |
336 | ~((1 << X86_FEATURE_MCE) | /* disable MCE */ | |
337 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
ff12849a | 338 | (1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
339 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
340 | ||
341 | if (!xen_initial_domain()) | |
342 | cpuid_leaf1_edx_mask &= | |
343 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
344 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
947ccf9c | 345 | ax = 1; |
5e287830 | 346 | cx = 0; |
947ccf9c | 347 | xen_cpuid(&ax, &bx, &cx, &dx); |
e826fe1b | 348 | |
947ccf9c SH |
349 | xsave_mask = |
350 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
351 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
352 | ||
353 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
354 | if ((cx & xsave_mask) != xsave_mask) | |
355 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
356 | if (xen_check_mwait()) |
357 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
358 | } |
359 | ||
5ead97c8 JF |
360 | static void xen_set_debugreg(int reg, unsigned long val) |
361 | { | |
362 | HYPERVISOR_set_debugreg(reg, val); | |
363 | } | |
364 | ||
365 | static unsigned long xen_get_debugreg(int reg) | |
366 | { | |
367 | return HYPERVISOR_get_debugreg(reg); | |
368 | } | |
369 | ||
224101ed | 370 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 371 | { |
5ead97c8 | 372 | xen_mc_flush(); |
224101ed | 373 | paravirt_end_context_switch(next); |
5ead97c8 JF |
374 | } |
375 | ||
376 | static unsigned long xen_store_tr(void) | |
377 | { | |
378 | return 0; | |
379 | } | |
380 | ||
a05d2eba | 381 | /* |
cef43bf6 JF |
382 | * Set the page permissions for a particular virtual address. If the |
383 | * address is a vmalloc mapping (or other non-linear mapping), then | |
384 | * find the linear mapping of the page and also set its protections to | |
385 | * match. | |
a05d2eba JF |
386 | */ |
387 | static void set_aliased_prot(void *v, pgprot_t prot) | |
388 | { | |
389 | int level; | |
390 | pte_t *ptep; | |
391 | pte_t pte; | |
392 | unsigned long pfn; | |
393 | struct page *page; | |
394 | ||
395 | ptep = lookup_address((unsigned long)v, &level); | |
396 | BUG_ON(ptep == NULL); | |
397 | ||
398 | pfn = pte_pfn(*ptep); | |
399 | page = pfn_to_page(pfn); | |
400 | ||
401 | pte = pfn_pte(pfn, prot); | |
402 | ||
403 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
404 | BUG(); | |
405 | ||
406 | if (!PageHighMem(page)) { | |
407 | void *av = __va(PFN_PHYS(pfn)); | |
408 | ||
409 | if (av != v) | |
410 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
411 | BUG(); | |
412 | } else | |
413 | kmap_flush_unused(); | |
414 | } | |
415 | ||
38ffbe66 JF |
416 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
417 | { | |
a05d2eba | 418 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
419 | int i; |
420 | ||
a05d2eba JF |
421 | for(i = 0; i < entries; i += entries_per_page) |
422 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
423 | } |
424 | ||
425 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
426 | { | |
a05d2eba | 427 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
428 | int i; |
429 | ||
a05d2eba JF |
430 | for(i = 0; i < entries; i += entries_per_page) |
431 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
432 | } |
433 | ||
5ead97c8 JF |
434 | static void xen_set_ldt(const void *addr, unsigned entries) |
435 | { | |
5ead97c8 JF |
436 | struct mmuext_op *op; |
437 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
438 | ||
ab78f7ad JF |
439 | trace_xen_cpu_set_ldt(addr, entries); |
440 | ||
5ead97c8 JF |
441 | op = mcs.args; |
442 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 443 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
444 | op->arg2.nr_ents = entries; |
445 | ||
446 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
447 | ||
448 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
449 | } | |
450 | ||
6b68f01b | 451 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 452 | { |
5ead97c8 JF |
453 | unsigned long va = dtr->address; |
454 | unsigned int size = dtr->size + 1; | |
455 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 456 | unsigned long frames[pages]; |
5ead97c8 | 457 | int f; |
5ead97c8 | 458 | |
577eebea JF |
459 | /* |
460 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
461 | * 8-byte entries, or 16 4k pages.. | |
462 | */ | |
5ead97c8 JF |
463 | |
464 | BUG_ON(size > 65536); | |
465 | BUG_ON(va & ~PAGE_MASK); | |
466 | ||
5ead97c8 | 467 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 468 | int level; |
577eebea | 469 | pte_t *ptep; |
6ed6bf42 JF |
470 | unsigned long pfn, mfn; |
471 | void *virt; | |
472 | ||
577eebea JF |
473 | /* |
474 | * The GDT is per-cpu and is in the percpu data area. | |
475 | * That can be virtually mapped, so we need to do a | |
476 | * page-walk to get the underlying MFN for the | |
477 | * hypercall. The page can also be in the kernel's | |
478 | * linear range, so we need to RO that mapping too. | |
479 | */ | |
480 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
481 | BUG_ON(ptep == NULL); |
482 | ||
483 | pfn = pte_pfn(*ptep); | |
484 | mfn = pfn_to_mfn(pfn); | |
485 | virt = __va(PFN_PHYS(pfn)); | |
486 | ||
487 | frames[f] = mfn; | |
9976b39b | 488 | |
5ead97c8 | 489 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 490 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
491 | } |
492 | ||
3ce5fa7e JF |
493 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
494 | BUG(); | |
5ead97c8 JF |
495 | } |
496 | ||
577eebea JF |
497 | /* |
498 | * load_gdt for early boot, when the gdt is only mapped once | |
499 | */ | |
ad3062a0 | 500 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
501 | { |
502 | unsigned long va = dtr->address; | |
503 | unsigned int size = dtr->size + 1; | |
504 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
505 | unsigned long frames[pages]; | |
506 | int f; | |
507 | ||
508 | /* | |
509 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
510 | * 8-byte entries, or 16 4k pages.. | |
511 | */ | |
512 | ||
513 | BUG_ON(size > 65536); | |
514 | BUG_ON(va & ~PAGE_MASK); | |
515 | ||
516 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
517 | pte_t pte; | |
518 | unsigned long pfn, mfn; | |
519 | ||
520 | pfn = virt_to_pfn(va); | |
521 | mfn = pfn_to_mfn(pfn); | |
522 | ||
523 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
524 | ||
525 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
526 | BUG(); | |
527 | ||
528 | frames[f] = mfn; | |
529 | } | |
530 | ||
531 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
532 | BUG(); | |
533 | } | |
534 | ||
5ead97c8 JF |
535 | static void load_TLS_descriptor(struct thread_struct *t, |
536 | unsigned int cpu, unsigned int i) | |
537 | { | |
538 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 539 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
540 | struct multicall_space mc = __xen_mc_entry(0); |
541 | ||
542 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
543 | } | |
544 | ||
545 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
546 | { | |
8b84ad94 | 547 | /* |
ccbeed3a TH |
548 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
549 | * and lazy gs handling is enabled, it means we're in a | |
550 | * context switch, and %gs has just been saved. This means we | |
551 | * can zero it out to prevent faults on exit from the | |
552 | * hypervisor if the next process has no %gs. Either way, it | |
553 | * has been saved, and the new value will get loaded properly. | |
554 | * This will go away as soon as Xen has been modified to not | |
555 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
556 | * |
557 | * On x86_64, this hack is not used for %gs, because gs points | |
558 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
559 | * must not zero %gs on x86_64 | |
560 | * | |
561 | * For x86_64, we need to zero %fs, otherwise we may get an | |
562 | * exception between the new %fs descriptor being loaded and | |
563 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 564 | */ |
8a95408e EH |
565 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
566 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 567 | lazy_load_gs(0); |
8a95408e EH |
568 | #else |
569 | loadsegment(fs, 0); | |
570 | #endif | |
571 | } | |
572 | ||
573 | xen_mc_batch(); | |
574 | ||
575 | load_TLS_descriptor(t, cpu, 0); | |
576 | load_TLS_descriptor(t, cpu, 1); | |
577 | load_TLS_descriptor(t, cpu, 2); | |
578 | ||
579 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
580 | } |
581 | ||
a8fc1089 EH |
582 | #ifdef CONFIG_X86_64 |
583 | static void xen_load_gs_index(unsigned int idx) | |
584 | { | |
585 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
586 | BUG(); | |
5ead97c8 | 587 | } |
a8fc1089 | 588 | #endif |
5ead97c8 JF |
589 | |
590 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 591 | const void *ptr) |
5ead97c8 | 592 | { |
cef43bf6 | 593 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 594 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 595 | |
ab78f7ad JF |
596 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
597 | ||
f120f13e JF |
598 | preempt_disable(); |
599 | ||
5ead97c8 JF |
600 | xen_mc_flush(); |
601 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
602 | BUG(); | |
f120f13e JF |
603 | |
604 | preempt_enable(); | |
5ead97c8 JF |
605 | } |
606 | ||
e176d367 | 607 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
608 | struct trap_info *info) |
609 | { | |
6cac5a92 JF |
610 | unsigned long addr; |
611 | ||
6d02c426 | 612 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
613 | return 0; |
614 | ||
615 | info->vector = vector; | |
6cac5a92 JF |
616 | |
617 | addr = gate_offset(*val); | |
618 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
619 | /* |
620 | * Look for known traps using IST, and substitute them | |
621 | * appropriately. The debugger ones are the only ones we care | |
622 | * about. Xen will handle faults like double_fault and | |
623 | * machine_check, so we should never see them. Warn if | |
624 | * there's an unexpected IST-using fault handler. | |
625 | */ | |
6cac5a92 JF |
626 | if (addr == (unsigned long)debug) |
627 | addr = (unsigned long)xen_debug; | |
628 | else if (addr == (unsigned long)int3) | |
629 | addr = (unsigned long)xen_int3; | |
630 | else if (addr == (unsigned long)stack_segment) | |
631 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
632 | else if (addr == (unsigned long)double_fault || |
633 | addr == (unsigned long)nmi) { | |
634 | /* Don't need to handle these */ | |
635 | return 0; | |
636 | #ifdef CONFIG_X86_MCE | |
637 | } else if (addr == (unsigned long)machine_check) { | |
638 | return 0; | |
639 | #endif | |
640 | } else { | |
641 | /* Some other trap using IST? */ | |
642 | if (WARN_ON(val->ist != 0)) | |
643 | return 0; | |
644 | } | |
6cac5a92 JF |
645 | #endif /* CONFIG_X86_64 */ |
646 | info->address = addr; | |
647 | ||
e176d367 EH |
648 | info->cs = gate_segment(*val); |
649 | info->flags = val->dpl; | |
5ead97c8 | 650 | /* interrupt gates clear IF */ |
6d02c426 JF |
651 | if (val->type == GATE_INTERRUPT) |
652 | info->flags |= 1 << 2; | |
5ead97c8 JF |
653 | |
654 | return 1; | |
655 | } | |
656 | ||
657 | /* Locations of each CPU's IDT */ | |
6b68f01b | 658 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
659 | |
660 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
661 | also update Xen. */ | |
8d947344 | 662 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 663 | { |
5ead97c8 | 664 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
665 | unsigned long start, end; |
666 | ||
ab78f7ad JF |
667 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
668 | ||
f120f13e JF |
669 | preempt_disable(); |
670 | ||
780f36d8 CL |
671 | start = __this_cpu_read(idt_desc.address); |
672 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
673 | |
674 | xen_mc_flush(); | |
675 | ||
8d947344 | 676 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
677 | |
678 | if (p >= start && (p + 8) <= end) { | |
679 | struct trap_info info[2]; | |
680 | ||
681 | info[1].address = 0; | |
682 | ||
e176d367 | 683 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
684 | if (HYPERVISOR_set_trap_table(info)) |
685 | BUG(); | |
686 | } | |
f120f13e JF |
687 | |
688 | preempt_enable(); | |
5ead97c8 JF |
689 | } |
690 | ||
6b68f01b | 691 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 692 | struct trap_info *traps) |
5ead97c8 | 693 | { |
5ead97c8 JF |
694 | unsigned in, out, count; |
695 | ||
e176d367 | 696 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
697 | BUG_ON(count > 256); |
698 | ||
5ead97c8 | 699 | for (in = out = 0; in < count; in++) { |
e176d367 | 700 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 701 | |
e176d367 | 702 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
703 | out++; |
704 | } | |
705 | traps[out].address = 0; | |
f87e4cac JF |
706 | } |
707 | ||
708 | void xen_copy_trap_info(struct trap_info *traps) | |
709 | { | |
6b68f01b | 710 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
711 | |
712 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
713 | } |
714 | ||
715 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
716 | hold a spinlock to protect the static traps[] array (static because | |
717 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 718 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
719 | { |
720 | static DEFINE_SPINLOCK(lock); | |
721 | static struct trap_info traps[257]; | |
f87e4cac | 722 | |
ab78f7ad JF |
723 | trace_xen_cpu_load_idt(desc); |
724 | ||
f87e4cac JF |
725 | spin_lock(&lock); |
726 | ||
f120f13e JF |
727 | __get_cpu_var(idt_desc) = *desc; |
728 | ||
f87e4cac | 729 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
730 | |
731 | xen_mc_flush(); | |
732 | if (HYPERVISOR_set_trap_table(traps)) | |
733 | BUG(); | |
734 | ||
735 | spin_unlock(&lock); | |
736 | } | |
737 | ||
738 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
739 | they're handled differently. */ | |
740 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 741 | const void *desc, int type) |
5ead97c8 | 742 | { |
ab78f7ad JF |
743 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
744 | ||
f120f13e JF |
745 | preempt_disable(); |
746 | ||
014b15be GOC |
747 | switch (type) { |
748 | case DESC_LDT: | |
749 | case DESC_TSS: | |
5ead97c8 JF |
750 | /* ignore */ |
751 | break; | |
752 | ||
753 | default: { | |
9976b39b | 754 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
755 | |
756 | xen_mc_flush(); | |
014b15be | 757 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
758 | BUG(); |
759 | } | |
760 | ||
761 | } | |
f120f13e JF |
762 | |
763 | preempt_enable(); | |
5ead97c8 JF |
764 | } |
765 | ||
577eebea JF |
766 | /* |
767 | * Version of write_gdt_entry for use at early boot-time needed to | |
768 | * update an entry as simply as possible. | |
769 | */ | |
ad3062a0 | 770 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
771 | const void *desc, int type) |
772 | { | |
ab78f7ad JF |
773 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
774 | ||
577eebea JF |
775 | switch (type) { |
776 | case DESC_LDT: | |
777 | case DESC_TSS: | |
778 | /* ignore */ | |
779 | break; | |
780 | ||
781 | default: { | |
782 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
783 | ||
784 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
785 | dt[entry] = *(struct desc_struct *)desc; | |
786 | } | |
787 | ||
788 | } | |
789 | } | |
790 | ||
faca6227 | 791 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 792 | struct thread_struct *thread) |
5ead97c8 | 793 | { |
ab78f7ad JF |
794 | struct multicall_space mcs; |
795 | ||
796 | mcs = xen_mc_entry(0); | |
faca6227 | 797 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
798 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
799 | } | |
800 | ||
801 | static void xen_set_iopl_mask(unsigned mask) | |
802 | { | |
803 | struct physdev_set_iopl set_iopl; | |
804 | ||
805 | /* Force the change at ring 0. */ | |
806 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
807 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
808 | } | |
809 | ||
810 | static void xen_io_delay(void) | |
811 | { | |
812 | } | |
813 | ||
814 | #ifdef CONFIG_X86_LOCAL_APIC | |
558daa28 KRW |
815 | static unsigned long xen_set_apic_id(unsigned int x) |
816 | { | |
817 | WARN_ON(1); | |
818 | return x; | |
819 | } | |
820 | static unsigned int xen_get_apic_id(unsigned long x) | |
821 | { | |
822 | return ((x)>>24) & 0xFFu; | |
823 | } | |
ad66dd34 | 824 | static u32 xen_apic_read(u32 reg) |
5ead97c8 | 825 | { |
558daa28 KRW |
826 | struct xen_platform_op op = { |
827 | .cmd = XENPF_get_cpuinfo, | |
828 | .interface_version = XENPF_INTERFACE_VERSION, | |
829 | .u.pcpu_info.xen_cpuid = 0, | |
830 | }; | |
831 | int ret = 0; | |
832 | ||
833 | /* Shouldn't need this as APIC is turned off for PV, and we only | |
834 | * get called on the bootup processor. But just in case. */ | |
835 | if (!xen_initial_domain() || smp_processor_id()) | |
836 | return 0; | |
837 | ||
838 | if (reg == APIC_LVR) | |
839 | return 0x10; | |
840 | ||
841 | if (reg != APIC_ID) | |
842 | return 0; | |
843 | ||
844 | ret = HYPERVISOR_dom0_op(&op); | |
845 | if (ret) | |
846 | return 0; | |
847 | ||
848 | return op.u.pcpu_info.apic_id << 24; | |
5ead97c8 | 849 | } |
f87e4cac | 850 | |
ad66dd34 | 851 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
852 | { |
853 | /* Warn to see if there's any stray references */ | |
854 | WARN_ON(1); | |
855 | } | |
ad66dd34 | 856 | |
ad66dd34 SS |
857 | static u64 xen_apic_icr_read(void) |
858 | { | |
859 | return 0; | |
860 | } | |
861 | ||
862 | static void xen_apic_icr_write(u32 low, u32 id) | |
863 | { | |
864 | /* Warn to see if there's any stray references */ | |
865 | WARN_ON(1); | |
866 | } | |
867 | ||
868 | static void xen_apic_wait_icr_idle(void) | |
869 | { | |
870 | return; | |
871 | } | |
872 | ||
94a8c3c2 YL |
873 | static u32 xen_safe_apic_wait_icr_idle(void) |
874 | { | |
875 | return 0; | |
876 | } | |
877 | ||
c1eeb2de YL |
878 | static void set_xen_basic_apic_ops(void) |
879 | { | |
880 | apic->read = xen_apic_read; | |
881 | apic->write = xen_apic_write; | |
882 | apic->icr_read = xen_apic_icr_read; | |
883 | apic->icr_write = xen_apic_icr_write; | |
884 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
885 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
558daa28 KRW |
886 | apic->set_apic_id = xen_set_apic_id; |
887 | apic->get_apic_id = xen_get_apic_id; | |
f447d56d BG |
888 | |
889 | #ifdef CONFIG_SMP | |
890 | apic->send_IPI_allbutself = xen_send_IPI_allbutself; | |
891 | apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself; | |
892 | apic->send_IPI_mask = xen_send_IPI_mask; | |
893 | apic->send_IPI_all = xen_send_IPI_all; | |
894 | apic->send_IPI_self = xen_send_IPI_self; | |
895 | #endif | |
c1eeb2de | 896 | } |
ad66dd34 | 897 | |
5ead97c8 JF |
898 | #endif |
899 | ||
7b1333aa JF |
900 | static void xen_clts(void) |
901 | { | |
902 | struct multicall_space mcs; | |
903 | ||
904 | mcs = xen_mc_entry(0); | |
905 | ||
906 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
907 | ||
908 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
909 | } | |
910 | ||
a789ed5f JF |
911 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
912 | ||
913 | static unsigned long xen_read_cr0(void) | |
914 | { | |
2113f469 | 915 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
916 | |
917 | if (unlikely(cr0 == 0)) { | |
918 | cr0 = native_read_cr0(); | |
2113f469 | 919 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
920 | } |
921 | ||
922 | return cr0; | |
923 | } | |
924 | ||
7b1333aa JF |
925 | static void xen_write_cr0(unsigned long cr0) |
926 | { | |
927 | struct multicall_space mcs; | |
928 | ||
2113f469 | 929 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 930 | |
7b1333aa JF |
931 | /* Only pay attention to cr0.TS; everything else is |
932 | ignored. */ | |
933 | mcs = xen_mc_entry(0); | |
934 | ||
935 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
936 | ||
937 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
938 | } | |
939 | ||
5ead97c8 JF |
940 | static void xen_write_cr4(unsigned long cr4) |
941 | { | |
2956a351 JF |
942 | cr4 &= ~X86_CR4_PGE; |
943 | cr4 &= ~X86_CR4_PSE; | |
944 | ||
945 | native_write_cr4(cr4); | |
5ead97c8 JF |
946 | } |
947 | ||
1153968a JF |
948 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
949 | { | |
950 | int ret; | |
951 | ||
952 | ret = 0; | |
953 | ||
f63c2f24 | 954 | switch (msr) { |
1153968a JF |
955 | #ifdef CONFIG_X86_64 |
956 | unsigned which; | |
957 | u64 base; | |
958 | ||
959 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
960 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
961 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
962 | ||
963 | set: | |
964 | base = ((u64)high << 32) | low; | |
965 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 966 | ret = -EIO; |
1153968a JF |
967 | break; |
968 | #endif | |
d89961e2 JF |
969 | |
970 | case MSR_STAR: | |
971 | case MSR_CSTAR: | |
972 | case MSR_LSTAR: | |
973 | case MSR_SYSCALL_MASK: | |
974 | case MSR_IA32_SYSENTER_CS: | |
975 | case MSR_IA32_SYSENTER_ESP: | |
976 | case MSR_IA32_SYSENTER_EIP: | |
977 | /* Fast syscall setup is all done in hypercalls, so | |
978 | these are all ignored. Stub them out here to stop | |
979 | Xen console noise. */ | |
980 | break; | |
981 | ||
41f2e477 JF |
982 | case MSR_IA32_CR_PAT: |
983 | if (smp_processor_id() == 0) | |
984 | xen_set_pat(((u64)high << 32) | low); | |
985 | break; | |
986 | ||
1153968a JF |
987 | default: |
988 | ret = native_write_msr_safe(msr, low, high); | |
989 | } | |
990 | ||
991 | return ret; | |
992 | } | |
993 | ||
0e91398f | 994 | void xen_setup_shared_info(void) |
5ead97c8 JF |
995 | { |
996 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
997 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
998 | xen_start_info->shared_info); | |
999 | ||
1000 | HYPERVISOR_shared_info = | |
1001 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1002 | } else |
1003 | HYPERVISOR_shared_info = | |
1004 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1005 | ||
2e8fe719 JF |
1006 | #ifndef CONFIG_SMP |
1007 | /* In UP this is as good a place as any to set up shared info */ | |
1008 | xen_setup_vcpu_info_placement(); | |
1009 | #endif | |
d5edbc1f JF |
1010 | |
1011 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1012 | } |
1013 | ||
5f054e31 | 1014 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1015 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1016 | { |
1017 | int cpu; | |
1018 | ||
1019 | for_each_possible_cpu(cpu) | |
1020 | xen_vcpu_setup(cpu); | |
1021 | ||
1022 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1023 | percpu area for all cpus, so make use of it */ | |
1024 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
1025 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1026 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1027 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1028 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1029 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1030 | } |
5ead97c8 JF |
1031 | } |
1032 | ||
ab144f5e AK |
1033 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1034 | unsigned long addr, unsigned len) | |
6487673b JF |
1035 | { |
1036 | char *start, *end, *reloc; | |
1037 | unsigned ret; | |
1038 | ||
1039 | start = end = reloc = NULL; | |
1040 | ||
93b1eab3 JF |
1041 | #define SITE(op, x) \ |
1042 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1043 | if (have_vcpu_info_placement) { \ |
1044 | start = (char *)xen_##x##_direct; \ | |
1045 | end = xen_##x##_direct_end; \ | |
1046 | reloc = xen_##x##_direct_reloc; \ | |
1047 | } \ | |
1048 | goto patch_site | |
1049 | ||
1050 | switch (type) { | |
93b1eab3 JF |
1051 | SITE(pv_irq_ops, irq_enable); |
1052 | SITE(pv_irq_ops, irq_disable); | |
1053 | SITE(pv_irq_ops, save_fl); | |
1054 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1055 | #undef SITE |
1056 | ||
1057 | patch_site: | |
1058 | if (start == NULL || (end-start) > len) | |
1059 | goto default_patch; | |
1060 | ||
ab144f5e | 1061 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1062 | |
1063 | /* Note: because reloc is assigned from something that | |
1064 | appears to be an array, gcc assumes it's non-null, | |
1065 | but doesn't know its relationship with start and | |
1066 | end. */ | |
1067 | if (reloc > start && reloc < end) { | |
1068 | int reloc_off = reloc - start; | |
ab144f5e AK |
1069 | long *relocp = (long *)(insnbuf + reloc_off); |
1070 | long delta = start - (char *)addr; | |
6487673b JF |
1071 | |
1072 | *relocp += delta; | |
1073 | } | |
1074 | break; | |
1075 | ||
1076 | default_patch: | |
1077 | default: | |
ab144f5e AK |
1078 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1079 | addr, len); | |
6487673b JF |
1080 | break; |
1081 | } | |
1082 | ||
1083 | return ret; | |
1084 | } | |
1085 | ||
ad3062a0 | 1086 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1087 | .paravirt_enabled = 1, |
1088 | .shared_kernel_pmd = 0, | |
1089 | ||
318f5a2a AL |
1090 | #ifdef CONFIG_X86_64 |
1091 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1092 | #endif | |
1093 | ||
5ead97c8 | 1094 | .name = "Xen", |
93b1eab3 | 1095 | }; |
5ead97c8 | 1096 | |
ad3062a0 | 1097 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1098 | .patch = xen_patch, |
93b1eab3 | 1099 | }; |
5ead97c8 | 1100 | |
ad3062a0 | 1101 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1102 | .cpuid = xen_cpuid, |
1103 | ||
1104 | .set_debugreg = xen_set_debugreg, | |
1105 | .get_debugreg = xen_get_debugreg, | |
1106 | ||
7b1333aa | 1107 | .clts = xen_clts, |
5ead97c8 | 1108 | |
a789ed5f | 1109 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1110 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1111 | |
5ead97c8 JF |
1112 | .read_cr4 = native_read_cr4, |
1113 | .read_cr4_safe = native_read_cr4_safe, | |
1114 | .write_cr4 = xen_write_cr4, | |
1115 | ||
5ead97c8 JF |
1116 | .wbinvd = native_wbinvd, |
1117 | ||
1118 | .read_msr = native_read_msr_safe, | |
1ab46fd3 | 1119 | .rdmsr_regs = native_rdmsr_safe_regs, |
1153968a | 1120 | .write_msr = xen_write_msr_safe, |
1ab46fd3 KRW |
1121 | .wrmsr_regs = native_wrmsr_safe_regs, |
1122 | ||
5ead97c8 JF |
1123 | .read_tsc = native_read_tsc, |
1124 | .read_pmc = native_read_pmc, | |
1125 | ||
81e103f1 | 1126 | .iret = xen_iret, |
d75cd22f | 1127 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1128 | #ifdef CONFIG_X86_64 |
1129 | .usergs_sysret32 = xen_sysret32, | |
1130 | .usergs_sysret64 = xen_sysret64, | |
1131 | #endif | |
5ead97c8 JF |
1132 | |
1133 | .load_tr_desc = paravirt_nop, | |
1134 | .set_ldt = xen_set_ldt, | |
1135 | .load_gdt = xen_load_gdt, | |
1136 | .load_idt = xen_load_idt, | |
1137 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1138 | #ifdef CONFIG_X86_64 |
1139 | .load_gs_index = xen_load_gs_index, | |
1140 | #endif | |
5ead97c8 | 1141 | |
38ffbe66 JF |
1142 | .alloc_ldt = xen_alloc_ldt, |
1143 | .free_ldt = xen_free_ldt, | |
1144 | ||
5ead97c8 JF |
1145 | .store_gdt = native_store_gdt, |
1146 | .store_idt = native_store_idt, | |
1147 | .store_tr = xen_store_tr, | |
1148 | ||
1149 | .write_ldt_entry = xen_write_ldt_entry, | |
1150 | .write_gdt_entry = xen_write_gdt_entry, | |
1151 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1152 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1153 | |
1154 | .set_iopl_mask = xen_set_iopl_mask, | |
1155 | .io_delay = xen_io_delay, | |
1156 | ||
952d1d70 JF |
1157 | /* Xen takes care of %gs when switching to usermode for us */ |
1158 | .swapgs = paravirt_nop, | |
1159 | ||
224101ed JF |
1160 | .start_context_switch = paravirt_start_context_switch, |
1161 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1162 | }; |
1163 | ||
ad3062a0 | 1164 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1165 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1166 | .startup_ipi_hook = paravirt_nop, |
1167 | #endif | |
93b1eab3 JF |
1168 | }; |
1169 | ||
fefa629a JF |
1170 | static void xen_reboot(int reason) |
1171 | { | |
349c709f JF |
1172 | struct sched_shutdown r = { .reason = reason }; |
1173 | ||
349c709f | 1174 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1175 | BUG(); |
1176 | } | |
1177 | ||
1178 | static void xen_restart(char *msg) | |
1179 | { | |
1180 | xen_reboot(SHUTDOWN_reboot); | |
1181 | } | |
1182 | ||
1183 | static void xen_emergency_restart(void) | |
1184 | { | |
1185 | xen_reboot(SHUTDOWN_reboot); | |
1186 | } | |
1187 | ||
1188 | static void xen_machine_halt(void) | |
1189 | { | |
1190 | xen_reboot(SHUTDOWN_poweroff); | |
1191 | } | |
1192 | ||
b2abe506 TG |
1193 | static void xen_machine_power_off(void) |
1194 | { | |
1195 | if (pm_power_off) | |
1196 | pm_power_off(); | |
1197 | xen_reboot(SHUTDOWN_poweroff); | |
1198 | } | |
1199 | ||
fefa629a JF |
1200 | static void xen_crash_shutdown(struct pt_regs *regs) |
1201 | { | |
1202 | xen_reboot(SHUTDOWN_crash); | |
1203 | } | |
1204 | ||
f09f6d19 DD |
1205 | static int |
1206 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1207 | { | |
086748e5 | 1208 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1209 | return NOTIFY_DONE; |
1210 | } | |
1211 | ||
1212 | static struct notifier_block xen_panic_block = { | |
1213 | .notifier_call= xen_panic_event, | |
1214 | }; | |
1215 | ||
1216 | int xen_panic_handler_init(void) | |
1217 | { | |
1218 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1219 | return 0; | |
1220 | } | |
1221 | ||
ad3062a0 | 1222 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1223 | .restart = xen_restart, |
1224 | .halt = xen_machine_halt, | |
b2abe506 | 1225 | .power_off = xen_machine_power_off, |
fefa629a JF |
1226 | .shutdown = xen_machine_halt, |
1227 | .crash_shutdown = xen_crash_shutdown, | |
1228 | .emergency_restart = xen_emergency_restart, | |
1229 | }; | |
1230 | ||
577eebea JF |
1231 | /* |
1232 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1233 | * we do this, we have to be careful not to call any stack-protected | |
1234 | * function, which is most of the kernel. | |
1235 | */ | |
1236 | static void __init xen_setup_stackprotector(void) | |
1237 | { | |
1238 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1239 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1240 | ||
1241 | setup_stack_canary_segment(0); | |
1242 | switch_to_new_gdt(0); | |
1243 | ||
1244 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1245 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1246 | } | |
1247 | ||
5ead97c8 JF |
1248 | /* First C function to be called on Xen boot */ |
1249 | asmlinkage void __init xen_start_kernel(void) | |
1250 | { | |
ec35a69c KRW |
1251 | struct physdev_set_iopl set_iopl; |
1252 | int rc; | |
5ead97c8 JF |
1253 | pgd_t *pgd; |
1254 | ||
1255 | if (!xen_start_info) | |
1256 | return; | |
1257 | ||
6e833587 JF |
1258 | xen_domain_type = XEN_PV_DOMAIN; |
1259 | ||
7e77506a IC |
1260 | xen_setup_machphys_mapping(); |
1261 | ||
5ead97c8 | 1262 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1263 | pv_info = xen_info; |
1264 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1265 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1266 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1267 | |
6b18ae3e | 1268 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1269 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1270 | x86_init.oem.banner = xen_banner; |
845b3944 | 1271 | |
409771d2 | 1272 | xen_init_time_ops(); |
93b1eab3 | 1273 | |
ce2eef33 | 1274 | /* |
577eebea | 1275 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1276 | */ |
577eebea | 1277 | |
973df35e JF |
1278 | xen_init_mmu_ops(); |
1279 | ||
577eebea JF |
1280 | /* Prevent unwanted bits from being set in PTEs. */ |
1281 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
8eaffa67 | 1282 | #if 0 |
577eebea | 1283 | if (!xen_initial_domain()) |
8eaffa67 | 1284 | #endif |
577eebea JF |
1285 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
1286 | ||
1287 | __supported_pte_mask |= _PAGE_IOMAP; | |
1288 | ||
817a824b IC |
1289 | /* |
1290 | * Prevent page tables from being allocated in highmem, even | |
1291 | * if CONFIG_HIGHPTE is enabled. | |
1292 | */ | |
1293 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1294 | ||
b75fe4e5 | 1295 | /* Work out if we support NX */ |
4763ed4d | 1296 | x86_configure_nx(); |
b75fe4e5 | 1297 | |
577eebea JF |
1298 | xen_setup_features(); |
1299 | ||
1300 | /* Get mfn list */ | |
1301 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1302 | xen_build_dynamic_phys_to_machine(); | |
1303 | ||
1304 | /* | |
1305 | * Set up kernel GDT and segment registers, mainly so that | |
1306 | * -fstack-protector code can be executed. | |
1307 | */ | |
1308 | xen_setup_stackprotector(); | |
0d1edf46 | 1309 | |
ce2eef33 | 1310 | xen_init_irq_ops(); |
e826fe1b JF |
1311 | xen_init_cpuid_mask(); |
1312 | ||
94a8c3c2 | 1313 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1314 | /* |
94a8c3c2 | 1315 | * set up the basic apic ops. |
ad66dd34 | 1316 | */ |
c1eeb2de | 1317 | set_xen_basic_apic_ops(); |
ad66dd34 | 1318 | #endif |
93b1eab3 | 1319 | |
e57778a1 JF |
1320 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1321 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1322 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1323 | } | |
1324 | ||
fefa629a JF |
1325 | machine_ops = xen_machine_ops; |
1326 | ||
38341432 JF |
1327 | /* |
1328 | * The only reliable way to retain the initial address of the | |
1329 | * percpu gdt_page is to remember it here, so we can go and | |
1330 | * mark it RW later, when the initial percpu area is freed. | |
1331 | */ | |
1332 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1333 | |
a9e7062d | 1334 | xen_smp_init(); |
5ead97c8 | 1335 | |
c1f5db1a IC |
1336 | #ifdef CONFIG_ACPI_NUMA |
1337 | /* | |
1338 | * The pages we from Xen are not related to machine pages, so | |
1339 | * any NUMA information the kernel tries to get from ACPI will | |
1340 | * be meaningless. Prevent it from trying. | |
1341 | */ | |
1342 | acpi_numa = -1; | |
1343 | #endif | |
1344 | ||
5ead97c8 JF |
1345 | pgd = (pgd_t *)xen_start_info->pt_base; |
1346 | ||
60223a32 | 1347 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1348 | possible map and a non-dummy shared_info. */ |
60223a32 | 1349 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1350 | |
55d80856 | 1351 | local_irq_disable(); |
2ce802f6 | 1352 | early_boot_irqs_disabled = true; |
55d80856 | 1353 | |
084a2a4e | 1354 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1355 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1356 | |
33a84750 JF |
1357 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1358 | xen_build_mfn_list_list(); | |
1359 | ||
5ead97c8 JF |
1360 | /* keep using Xen gdt for now; no urgent need to change it */ |
1361 | ||
e68266b7 | 1362 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1363 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1364 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1365 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1366 | #else |
1367 | pv_info.kernel_rpl = 0; | |
1368 | #endif | |
5ead97c8 | 1369 | /* set the limit of our address space */ |
fb1d8404 | 1370 | xen_reserve_top(); |
5ead97c8 | 1371 | |
ec35a69c KRW |
1372 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1373 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1374 | * which pokes 0xcf8 port. | |
1375 | */ | |
1376 | set_iopl.iopl = 1; | |
1377 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1378 | if (rc != 0) | |
1379 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1380 | ||
7d087b68 | 1381 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1382 | /* set up basic CPUID stuff */ |
1383 | cpu_detect(&new_cpu_data); | |
1384 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1385 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1386 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1387 | #endif |
5ead97c8 JF |
1388 | |
1389 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1390 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1391 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1392 | ? __pa(xen_start_info->mod_start) : 0; | |
1393 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1394 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1395 | |
6e833587 | 1396 | if (!xen_initial_domain()) { |
83abc70a | 1397 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1398 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1399 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1400 | if (pci_xen) |
1401 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1402 | } else { |
c2419b4a JF |
1403 | const struct dom0_vga_console_info *info = |
1404 | (void *)((char *)xen_start_info + | |
1405 | xen_start_info->console.dom0.info_off); | |
1406 | ||
1407 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1408 | xen_start_info->console.domU.mfn = 0; | |
1409 | xen_start_info->console.domU.evtchn = 0; | |
1410 | ||
31b3c9d7 KRW |
1411 | xen_init_apic(); |
1412 | ||
5d990b62 CW |
1413 | /* Make sure ACS will be enabled */ |
1414 | pci_request_acs(); | |
211063dc KRW |
1415 | |
1416 | xen_acpi_sleep_register(); | |
9e124fe1 | 1417 | } |
76a8df7b DV |
1418 | #ifdef CONFIG_PCI |
1419 | /* PCI BIOS service won't work from a PV guest. */ | |
1420 | pci_probe &= ~PCI_PROBE_BIOS; | |
1421 | #endif | |
084a2a4e JF |
1422 | xen_raw_console_write("about to get started...\n"); |
1423 | ||
499d19b8 JF |
1424 | xen_setup_runstate_info(0); |
1425 | ||
5ead97c8 | 1426 | /* Start the world */ |
f5d36de0 | 1427 | #ifdef CONFIG_X86_32 |
f0d43100 | 1428 | i386_start_kernel(); |
f5d36de0 | 1429 | #else |
084a2a4e | 1430 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1431 | #endif |
5ead97c8 | 1432 | } |
bee6ab53 | 1433 | |
bee6ab53 SY |
1434 | static int init_hvm_pv_info(int *major, int *minor) |
1435 | { | |
1436 | uint32_t eax, ebx, ecx, edx, pages, msr, base; | |
1437 | u64 pfn; | |
1438 | ||
1439 | base = xen_cpuid_base(); | |
1440 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); | |
1441 | ||
1442 | *major = eax >> 16; | |
1443 | *minor = eax & 0xffff; | |
1444 | printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor); | |
1445 | ||
1446 | cpuid(base + 2, &pages, &msr, &ecx, &edx); | |
1447 | ||
1448 | pfn = __pa(hypercall_page); | |
1449 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1450 | ||
1451 | xen_setup_features(); | |
1452 | ||
cff520b9 | 1453 | pv_info.name = "Xen HVM"; |
bee6ab53 SY |
1454 | |
1455 | xen_domain_type = XEN_HVM_DOMAIN; | |
1456 | ||
1457 | return 0; | |
1458 | } | |
1459 | ||
44b46c3e | 1460 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1461 | { |
016b6f5f | 1462 | int cpu; |
bee6ab53 | 1463 | struct xen_add_to_physmap xatp; |
016b6f5f | 1464 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1465 | |
016b6f5f SS |
1466 | if (!shared_info_page) |
1467 | shared_info_page = (struct shared_info *) | |
1468 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1469 | xatp.domid = DOMID_SELF; |
1470 | xatp.idx = 0; | |
1471 | xatp.space = XENMAPSPACE_shared_info; | |
1472 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; | |
1473 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) | |
1474 | BUG(); | |
1475 | ||
1476 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; | |
1477 | ||
016b6f5f SS |
1478 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1479 | * page, we use it in the event channel upcall and in some pvclock | |
1480 | * related functions. We don't need the vcpu_info placement | |
1481 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
1482 | * HVM. | |
1483 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1484 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1485 | * in that case multiple vcpus might be online. */ | |
1486 | for_each_online_cpu(cpu) { | |
1487 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
1488 | } | |
bee6ab53 SY |
1489 | } |
1490 | ||
ca65f9fc | 1491 | #ifdef CONFIG_XEN_PVHVM |
38e20b07 SY |
1492 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1493 | unsigned long action, void *hcpu) | |
1494 | { | |
1495 | int cpu = (long)hcpu; | |
1496 | switch (action) { | |
1497 | case CPU_UP_PREPARE: | |
90d4f553 | 1498 | xen_vcpu_setup(cpu); |
99bbb3a8 SS |
1499 | if (xen_have_vector_callback) |
1500 | xen_init_lock_cpu(cpu); | |
38e20b07 SY |
1501 | break; |
1502 | default: | |
1503 | break; | |
1504 | } | |
1505 | return NOTIFY_OK; | |
1506 | } | |
1507 | ||
ad3062a0 | 1508 | static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = { |
38e20b07 SY |
1509 | .notifier_call = xen_hvm_cpu_notify, |
1510 | }; | |
1511 | ||
bee6ab53 SY |
1512 | static void __init xen_hvm_guest_init(void) |
1513 | { | |
1514 | int r; | |
1515 | int major, minor; | |
1516 | ||
1517 | r = init_hvm_pv_info(&major, &minor); | |
1518 | if (r < 0) | |
1519 | return; | |
1520 | ||
016b6f5f | 1521 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1522 | |
1523 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1524 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1525 | xen_hvm_smp_init(); |
38e20b07 | 1526 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1527 | xen_unplug_emulated_devices(); |
38e20b07 | 1528 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1529 | xen_hvm_init_time_ops(); |
59151001 | 1530 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1531 | } |
1532 | ||
1533 | static bool __init xen_hvm_platform(void) | |
1534 | { | |
1535 | if (xen_pv_domain()) | |
1536 | return false; | |
1537 | ||
1538 | if (!xen_cpuid_base()) | |
1539 | return false; | |
1540 | ||
1541 | return true; | |
1542 | } | |
1543 | ||
d9b8ca84 SY |
1544 | bool xen_hvm_need_lapic(void) |
1545 | { | |
1546 | if (xen_pv_domain()) | |
1547 | return false; | |
1548 | if (!xen_hvm_domain()) | |
1549 | return false; | |
1550 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1551 | return false; | |
1552 | return true; | |
1553 | } | |
1554 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1555 | ||
ad3062a0 | 1556 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1557 | .name = "Xen HVM", |
1558 | .detect = xen_hvm_platform, | |
1559 | .init_platform = xen_hvm_guest_init, | |
1560 | }; | |
1561 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1562 | #endif |