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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/preempt.h> | |
f120f13e | 18 | #include <linux/hardirq.h> |
5ead97c8 JF |
19 | #include <linux/percpu.h> |
20 | #include <linux/delay.h> | |
21 | #include <linux/start_kernel.h> | |
22 | #include <linux/sched.h> | |
23 | #include <linux/bootmem.h> | |
24 | #include <linux/module.h> | |
f4f97b3e JF |
25 | #include <linux/mm.h> |
26 | #include <linux/page-flags.h> | |
27 | #include <linux/highmem.h> | |
b8c2d3df | 28 | #include <linux/console.h> |
5ead97c8 JF |
29 | |
30 | #include <xen/interface/xen.h> | |
31 | #include <xen/interface/physdev.h> | |
32 | #include <xen/interface/vcpu.h> | |
fefa629a | 33 | #include <xen/interface/sched.h> |
5ead97c8 JF |
34 | #include <xen/features.h> |
35 | #include <xen/page.h> | |
36 | ||
37 | #include <asm/paravirt.h> | |
38 | #include <asm/page.h> | |
39 | #include <asm/xen/hypercall.h> | |
40 | #include <asm/xen/hypervisor.h> | |
41 | #include <asm/fixmap.h> | |
42 | #include <asm/processor.h> | |
43 | #include <asm/setup.h> | |
44 | #include <asm/desc.h> | |
45 | #include <asm/pgtable.h> | |
f87e4cac | 46 | #include <asm/tlbflush.h> |
fefa629a | 47 | #include <asm/reboot.h> |
5ead97c8 JF |
48 | |
49 | #include "xen-ops.h" | |
3b827c1b | 50 | #include "mmu.h" |
5ead97c8 JF |
51 | #include "multicalls.h" |
52 | ||
53 | EXPORT_SYMBOL_GPL(hypercall_page); | |
54 | ||
5ead97c8 JF |
55 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
56 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d JF |
57 | |
58 | /* | |
59 | * Note about cr3 (pagetable base) values: | |
60 | * | |
61 | * xen_cr3 contains the current logical cr3 value; it contains the | |
62 | * last set cr3. This may not be the current effective cr3, because | |
63 | * its update may be being lazily deferred. However, a vcpu looking | |
64 | * at its own cr3 can use this value knowing that it everything will | |
65 | * be self-consistent. | |
66 | * | |
67 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | |
68 | * hypercall to set the vcpu cr3 is complete (so it may be a little | |
69 | * out of date, but it will never be set early). If one vcpu is | |
70 | * looking at another vcpu's cr3 value, it should use this variable. | |
71 | */ | |
72 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | |
73 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | |
5ead97c8 JF |
74 | |
75 | struct start_info *xen_start_info; | |
76 | EXPORT_SYMBOL_GPL(xen_start_info); | |
77 | ||
60223a32 JF |
78 | static /* __initdata */ struct shared_info dummy_shared_info; |
79 | ||
80 | /* | |
81 | * Point at some empty memory to start with. We map the real shared_info | |
82 | * page as soon as fixmap is up and running. | |
83 | */ | |
84 | struct shared_info *HYPERVISOR_shared_info = (void *)&dummy_shared_info; | |
85 | ||
86 | /* | |
87 | * Flag to determine whether vcpu info placement is available on all | |
88 | * VCPUs. We assume it is to start with, and then set it to zero on | |
89 | * the first failure. This is because it can succeed on some VCPUs | |
90 | * and not others, since it can involve hypervisor memory allocation, | |
91 | * or because the guest failed to guarantee all the appropriate | |
92 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
93 | * | |
94 | * Note that any particular CPU may be using a placed vcpu structure, | |
95 | * but we can only optimise if the all are. | |
96 | * | |
97 | * 0: not available, 1: available | |
98 | */ | |
04c44a08 | 99 | static int have_vcpu_info_placement = 1; |
60223a32 JF |
100 | |
101 | static void __init xen_vcpu_setup(int cpu) | |
5ead97c8 | 102 | { |
60223a32 JF |
103 | struct vcpu_register_vcpu_info info; |
104 | int err; | |
105 | struct vcpu_info *vcpup; | |
106 | ||
2e8fe719 | 107 | BUG_ON(HYPERVISOR_shared_info == &dummy_shared_info); |
5ead97c8 | 108 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
60223a32 JF |
109 | |
110 | if (!have_vcpu_info_placement) | |
111 | return; /* already tested, not available */ | |
112 | ||
113 | vcpup = &per_cpu(xen_vcpu_info, cpu); | |
114 | ||
115 | info.mfn = virt_to_mfn(vcpup); | |
116 | info.offset = offset_in_page(vcpup); | |
117 | ||
e3d26976 | 118 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
60223a32 JF |
119 | cpu, vcpup, info.mfn, info.offset); |
120 | ||
121 | /* Check to see if the hypervisor will put the vcpu_info | |
122 | structure where we want it, which allows direct access via | |
123 | a percpu-variable. */ | |
124 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
125 | ||
126 | if (err) { | |
127 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
128 | have_vcpu_info_placement = 0; | |
129 | } else { | |
130 | /* This cpu is using the registered vcpu info, even if | |
131 | later ones fail to. */ | |
132 | per_cpu(xen_vcpu, cpu) = vcpup; | |
6487673b | 133 | |
60223a32 JF |
134 | printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n", |
135 | cpu, vcpup); | |
136 | } | |
5ead97c8 JF |
137 | } |
138 | ||
139 | static void __init xen_banner(void) | |
140 | { | |
141 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", | |
93b1eab3 | 142 | pv_info.name); |
5ead97c8 JF |
143 | printk(KERN_INFO "Hypervisor signature: %s\n", xen_start_info->magic); |
144 | } | |
145 | ||
65ea5b03 PA |
146 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
147 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 JF |
148 | { |
149 | unsigned maskedx = ~0; | |
150 | ||
151 | /* | |
152 | * Mask out inconvenient features, to try and disable as many | |
153 | * unsupported kernel subsystems as possible. | |
154 | */ | |
65ea5b03 | 155 | if (*ax == 1) |
5ead97c8 JF |
156 | maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */ |
157 | (1 << X86_FEATURE_ACPI) | /* disable ACPI */ | |
dbe9e994 JF |
158 | (1 << X86_FEATURE_MCE) | /* disable MCE */ |
159 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
5ead97c8 JF |
160 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
161 | ||
162 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
163 | : "=a" (*ax), |
164 | "=b" (*bx), | |
165 | "=c" (*cx), | |
166 | "=d" (*dx) | |
167 | : "0" (*ax), "2" (*cx)); | |
168 | *dx &= maskedx; | |
5ead97c8 JF |
169 | } |
170 | ||
171 | static void xen_set_debugreg(int reg, unsigned long val) | |
172 | { | |
173 | HYPERVISOR_set_debugreg(reg, val); | |
174 | } | |
175 | ||
176 | static unsigned long xen_get_debugreg(int reg) | |
177 | { | |
178 | return HYPERVISOR_get_debugreg(reg); | |
179 | } | |
180 | ||
181 | static unsigned long xen_save_fl(void) | |
182 | { | |
183 | struct vcpu_info *vcpu; | |
184 | unsigned long flags; | |
185 | ||
5ead97c8 | 186 | vcpu = x86_read_percpu(xen_vcpu); |
f120f13e | 187 | |
5ead97c8 JF |
188 | /* flag has opposite sense of mask */ |
189 | flags = !vcpu->evtchn_upcall_mask; | |
5ead97c8 JF |
190 | |
191 | /* convert to IF type flag | |
192 | -0 -> 0x00000000 | |
193 | -1 -> 0xffffffff | |
194 | */ | |
195 | return (-flags) & X86_EFLAGS_IF; | |
196 | } | |
197 | ||
198 | static void xen_restore_fl(unsigned long flags) | |
199 | { | |
200 | struct vcpu_info *vcpu; | |
201 | ||
5ead97c8 JF |
202 | /* convert from IF type flag */ |
203 | flags = !(flags & X86_EFLAGS_IF); | |
f120f13e JF |
204 | |
205 | /* There's a one instruction preempt window here. We need to | |
206 | make sure we're don't switch CPUs between getting the vcpu | |
207 | pointer and updating the mask. */ | |
208 | preempt_disable(); | |
5ead97c8 JF |
209 | vcpu = x86_read_percpu(xen_vcpu); |
210 | vcpu->evtchn_upcall_mask = flags; | |
f120f13e | 211 | preempt_enable_no_resched(); |
5ead97c8 | 212 | |
f120f13e JF |
213 | /* Doesn't matter if we get preempted here, because any |
214 | pending event will get dealt with anyway. */ | |
5ead97c8 | 215 | |
f120f13e JF |
216 | if (flags == 0) { |
217 | preempt_check_resched(); | |
218 | barrier(); /* unmask then check (avoid races) */ | |
5ead97c8 JF |
219 | if (unlikely(vcpu->evtchn_upcall_pending)) |
220 | force_evtchn_callback(); | |
f120f13e | 221 | } |
5ead97c8 JF |
222 | } |
223 | ||
224 | static void xen_irq_disable(void) | |
225 | { | |
f120f13e JF |
226 | /* There's a one instruction preempt window here. We need to |
227 | make sure we're don't switch CPUs between getting the vcpu | |
228 | pointer and updating the mask. */ | |
5ead97c8 | 229 | preempt_disable(); |
f120f13e | 230 | x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1; |
5ead97c8 JF |
231 | preempt_enable_no_resched(); |
232 | } | |
233 | ||
234 | static void xen_irq_enable(void) | |
235 | { | |
236 | struct vcpu_info *vcpu; | |
237 | ||
f120f13e JF |
238 | /* There's a one instruction preempt window here. We need to |
239 | make sure we're don't switch CPUs between getting the vcpu | |
240 | pointer and updating the mask. */ | |
5ead97c8 JF |
241 | preempt_disable(); |
242 | vcpu = x86_read_percpu(xen_vcpu); | |
243 | vcpu->evtchn_upcall_mask = 0; | |
f120f13e | 244 | preempt_enable_no_resched(); |
5ead97c8 | 245 | |
f120f13e JF |
246 | /* Doesn't matter if we get preempted here, because any |
247 | pending event will get dealt with anyway. */ | |
5ead97c8 | 248 | |
f120f13e | 249 | barrier(); /* unmask then check (avoid races) */ |
5ead97c8 JF |
250 | if (unlikely(vcpu->evtchn_upcall_pending)) |
251 | force_evtchn_callback(); | |
5ead97c8 JF |
252 | } |
253 | ||
254 | static void xen_safe_halt(void) | |
255 | { | |
256 | /* Blocking includes an implicit local_irq_enable(). */ | |
349c709f | 257 | if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0) |
5ead97c8 JF |
258 | BUG(); |
259 | } | |
260 | ||
261 | static void xen_halt(void) | |
262 | { | |
263 | if (irqs_disabled()) | |
264 | HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL); | |
265 | else | |
266 | xen_safe_halt(); | |
267 | } | |
268 | ||
8965c1c0 | 269 | static void xen_leave_lazy(void) |
5ead97c8 | 270 | { |
8965c1c0 | 271 | paravirt_leave_lazy(paravirt_get_lazy_mode()); |
5ead97c8 | 272 | xen_mc_flush(); |
5ead97c8 JF |
273 | } |
274 | ||
275 | static unsigned long xen_store_tr(void) | |
276 | { | |
277 | return 0; | |
278 | } | |
279 | ||
280 | static void xen_set_ldt(const void *addr, unsigned entries) | |
281 | { | |
5ead97c8 JF |
282 | struct mmuext_op *op; |
283 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
284 | ||
285 | op = mcs.args; | |
286 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 287 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
288 | op->arg2.nr_ents = entries; |
289 | ||
290 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
291 | ||
292 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
293 | } | |
294 | ||
6b68f01b | 295 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 JF |
296 | { |
297 | unsigned long *frames; | |
298 | unsigned long va = dtr->address; | |
299 | unsigned int size = dtr->size + 1; | |
300 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
301 | int f; | |
302 | struct multicall_space mcs; | |
303 | ||
304 | /* A GDT can be up to 64k in size, which corresponds to 8192 | |
305 | 8-byte entries, or 16 4k pages.. */ | |
306 | ||
307 | BUG_ON(size > 65536); | |
308 | BUG_ON(va & ~PAGE_MASK); | |
309 | ||
310 | mcs = xen_mc_entry(sizeof(*frames) * pages); | |
311 | frames = mcs.args; | |
312 | ||
313 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
314 | frames[f] = virt_to_mfn(va); | |
315 | make_lowmem_page_readonly((void *)va); | |
316 | } | |
317 | ||
318 | MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct)); | |
319 | ||
320 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
321 | } | |
322 | ||
323 | static void load_TLS_descriptor(struct thread_struct *t, | |
324 | unsigned int cpu, unsigned int i) | |
325 | { | |
326 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
327 | xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
328 | struct multicall_space mc = __xen_mc_entry(0); | |
329 | ||
330 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
331 | } | |
332 | ||
333 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
334 | { | |
335 | xen_mc_batch(); | |
336 | ||
337 | load_TLS_descriptor(t, cpu, 0); | |
338 | load_TLS_descriptor(t, cpu, 1); | |
339 | load_TLS_descriptor(t, cpu, 2); | |
340 | ||
341 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
8b84ad94 JF |
342 | |
343 | /* | |
344 | * XXX sleazy hack: If we're being called in a lazy-cpu zone, | |
345 | * it means we're in a context switch, and %gs has just been | |
346 | * saved. This means we can zero it out to prevent faults on | |
347 | * exit from the hypervisor if the next process has no %gs. | |
348 | * Either way, it has been saved, and the new value will get | |
349 | * loaded properly. This will go away as soon as Xen has been | |
350 | * modified to not save/restore %gs for normal hypercalls. | |
351 | */ | |
8965c1c0 | 352 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) |
8b84ad94 | 353 | loadsegment(gs, 0); |
5ead97c8 JF |
354 | } |
355 | ||
356 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 357 | const void *ptr) |
5ead97c8 JF |
358 | { |
359 | unsigned long lp = (unsigned long)&dt[entrynum]; | |
360 | xmaddr_t mach_lp = virt_to_machine(lp); | |
75b8bb3e | 361 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 362 | |
f120f13e JF |
363 | preempt_disable(); |
364 | ||
5ead97c8 JF |
365 | xen_mc_flush(); |
366 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
367 | BUG(); | |
f120f13e JF |
368 | |
369 | preempt_enable(); | |
5ead97c8 JF |
370 | } |
371 | ||
372 | static int cvt_gate_to_trap(int vector, u32 low, u32 high, | |
373 | struct trap_info *info) | |
374 | { | |
375 | u8 type, dpl; | |
376 | ||
377 | type = (high >> 8) & 0x1f; | |
378 | dpl = (high >> 13) & 3; | |
379 | ||
380 | if (type != 0xf && type != 0xe) | |
381 | return 0; | |
382 | ||
383 | info->vector = vector; | |
384 | info->address = (high & 0xffff0000) | (low & 0x0000ffff); | |
385 | info->cs = low >> 16; | |
386 | info->flags = dpl; | |
387 | /* interrupt gates clear IF */ | |
388 | if (type == 0xe) | |
389 | info->flags |= 4; | |
390 | ||
391 | return 1; | |
392 | } | |
393 | ||
394 | /* Locations of each CPU's IDT */ | |
6b68f01b | 395 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
396 | |
397 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
398 | also update Xen. */ | |
8d947344 | 399 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 400 | { |
5ead97c8 | 401 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
402 | unsigned long start, end; |
403 | ||
404 | preempt_disable(); | |
405 | ||
406 | start = __get_cpu_var(idt_desc).address; | |
407 | end = start + __get_cpu_var(idt_desc).size + 1; | |
5ead97c8 JF |
408 | |
409 | xen_mc_flush(); | |
410 | ||
8d947344 | 411 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
412 | |
413 | if (p >= start && (p + 8) <= end) { | |
414 | struct trap_info info[2]; | |
8d947344 | 415 | u32 *desc = (u32 *)g; |
5ead97c8 JF |
416 | |
417 | info[1].address = 0; | |
418 | ||
8d947344 | 419 | if (cvt_gate_to_trap(entrynum, desc[0], desc[1], &info[0])) |
5ead97c8 JF |
420 | if (HYPERVISOR_set_trap_table(info)) |
421 | BUG(); | |
422 | } | |
f120f13e JF |
423 | |
424 | preempt_enable(); | |
5ead97c8 JF |
425 | } |
426 | ||
6b68f01b | 427 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 428 | struct trap_info *traps) |
5ead97c8 | 429 | { |
5ead97c8 JF |
430 | unsigned in, out, count; |
431 | ||
5ead97c8 JF |
432 | count = (desc->size+1) / 8; |
433 | BUG_ON(count > 256); | |
434 | ||
5ead97c8 JF |
435 | for (in = out = 0; in < count; in++) { |
436 | const u32 *entry = (u32 *)(desc->address + in * 8); | |
437 | ||
438 | if (cvt_gate_to_trap(in, entry[0], entry[1], &traps[out])) | |
439 | out++; | |
440 | } | |
441 | traps[out].address = 0; | |
f87e4cac JF |
442 | } |
443 | ||
444 | void xen_copy_trap_info(struct trap_info *traps) | |
445 | { | |
6b68f01b | 446 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
447 | |
448 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
449 | } |
450 | ||
451 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
452 | hold a spinlock to protect the static traps[] array (static because | |
453 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 454 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
455 | { |
456 | static DEFINE_SPINLOCK(lock); | |
457 | static struct trap_info traps[257]; | |
f87e4cac JF |
458 | |
459 | spin_lock(&lock); | |
460 | ||
f120f13e JF |
461 | __get_cpu_var(idt_desc) = *desc; |
462 | ||
f87e4cac | 463 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
464 | |
465 | xen_mc_flush(); | |
466 | if (HYPERVISOR_set_trap_table(traps)) | |
467 | BUG(); | |
468 | ||
469 | spin_unlock(&lock); | |
470 | } | |
471 | ||
472 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
473 | they're handled differently. */ | |
474 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 475 | const void *desc, int type) |
5ead97c8 | 476 | { |
f120f13e JF |
477 | preempt_disable(); |
478 | ||
014b15be GOC |
479 | switch (type) { |
480 | case DESC_LDT: | |
481 | case DESC_TSS: | |
5ead97c8 JF |
482 | /* ignore */ |
483 | break; | |
484 | ||
485 | default: { | |
486 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
5ead97c8 JF |
487 | |
488 | xen_mc_flush(); | |
014b15be | 489 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
490 | BUG(); |
491 | } | |
492 | ||
493 | } | |
f120f13e JF |
494 | |
495 | preempt_enable(); | |
5ead97c8 JF |
496 | } |
497 | ||
faca6227 | 498 | static void xen_load_sp0(struct tss_struct *tss, |
f120f13e | 499 | struct thread_struct *thread) |
5ead97c8 JF |
500 | { |
501 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 502 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
503 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
504 | } | |
505 | ||
506 | static void xen_set_iopl_mask(unsigned mask) | |
507 | { | |
508 | struct physdev_set_iopl set_iopl; | |
509 | ||
510 | /* Force the change at ring 0. */ | |
511 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
512 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
513 | } | |
514 | ||
515 | static void xen_io_delay(void) | |
516 | { | |
517 | } | |
518 | ||
519 | #ifdef CONFIG_X86_LOCAL_APIC | |
42e0a9aa | 520 | static u32 xen_apic_read(unsigned long reg) |
5ead97c8 JF |
521 | { |
522 | return 0; | |
523 | } | |
f87e4cac | 524 | |
42e0a9aa | 525 | static void xen_apic_write(unsigned long reg, u32 val) |
f87e4cac JF |
526 | { |
527 | /* Warn to see if there's any stray references */ | |
528 | WARN_ON(1); | |
529 | } | |
5ead97c8 JF |
530 | #endif |
531 | ||
532 | static void xen_flush_tlb(void) | |
533 | { | |
d66bf8fc | 534 | struct mmuext_op *op; |
41e332b2 JF |
535 | struct multicall_space mcs; |
536 | ||
537 | preempt_disable(); | |
538 | ||
539 | mcs = xen_mc_entry(sizeof(*op)); | |
5ead97c8 | 540 | |
d66bf8fc JF |
541 | op = mcs.args; |
542 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | |
543 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
544 | ||
545 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
41e332b2 JF |
546 | |
547 | preempt_enable(); | |
5ead97c8 JF |
548 | } |
549 | ||
550 | static void xen_flush_tlb_single(unsigned long addr) | |
551 | { | |
d66bf8fc | 552 | struct mmuext_op *op; |
41e332b2 JF |
553 | struct multicall_space mcs; |
554 | ||
555 | preempt_disable(); | |
5ead97c8 | 556 | |
41e332b2 | 557 | mcs = xen_mc_entry(sizeof(*op)); |
d66bf8fc JF |
558 | op = mcs.args; |
559 | op->cmd = MMUEXT_INVLPG_LOCAL; | |
560 | op->arg1.linear_addr = addr & PAGE_MASK; | |
561 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
562 | ||
563 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
41e332b2 JF |
564 | |
565 | preempt_enable(); | |
5ead97c8 JF |
566 | } |
567 | ||
f87e4cac JF |
568 | static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm, |
569 | unsigned long va) | |
570 | { | |
d66bf8fc JF |
571 | struct { |
572 | struct mmuext_op op; | |
573 | cpumask_t mask; | |
574 | } *args; | |
f87e4cac | 575 | cpumask_t cpumask = *cpus; |
d66bf8fc | 576 | struct multicall_space mcs; |
f87e4cac JF |
577 | |
578 | /* | |
579 | * A couple of (to be removed) sanity checks: | |
580 | * | |
581 | * - current CPU must not be in mask | |
582 | * - mask must exist :) | |
583 | */ | |
584 | BUG_ON(cpus_empty(cpumask)); | |
585 | BUG_ON(cpu_isset(smp_processor_id(), cpumask)); | |
586 | BUG_ON(!mm); | |
587 | ||
588 | /* If a CPU which we ran on has gone down, OK. */ | |
589 | cpus_and(cpumask, cpumask, cpu_online_map); | |
590 | if (cpus_empty(cpumask)) | |
591 | return; | |
592 | ||
d66bf8fc JF |
593 | mcs = xen_mc_entry(sizeof(*args)); |
594 | args = mcs.args; | |
595 | args->mask = cpumask; | |
596 | args->op.arg2.vcpumask = &args->mask; | |
597 | ||
f87e4cac | 598 | if (va == TLB_FLUSH_ALL) { |
d66bf8fc | 599 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; |
f87e4cac | 600 | } else { |
d66bf8fc JF |
601 | args->op.cmd = MMUEXT_INVLPG_MULTI; |
602 | args->op.arg1.linear_addr = va; | |
f87e4cac JF |
603 | } |
604 | ||
d66bf8fc JF |
605 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); |
606 | ||
607 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
f87e4cac JF |
608 | } |
609 | ||
7b1333aa JF |
610 | static void xen_clts(void) |
611 | { | |
612 | struct multicall_space mcs; | |
613 | ||
614 | mcs = xen_mc_entry(0); | |
615 | ||
616 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
617 | ||
618 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
619 | } | |
620 | ||
621 | static void xen_write_cr0(unsigned long cr0) | |
622 | { | |
623 | struct multicall_space mcs; | |
624 | ||
625 | /* Only pay attention to cr0.TS; everything else is | |
626 | ignored. */ | |
627 | mcs = xen_mc_entry(0); | |
628 | ||
629 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
630 | ||
631 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
632 | } | |
633 | ||
60223a32 JF |
634 | static void xen_write_cr2(unsigned long cr2) |
635 | { | |
636 | x86_read_percpu(xen_vcpu)->arch.cr2 = cr2; | |
637 | } | |
638 | ||
5ead97c8 JF |
639 | static unsigned long xen_read_cr2(void) |
640 | { | |
641 | return x86_read_percpu(xen_vcpu)->arch.cr2; | |
642 | } | |
643 | ||
60223a32 JF |
644 | static unsigned long xen_read_cr2_direct(void) |
645 | { | |
646 | return x86_read_percpu(xen_vcpu_info.arch.cr2); | |
647 | } | |
648 | ||
5ead97c8 JF |
649 | static void xen_write_cr4(unsigned long cr4) |
650 | { | |
2956a351 JF |
651 | cr4 &= ~X86_CR4_PGE; |
652 | cr4 &= ~X86_CR4_PSE; | |
653 | ||
654 | native_write_cr4(cr4); | |
5ead97c8 JF |
655 | } |
656 | ||
5ead97c8 JF |
657 | static unsigned long xen_read_cr3(void) |
658 | { | |
659 | return x86_read_percpu(xen_cr3); | |
660 | } | |
661 | ||
9f79991d JF |
662 | static void set_current_cr3(void *v) |
663 | { | |
664 | x86_write_percpu(xen_current_cr3, (unsigned long)v); | |
665 | } | |
666 | ||
5ead97c8 JF |
667 | static void xen_write_cr3(unsigned long cr3) |
668 | { | |
9f79991d JF |
669 | struct mmuext_op *op; |
670 | struct multicall_space mcs; | |
671 | unsigned long mfn = pfn_to_mfn(PFN_DOWN(cr3)); | |
672 | ||
f120f13e JF |
673 | BUG_ON(preemptible()); |
674 | ||
9f79991d | 675 | mcs = xen_mc_entry(sizeof(*op)); /* disables interrupts */ |
5ead97c8 | 676 | |
9f79991d JF |
677 | /* Update while interrupts are disabled, so its atomic with |
678 | respect to ipis */ | |
5ead97c8 JF |
679 | x86_write_percpu(xen_cr3, cr3); |
680 | ||
9f79991d JF |
681 | op = mcs.args; |
682 | op->cmd = MMUEXT_NEW_BASEPTR; | |
683 | op->arg1.mfn = mfn; | |
5ead97c8 | 684 | |
9f79991d | 685 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); |
5ead97c8 | 686 | |
9f79991d JF |
687 | /* Update xen_update_cr3 once the batch has actually |
688 | been submitted. */ | |
689 | xen_mc_callback(set_current_cr3, (void *)cr3); | |
5ead97c8 | 690 | |
9f79991d | 691 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ |
5ead97c8 JF |
692 | } |
693 | ||
f4f97b3e JF |
694 | /* Early in boot, while setting up the initial pagetable, assume |
695 | everything is pinned. */ | |
6944a9c8 | 696 | static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn) |
5ead97c8 | 697 | { |
af7ae3b9 | 698 | #ifdef CONFIG_FLATMEM |
f4f97b3e | 699 | BUG_ON(mem_map); /* should only be used early */ |
af7ae3b9 | 700 | #endif |
5ead97c8 JF |
701 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); |
702 | } | |
703 | ||
6944a9c8 | 704 | /* Early release_pte assumes that all pts are pinned, since there's |
1c70e9bd | 705 | only init_mm and anything attached to that is pinned. */ |
6944a9c8 | 706 | static void xen_release_pte_init(u32 pfn) |
1c70e9bd JF |
707 | { |
708 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | |
709 | } | |
710 | ||
f6433706 | 711 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) |
74260714 JF |
712 | { |
713 | struct mmuext_op op; | |
f6433706 | 714 | op.cmd = cmd; |
74260714 JF |
715 | op.arg1.mfn = pfn_to_mfn(pfn); |
716 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | |
717 | BUG(); | |
718 | } | |
719 | ||
f4f97b3e JF |
720 | /* This needs to make sure the new pte page is pinned iff its being |
721 | attached to a pinned pagetable. */ | |
1c70e9bd | 722 | static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level) |
5ead97c8 | 723 | { |
f4f97b3e | 724 | struct page *page = pfn_to_page(pfn); |
5ead97c8 | 725 | |
f4f97b3e JF |
726 | if (PagePinned(virt_to_page(mm->pgd))) { |
727 | SetPagePinned(page); | |
728 | ||
74260714 | 729 | if (!PageHighMem(page)) { |
f4f97b3e | 730 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); |
f6433706 MM |
731 | if (level == PT_PTE) |
732 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
74260714 | 733 | } else |
f4f97b3e JF |
734 | /* make sure there are no stray mappings of |
735 | this page */ | |
736 | kmap_flush_unused(); | |
737 | } | |
5ead97c8 JF |
738 | } |
739 | ||
6944a9c8 | 740 | static void xen_alloc_pte(struct mm_struct *mm, u32 pfn) |
1c70e9bd | 741 | { |
f6433706 | 742 | xen_alloc_ptpage(mm, pfn, PT_PTE); |
1c70e9bd JF |
743 | } |
744 | ||
6944a9c8 | 745 | static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn) |
1c70e9bd | 746 | { |
f6433706 | 747 | xen_alloc_ptpage(mm, pfn, PT_PMD); |
1c70e9bd JF |
748 | } |
749 | ||
f4f97b3e | 750 | /* This should never happen until we're OK to use struct page */ |
f6433706 | 751 | static void xen_release_ptpage(u32 pfn, unsigned level) |
5ead97c8 | 752 | { |
f4f97b3e JF |
753 | struct page *page = pfn_to_page(pfn); |
754 | ||
755 | if (PagePinned(page)) { | |
74260714 | 756 | if (!PageHighMem(page)) { |
a684d69d MM |
757 | if (level == PT_PTE) |
758 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); | |
f4f97b3e | 759 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
74260714 | 760 | } |
c946c7de | 761 | ClearPagePinned(page); |
f4f97b3e | 762 | } |
5ead97c8 JF |
763 | } |
764 | ||
6944a9c8 | 765 | static void xen_release_pte(u32 pfn) |
f6433706 MM |
766 | { |
767 | xen_release_ptpage(pfn, PT_PTE); | |
768 | } | |
769 | ||
6944a9c8 | 770 | static void xen_release_pmd(u32 pfn) |
f6433706 MM |
771 | { |
772 | xen_release_ptpage(pfn, PT_PMD); | |
773 | } | |
774 | ||
f4f97b3e JF |
775 | #ifdef CONFIG_HIGHPTE |
776 | static void *xen_kmap_atomic_pte(struct page *page, enum km_type type) | |
5ead97c8 | 777 | { |
f4f97b3e JF |
778 | pgprot_t prot = PAGE_KERNEL; |
779 | ||
780 | if (PagePinned(page)) | |
781 | prot = PAGE_KERNEL_RO; | |
782 | ||
783 | if (0 && PageHighMem(page)) | |
784 | printk("mapping highpte %lx type %d prot %s\n", | |
785 | page_to_pfn(page), type, | |
786 | (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ"); | |
787 | ||
788 | return kmap_atomic_prot(page, type, prot); | |
5ead97c8 | 789 | } |
f4f97b3e | 790 | #endif |
5ead97c8 | 791 | |
9a4029fd JF |
792 | static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) |
793 | { | |
794 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ | |
795 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | |
796 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | |
797 | pte_val_ma(pte)); | |
798 | ||
799 | return pte; | |
800 | } | |
801 | ||
802 | /* Init-time set_pte while constructing initial pagetables, which | |
803 | doesn't allow RO pagetable pages to be remapped RW */ | |
804 | static __init void xen_set_pte_init(pte_t *ptep, pte_t pte) | |
805 | { | |
806 | pte = mask_rw_pte(ptep, pte); | |
807 | ||
808 | xen_set_pte(ptep, pte); | |
809 | } | |
810 | ||
5ead97c8 JF |
811 | static __init void xen_pagetable_setup_start(pgd_t *base) |
812 | { | |
813 | pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base; | |
3843fc25 | 814 | int i; |
5ead97c8 | 815 | |
9a4029fd | 816 | /* special set_pte for pagetable initialization */ |
93b1eab3 | 817 | pv_mmu_ops.set_pte = xen_set_pte_init; |
9a4029fd | 818 | |
5ead97c8 JF |
819 | init_mm.pgd = base; |
820 | /* | |
3843fc25 JF |
821 | * copy top-level of Xen-supplied pagetable into place. This |
822 | * is a stand-in while we copy the pmd pages. | |
5ead97c8 JF |
823 | */ |
824 | memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t)); | |
825 | ||
3843fc25 JF |
826 | /* |
827 | * For PAE, need to allocate new pmds, rather than | |
828 | * share Xen's, since Xen doesn't like pmd's being | |
829 | * shared between address spaces. | |
830 | */ | |
831 | for (i = 0; i < PTRS_PER_PGD; i++) { | |
832 | if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) { | |
833 | pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE); | |
5ead97c8 | 834 | |
3843fc25 JF |
835 | memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]), |
836 | PAGE_SIZE); | |
5ead97c8 | 837 | |
3843fc25 | 838 | make_lowmem_page_readonly(pmd); |
5ead97c8 | 839 | |
3843fc25 JF |
840 | set_pgd(&base[i], __pgd(1 + __pa(pmd))); |
841 | } else | |
842 | pgd_clear(&base[i]); | |
5ead97c8 JF |
843 | } |
844 | ||
845 | /* make sure zero_page is mapped RO so we can use it in pagetables */ | |
846 | make_lowmem_page_readonly(empty_zero_page); | |
847 | make_lowmem_page_readonly(base); | |
848 | /* | |
849 | * Switch to new pagetable. This is done before | |
850 | * pagetable_init has done anything so that the new pages | |
851 | * added to the table can be prepared properly for Xen. | |
852 | */ | |
853 | xen_write_cr3(__pa(base)); | |
2b540781 JF |
854 | |
855 | /* Unpin initial Xen pagetable */ | |
856 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, | |
857 | PFN_DOWN(__pa(xen_start_info->pt_base))); | |
5ead97c8 JF |
858 | } |
859 | ||
2e8fe719 | 860 | static __init void setup_shared_info(void) |
5ead97c8 JF |
861 | { |
862 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
2e8fe719 JF |
863 | unsigned long addr = fix_to_virt(FIX_PARAVIRT_BOOTMAP); |
864 | ||
5ead97c8 JF |
865 | /* |
866 | * Create a mapping for the shared info page. | |
867 | * Should be set_fixmap(), but shared_info is a machine | |
868 | * address with no corresponding pseudo-phys address. | |
869 | */ | |
2e8fe719 | 870 | set_pte_mfn(addr, |
5ead97c8 JF |
871 | PFN_DOWN(xen_start_info->shared_info), |
872 | PAGE_KERNEL); | |
5ead97c8 | 873 | |
2e8fe719 | 874 | HYPERVISOR_shared_info = (struct shared_info *)addr; |
5ead97c8 JF |
875 | } else |
876 | HYPERVISOR_shared_info = | |
877 | (struct shared_info *)__va(xen_start_info->shared_info); | |
878 | ||
2e8fe719 JF |
879 | #ifndef CONFIG_SMP |
880 | /* In UP this is as good a place as any to set up shared info */ | |
881 | xen_setup_vcpu_info_placement(); | |
882 | #endif | |
883 | } | |
884 | ||
885 | static __init void xen_pagetable_setup_done(pgd_t *base) | |
886 | { | |
887 | /* This will work as long as patching hasn't happened yet | |
888 | (which it hasn't) */ | |
6944a9c8 JF |
889 | pv_mmu_ops.alloc_pte = xen_alloc_pte; |
890 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | |
891 | pv_mmu_ops.release_pte = xen_release_pte; | |
892 | pv_mmu_ops.release_pmd = xen_release_pmd; | |
2e8fe719 JF |
893 | pv_mmu_ops.set_pte = xen_set_pte; |
894 | ||
895 | setup_shared_info(); | |
896 | ||
f4f97b3e JF |
897 | /* Actually pin the pagetable down, but we can't set PG_pinned |
898 | yet because the page structures don't exist yet. */ | |
3843fc25 | 899 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base))); |
60223a32 | 900 | } |
5ead97c8 | 901 | |
60223a32 JF |
902 | /* This is called once we have the cpu_possible_map */ |
903 | void __init xen_setup_vcpu_info_placement(void) | |
904 | { | |
905 | int cpu; | |
906 | ||
907 | for_each_possible_cpu(cpu) | |
908 | xen_vcpu_setup(cpu); | |
909 | ||
910 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
911 | percpu area for all cpus, so make use of it */ | |
912 | if (have_vcpu_info_placement) { | |
913 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | |
914 | ||
93b1eab3 JF |
915 | pv_irq_ops.save_fl = xen_save_fl_direct; |
916 | pv_irq_ops.restore_fl = xen_restore_fl_direct; | |
917 | pv_irq_ops.irq_disable = xen_irq_disable_direct; | |
918 | pv_irq_ops.irq_enable = xen_irq_enable_direct; | |
919 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; | |
60223a32 | 920 | } |
5ead97c8 JF |
921 | } |
922 | ||
ab144f5e AK |
923 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
924 | unsigned long addr, unsigned len) | |
6487673b JF |
925 | { |
926 | char *start, *end, *reloc; | |
927 | unsigned ret; | |
928 | ||
929 | start = end = reloc = NULL; | |
930 | ||
93b1eab3 JF |
931 | #define SITE(op, x) \ |
932 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
933 | if (have_vcpu_info_placement) { \ |
934 | start = (char *)xen_##x##_direct; \ | |
935 | end = xen_##x##_direct_end; \ | |
936 | reloc = xen_##x##_direct_reloc; \ | |
937 | } \ | |
938 | goto patch_site | |
939 | ||
940 | switch (type) { | |
93b1eab3 JF |
941 | SITE(pv_irq_ops, irq_enable); |
942 | SITE(pv_irq_ops, irq_disable); | |
943 | SITE(pv_irq_ops, save_fl); | |
944 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
945 | #undef SITE |
946 | ||
947 | patch_site: | |
948 | if (start == NULL || (end-start) > len) | |
949 | goto default_patch; | |
950 | ||
ab144f5e | 951 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
952 | |
953 | /* Note: because reloc is assigned from something that | |
954 | appears to be an array, gcc assumes it's non-null, | |
955 | but doesn't know its relationship with start and | |
956 | end. */ | |
957 | if (reloc > start && reloc < end) { | |
958 | int reloc_off = reloc - start; | |
ab144f5e AK |
959 | long *relocp = (long *)(insnbuf + reloc_off); |
960 | long delta = start - (char *)addr; | |
6487673b JF |
961 | |
962 | *relocp += delta; | |
963 | } | |
964 | break; | |
965 | ||
966 | default_patch: | |
967 | default: | |
ab144f5e AK |
968 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
969 | addr, len); | |
6487673b JF |
970 | break; |
971 | } | |
972 | ||
973 | return ret; | |
974 | } | |
975 | ||
93b1eab3 | 976 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
977 | .paravirt_enabled = 1, |
978 | .shared_kernel_pmd = 0, | |
979 | ||
980 | .name = "Xen", | |
93b1eab3 | 981 | }; |
5ead97c8 | 982 | |
93b1eab3 | 983 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 984 | .patch = xen_patch, |
5ead97c8 | 985 | |
93b1eab3 | 986 | .banner = xen_banner, |
5ead97c8 JF |
987 | .memory_setup = xen_memory_setup, |
988 | .arch_setup = xen_arch_setup, | |
f4f97b3e | 989 | .post_allocator_init = xen_mark_init_mm_pinned, |
93b1eab3 | 990 | }; |
5ead97c8 | 991 | |
93b1eab3 | 992 | static const struct pv_time_ops xen_time_ops __initdata = { |
15c84731 | 993 | .time_init = xen_time_init, |
93b1eab3 | 994 | |
15c84731 JF |
995 | .set_wallclock = xen_set_wallclock, |
996 | .get_wallclock = xen_get_wallclock, | |
997 | .get_cpu_khz = xen_cpu_khz, | |
ab550288 | 998 | .sched_clock = xen_sched_clock, |
93b1eab3 | 999 | }; |
15c84731 | 1000 | |
93b1eab3 | 1001 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
1002 | .cpuid = xen_cpuid, |
1003 | ||
1004 | .set_debugreg = xen_set_debugreg, | |
1005 | .get_debugreg = xen_get_debugreg, | |
1006 | ||
7b1333aa | 1007 | .clts = xen_clts, |
5ead97c8 JF |
1008 | |
1009 | .read_cr0 = native_read_cr0, | |
7b1333aa | 1010 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1011 | |
5ead97c8 JF |
1012 | .read_cr4 = native_read_cr4, |
1013 | .read_cr4_safe = native_read_cr4_safe, | |
1014 | .write_cr4 = xen_write_cr4, | |
1015 | ||
5ead97c8 JF |
1016 | .wbinvd = native_wbinvd, |
1017 | ||
1018 | .read_msr = native_read_msr_safe, | |
1019 | .write_msr = native_write_msr_safe, | |
1020 | .read_tsc = native_read_tsc, | |
1021 | .read_pmc = native_read_pmc, | |
1022 | ||
81e103f1 | 1023 | .iret = xen_iret, |
e2a81baf | 1024 | .irq_enable_syscall_ret = xen_sysexit, |
5ead97c8 JF |
1025 | |
1026 | .load_tr_desc = paravirt_nop, | |
1027 | .set_ldt = xen_set_ldt, | |
1028 | .load_gdt = xen_load_gdt, | |
1029 | .load_idt = xen_load_idt, | |
1030 | .load_tls = xen_load_tls, | |
1031 | ||
1032 | .store_gdt = native_store_gdt, | |
1033 | .store_idt = native_store_idt, | |
1034 | .store_tr = xen_store_tr, | |
1035 | ||
1036 | .write_ldt_entry = xen_write_ldt_entry, | |
1037 | .write_gdt_entry = xen_write_gdt_entry, | |
1038 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1039 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1040 | |
1041 | .set_iopl_mask = xen_set_iopl_mask, | |
1042 | .io_delay = xen_io_delay, | |
1043 | ||
8965c1c0 JF |
1044 | .lazy_mode = { |
1045 | .enter = paravirt_enter_lazy_cpu, | |
1046 | .leave = xen_leave_lazy, | |
1047 | }, | |
93b1eab3 JF |
1048 | }; |
1049 | ||
1050 | static const struct pv_irq_ops xen_irq_ops __initdata = { | |
1051 | .init_IRQ = xen_init_IRQ, | |
1052 | .save_fl = xen_save_fl, | |
1053 | .restore_fl = xen_restore_fl, | |
1054 | .irq_disable = xen_irq_disable, | |
1055 | .irq_enable = xen_irq_enable, | |
1056 | .safe_halt = xen_safe_halt, | |
1057 | .halt = xen_halt, | |
1058 | }; | |
5ead97c8 | 1059 | |
93b1eab3 | 1060 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 1061 | #ifdef CONFIG_X86_LOCAL_APIC |
f87e4cac JF |
1062 | .apic_write = xen_apic_write, |
1063 | .apic_write_atomic = xen_apic_write, | |
5ead97c8 JF |
1064 | .apic_read = xen_apic_read, |
1065 | .setup_boot_clock = paravirt_nop, | |
1066 | .setup_secondary_clock = paravirt_nop, | |
1067 | .startup_ipi_hook = paravirt_nop, | |
1068 | #endif | |
93b1eab3 JF |
1069 | }; |
1070 | ||
1071 | static const struct pv_mmu_ops xen_mmu_ops __initdata = { | |
1072 | .pagetable_setup_start = xen_pagetable_setup_start, | |
1073 | .pagetable_setup_done = xen_pagetable_setup_done, | |
1074 | ||
1075 | .read_cr2 = xen_read_cr2, | |
1076 | .write_cr2 = xen_write_cr2, | |
1077 | ||
1078 | .read_cr3 = xen_read_cr3, | |
1079 | .write_cr3 = xen_write_cr3, | |
5ead97c8 JF |
1080 | |
1081 | .flush_tlb_user = xen_flush_tlb, | |
1082 | .flush_tlb_kernel = xen_flush_tlb, | |
1083 | .flush_tlb_single = xen_flush_tlb_single, | |
f87e4cac | 1084 | .flush_tlb_others = xen_flush_tlb_others, |
5ead97c8 JF |
1085 | |
1086 | .pte_update = paravirt_nop, | |
1087 | .pte_update_defer = paravirt_nop, | |
1088 | ||
6944a9c8 JF |
1089 | .alloc_pte = xen_alloc_pte_init, |
1090 | .release_pte = xen_release_pte_init, | |
1091 | .alloc_pmd = xen_alloc_pte_init, | |
1092 | .alloc_pmd_clone = paravirt_nop, | |
1093 | .release_pmd = xen_release_pte_init, | |
f4f97b3e JF |
1094 | |
1095 | #ifdef CONFIG_HIGHPTE | |
1096 | .kmap_atomic_pte = xen_kmap_atomic_pte, | |
1097 | #endif | |
5ead97c8 | 1098 | |
9a4029fd | 1099 | .set_pte = NULL, /* see xen_pagetable_setup_* */ |
3b827c1b JF |
1100 | .set_pte_at = xen_set_pte_at, |
1101 | .set_pmd = xen_set_pmd, | |
1102 | ||
1103 | .pte_val = xen_pte_val, | |
1104 | .pgd_val = xen_pgd_val, | |
1105 | ||
1106 | .make_pte = xen_make_pte, | |
1107 | .make_pgd = xen_make_pgd, | |
1108 | ||
3b827c1b JF |
1109 | .set_pte_atomic = xen_set_pte_atomic, |
1110 | .set_pte_present = xen_set_pte_at, | |
1111 | .set_pud = xen_set_pud, | |
1112 | .pte_clear = xen_pte_clear, | |
1113 | .pmd_clear = xen_pmd_clear, | |
1114 | ||
1115 | .make_pmd = xen_make_pmd, | |
1116 | .pmd_val = xen_pmd_val, | |
3b827c1b JF |
1117 | |
1118 | .activate_mm = xen_activate_mm, | |
1119 | .dup_mmap = xen_dup_mmap, | |
1120 | .exit_mmap = xen_exit_mmap, | |
1121 | ||
8965c1c0 JF |
1122 | .lazy_mode = { |
1123 | .enter = paravirt_enter_lazy_mmu, | |
1124 | .leave = xen_leave_lazy, | |
1125 | }, | |
5ead97c8 JF |
1126 | }; |
1127 | ||
f87e4cac JF |
1128 | #ifdef CONFIG_SMP |
1129 | static const struct smp_ops xen_smp_ops __initdata = { | |
1130 | .smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu, | |
1131 | .smp_prepare_cpus = xen_smp_prepare_cpus, | |
1132 | .cpu_up = xen_cpu_up, | |
1133 | .smp_cpus_done = xen_smp_cpus_done, | |
1134 | ||
1135 | .smp_send_stop = xen_smp_send_stop, | |
1136 | .smp_send_reschedule = xen_smp_send_reschedule, | |
1137 | .smp_call_function_mask = xen_smp_call_function_mask, | |
1138 | }; | |
1139 | #endif /* CONFIG_SMP */ | |
1140 | ||
fefa629a JF |
1141 | static void xen_reboot(int reason) |
1142 | { | |
349c709f JF |
1143 | struct sched_shutdown r = { .reason = reason }; |
1144 | ||
fefa629a JF |
1145 | #ifdef CONFIG_SMP |
1146 | smp_send_stop(); | |
1147 | #endif | |
1148 | ||
349c709f | 1149 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1150 | BUG(); |
1151 | } | |
1152 | ||
1153 | static void xen_restart(char *msg) | |
1154 | { | |
1155 | xen_reboot(SHUTDOWN_reboot); | |
1156 | } | |
1157 | ||
1158 | static void xen_emergency_restart(void) | |
1159 | { | |
1160 | xen_reboot(SHUTDOWN_reboot); | |
1161 | } | |
1162 | ||
1163 | static void xen_machine_halt(void) | |
1164 | { | |
1165 | xen_reboot(SHUTDOWN_poweroff); | |
1166 | } | |
1167 | ||
1168 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1169 | { | |
1170 | xen_reboot(SHUTDOWN_crash); | |
1171 | } | |
1172 | ||
1173 | static const struct machine_ops __initdata xen_machine_ops = { | |
1174 | .restart = xen_restart, | |
1175 | .halt = xen_machine_halt, | |
1176 | .power_off = xen_machine_halt, | |
1177 | .shutdown = xen_machine_halt, | |
1178 | .crash_shutdown = xen_crash_shutdown, | |
1179 | .emergency_restart = xen_emergency_restart, | |
1180 | }; | |
1181 | ||
6487673b | 1182 | |
fb1d8404 JF |
1183 | static void __init xen_reserve_top(void) |
1184 | { | |
1185 | unsigned long top = HYPERVISOR_VIRT_START; | |
1186 | struct xen_platform_parameters pp; | |
1187 | ||
1188 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | |
1189 | top = pp.virt_start; | |
1190 | ||
1191 | reserve_top_address(-top + 2 * PAGE_SIZE); | |
1192 | } | |
1193 | ||
5ead97c8 JF |
1194 | /* First C function to be called on Xen boot */ |
1195 | asmlinkage void __init xen_start_kernel(void) | |
1196 | { | |
1197 | pgd_t *pgd; | |
1198 | ||
1199 | if (!xen_start_info) | |
1200 | return; | |
1201 | ||
7999f4b4 | 1202 | BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0); |
5ead97c8 JF |
1203 | |
1204 | /* Install Xen paravirt ops */ | |
93b1eab3 JF |
1205 | pv_info = xen_info; |
1206 | pv_init_ops = xen_init_ops; | |
1207 | pv_time_ops = xen_time_ops; | |
1208 | pv_cpu_ops = xen_cpu_ops; | |
1209 | pv_irq_ops = xen_irq_ops; | |
1210 | pv_apic_ops = xen_apic_ops; | |
1211 | pv_mmu_ops = xen_mmu_ops; | |
93b1eab3 | 1212 | |
fefa629a JF |
1213 | machine_ops = xen_machine_ops; |
1214 | ||
f87e4cac JF |
1215 | #ifdef CONFIG_SMP |
1216 | smp_ops = xen_smp_ops; | |
1217 | #endif | |
5ead97c8 JF |
1218 | |
1219 | xen_setup_features(); | |
1220 | ||
1221 | /* Get mfn list */ | |
1222 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1223 | phys_to_machine_mapping = (unsigned long *)xen_start_info->mfn_list; | |
1224 | ||
1225 | pgd = (pgd_t *)xen_start_info->pt_base; | |
1226 | ||
1227 | init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE; | |
1228 | ||
1229 | init_mm.pgd = pgd; /* use the Xen pagetables to start */ | |
1230 | ||
1231 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1232 | ||
1233 | x86_write_percpu(xen_cr3, __pa(pgd)); | |
9f79991d | 1234 | x86_write_percpu(xen_current_cr3, __pa(pgd)); |
60223a32 | 1235 | |
60223a32 | 1236 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1237 | possible map and a non-dummy shared_info. */ |
60223a32 | 1238 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1239 | |
93b1eab3 | 1240 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1241 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1242 | pv_info.kernel_rpl = 0; |
5ead97c8 JF |
1243 | |
1244 | /* set the limit of our address space */ | |
fb1d8404 | 1245 | xen_reserve_top(); |
5ead97c8 JF |
1246 | |
1247 | /* set up basic CPUID stuff */ | |
1248 | cpu_detect(&new_cpu_data); | |
1249 | new_cpu_data.hard_math = 1; | |
1250 | new_cpu_data.x86_capability[0] = cpuid_edx(1); | |
1251 | ||
1252 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1253 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1254 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1255 | ? __pa(xen_start_info->mod_start) : 0; | |
1256 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
5ead97c8 | 1257 | |
b8c2d3df MA |
1258 | if (!is_initial_xendomain()) |
1259 | add_preferred_console("hvc", 0, NULL); | |
1260 | ||
5ead97c8 JF |
1261 | /* Start the world */ |
1262 | start_kernel(); | |
1263 | } |