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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/preempt.h> | |
f120f13e | 18 | #include <linux/hardirq.h> |
5ead97c8 JF |
19 | #include <linux/percpu.h> |
20 | #include <linux/delay.h> | |
21 | #include <linux/start_kernel.h> | |
22 | #include <linux/sched.h> | |
6cac5a92 | 23 | #include <linux/kprobes.h> |
5ead97c8 JF |
24 | #include <linux/bootmem.h> |
25 | #include <linux/module.h> | |
f4f97b3e JF |
26 | #include <linux/mm.h> |
27 | #include <linux/page-flags.h> | |
28 | #include <linux/highmem.h> | |
b8c2d3df | 29 | #include <linux/console.h> |
5ead97c8 JF |
30 | |
31 | #include <xen/interface/xen.h> | |
ecbf29cd | 32 | #include <xen/interface/version.h> |
5ead97c8 JF |
33 | #include <xen/interface/physdev.h> |
34 | #include <xen/interface/vcpu.h> | |
35 | #include <xen/features.h> | |
36 | #include <xen/page.h> | |
084a2a4e | 37 | #include <xen/hvc-console.h> |
5ead97c8 JF |
38 | |
39 | #include <asm/paravirt.h> | |
7b6aa335 | 40 | #include <asm/apic.h> |
5ead97c8 JF |
41 | #include <asm/page.h> |
42 | #include <asm/xen/hypercall.h> | |
43 | #include <asm/xen/hypervisor.h> | |
44 | #include <asm/fixmap.h> | |
45 | #include <asm/processor.h> | |
707ebbc8 | 46 | #include <asm/proto.h> |
1153968a | 47 | #include <asm/msr-index.h> |
6cac5a92 | 48 | #include <asm/traps.h> |
5ead97c8 JF |
49 | #include <asm/setup.h> |
50 | #include <asm/desc.h> | |
51 | #include <asm/pgtable.h> | |
f87e4cac | 52 | #include <asm/tlbflush.h> |
fefa629a | 53 | #include <asm/reboot.h> |
5ead97c8 JF |
54 | |
55 | #include "xen-ops.h" | |
3b827c1b | 56 | #include "mmu.h" |
5ead97c8 JF |
57 | #include "multicalls.h" |
58 | ||
59 | EXPORT_SYMBOL_GPL(hypercall_page); | |
60 | ||
5ead97c8 JF |
61 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
62 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 63 | |
6e833587 JF |
64 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
65 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
66 | ||
5ead97c8 JF |
67 | struct start_info *xen_start_info; |
68 | EXPORT_SYMBOL_GPL(xen_start_info); | |
69 | ||
a0d695c8 | 70 | struct shared_info xen_dummy_shared_info; |
60223a32 | 71 | |
38341432 JF |
72 | void *xen_initial_gdt; |
73 | ||
60223a32 JF |
74 | /* |
75 | * Point at some empty memory to start with. We map the real shared_info | |
76 | * page as soon as fixmap is up and running. | |
77 | */ | |
a0d695c8 | 78 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
79 | |
80 | /* | |
81 | * Flag to determine whether vcpu info placement is available on all | |
82 | * VCPUs. We assume it is to start with, and then set it to zero on | |
83 | * the first failure. This is because it can succeed on some VCPUs | |
84 | * and not others, since it can involve hypervisor memory allocation, | |
85 | * or because the guest failed to guarantee all the appropriate | |
86 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
87 | * | |
88 | * Note that any particular CPU may be using a placed vcpu structure, | |
89 | * but we can only optimise if the all are. | |
90 | * | |
91 | * 0: not available, 1: available | |
92 | */ | |
e4d04071 | 93 | static int have_vcpu_info_placement = 1; |
60223a32 | 94 | |
9c7a7942 | 95 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 96 | { |
60223a32 JF |
97 | struct vcpu_register_vcpu_info info; |
98 | int err; | |
99 | struct vcpu_info *vcpup; | |
100 | ||
a0d695c8 | 101 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
5ead97c8 | 102 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
60223a32 JF |
103 | |
104 | if (!have_vcpu_info_placement) | |
105 | return; /* already tested, not available */ | |
106 | ||
107 | vcpup = &per_cpu(xen_vcpu_info, cpu); | |
108 | ||
9976b39b | 109 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
110 | info.offset = offset_in_page(vcpup); |
111 | ||
e3d26976 | 112 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
60223a32 JF |
113 | cpu, vcpup, info.mfn, info.offset); |
114 | ||
115 | /* Check to see if the hypervisor will put the vcpu_info | |
116 | structure where we want it, which allows direct access via | |
117 | a percpu-variable. */ | |
118 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
119 | ||
120 | if (err) { | |
121 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
122 | have_vcpu_info_placement = 0; | |
123 | } else { | |
124 | /* This cpu is using the registered vcpu info, even if | |
125 | later ones fail to. */ | |
126 | per_cpu(xen_vcpu, cpu) = vcpup; | |
6487673b | 127 | |
60223a32 JF |
128 | printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n", |
129 | cpu, vcpup); | |
130 | } | |
5ead97c8 JF |
131 | } |
132 | ||
9c7a7942 JF |
133 | /* |
134 | * On restore, set the vcpu placement up again. | |
135 | * If it fails, then we're in a bad state, since | |
136 | * we can't back out from using it... | |
137 | */ | |
138 | void xen_vcpu_restore(void) | |
139 | { | |
140 | if (have_vcpu_info_placement) { | |
141 | int cpu; | |
142 | ||
143 | for_each_online_cpu(cpu) { | |
144 | bool other_cpu = (cpu != smp_processor_id()); | |
145 | ||
146 | if (other_cpu && | |
147 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
148 | BUG(); | |
149 | ||
150 | xen_vcpu_setup(cpu); | |
151 | ||
152 | if (other_cpu && | |
153 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
154 | BUG(); | |
155 | } | |
156 | ||
157 | BUG_ON(!have_vcpu_info_placement); | |
158 | } | |
159 | } | |
160 | ||
5ead97c8 JF |
161 | static void __init xen_banner(void) |
162 | { | |
95c7c23b JF |
163 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
164 | struct xen_extraversion extra; | |
165 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
166 | ||
5ead97c8 | 167 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 168 | pv_info.name); |
95c7c23b JF |
169 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
170 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 171 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
172 | } |
173 | ||
e826fe1b JF |
174 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
175 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
176 | ||
65ea5b03 PA |
177 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
178 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 179 | { |
e826fe1b | 180 | unsigned maskecx = ~0; |
5ead97c8 JF |
181 | unsigned maskedx = ~0; |
182 | ||
183 | /* | |
184 | * Mask out inconvenient features, to try and disable as many | |
185 | * unsupported kernel subsystems as possible. | |
186 | */ | |
e826fe1b JF |
187 | if (*ax == 1) { |
188 | maskecx = cpuid_leaf1_ecx_mask; | |
189 | maskedx = cpuid_leaf1_edx_mask; | |
190 | } | |
5ead97c8 JF |
191 | |
192 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
193 | : "=a" (*ax), |
194 | "=b" (*bx), | |
195 | "=c" (*cx), | |
196 | "=d" (*dx) | |
197 | : "0" (*ax), "2" (*cx)); | |
e826fe1b JF |
198 | |
199 | *cx &= maskecx; | |
65ea5b03 | 200 | *dx &= maskedx; |
5ead97c8 JF |
201 | } |
202 | ||
e826fe1b JF |
203 | static __init void xen_init_cpuid_mask(void) |
204 | { | |
205 | unsigned int ax, bx, cx, dx; | |
206 | ||
207 | cpuid_leaf1_edx_mask = | |
208 | ~((1 << X86_FEATURE_MCE) | /* disable MCE */ | |
209 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
210 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ | |
211 | ||
212 | if (!xen_initial_domain()) | |
213 | cpuid_leaf1_edx_mask &= | |
214 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
215 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
216 | ||
217 | ax = 1; | |
218 | xen_cpuid(&ax, &bx, &cx, &dx); | |
219 | ||
220 | /* cpuid claims we support xsave; try enabling it to see what happens */ | |
221 | if (cx & (1 << (X86_FEATURE_XSAVE % 32))) { | |
222 | unsigned long cr4; | |
223 | ||
224 | set_in_cr4(X86_CR4_OSXSAVE); | |
225 | ||
226 | cr4 = read_cr4(); | |
227 | ||
228 | if ((cr4 & X86_CR4_OSXSAVE) == 0) | |
229 | cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_XSAVE % 32)); | |
230 | ||
231 | clear_in_cr4(X86_CR4_OSXSAVE); | |
232 | } | |
233 | } | |
234 | ||
5ead97c8 JF |
235 | static void xen_set_debugreg(int reg, unsigned long val) |
236 | { | |
237 | HYPERVISOR_set_debugreg(reg, val); | |
238 | } | |
239 | ||
240 | static unsigned long xen_get_debugreg(int reg) | |
241 | { | |
242 | return HYPERVISOR_get_debugreg(reg); | |
243 | } | |
244 | ||
224101ed | 245 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 246 | { |
5ead97c8 | 247 | xen_mc_flush(); |
224101ed | 248 | paravirt_end_context_switch(next); |
5ead97c8 JF |
249 | } |
250 | ||
251 | static unsigned long xen_store_tr(void) | |
252 | { | |
253 | return 0; | |
254 | } | |
255 | ||
a05d2eba | 256 | /* |
cef43bf6 JF |
257 | * Set the page permissions for a particular virtual address. If the |
258 | * address is a vmalloc mapping (or other non-linear mapping), then | |
259 | * find the linear mapping of the page and also set its protections to | |
260 | * match. | |
a05d2eba JF |
261 | */ |
262 | static void set_aliased_prot(void *v, pgprot_t prot) | |
263 | { | |
264 | int level; | |
265 | pte_t *ptep; | |
266 | pte_t pte; | |
267 | unsigned long pfn; | |
268 | struct page *page; | |
269 | ||
270 | ptep = lookup_address((unsigned long)v, &level); | |
271 | BUG_ON(ptep == NULL); | |
272 | ||
273 | pfn = pte_pfn(*ptep); | |
274 | page = pfn_to_page(pfn); | |
275 | ||
276 | pte = pfn_pte(pfn, prot); | |
277 | ||
278 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
279 | BUG(); | |
280 | ||
281 | if (!PageHighMem(page)) { | |
282 | void *av = __va(PFN_PHYS(pfn)); | |
283 | ||
284 | if (av != v) | |
285 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
286 | BUG(); | |
287 | } else | |
288 | kmap_flush_unused(); | |
289 | } | |
290 | ||
38ffbe66 JF |
291 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
292 | { | |
a05d2eba | 293 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
294 | int i; |
295 | ||
a05d2eba JF |
296 | for(i = 0; i < entries; i += entries_per_page) |
297 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
298 | } |
299 | ||
300 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
301 | { | |
a05d2eba | 302 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
303 | int i; |
304 | ||
a05d2eba JF |
305 | for(i = 0; i < entries; i += entries_per_page) |
306 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
307 | } |
308 | ||
5ead97c8 JF |
309 | static void xen_set_ldt(const void *addr, unsigned entries) |
310 | { | |
5ead97c8 JF |
311 | struct mmuext_op *op; |
312 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
313 | ||
314 | op = mcs.args; | |
315 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 316 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
317 | op->arg2.nr_ents = entries; |
318 | ||
319 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
320 | ||
321 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
322 | } | |
323 | ||
6b68f01b | 324 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 325 | { |
5ead97c8 JF |
326 | unsigned long va = dtr->address; |
327 | unsigned int size = dtr->size + 1; | |
328 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 329 | unsigned long frames[pages]; |
5ead97c8 | 330 | int f; |
5ead97c8 JF |
331 | |
332 | /* A GDT can be up to 64k in size, which corresponds to 8192 | |
333 | 8-byte entries, or 16 4k pages.. */ | |
334 | ||
335 | BUG_ON(size > 65536); | |
336 | BUG_ON(va & ~PAGE_MASK); | |
337 | ||
5ead97c8 | 338 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 JF |
339 | int level; |
340 | pte_t *ptep = lookup_address(va, &level); | |
341 | unsigned long pfn, mfn; | |
342 | void *virt; | |
343 | ||
344 | BUG_ON(ptep == NULL); | |
345 | ||
346 | pfn = pte_pfn(*ptep); | |
347 | mfn = pfn_to_mfn(pfn); | |
348 | virt = __va(PFN_PHYS(pfn)); | |
349 | ||
350 | frames[f] = mfn; | |
9976b39b | 351 | |
5ead97c8 | 352 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 353 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
354 | } |
355 | ||
3ce5fa7e JF |
356 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
357 | BUG(); | |
5ead97c8 JF |
358 | } |
359 | ||
360 | static void load_TLS_descriptor(struct thread_struct *t, | |
361 | unsigned int cpu, unsigned int i) | |
362 | { | |
363 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 364 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
365 | struct multicall_space mc = __xen_mc_entry(0); |
366 | ||
367 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
368 | } | |
369 | ||
370 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
371 | { | |
8b84ad94 | 372 | /* |
ccbeed3a TH |
373 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
374 | * and lazy gs handling is enabled, it means we're in a | |
375 | * context switch, and %gs has just been saved. This means we | |
376 | * can zero it out to prevent faults on exit from the | |
377 | * hypervisor if the next process has no %gs. Either way, it | |
378 | * has been saved, and the new value will get loaded properly. | |
379 | * This will go away as soon as Xen has been modified to not | |
380 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
381 | * |
382 | * On x86_64, this hack is not used for %gs, because gs points | |
383 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
384 | * must not zero %gs on x86_64 | |
385 | * | |
386 | * For x86_64, we need to zero %fs, otherwise we may get an | |
387 | * exception between the new %fs descriptor being loaded and | |
388 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 389 | */ |
8a95408e EH |
390 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
391 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 392 | lazy_load_gs(0); |
8a95408e EH |
393 | #else |
394 | loadsegment(fs, 0); | |
395 | #endif | |
396 | } | |
397 | ||
398 | xen_mc_batch(); | |
399 | ||
400 | load_TLS_descriptor(t, cpu, 0); | |
401 | load_TLS_descriptor(t, cpu, 1); | |
402 | load_TLS_descriptor(t, cpu, 2); | |
403 | ||
404 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
405 | } |
406 | ||
a8fc1089 EH |
407 | #ifdef CONFIG_X86_64 |
408 | static void xen_load_gs_index(unsigned int idx) | |
409 | { | |
410 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
411 | BUG(); | |
5ead97c8 | 412 | } |
a8fc1089 | 413 | #endif |
5ead97c8 JF |
414 | |
415 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 416 | const void *ptr) |
5ead97c8 | 417 | { |
cef43bf6 | 418 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 419 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 420 | |
f120f13e JF |
421 | preempt_disable(); |
422 | ||
5ead97c8 JF |
423 | xen_mc_flush(); |
424 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
425 | BUG(); | |
f120f13e JF |
426 | |
427 | preempt_enable(); | |
5ead97c8 JF |
428 | } |
429 | ||
e176d367 | 430 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
431 | struct trap_info *info) |
432 | { | |
6cac5a92 JF |
433 | unsigned long addr; |
434 | ||
6d02c426 | 435 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
436 | return 0; |
437 | ||
438 | info->vector = vector; | |
6cac5a92 JF |
439 | |
440 | addr = gate_offset(*val); | |
441 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
442 | /* |
443 | * Look for known traps using IST, and substitute them | |
444 | * appropriately. The debugger ones are the only ones we care | |
445 | * about. Xen will handle faults like double_fault and | |
446 | * machine_check, so we should never see them. Warn if | |
447 | * there's an unexpected IST-using fault handler. | |
448 | */ | |
6cac5a92 JF |
449 | if (addr == (unsigned long)debug) |
450 | addr = (unsigned long)xen_debug; | |
451 | else if (addr == (unsigned long)int3) | |
452 | addr = (unsigned long)xen_int3; | |
453 | else if (addr == (unsigned long)stack_segment) | |
454 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
455 | else if (addr == (unsigned long)double_fault || |
456 | addr == (unsigned long)nmi) { | |
457 | /* Don't need to handle these */ | |
458 | return 0; | |
459 | #ifdef CONFIG_X86_MCE | |
460 | } else if (addr == (unsigned long)machine_check) { | |
461 | return 0; | |
462 | #endif | |
463 | } else { | |
464 | /* Some other trap using IST? */ | |
465 | if (WARN_ON(val->ist != 0)) | |
466 | return 0; | |
467 | } | |
6cac5a92 JF |
468 | #endif /* CONFIG_X86_64 */ |
469 | info->address = addr; | |
470 | ||
e176d367 EH |
471 | info->cs = gate_segment(*val); |
472 | info->flags = val->dpl; | |
5ead97c8 | 473 | /* interrupt gates clear IF */ |
6d02c426 JF |
474 | if (val->type == GATE_INTERRUPT) |
475 | info->flags |= 1 << 2; | |
5ead97c8 JF |
476 | |
477 | return 1; | |
478 | } | |
479 | ||
480 | /* Locations of each CPU's IDT */ | |
6b68f01b | 481 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
482 | |
483 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
484 | also update Xen. */ | |
8d947344 | 485 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 486 | { |
5ead97c8 | 487 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
488 | unsigned long start, end; |
489 | ||
490 | preempt_disable(); | |
491 | ||
492 | start = __get_cpu_var(idt_desc).address; | |
493 | end = start + __get_cpu_var(idt_desc).size + 1; | |
5ead97c8 JF |
494 | |
495 | xen_mc_flush(); | |
496 | ||
8d947344 | 497 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
498 | |
499 | if (p >= start && (p + 8) <= end) { | |
500 | struct trap_info info[2]; | |
501 | ||
502 | info[1].address = 0; | |
503 | ||
e176d367 | 504 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
505 | if (HYPERVISOR_set_trap_table(info)) |
506 | BUG(); | |
507 | } | |
f120f13e JF |
508 | |
509 | preempt_enable(); | |
5ead97c8 JF |
510 | } |
511 | ||
6b68f01b | 512 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 513 | struct trap_info *traps) |
5ead97c8 | 514 | { |
5ead97c8 JF |
515 | unsigned in, out, count; |
516 | ||
e176d367 | 517 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
518 | BUG_ON(count > 256); |
519 | ||
5ead97c8 | 520 | for (in = out = 0; in < count; in++) { |
e176d367 | 521 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 522 | |
e176d367 | 523 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
524 | out++; |
525 | } | |
526 | traps[out].address = 0; | |
f87e4cac JF |
527 | } |
528 | ||
529 | void xen_copy_trap_info(struct trap_info *traps) | |
530 | { | |
6b68f01b | 531 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
532 | |
533 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
534 | } |
535 | ||
536 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
537 | hold a spinlock to protect the static traps[] array (static because | |
538 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 539 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
540 | { |
541 | static DEFINE_SPINLOCK(lock); | |
542 | static struct trap_info traps[257]; | |
f87e4cac JF |
543 | |
544 | spin_lock(&lock); | |
545 | ||
f120f13e JF |
546 | __get_cpu_var(idt_desc) = *desc; |
547 | ||
f87e4cac | 548 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
549 | |
550 | xen_mc_flush(); | |
551 | if (HYPERVISOR_set_trap_table(traps)) | |
552 | BUG(); | |
553 | ||
554 | spin_unlock(&lock); | |
555 | } | |
556 | ||
557 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
558 | they're handled differently. */ | |
559 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 560 | const void *desc, int type) |
5ead97c8 | 561 | { |
f120f13e JF |
562 | preempt_disable(); |
563 | ||
014b15be GOC |
564 | switch (type) { |
565 | case DESC_LDT: | |
566 | case DESC_TSS: | |
5ead97c8 JF |
567 | /* ignore */ |
568 | break; | |
569 | ||
570 | default: { | |
9976b39b | 571 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
572 | |
573 | xen_mc_flush(); | |
014b15be | 574 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
575 | BUG(); |
576 | } | |
577 | ||
578 | } | |
f120f13e JF |
579 | |
580 | preempt_enable(); | |
5ead97c8 JF |
581 | } |
582 | ||
faca6227 | 583 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 584 | struct thread_struct *thread) |
5ead97c8 JF |
585 | { |
586 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 587 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
588 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
589 | } | |
590 | ||
591 | static void xen_set_iopl_mask(unsigned mask) | |
592 | { | |
593 | struct physdev_set_iopl set_iopl; | |
594 | ||
595 | /* Force the change at ring 0. */ | |
596 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
597 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
598 | } | |
599 | ||
600 | static void xen_io_delay(void) | |
601 | { | |
602 | } | |
603 | ||
604 | #ifdef CONFIG_X86_LOCAL_APIC | |
ad66dd34 | 605 | static u32 xen_apic_read(u32 reg) |
5ead97c8 JF |
606 | { |
607 | return 0; | |
608 | } | |
f87e4cac | 609 | |
ad66dd34 | 610 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
611 | { |
612 | /* Warn to see if there's any stray references */ | |
613 | WARN_ON(1); | |
614 | } | |
ad66dd34 | 615 | |
ad66dd34 SS |
616 | static u64 xen_apic_icr_read(void) |
617 | { | |
618 | return 0; | |
619 | } | |
620 | ||
621 | static void xen_apic_icr_write(u32 low, u32 id) | |
622 | { | |
623 | /* Warn to see if there's any stray references */ | |
624 | WARN_ON(1); | |
625 | } | |
626 | ||
627 | static void xen_apic_wait_icr_idle(void) | |
628 | { | |
629 | return; | |
630 | } | |
631 | ||
94a8c3c2 YL |
632 | static u32 xen_safe_apic_wait_icr_idle(void) |
633 | { | |
634 | return 0; | |
635 | } | |
636 | ||
c1eeb2de YL |
637 | static void set_xen_basic_apic_ops(void) |
638 | { | |
639 | apic->read = xen_apic_read; | |
640 | apic->write = xen_apic_write; | |
641 | apic->icr_read = xen_apic_icr_read; | |
642 | apic->icr_write = xen_apic_icr_write; | |
643 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
644 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
645 | } | |
ad66dd34 | 646 | |
5ead97c8 JF |
647 | #endif |
648 | ||
f87e4cac | 649 | |
7b1333aa JF |
650 | static void xen_clts(void) |
651 | { | |
652 | struct multicall_space mcs; | |
653 | ||
654 | mcs = xen_mc_entry(0); | |
655 | ||
656 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
657 | ||
658 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
659 | } | |
660 | ||
a789ed5f JF |
661 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
662 | ||
663 | static unsigned long xen_read_cr0(void) | |
664 | { | |
665 | unsigned long cr0 = percpu_read(xen_cr0_value); | |
666 | ||
667 | if (unlikely(cr0 == 0)) { | |
668 | cr0 = native_read_cr0(); | |
669 | percpu_write(xen_cr0_value, cr0); | |
670 | } | |
671 | ||
672 | return cr0; | |
673 | } | |
674 | ||
7b1333aa JF |
675 | static void xen_write_cr0(unsigned long cr0) |
676 | { | |
677 | struct multicall_space mcs; | |
678 | ||
a789ed5f JF |
679 | percpu_write(xen_cr0_value, cr0); |
680 | ||
7b1333aa JF |
681 | /* Only pay attention to cr0.TS; everything else is |
682 | ignored. */ | |
683 | mcs = xen_mc_entry(0); | |
684 | ||
685 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
686 | ||
687 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
688 | } | |
689 | ||
5ead97c8 JF |
690 | static void xen_write_cr4(unsigned long cr4) |
691 | { | |
2956a351 JF |
692 | cr4 &= ~X86_CR4_PGE; |
693 | cr4 &= ~X86_CR4_PSE; | |
694 | ||
695 | native_write_cr4(cr4); | |
5ead97c8 JF |
696 | } |
697 | ||
1153968a JF |
698 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
699 | { | |
700 | int ret; | |
701 | ||
702 | ret = 0; | |
703 | ||
f63c2f24 | 704 | switch (msr) { |
1153968a JF |
705 | #ifdef CONFIG_X86_64 |
706 | unsigned which; | |
707 | u64 base; | |
708 | ||
709 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
710 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
711 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
712 | ||
713 | set: | |
714 | base = ((u64)high << 32) | low; | |
715 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
716 | ret = -EFAULT; | |
717 | break; | |
718 | #endif | |
d89961e2 JF |
719 | |
720 | case MSR_STAR: | |
721 | case MSR_CSTAR: | |
722 | case MSR_LSTAR: | |
723 | case MSR_SYSCALL_MASK: | |
724 | case MSR_IA32_SYSENTER_CS: | |
725 | case MSR_IA32_SYSENTER_ESP: | |
726 | case MSR_IA32_SYSENTER_EIP: | |
727 | /* Fast syscall setup is all done in hypercalls, so | |
728 | these are all ignored. Stub them out here to stop | |
729 | Xen console noise. */ | |
730 | break; | |
731 | ||
1153968a JF |
732 | default: |
733 | ret = native_write_msr_safe(msr, low, high); | |
734 | } | |
735 | ||
736 | return ret; | |
737 | } | |
738 | ||
0e91398f | 739 | void xen_setup_shared_info(void) |
5ead97c8 JF |
740 | { |
741 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
742 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
743 | xen_start_info->shared_info); | |
744 | ||
745 | HYPERVISOR_shared_info = | |
746 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
747 | } else |
748 | HYPERVISOR_shared_info = | |
749 | (struct shared_info *)__va(xen_start_info->shared_info); | |
750 | ||
2e8fe719 JF |
751 | #ifndef CONFIG_SMP |
752 | /* In UP this is as good a place as any to set up shared info */ | |
753 | xen_setup_vcpu_info_placement(); | |
754 | #endif | |
d5edbc1f JF |
755 | |
756 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
757 | } |
758 | ||
60223a32 | 759 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 760 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
761 | { |
762 | int cpu; | |
763 | ||
764 | for_each_possible_cpu(cpu) | |
765 | xen_vcpu_setup(cpu); | |
766 | ||
767 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
768 | percpu area for all cpus, so make use of it */ | |
769 | if (have_vcpu_info_placement) { | |
770 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | |
771 | ||
ecb93d1c JF |
772 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
773 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
774 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
775 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 776 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 777 | } |
5ead97c8 JF |
778 | } |
779 | ||
ab144f5e AK |
780 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
781 | unsigned long addr, unsigned len) | |
6487673b JF |
782 | { |
783 | char *start, *end, *reloc; | |
784 | unsigned ret; | |
785 | ||
786 | start = end = reloc = NULL; | |
787 | ||
93b1eab3 JF |
788 | #define SITE(op, x) \ |
789 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
790 | if (have_vcpu_info_placement) { \ |
791 | start = (char *)xen_##x##_direct; \ | |
792 | end = xen_##x##_direct_end; \ | |
793 | reloc = xen_##x##_direct_reloc; \ | |
794 | } \ | |
795 | goto patch_site | |
796 | ||
797 | switch (type) { | |
93b1eab3 JF |
798 | SITE(pv_irq_ops, irq_enable); |
799 | SITE(pv_irq_ops, irq_disable); | |
800 | SITE(pv_irq_ops, save_fl); | |
801 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
802 | #undef SITE |
803 | ||
804 | patch_site: | |
805 | if (start == NULL || (end-start) > len) | |
806 | goto default_patch; | |
807 | ||
ab144f5e | 808 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
809 | |
810 | /* Note: because reloc is assigned from something that | |
811 | appears to be an array, gcc assumes it's non-null, | |
812 | but doesn't know its relationship with start and | |
813 | end. */ | |
814 | if (reloc > start && reloc < end) { | |
815 | int reloc_off = reloc - start; | |
ab144f5e AK |
816 | long *relocp = (long *)(insnbuf + reloc_off); |
817 | long delta = start - (char *)addr; | |
6487673b JF |
818 | |
819 | *relocp += delta; | |
820 | } | |
821 | break; | |
822 | ||
823 | default_patch: | |
824 | default: | |
ab144f5e AK |
825 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
826 | addr, len); | |
6487673b JF |
827 | break; |
828 | } | |
829 | ||
830 | return ret; | |
831 | } | |
832 | ||
93b1eab3 | 833 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
834 | .paravirt_enabled = 1, |
835 | .shared_kernel_pmd = 0, | |
836 | ||
837 | .name = "Xen", | |
93b1eab3 | 838 | }; |
5ead97c8 | 839 | |
93b1eab3 | 840 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 841 | .patch = xen_patch, |
5ead97c8 | 842 | |
93b1eab3 | 843 | .banner = xen_banner, |
5ead97c8 JF |
844 | .memory_setup = xen_memory_setup, |
845 | .arch_setup = xen_arch_setup, | |
e2426cf8 | 846 | .post_allocator_init = xen_post_allocator_init, |
93b1eab3 | 847 | }; |
5ead97c8 | 848 | |
93b1eab3 | 849 | static const struct pv_time_ops xen_time_ops __initdata = { |
15c84731 | 850 | .time_init = xen_time_init, |
93b1eab3 | 851 | |
15c84731 JF |
852 | .set_wallclock = xen_set_wallclock, |
853 | .get_wallclock = xen_get_wallclock, | |
e93ef949 | 854 | .get_tsc_khz = xen_tsc_khz, |
ab550288 | 855 | .sched_clock = xen_sched_clock, |
93b1eab3 | 856 | }; |
15c84731 | 857 | |
93b1eab3 | 858 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
859 | .cpuid = xen_cpuid, |
860 | ||
861 | .set_debugreg = xen_set_debugreg, | |
862 | .get_debugreg = xen_get_debugreg, | |
863 | ||
7b1333aa | 864 | .clts = xen_clts, |
5ead97c8 | 865 | |
a789ed5f | 866 | .read_cr0 = xen_read_cr0, |
7b1333aa | 867 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 868 | |
5ead97c8 JF |
869 | .read_cr4 = native_read_cr4, |
870 | .read_cr4_safe = native_read_cr4_safe, | |
871 | .write_cr4 = xen_write_cr4, | |
872 | ||
5ead97c8 JF |
873 | .wbinvd = native_wbinvd, |
874 | ||
875 | .read_msr = native_read_msr_safe, | |
1153968a | 876 | .write_msr = xen_write_msr_safe, |
5ead97c8 JF |
877 | .read_tsc = native_read_tsc, |
878 | .read_pmc = native_read_pmc, | |
879 | ||
81e103f1 | 880 | .iret = xen_iret, |
d75cd22f | 881 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
882 | #ifdef CONFIG_X86_64 |
883 | .usergs_sysret32 = xen_sysret32, | |
884 | .usergs_sysret64 = xen_sysret64, | |
885 | #endif | |
5ead97c8 JF |
886 | |
887 | .load_tr_desc = paravirt_nop, | |
888 | .set_ldt = xen_set_ldt, | |
889 | .load_gdt = xen_load_gdt, | |
890 | .load_idt = xen_load_idt, | |
891 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
892 | #ifdef CONFIG_X86_64 |
893 | .load_gs_index = xen_load_gs_index, | |
894 | #endif | |
5ead97c8 | 895 | |
38ffbe66 JF |
896 | .alloc_ldt = xen_alloc_ldt, |
897 | .free_ldt = xen_free_ldt, | |
898 | ||
5ead97c8 JF |
899 | .store_gdt = native_store_gdt, |
900 | .store_idt = native_store_idt, | |
901 | .store_tr = xen_store_tr, | |
902 | ||
903 | .write_ldt_entry = xen_write_ldt_entry, | |
904 | .write_gdt_entry = xen_write_gdt_entry, | |
905 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 906 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
907 | |
908 | .set_iopl_mask = xen_set_iopl_mask, | |
909 | .io_delay = xen_io_delay, | |
910 | ||
952d1d70 JF |
911 | /* Xen takes care of %gs when switching to usermode for us */ |
912 | .swapgs = paravirt_nop, | |
913 | ||
224101ed JF |
914 | .start_context_switch = paravirt_start_context_switch, |
915 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
916 | }; |
917 | ||
93b1eab3 | 918 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 919 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
920 | .setup_boot_clock = paravirt_nop, |
921 | .setup_secondary_clock = paravirt_nop, | |
922 | .startup_ipi_hook = paravirt_nop, | |
923 | #endif | |
93b1eab3 JF |
924 | }; |
925 | ||
fefa629a JF |
926 | static void xen_reboot(int reason) |
927 | { | |
349c709f JF |
928 | struct sched_shutdown r = { .reason = reason }; |
929 | ||
fefa629a JF |
930 | #ifdef CONFIG_SMP |
931 | smp_send_stop(); | |
932 | #endif | |
933 | ||
349c709f | 934 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
935 | BUG(); |
936 | } | |
937 | ||
938 | static void xen_restart(char *msg) | |
939 | { | |
940 | xen_reboot(SHUTDOWN_reboot); | |
941 | } | |
942 | ||
943 | static void xen_emergency_restart(void) | |
944 | { | |
945 | xen_reboot(SHUTDOWN_reboot); | |
946 | } | |
947 | ||
948 | static void xen_machine_halt(void) | |
949 | { | |
950 | xen_reboot(SHUTDOWN_poweroff); | |
951 | } | |
952 | ||
953 | static void xen_crash_shutdown(struct pt_regs *regs) | |
954 | { | |
955 | xen_reboot(SHUTDOWN_crash); | |
956 | } | |
957 | ||
958 | static const struct machine_ops __initdata xen_machine_ops = { | |
959 | .restart = xen_restart, | |
960 | .halt = xen_machine_halt, | |
961 | .power_off = xen_machine_halt, | |
962 | .shutdown = xen_machine_halt, | |
963 | .crash_shutdown = xen_crash_shutdown, | |
964 | .emergency_restart = xen_emergency_restart, | |
965 | }; | |
966 | ||
5ead97c8 JF |
967 | /* First C function to be called on Xen boot */ |
968 | asmlinkage void __init xen_start_kernel(void) | |
969 | { | |
970 | pgd_t *pgd; | |
971 | ||
972 | if (!xen_start_info) | |
973 | return; | |
974 | ||
6e833587 JF |
975 | xen_domain_type = XEN_PV_DOMAIN; |
976 | ||
5ead97c8 | 977 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
978 | pv_info = xen_info; |
979 | pv_init_ops = xen_init_ops; | |
980 | pv_time_ops = xen_time_ops; | |
981 | pv_cpu_ops = xen_cpu_ops; | |
93b1eab3 JF |
982 | pv_apic_ops = xen_apic_ops; |
983 | pv_mmu_ops = xen_mmu_ops; | |
93b1eab3 | 984 | |
ce2eef33 JF |
985 | #ifdef CONFIG_X86_64 |
986 | /* | |
987 | * Setup percpu state. We only need to do this for 64-bit | |
988 | * because 32-bit already has %fs set properly. | |
989 | */ | |
990 | load_percpu_segment(0); | |
991 | #endif | |
0d1edf46 | 992 | |
ce2eef33 | 993 | xen_init_irq_ops(); |
e826fe1b JF |
994 | xen_init_cpuid_mask(); |
995 | ||
94a8c3c2 | 996 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 997 | /* |
94a8c3c2 | 998 | * set up the basic apic ops. |
ad66dd34 | 999 | */ |
c1eeb2de | 1000 | set_xen_basic_apic_ops(); |
ad66dd34 | 1001 | #endif |
93b1eab3 | 1002 | |
ce2eef33 JF |
1003 | xen_setup_features(); |
1004 | ||
e57778a1 JF |
1005 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1006 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1007 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1008 | } | |
1009 | ||
fefa629a JF |
1010 | machine_ops = xen_machine_ops; |
1011 | ||
38341432 JF |
1012 | /* |
1013 | * The only reliable way to retain the initial address of the | |
1014 | * percpu gdt_page is to remember it here, so we can go and | |
1015 | * mark it RW later, when the initial percpu area is freed. | |
1016 | */ | |
1017 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1018 | |
a9e7062d | 1019 | xen_smp_init(); |
5ead97c8 JF |
1020 | |
1021 | /* Get mfn list */ | |
1022 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
d451bb7a | 1023 | xen_build_dynamic_phys_to_machine(); |
5ead97c8 JF |
1024 | |
1025 | pgd = (pgd_t *)xen_start_info->pt_base; | |
1026 | ||
084a2a4e JF |
1027 | /* Prevent unwanted bits from being set in PTEs. */ |
1028 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
6e833587 | 1029 | if (!xen_initial_domain()) |
084a2a4e | 1030 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
60223a32 | 1031 | |
707ebbc8 JF |
1032 | #ifdef CONFIG_X86_64 |
1033 | /* Work out if we support NX */ | |
1034 | check_efer(); | |
1035 | #endif | |
1036 | ||
60223a32 | 1037 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1038 | possible map and a non-dummy shared_info. */ |
60223a32 | 1039 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1040 | |
55d80856 JF |
1041 | local_irq_disable(); |
1042 | early_boot_irqs_off(); | |
1043 | ||
084a2a4e | 1044 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1045 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1046 | |
084a2a4e | 1047 | init_mm.pgd = pgd; |
5ead97c8 JF |
1048 | |
1049 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1050 | ||
93b1eab3 | 1051 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1052 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1053 | pv_info.kernel_rpl = 0; |
5ead97c8 JF |
1054 | |
1055 | /* set the limit of our address space */ | |
fb1d8404 | 1056 | xen_reserve_top(); |
5ead97c8 | 1057 | |
7d087b68 | 1058 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1059 | /* set up basic CPUID stuff */ |
1060 | cpu_detect(&new_cpu_data); | |
1061 | new_cpu_data.hard_math = 1; | |
1062 | new_cpu_data.x86_capability[0] = cpuid_edx(1); | |
7d087b68 | 1063 | #endif |
5ead97c8 JF |
1064 | |
1065 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1066 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1067 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1068 | ? __pa(xen_start_info->mod_start) : 0; | |
1069 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1070 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1071 | |
6e833587 | 1072 | if (!xen_initial_domain()) { |
83abc70a | 1073 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1074 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1075 | add_preferred_console("hvc", 0, NULL); |
9e124fe1 | 1076 | } |
b8c2d3df | 1077 | |
084a2a4e JF |
1078 | xen_raw_console_write("about to get started...\n"); |
1079 | ||
5ead97c8 | 1080 | /* Start the world */ |
f5d36de0 | 1081 | #ifdef CONFIG_X86_32 |
f0d43100 | 1082 | i386_start_kernel(); |
f5d36de0 | 1083 | #else |
084a2a4e | 1084 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1085 | #endif |
5ead97c8 | 1086 | } |