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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
5ead97c8 | 34 | |
1ccbf534 | 35 | #include <xen/xen.h> |
5ead97c8 | 36 | #include <xen/interface/xen.h> |
ecbf29cd | 37 | #include <xen/interface/version.h> |
5ead97c8 JF |
38 | #include <xen/interface/physdev.h> |
39 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 40 | #include <xen/interface/memory.h> |
5ead97c8 JF |
41 | #include <xen/features.h> |
42 | #include <xen/page.h> | |
38e20b07 | 43 | #include <xen/hvm.h> |
084a2a4e | 44 | #include <xen/hvc-console.h> |
5ead97c8 JF |
45 | |
46 | #include <asm/paravirt.h> | |
7b6aa335 | 47 | #include <asm/apic.h> |
5ead97c8 | 48 | #include <asm/page.h> |
b5401a96 | 49 | #include <asm/xen/pci.h> |
5ead97c8 JF |
50 | #include <asm/xen/hypercall.h> |
51 | #include <asm/xen/hypervisor.h> | |
52 | #include <asm/fixmap.h> | |
53 | #include <asm/processor.h> | |
707ebbc8 | 54 | #include <asm/proto.h> |
1153968a | 55 | #include <asm/msr-index.h> |
6cac5a92 | 56 | #include <asm/traps.h> |
5ead97c8 JF |
57 | #include <asm/setup.h> |
58 | #include <asm/desc.h> | |
817a824b | 59 | #include <asm/pgalloc.h> |
5ead97c8 | 60 | #include <asm/pgtable.h> |
f87e4cac | 61 | #include <asm/tlbflush.h> |
fefa629a | 62 | #include <asm/reboot.h> |
577eebea | 63 | #include <asm/stackprotector.h> |
bee6ab53 | 64 | #include <asm/hypervisor.h> |
5ead97c8 JF |
65 | |
66 | #include "xen-ops.h" | |
3b827c1b | 67 | #include "mmu.h" |
5ead97c8 JF |
68 | #include "multicalls.h" |
69 | ||
70 | EXPORT_SYMBOL_GPL(hypercall_page); | |
71 | ||
5ead97c8 JF |
72 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
73 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 74 | |
6e833587 JF |
75 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
76 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
77 | ||
7e77506a IC |
78 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
79 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
80 | unsigned int machine_to_phys_order; | |
81 | EXPORT_SYMBOL(machine_to_phys_order); | |
82 | ||
5ead97c8 JF |
83 | struct start_info *xen_start_info; |
84 | EXPORT_SYMBOL_GPL(xen_start_info); | |
85 | ||
a0d695c8 | 86 | struct shared_info xen_dummy_shared_info; |
60223a32 | 87 | |
38341432 JF |
88 | void *xen_initial_gdt; |
89 | ||
bee6ab53 | 90 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
91 | __read_mostly int xen_have_vector_callback; |
92 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 93 | |
60223a32 JF |
94 | /* |
95 | * Point at some empty memory to start with. We map the real shared_info | |
96 | * page as soon as fixmap is up and running. | |
97 | */ | |
a0d695c8 | 98 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
99 | |
100 | /* | |
101 | * Flag to determine whether vcpu info placement is available on all | |
102 | * VCPUs. We assume it is to start with, and then set it to zero on | |
103 | * the first failure. This is because it can succeed on some VCPUs | |
104 | * and not others, since it can involve hypervisor memory allocation, | |
105 | * or because the guest failed to guarantee all the appropriate | |
106 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
107 | * | |
108 | * Note that any particular CPU may be using a placed vcpu structure, | |
109 | * but we can only optimise if the all are. | |
110 | * | |
111 | * 0: not available, 1: available | |
112 | */ | |
e4d04071 | 113 | static int have_vcpu_info_placement = 1; |
60223a32 | 114 | |
c06ee78d MR |
115 | static void clamp_max_cpus(void) |
116 | { | |
117 | #ifdef CONFIG_SMP | |
118 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
119 | setup_max_cpus = MAX_VIRT_CPUS; | |
120 | #endif | |
121 | } | |
122 | ||
9c7a7942 | 123 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 124 | { |
60223a32 JF |
125 | struct vcpu_register_vcpu_info info; |
126 | int err; | |
127 | struct vcpu_info *vcpup; | |
128 | ||
a0d695c8 | 129 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 130 | |
c06ee78d MR |
131 | if (cpu < MAX_VIRT_CPUS) |
132 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 133 | |
c06ee78d MR |
134 | if (!have_vcpu_info_placement) { |
135 | if (cpu >= MAX_VIRT_CPUS) | |
136 | clamp_max_cpus(); | |
137 | return; | |
138 | } | |
60223a32 | 139 | |
c06ee78d | 140 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 141 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
142 | info.offset = offset_in_page(vcpup); |
143 | ||
60223a32 JF |
144 | /* Check to see if the hypervisor will put the vcpu_info |
145 | structure where we want it, which allows direct access via | |
146 | a percpu-variable. */ | |
147 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
148 | ||
149 | if (err) { | |
150 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
151 | have_vcpu_info_placement = 0; | |
c06ee78d | 152 | clamp_max_cpus(); |
60223a32 JF |
153 | } else { |
154 | /* This cpu is using the registered vcpu info, even if | |
155 | later ones fail to. */ | |
156 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 157 | } |
5ead97c8 JF |
158 | } |
159 | ||
9c7a7942 JF |
160 | /* |
161 | * On restore, set the vcpu placement up again. | |
162 | * If it fails, then we're in a bad state, since | |
163 | * we can't back out from using it... | |
164 | */ | |
165 | void xen_vcpu_restore(void) | |
166 | { | |
3905bb2a | 167 | int cpu; |
9c7a7942 | 168 | |
3905bb2a JF |
169 | for_each_online_cpu(cpu) { |
170 | bool other_cpu = (cpu != smp_processor_id()); | |
9c7a7942 | 171 | |
3905bb2a JF |
172 | if (other_cpu && |
173 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
174 | BUG(); | |
9c7a7942 | 175 | |
3905bb2a | 176 | xen_setup_runstate_info(cpu); |
9c7a7942 | 177 | |
3905bb2a | 178 | if (have_vcpu_info_placement) |
9c7a7942 | 179 | xen_vcpu_setup(cpu); |
9c7a7942 | 180 | |
3905bb2a JF |
181 | if (other_cpu && |
182 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
183 | BUG(); | |
9c7a7942 JF |
184 | } |
185 | } | |
186 | ||
5ead97c8 JF |
187 | static void __init xen_banner(void) |
188 | { | |
95c7c23b JF |
189 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
190 | struct xen_extraversion extra; | |
191 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
192 | ||
5ead97c8 | 193 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 194 | pv_info.name); |
95c7c23b JF |
195 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
196 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 197 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
198 | } |
199 | ||
e826fe1b JF |
200 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
201 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
202 | ||
65ea5b03 PA |
203 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
204 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 205 | { |
82d64699 | 206 | unsigned maskebx = ~0; |
e826fe1b | 207 | unsigned maskecx = ~0; |
5ead97c8 JF |
208 | unsigned maskedx = ~0; |
209 | ||
210 | /* | |
211 | * Mask out inconvenient features, to try and disable as many | |
212 | * unsupported kernel subsystems as possible. | |
213 | */ | |
82d64699 JF |
214 | switch (*ax) { |
215 | case 1: | |
e826fe1b JF |
216 | maskecx = cpuid_leaf1_ecx_mask; |
217 | maskedx = cpuid_leaf1_edx_mask; | |
82d64699 JF |
218 | break; |
219 | ||
220 | case 0xb: | |
221 | /* Suppress extended topology stuff */ | |
222 | maskebx = 0; | |
223 | break; | |
e826fe1b | 224 | } |
5ead97c8 JF |
225 | |
226 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
227 | : "=a" (*ax), |
228 | "=b" (*bx), | |
229 | "=c" (*cx), | |
230 | "=d" (*dx) | |
231 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 232 | |
82d64699 | 233 | *bx &= maskebx; |
e826fe1b | 234 | *cx &= maskecx; |
65ea5b03 | 235 | *dx &= maskedx; |
5ead97c8 JF |
236 | } |
237 | ||
e826fe1b JF |
238 | static __init void xen_init_cpuid_mask(void) |
239 | { | |
240 | unsigned int ax, bx, cx, dx; | |
241 | ||
242 | cpuid_leaf1_edx_mask = | |
243 | ~((1 << X86_FEATURE_MCE) | /* disable MCE */ | |
244 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
ff12849a | 245 | (1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
246 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
247 | ||
248 | if (!xen_initial_domain()) | |
249 | cpuid_leaf1_edx_mask &= | |
250 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
251 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
252 | ||
253 | ax = 1; | |
7adb4df4 | 254 | cx = 0; |
e826fe1b JF |
255 | xen_cpuid(&ax, &bx, &cx, &dx); |
256 | ||
257 | /* cpuid claims we support xsave; try enabling it to see what happens */ | |
258 | if (cx & (1 << (X86_FEATURE_XSAVE % 32))) { | |
259 | unsigned long cr4; | |
260 | ||
261 | set_in_cr4(X86_CR4_OSXSAVE); | |
262 | ||
263 | cr4 = read_cr4(); | |
264 | ||
265 | if ((cr4 & X86_CR4_OSXSAVE) == 0) | |
266 | cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_XSAVE % 32)); | |
267 | ||
268 | clear_in_cr4(X86_CR4_OSXSAVE); | |
269 | } | |
270 | } | |
271 | ||
5ead97c8 JF |
272 | static void xen_set_debugreg(int reg, unsigned long val) |
273 | { | |
274 | HYPERVISOR_set_debugreg(reg, val); | |
275 | } | |
276 | ||
277 | static unsigned long xen_get_debugreg(int reg) | |
278 | { | |
279 | return HYPERVISOR_get_debugreg(reg); | |
280 | } | |
281 | ||
224101ed | 282 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 283 | { |
5ead97c8 | 284 | xen_mc_flush(); |
224101ed | 285 | paravirt_end_context_switch(next); |
5ead97c8 JF |
286 | } |
287 | ||
288 | static unsigned long xen_store_tr(void) | |
289 | { | |
290 | return 0; | |
291 | } | |
292 | ||
a05d2eba | 293 | /* |
cef43bf6 JF |
294 | * Set the page permissions for a particular virtual address. If the |
295 | * address is a vmalloc mapping (or other non-linear mapping), then | |
296 | * find the linear mapping of the page and also set its protections to | |
297 | * match. | |
a05d2eba JF |
298 | */ |
299 | static void set_aliased_prot(void *v, pgprot_t prot) | |
300 | { | |
301 | int level; | |
302 | pte_t *ptep; | |
303 | pte_t pte; | |
304 | unsigned long pfn; | |
305 | struct page *page; | |
306 | ||
307 | ptep = lookup_address((unsigned long)v, &level); | |
308 | BUG_ON(ptep == NULL); | |
309 | ||
310 | pfn = pte_pfn(*ptep); | |
311 | page = pfn_to_page(pfn); | |
312 | ||
313 | pte = pfn_pte(pfn, prot); | |
314 | ||
315 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
316 | BUG(); | |
317 | ||
318 | if (!PageHighMem(page)) { | |
319 | void *av = __va(PFN_PHYS(pfn)); | |
320 | ||
321 | if (av != v) | |
322 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
323 | BUG(); | |
324 | } else | |
325 | kmap_flush_unused(); | |
326 | } | |
327 | ||
38ffbe66 JF |
328 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
329 | { | |
a05d2eba | 330 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
331 | int i; |
332 | ||
a05d2eba JF |
333 | for(i = 0; i < entries; i += entries_per_page) |
334 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
335 | } |
336 | ||
337 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
338 | { | |
a05d2eba | 339 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
340 | int i; |
341 | ||
a05d2eba JF |
342 | for(i = 0; i < entries; i += entries_per_page) |
343 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
344 | } |
345 | ||
5ead97c8 JF |
346 | static void xen_set_ldt(const void *addr, unsigned entries) |
347 | { | |
5ead97c8 JF |
348 | struct mmuext_op *op; |
349 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
350 | ||
351 | op = mcs.args; | |
352 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 353 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
354 | op->arg2.nr_ents = entries; |
355 | ||
356 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
357 | ||
358 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
359 | } | |
360 | ||
6b68f01b | 361 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 362 | { |
5ead97c8 JF |
363 | unsigned long va = dtr->address; |
364 | unsigned int size = dtr->size + 1; | |
365 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 366 | unsigned long frames[pages]; |
5ead97c8 | 367 | int f; |
5ead97c8 | 368 | |
577eebea JF |
369 | /* |
370 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
371 | * 8-byte entries, or 16 4k pages.. | |
372 | */ | |
5ead97c8 JF |
373 | |
374 | BUG_ON(size > 65536); | |
375 | BUG_ON(va & ~PAGE_MASK); | |
376 | ||
5ead97c8 | 377 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 378 | int level; |
577eebea | 379 | pte_t *ptep; |
6ed6bf42 JF |
380 | unsigned long pfn, mfn; |
381 | void *virt; | |
382 | ||
577eebea JF |
383 | /* |
384 | * The GDT is per-cpu and is in the percpu data area. | |
385 | * That can be virtually mapped, so we need to do a | |
386 | * page-walk to get the underlying MFN for the | |
387 | * hypercall. The page can also be in the kernel's | |
388 | * linear range, so we need to RO that mapping too. | |
389 | */ | |
390 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
391 | BUG_ON(ptep == NULL); |
392 | ||
393 | pfn = pte_pfn(*ptep); | |
394 | mfn = pfn_to_mfn(pfn); | |
395 | virt = __va(PFN_PHYS(pfn)); | |
396 | ||
397 | frames[f] = mfn; | |
9976b39b | 398 | |
5ead97c8 | 399 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 400 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
401 | } |
402 | ||
3ce5fa7e JF |
403 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
404 | BUG(); | |
5ead97c8 JF |
405 | } |
406 | ||
577eebea JF |
407 | /* |
408 | * load_gdt for early boot, when the gdt is only mapped once | |
409 | */ | |
410 | static __init void xen_load_gdt_boot(const struct desc_ptr *dtr) | |
411 | { | |
412 | unsigned long va = dtr->address; | |
413 | unsigned int size = dtr->size + 1; | |
414 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
415 | unsigned long frames[pages]; | |
416 | int f; | |
417 | ||
418 | /* | |
419 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
420 | * 8-byte entries, or 16 4k pages.. | |
421 | */ | |
422 | ||
423 | BUG_ON(size > 65536); | |
424 | BUG_ON(va & ~PAGE_MASK); | |
425 | ||
426 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
427 | pte_t pte; | |
428 | unsigned long pfn, mfn; | |
429 | ||
430 | pfn = virt_to_pfn(va); | |
431 | mfn = pfn_to_mfn(pfn); | |
432 | ||
433 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
434 | ||
435 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
436 | BUG(); | |
437 | ||
438 | frames[f] = mfn; | |
439 | } | |
440 | ||
441 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
442 | BUG(); | |
443 | } | |
444 | ||
5ead97c8 JF |
445 | static void load_TLS_descriptor(struct thread_struct *t, |
446 | unsigned int cpu, unsigned int i) | |
447 | { | |
448 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 449 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
450 | struct multicall_space mc = __xen_mc_entry(0); |
451 | ||
452 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
453 | } | |
454 | ||
455 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
456 | { | |
8b84ad94 | 457 | /* |
ccbeed3a TH |
458 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
459 | * and lazy gs handling is enabled, it means we're in a | |
460 | * context switch, and %gs has just been saved. This means we | |
461 | * can zero it out to prevent faults on exit from the | |
462 | * hypervisor if the next process has no %gs. Either way, it | |
463 | * has been saved, and the new value will get loaded properly. | |
464 | * This will go away as soon as Xen has been modified to not | |
465 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
466 | * |
467 | * On x86_64, this hack is not used for %gs, because gs points | |
468 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
469 | * must not zero %gs on x86_64 | |
470 | * | |
471 | * For x86_64, we need to zero %fs, otherwise we may get an | |
472 | * exception between the new %fs descriptor being loaded and | |
473 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 474 | */ |
8a95408e EH |
475 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
476 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 477 | lazy_load_gs(0); |
8a95408e EH |
478 | #else |
479 | loadsegment(fs, 0); | |
480 | #endif | |
481 | } | |
482 | ||
483 | xen_mc_batch(); | |
484 | ||
485 | load_TLS_descriptor(t, cpu, 0); | |
486 | load_TLS_descriptor(t, cpu, 1); | |
487 | load_TLS_descriptor(t, cpu, 2); | |
488 | ||
489 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
490 | } |
491 | ||
a8fc1089 EH |
492 | #ifdef CONFIG_X86_64 |
493 | static void xen_load_gs_index(unsigned int idx) | |
494 | { | |
495 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
496 | BUG(); | |
5ead97c8 | 497 | } |
a8fc1089 | 498 | #endif |
5ead97c8 JF |
499 | |
500 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 501 | const void *ptr) |
5ead97c8 | 502 | { |
cef43bf6 | 503 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 504 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 505 | |
f120f13e JF |
506 | preempt_disable(); |
507 | ||
5ead97c8 JF |
508 | xen_mc_flush(); |
509 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
510 | BUG(); | |
f120f13e JF |
511 | |
512 | preempt_enable(); | |
5ead97c8 JF |
513 | } |
514 | ||
e176d367 | 515 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
516 | struct trap_info *info) |
517 | { | |
6cac5a92 JF |
518 | unsigned long addr; |
519 | ||
6d02c426 | 520 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
521 | return 0; |
522 | ||
523 | info->vector = vector; | |
6cac5a92 JF |
524 | |
525 | addr = gate_offset(*val); | |
526 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
527 | /* |
528 | * Look for known traps using IST, and substitute them | |
529 | * appropriately. The debugger ones are the only ones we care | |
530 | * about. Xen will handle faults like double_fault and | |
531 | * machine_check, so we should never see them. Warn if | |
532 | * there's an unexpected IST-using fault handler. | |
533 | */ | |
6cac5a92 JF |
534 | if (addr == (unsigned long)debug) |
535 | addr = (unsigned long)xen_debug; | |
536 | else if (addr == (unsigned long)int3) | |
537 | addr = (unsigned long)xen_int3; | |
538 | else if (addr == (unsigned long)stack_segment) | |
539 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
540 | else if (addr == (unsigned long)double_fault || |
541 | addr == (unsigned long)nmi) { | |
542 | /* Don't need to handle these */ | |
543 | return 0; | |
544 | #ifdef CONFIG_X86_MCE | |
545 | } else if (addr == (unsigned long)machine_check) { | |
546 | return 0; | |
547 | #endif | |
548 | } else { | |
549 | /* Some other trap using IST? */ | |
550 | if (WARN_ON(val->ist != 0)) | |
551 | return 0; | |
552 | } | |
6cac5a92 JF |
553 | #endif /* CONFIG_X86_64 */ |
554 | info->address = addr; | |
555 | ||
e176d367 EH |
556 | info->cs = gate_segment(*val); |
557 | info->flags = val->dpl; | |
5ead97c8 | 558 | /* interrupt gates clear IF */ |
6d02c426 JF |
559 | if (val->type == GATE_INTERRUPT) |
560 | info->flags |= 1 << 2; | |
5ead97c8 JF |
561 | |
562 | return 1; | |
563 | } | |
564 | ||
565 | /* Locations of each CPU's IDT */ | |
6b68f01b | 566 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
567 | |
568 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
569 | also update Xen. */ | |
8d947344 | 570 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 571 | { |
5ead97c8 | 572 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
573 | unsigned long start, end; |
574 | ||
575 | preempt_disable(); | |
576 | ||
780f36d8 CL |
577 | start = __this_cpu_read(idt_desc.address); |
578 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
579 | |
580 | xen_mc_flush(); | |
581 | ||
8d947344 | 582 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
583 | |
584 | if (p >= start && (p + 8) <= end) { | |
585 | struct trap_info info[2]; | |
586 | ||
587 | info[1].address = 0; | |
588 | ||
e176d367 | 589 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
590 | if (HYPERVISOR_set_trap_table(info)) |
591 | BUG(); | |
592 | } | |
f120f13e JF |
593 | |
594 | preempt_enable(); | |
5ead97c8 JF |
595 | } |
596 | ||
6b68f01b | 597 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 598 | struct trap_info *traps) |
5ead97c8 | 599 | { |
5ead97c8 JF |
600 | unsigned in, out, count; |
601 | ||
e176d367 | 602 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
603 | BUG_ON(count > 256); |
604 | ||
5ead97c8 | 605 | for (in = out = 0; in < count; in++) { |
e176d367 | 606 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 607 | |
e176d367 | 608 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
609 | out++; |
610 | } | |
611 | traps[out].address = 0; | |
f87e4cac JF |
612 | } |
613 | ||
614 | void xen_copy_trap_info(struct trap_info *traps) | |
615 | { | |
6b68f01b | 616 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
617 | |
618 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
619 | } |
620 | ||
621 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
622 | hold a spinlock to protect the static traps[] array (static because | |
623 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 624 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
625 | { |
626 | static DEFINE_SPINLOCK(lock); | |
627 | static struct trap_info traps[257]; | |
f87e4cac JF |
628 | |
629 | spin_lock(&lock); | |
630 | ||
f120f13e JF |
631 | __get_cpu_var(idt_desc) = *desc; |
632 | ||
f87e4cac | 633 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
634 | |
635 | xen_mc_flush(); | |
636 | if (HYPERVISOR_set_trap_table(traps)) | |
637 | BUG(); | |
638 | ||
639 | spin_unlock(&lock); | |
640 | } | |
641 | ||
642 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
643 | they're handled differently. */ | |
644 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 645 | const void *desc, int type) |
5ead97c8 | 646 | { |
f120f13e JF |
647 | preempt_disable(); |
648 | ||
014b15be GOC |
649 | switch (type) { |
650 | case DESC_LDT: | |
651 | case DESC_TSS: | |
5ead97c8 JF |
652 | /* ignore */ |
653 | break; | |
654 | ||
655 | default: { | |
9976b39b | 656 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
657 | |
658 | xen_mc_flush(); | |
014b15be | 659 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
660 | BUG(); |
661 | } | |
662 | ||
663 | } | |
f120f13e JF |
664 | |
665 | preempt_enable(); | |
5ead97c8 JF |
666 | } |
667 | ||
577eebea JF |
668 | /* |
669 | * Version of write_gdt_entry for use at early boot-time needed to | |
670 | * update an entry as simply as possible. | |
671 | */ | |
672 | static __init void xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, | |
673 | const void *desc, int type) | |
674 | { | |
675 | switch (type) { | |
676 | case DESC_LDT: | |
677 | case DESC_TSS: | |
678 | /* ignore */ | |
679 | break; | |
680 | ||
681 | default: { | |
682 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
683 | ||
684 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
685 | dt[entry] = *(struct desc_struct *)desc; | |
686 | } | |
687 | ||
688 | } | |
689 | } | |
690 | ||
faca6227 | 691 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 692 | struct thread_struct *thread) |
5ead97c8 JF |
693 | { |
694 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 695 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
696 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
697 | } | |
698 | ||
699 | static void xen_set_iopl_mask(unsigned mask) | |
700 | { | |
701 | struct physdev_set_iopl set_iopl; | |
702 | ||
703 | /* Force the change at ring 0. */ | |
704 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
705 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
706 | } | |
707 | ||
708 | static void xen_io_delay(void) | |
709 | { | |
710 | } | |
711 | ||
712 | #ifdef CONFIG_X86_LOCAL_APIC | |
ad66dd34 | 713 | static u32 xen_apic_read(u32 reg) |
5ead97c8 JF |
714 | { |
715 | return 0; | |
716 | } | |
f87e4cac | 717 | |
ad66dd34 | 718 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
719 | { |
720 | /* Warn to see if there's any stray references */ | |
721 | WARN_ON(1); | |
722 | } | |
ad66dd34 | 723 | |
ad66dd34 SS |
724 | static u64 xen_apic_icr_read(void) |
725 | { | |
726 | return 0; | |
727 | } | |
728 | ||
729 | static void xen_apic_icr_write(u32 low, u32 id) | |
730 | { | |
731 | /* Warn to see if there's any stray references */ | |
732 | WARN_ON(1); | |
733 | } | |
734 | ||
735 | static void xen_apic_wait_icr_idle(void) | |
736 | { | |
737 | return; | |
738 | } | |
739 | ||
94a8c3c2 YL |
740 | static u32 xen_safe_apic_wait_icr_idle(void) |
741 | { | |
742 | return 0; | |
743 | } | |
744 | ||
c1eeb2de YL |
745 | static void set_xen_basic_apic_ops(void) |
746 | { | |
747 | apic->read = xen_apic_read; | |
748 | apic->write = xen_apic_write; | |
749 | apic->icr_read = xen_apic_icr_read; | |
750 | apic->icr_write = xen_apic_icr_write; | |
751 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
752 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
753 | } | |
ad66dd34 | 754 | |
5ead97c8 JF |
755 | #endif |
756 | ||
7b1333aa JF |
757 | static void xen_clts(void) |
758 | { | |
759 | struct multicall_space mcs; | |
760 | ||
761 | mcs = xen_mc_entry(0); | |
762 | ||
763 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
764 | ||
765 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
766 | } | |
767 | ||
a789ed5f JF |
768 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
769 | ||
770 | static unsigned long xen_read_cr0(void) | |
771 | { | |
772 | unsigned long cr0 = percpu_read(xen_cr0_value); | |
773 | ||
774 | if (unlikely(cr0 == 0)) { | |
775 | cr0 = native_read_cr0(); | |
776 | percpu_write(xen_cr0_value, cr0); | |
777 | } | |
778 | ||
779 | return cr0; | |
780 | } | |
781 | ||
7b1333aa JF |
782 | static void xen_write_cr0(unsigned long cr0) |
783 | { | |
784 | struct multicall_space mcs; | |
785 | ||
a789ed5f JF |
786 | percpu_write(xen_cr0_value, cr0); |
787 | ||
7b1333aa JF |
788 | /* Only pay attention to cr0.TS; everything else is |
789 | ignored. */ | |
790 | mcs = xen_mc_entry(0); | |
791 | ||
792 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
793 | ||
794 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
795 | } | |
796 | ||
5ead97c8 JF |
797 | static void xen_write_cr4(unsigned long cr4) |
798 | { | |
2956a351 JF |
799 | cr4 &= ~X86_CR4_PGE; |
800 | cr4 &= ~X86_CR4_PSE; | |
801 | ||
802 | native_write_cr4(cr4); | |
5ead97c8 JF |
803 | } |
804 | ||
1153968a JF |
805 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
806 | { | |
807 | int ret; | |
808 | ||
809 | ret = 0; | |
810 | ||
f63c2f24 | 811 | switch (msr) { |
1153968a JF |
812 | #ifdef CONFIG_X86_64 |
813 | unsigned which; | |
814 | u64 base; | |
815 | ||
816 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
817 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
818 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
819 | ||
820 | set: | |
821 | base = ((u64)high << 32) | low; | |
822 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 823 | ret = -EIO; |
1153968a JF |
824 | break; |
825 | #endif | |
d89961e2 JF |
826 | |
827 | case MSR_STAR: | |
828 | case MSR_CSTAR: | |
829 | case MSR_LSTAR: | |
830 | case MSR_SYSCALL_MASK: | |
831 | case MSR_IA32_SYSENTER_CS: | |
832 | case MSR_IA32_SYSENTER_ESP: | |
833 | case MSR_IA32_SYSENTER_EIP: | |
834 | /* Fast syscall setup is all done in hypercalls, so | |
835 | these are all ignored. Stub them out here to stop | |
836 | Xen console noise. */ | |
837 | break; | |
838 | ||
41f2e477 JF |
839 | case MSR_IA32_CR_PAT: |
840 | if (smp_processor_id() == 0) | |
841 | xen_set_pat(((u64)high << 32) | low); | |
842 | break; | |
843 | ||
1153968a JF |
844 | default: |
845 | ret = native_write_msr_safe(msr, low, high); | |
846 | } | |
847 | ||
848 | return ret; | |
849 | } | |
850 | ||
0e91398f | 851 | void xen_setup_shared_info(void) |
5ead97c8 JF |
852 | { |
853 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
854 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
855 | xen_start_info->shared_info); | |
856 | ||
857 | HYPERVISOR_shared_info = | |
858 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
859 | } else |
860 | HYPERVISOR_shared_info = | |
861 | (struct shared_info *)__va(xen_start_info->shared_info); | |
862 | ||
2e8fe719 JF |
863 | #ifndef CONFIG_SMP |
864 | /* In UP this is as good a place as any to set up shared info */ | |
865 | xen_setup_vcpu_info_placement(); | |
866 | #endif | |
d5edbc1f JF |
867 | |
868 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
869 | } |
870 | ||
60223a32 | 871 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 872 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
873 | { |
874 | int cpu; | |
875 | ||
876 | for_each_possible_cpu(cpu) | |
877 | xen_vcpu_setup(cpu); | |
878 | ||
879 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
880 | percpu area for all cpus, so make use of it */ | |
881 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
882 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
883 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
884 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
885 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 886 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 887 | } |
5ead97c8 JF |
888 | } |
889 | ||
ab144f5e AK |
890 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
891 | unsigned long addr, unsigned len) | |
6487673b JF |
892 | { |
893 | char *start, *end, *reloc; | |
894 | unsigned ret; | |
895 | ||
896 | start = end = reloc = NULL; | |
897 | ||
93b1eab3 JF |
898 | #define SITE(op, x) \ |
899 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
900 | if (have_vcpu_info_placement) { \ |
901 | start = (char *)xen_##x##_direct; \ | |
902 | end = xen_##x##_direct_end; \ | |
903 | reloc = xen_##x##_direct_reloc; \ | |
904 | } \ | |
905 | goto patch_site | |
906 | ||
907 | switch (type) { | |
93b1eab3 JF |
908 | SITE(pv_irq_ops, irq_enable); |
909 | SITE(pv_irq_ops, irq_disable); | |
910 | SITE(pv_irq_ops, save_fl); | |
911 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
912 | #undef SITE |
913 | ||
914 | patch_site: | |
915 | if (start == NULL || (end-start) > len) | |
916 | goto default_patch; | |
917 | ||
ab144f5e | 918 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
919 | |
920 | /* Note: because reloc is assigned from something that | |
921 | appears to be an array, gcc assumes it's non-null, | |
922 | but doesn't know its relationship with start and | |
923 | end. */ | |
924 | if (reloc > start && reloc < end) { | |
925 | int reloc_off = reloc - start; | |
ab144f5e AK |
926 | long *relocp = (long *)(insnbuf + reloc_off); |
927 | long delta = start - (char *)addr; | |
6487673b JF |
928 | |
929 | *relocp += delta; | |
930 | } | |
931 | break; | |
932 | ||
933 | default_patch: | |
934 | default: | |
ab144f5e AK |
935 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
936 | addr, len); | |
6487673b JF |
937 | break; |
938 | } | |
939 | ||
940 | return ret; | |
941 | } | |
942 | ||
93b1eab3 | 943 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
944 | .paravirt_enabled = 1, |
945 | .shared_kernel_pmd = 0, | |
946 | ||
947 | .name = "Xen", | |
93b1eab3 | 948 | }; |
5ead97c8 | 949 | |
93b1eab3 | 950 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 951 | .patch = xen_patch, |
93b1eab3 | 952 | }; |
5ead97c8 | 953 | |
93b1eab3 | 954 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
955 | .cpuid = xen_cpuid, |
956 | ||
957 | .set_debugreg = xen_set_debugreg, | |
958 | .get_debugreg = xen_get_debugreg, | |
959 | ||
7b1333aa | 960 | .clts = xen_clts, |
5ead97c8 | 961 | |
a789ed5f | 962 | .read_cr0 = xen_read_cr0, |
7b1333aa | 963 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 964 | |
5ead97c8 JF |
965 | .read_cr4 = native_read_cr4, |
966 | .read_cr4_safe = native_read_cr4_safe, | |
967 | .write_cr4 = xen_write_cr4, | |
968 | ||
5ead97c8 JF |
969 | .wbinvd = native_wbinvd, |
970 | ||
971 | .read_msr = native_read_msr_safe, | |
1153968a | 972 | .write_msr = xen_write_msr_safe, |
5ead97c8 JF |
973 | .read_tsc = native_read_tsc, |
974 | .read_pmc = native_read_pmc, | |
975 | ||
81e103f1 | 976 | .iret = xen_iret, |
d75cd22f | 977 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
978 | #ifdef CONFIG_X86_64 |
979 | .usergs_sysret32 = xen_sysret32, | |
980 | .usergs_sysret64 = xen_sysret64, | |
981 | #endif | |
5ead97c8 JF |
982 | |
983 | .load_tr_desc = paravirt_nop, | |
984 | .set_ldt = xen_set_ldt, | |
985 | .load_gdt = xen_load_gdt, | |
986 | .load_idt = xen_load_idt, | |
987 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
988 | #ifdef CONFIG_X86_64 |
989 | .load_gs_index = xen_load_gs_index, | |
990 | #endif | |
5ead97c8 | 991 | |
38ffbe66 JF |
992 | .alloc_ldt = xen_alloc_ldt, |
993 | .free_ldt = xen_free_ldt, | |
994 | ||
5ead97c8 JF |
995 | .store_gdt = native_store_gdt, |
996 | .store_idt = native_store_idt, | |
997 | .store_tr = xen_store_tr, | |
998 | ||
999 | .write_ldt_entry = xen_write_ldt_entry, | |
1000 | .write_gdt_entry = xen_write_gdt_entry, | |
1001 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1002 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1003 | |
1004 | .set_iopl_mask = xen_set_iopl_mask, | |
1005 | .io_delay = xen_io_delay, | |
1006 | ||
952d1d70 JF |
1007 | /* Xen takes care of %gs when switching to usermode for us */ |
1008 | .swapgs = paravirt_nop, | |
1009 | ||
224101ed JF |
1010 | .start_context_switch = paravirt_start_context_switch, |
1011 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1012 | }; |
1013 | ||
93b1eab3 | 1014 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 1015 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1016 | .startup_ipi_hook = paravirt_nop, |
1017 | #endif | |
93b1eab3 JF |
1018 | }; |
1019 | ||
fefa629a JF |
1020 | static void xen_reboot(int reason) |
1021 | { | |
349c709f JF |
1022 | struct sched_shutdown r = { .reason = reason }; |
1023 | ||
349c709f | 1024 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1025 | BUG(); |
1026 | } | |
1027 | ||
1028 | static void xen_restart(char *msg) | |
1029 | { | |
1030 | xen_reboot(SHUTDOWN_reboot); | |
1031 | } | |
1032 | ||
1033 | static void xen_emergency_restart(void) | |
1034 | { | |
1035 | xen_reboot(SHUTDOWN_reboot); | |
1036 | } | |
1037 | ||
1038 | static void xen_machine_halt(void) | |
1039 | { | |
1040 | xen_reboot(SHUTDOWN_poweroff); | |
1041 | } | |
1042 | ||
1043 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1044 | { | |
1045 | xen_reboot(SHUTDOWN_crash); | |
1046 | } | |
1047 | ||
f09f6d19 DD |
1048 | static int |
1049 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1050 | { | |
086748e5 | 1051 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1052 | return NOTIFY_DONE; |
1053 | } | |
1054 | ||
1055 | static struct notifier_block xen_panic_block = { | |
1056 | .notifier_call= xen_panic_event, | |
1057 | }; | |
1058 | ||
1059 | int xen_panic_handler_init(void) | |
1060 | { | |
1061 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1062 | return 0; | |
1063 | } | |
1064 | ||
fefa629a JF |
1065 | static const struct machine_ops __initdata xen_machine_ops = { |
1066 | .restart = xen_restart, | |
1067 | .halt = xen_machine_halt, | |
1068 | .power_off = xen_machine_halt, | |
1069 | .shutdown = xen_machine_halt, | |
1070 | .crash_shutdown = xen_crash_shutdown, | |
1071 | .emergency_restart = xen_emergency_restart, | |
1072 | }; | |
1073 | ||
577eebea JF |
1074 | /* |
1075 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1076 | * we do this, we have to be careful not to call any stack-protected | |
1077 | * function, which is most of the kernel. | |
1078 | */ | |
1079 | static void __init xen_setup_stackprotector(void) | |
1080 | { | |
1081 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1082 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1083 | ||
1084 | setup_stack_canary_segment(0); | |
1085 | switch_to_new_gdt(0); | |
1086 | ||
1087 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1088 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1089 | } | |
1090 | ||
5ead97c8 JF |
1091 | /* First C function to be called on Xen boot */ |
1092 | asmlinkage void __init xen_start_kernel(void) | |
1093 | { | |
ec35a69c KRW |
1094 | struct physdev_set_iopl set_iopl; |
1095 | int rc; | |
5ead97c8 JF |
1096 | pgd_t *pgd; |
1097 | ||
1098 | if (!xen_start_info) | |
1099 | return; | |
1100 | ||
6e833587 JF |
1101 | xen_domain_type = XEN_PV_DOMAIN; |
1102 | ||
7e77506a IC |
1103 | xen_setup_machphys_mapping(); |
1104 | ||
5ead97c8 | 1105 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1106 | pv_info = xen_info; |
1107 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1108 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1109 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1110 | |
6b18ae3e | 1111 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1112 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1113 | x86_init.oem.banner = xen_banner; |
845b3944 | 1114 | |
409771d2 | 1115 | xen_init_time_ops(); |
93b1eab3 | 1116 | |
ce2eef33 | 1117 | /* |
577eebea | 1118 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1119 | */ |
577eebea | 1120 | |
973df35e JF |
1121 | xen_init_mmu_ops(); |
1122 | ||
577eebea JF |
1123 | /* Prevent unwanted bits from being set in PTEs. */ |
1124 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
1125 | if (!xen_initial_domain()) | |
1126 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1127 | ||
1128 | __supported_pte_mask |= _PAGE_IOMAP; | |
1129 | ||
817a824b IC |
1130 | /* |
1131 | * Prevent page tables from being allocated in highmem, even | |
1132 | * if CONFIG_HIGHPTE is enabled. | |
1133 | */ | |
1134 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1135 | ||
b75fe4e5 | 1136 | /* Work out if we support NX */ |
4763ed4d | 1137 | x86_configure_nx(); |
b75fe4e5 | 1138 | |
577eebea JF |
1139 | xen_setup_features(); |
1140 | ||
1141 | /* Get mfn list */ | |
1142 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1143 | xen_build_dynamic_phys_to_machine(); | |
1144 | ||
1145 | /* | |
1146 | * Set up kernel GDT and segment registers, mainly so that | |
1147 | * -fstack-protector code can be executed. | |
1148 | */ | |
1149 | xen_setup_stackprotector(); | |
0d1edf46 | 1150 | |
ce2eef33 | 1151 | xen_init_irq_ops(); |
e826fe1b JF |
1152 | xen_init_cpuid_mask(); |
1153 | ||
94a8c3c2 | 1154 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1155 | /* |
94a8c3c2 | 1156 | * set up the basic apic ops. |
ad66dd34 | 1157 | */ |
c1eeb2de | 1158 | set_xen_basic_apic_ops(); |
ad66dd34 | 1159 | #endif |
93b1eab3 | 1160 | |
e57778a1 JF |
1161 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1162 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1163 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1164 | } | |
1165 | ||
fefa629a JF |
1166 | machine_ops = xen_machine_ops; |
1167 | ||
38341432 JF |
1168 | /* |
1169 | * The only reliable way to retain the initial address of the | |
1170 | * percpu gdt_page is to remember it here, so we can go and | |
1171 | * mark it RW later, when the initial percpu area is freed. | |
1172 | */ | |
1173 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1174 | |
a9e7062d | 1175 | xen_smp_init(); |
5ead97c8 | 1176 | |
c1f5db1a IC |
1177 | #ifdef CONFIG_ACPI_NUMA |
1178 | /* | |
1179 | * The pages we from Xen are not related to machine pages, so | |
1180 | * any NUMA information the kernel tries to get from ACPI will | |
1181 | * be meaningless. Prevent it from trying. | |
1182 | */ | |
1183 | acpi_numa = -1; | |
1184 | #endif | |
1185 | ||
5ead97c8 JF |
1186 | pgd = (pgd_t *)xen_start_info->pt_base; |
1187 | ||
7347b408 AN |
1188 | if (!xen_initial_domain()) |
1189 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1190 | ||
1191 | __supported_pte_mask |= _PAGE_IOMAP; | |
60223a32 | 1192 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1193 | possible map and a non-dummy shared_info. */ |
60223a32 | 1194 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1195 | |
55d80856 | 1196 | local_irq_disable(); |
2ce802f6 | 1197 | early_boot_irqs_disabled = true; |
55d80856 | 1198 | |
236260b9 JF |
1199 | memblock_init(); |
1200 | ||
084a2a4e | 1201 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1202 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
4ec5387c | 1203 | xen_ident_map_ISA(); |
5ead97c8 | 1204 | |
33a84750 JF |
1205 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1206 | xen_build_mfn_list_list(); | |
1207 | ||
5ead97c8 JF |
1208 | /* keep using Xen gdt for now; no urgent need to change it */ |
1209 | ||
e68266b7 | 1210 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1211 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1212 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1213 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1214 | #else |
1215 | pv_info.kernel_rpl = 0; | |
1216 | #endif | |
5ead97c8 | 1217 | /* set the limit of our address space */ |
fb1d8404 | 1218 | xen_reserve_top(); |
5ead97c8 | 1219 | |
ec35a69c KRW |
1220 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1221 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1222 | * which pokes 0xcf8 port. | |
1223 | */ | |
1224 | set_iopl.iopl = 1; | |
1225 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1226 | if (rc != 0) | |
1227 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1228 | ||
7d087b68 | 1229 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1230 | /* set up basic CPUID stuff */ |
1231 | cpu_detect(&new_cpu_data); | |
1232 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1233 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1234 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1235 | #endif |
5ead97c8 JF |
1236 | |
1237 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1238 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1239 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1240 | ? __pa(xen_start_info->mod_start) : 0; | |
1241 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1242 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1243 | |
6e833587 | 1244 | if (!xen_initial_domain()) { |
83abc70a | 1245 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1246 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1247 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1248 | if (pci_xen) |
1249 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 CW |
1250 | } else { |
1251 | /* Make sure ACS will be enabled */ | |
1252 | pci_request_acs(); | |
9e124fe1 | 1253 | } |
5d990b62 | 1254 | |
b8c2d3df | 1255 | |
084a2a4e JF |
1256 | xen_raw_console_write("about to get started...\n"); |
1257 | ||
499d19b8 JF |
1258 | xen_setup_runstate_info(0); |
1259 | ||
5ead97c8 | 1260 | /* Start the world */ |
f5d36de0 | 1261 | #ifdef CONFIG_X86_32 |
f0d43100 | 1262 | i386_start_kernel(); |
f5d36de0 | 1263 | #else |
084a2a4e | 1264 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1265 | #endif |
5ead97c8 | 1266 | } |
bee6ab53 | 1267 | |
bee6ab53 SY |
1268 | static int init_hvm_pv_info(int *major, int *minor) |
1269 | { | |
1270 | uint32_t eax, ebx, ecx, edx, pages, msr, base; | |
1271 | u64 pfn; | |
1272 | ||
1273 | base = xen_cpuid_base(); | |
1274 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); | |
1275 | ||
1276 | *major = eax >> 16; | |
1277 | *minor = eax & 0xffff; | |
1278 | printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor); | |
1279 | ||
1280 | cpuid(base + 2, &pages, &msr, &ecx, &edx); | |
1281 | ||
1282 | pfn = __pa(hypercall_page); | |
1283 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1284 | ||
1285 | xen_setup_features(); | |
1286 | ||
cff520b9 | 1287 | pv_info.name = "Xen HVM"; |
bee6ab53 SY |
1288 | |
1289 | xen_domain_type = XEN_HVM_DOMAIN; | |
1290 | ||
1291 | return 0; | |
1292 | } | |
1293 | ||
016b6f5f | 1294 | void xen_hvm_init_shared_info(void) |
bee6ab53 | 1295 | { |
016b6f5f | 1296 | int cpu; |
bee6ab53 | 1297 | struct xen_add_to_physmap xatp; |
016b6f5f | 1298 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1299 | |
016b6f5f SS |
1300 | if (!shared_info_page) |
1301 | shared_info_page = (struct shared_info *) | |
1302 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1303 | xatp.domid = DOMID_SELF; |
1304 | xatp.idx = 0; | |
1305 | xatp.space = XENMAPSPACE_shared_info; | |
1306 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; | |
1307 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) | |
1308 | BUG(); | |
1309 | ||
1310 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; | |
1311 | ||
016b6f5f SS |
1312 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1313 | * page, we use it in the event channel upcall and in some pvclock | |
1314 | * related functions. We don't need the vcpu_info placement | |
1315 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
1316 | * HVM. | |
1317 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1318 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1319 | * in that case multiple vcpus might be online. */ | |
1320 | for_each_online_cpu(cpu) { | |
1321 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
1322 | } | |
bee6ab53 SY |
1323 | } |
1324 | ||
ca65f9fc | 1325 | #ifdef CONFIG_XEN_PVHVM |
38e20b07 SY |
1326 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1327 | unsigned long action, void *hcpu) | |
1328 | { | |
1329 | int cpu = (long)hcpu; | |
1330 | switch (action) { | |
1331 | case CPU_UP_PREPARE: | |
1332 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
1333 | break; | |
1334 | default: | |
1335 | break; | |
1336 | } | |
1337 | return NOTIFY_OK; | |
1338 | } | |
1339 | ||
1340 | static struct notifier_block __cpuinitdata xen_hvm_cpu_notifier = { | |
1341 | .notifier_call = xen_hvm_cpu_notify, | |
1342 | }; | |
1343 | ||
bee6ab53 SY |
1344 | static void __init xen_hvm_guest_init(void) |
1345 | { | |
1346 | int r; | |
1347 | int major, minor; | |
1348 | ||
1349 | r = init_hvm_pv_info(&major, &minor); | |
1350 | if (r < 0) | |
1351 | return; | |
1352 | ||
016b6f5f | 1353 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1354 | |
1355 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1356 | xen_have_vector_callback = 1; | |
1357 | register_cpu_notifier(&xen_hvm_cpu_notifier); | |
c1c5413a | 1358 | xen_unplug_emulated_devices(); |
38e20b07 SY |
1359 | have_vcpu_info_placement = 0; |
1360 | x86_init.irqs.intr_init = xen_init_IRQ; | |
409771d2 | 1361 | xen_hvm_init_time_ops(); |
59151001 | 1362 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1363 | } |
1364 | ||
1365 | static bool __init xen_hvm_platform(void) | |
1366 | { | |
1367 | if (xen_pv_domain()) | |
1368 | return false; | |
1369 | ||
1370 | if (!xen_cpuid_base()) | |
1371 | return false; | |
1372 | ||
1373 | return true; | |
1374 | } | |
1375 | ||
d9b8ca84 SY |
1376 | bool xen_hvm_need_lapic(void) |
1377 | { | |
1378 | if (xen_pv_domain()) | |
1379 | return false; | |
1380 | if (!xen_hvm_domain()) | |
1381 | return false; | |
1382 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1383 | return false; | |
1384 | return true; | |
1385 | } | |
1386 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1387 | ||
bee6ab53 SY |
1388 | const __refconst struct hypervisor_x86 x86_hyper_xen_hvm = { |
1389 | .name = "Xen HVM", | |
1390 | .detect = xen_hvm_platform, | |
1391 | .init_platform = xen_hvm_guest_init, | |
1392 | }; | |
1393 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1394 | #endif |