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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
5ead97c8 | 34 | |
1ccbf534 | 35 | #include <xen/xen.h> |
5ead97c8 | 36 | #include <xen/interface/xen.h> |
ecbf29cd | 37 | #include <xen/interface/version.h> |
5ead97c8 JF |
38 | #include <xen/interface/physdev.h> |
39 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 40 | #include <xen/interface/memory.h> |
cef12ee5 | 41 | #include <xen/interface/xen-mca.h> |
5ead97c8 JF |
42 | #include <xen/features.h> |
43 | #include <xen/page.h> | |
38e20b07 | 44 | #include <xen/hvm.h> |
084a2a4e | 45 | #include <xen/hvc-console.h> |
211063dc | 46 | #include <xen/acpi.h> |
5ead97c8 JF |
47 | |
48 | #include <asm/paravirt.h> | |
7b6aa335 | 49 | #include <asm/apic.h> |
5ead97c8 | 50 | #include <asm/page.h> |
b5401a96 | 51 | #include <asm/xen/pci.h> |
5ead97c8 JF |
52 | #include <asm/xen/hypercall.h> |
53 | #include <asm/xen/hypervisor.h> | |
54 | #include <asm/fixmap.h> | |
55 | #include <asm/processor.h> | |
707ebbc8 | 56 | #include <asm/proto.h> |
1153968a | 57 | #include <asm/msr-index.h> |
6cac5a92 | 58 | #include <asm/traps.h> |
5ead97c8 JF |
59 | #include <asm/setup.h> |
60 | #include <asm/desc.h> | |
817a824b | 61 | #include <asm/pgalloc.h> |
5ead97c8 | 62 | #include <asm/pgtable.h> |
f87e4cac | 63 | #include <asm/tlbflush.h> |
fefa629a | 64 | #include <asm/reboot.h> |
577eebea | 65 | #include <asm/stackprotector.h> |
bee6ab53 | 66 | #include <asm/hypervisor.h> |
73c154c6 | 67 | #include <asm/mwait.h> |
76a8df7b | 68 | #include <asm/pci_x86.h> |
73c154c6 KRW |
69 | |
70 | #ifdef CONFIG_ACPI | |
71 | #include <linux/acpi.h> | |
72 | #include <asm/acpi.h> | |
73 | #include <acpi/pdc_intel.h> | |
74 | #include <acpi/processor.h> | |
75 | #include <xen/interface/platform.h> | |
76 | #endif | |
5ead97c8 JF |
77 | |
78 | #include "xen-ops.h" | |
3b827c1b | 79 | #include "mmu.h" |
f447d56d | 80 | #include "smp.h" |
5ead97c8 JF |
81 | #include "multicalls.h" |
82 | ||
83 | EXPORT_SYMBOL_GPL(hypercall_page); | |
84 | ||
5ead97c8 JF |
85 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
86 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 87 | |
6e833587 JF |
88 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
89 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
90 | ||
7e77506a IC |
91 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
92 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
93 | unsigned long machine_to_phys_nr; |
94 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 95 | |
5ead97c8 JF |
96 | struct start_info *xen_start_info; |
97 | EXPORT_SYMBOL_GPL(xen_start_info); | |
98 | ||
a0d695c8 | 99 | struct shared_info xen_dummy_shared_info; |
60223a32 | 100 | |
38341432 JF |
101 | void *xen_initial_gdt; |
102 | ||
bee6ab53 | 103 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
104 | __read_mostly int xen_have_vector_callback; |
105 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 106 | |
60223a32 JF |
107 | /* |
108 | * Point at some empty memory to start with. We map the real shared_info | |
109 | * page as soon as fixmap is up and running. | |
110 | */ | |
a0d695c8 | 111 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
112 | |
113 | /* | |
114 | * Flag to determine whether vcpu info placement is available on all | |
115 | * VCPUs. We assume it is to start with, and then set it to zero on | |
116 | * the first failure. This is because it can succeed on some VCPUs | |
117 | * and not others, since it can involve hypervisor memory allocation, | |
118 | * or because the guest failed to guarantee all the appropriate | |
119 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
120 | * | |
121 | * Note that any particular CPU may be using a placed vcpu structure, | |
122 | * but we can only optimise if the all are. | |
123 | * | |
124 | * 0: not available, 1: available | |
125 | */ | |
e4d04071 | 126 | static int have_vcpu_info_placement = 1; |
60223a32 | 127 | |
c06ee78d MR |
128 | static void clamp_max_cpus(void) |
129 | { | |
130 | #ifdef CONFIG_SMP | |
131 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
132 | setup_max_cpus = MAX_VIRT_CPUS; | |
133 | #endif | |
134 | } | |
135 | ||
9c7a7942 | 136 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 137 | { |
60223a32 JF |
138 | struct vcpu_register_vcpu_info info; |
139 | int err; | |
140 | struct vcpu_info *vcpup; | |
141 | ||
a0d695c8 | 142 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 143 | |
c06ee78d MR |
144 | if (cpu < MAX_VIRT_CPUS) |
145 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 146 | |
c06ee78d MR |
147 | if (!have_vcpu_info_placement) { |
148 | if (cpu >= MAX_VIRT_CPUS) | |
149 | clamp_max_cpus(); | |
150 | return; | |
151 | } | |
60223a32 | 152 | |
c06ee78d | 153 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 154 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
155 | info.offset = offset_in_page(vcpup); |
156 | ||
60223a32 JF |
157 | /* Check to see if the hypervisor will put the vcpu_info |
158 | structure where we want it, which allows direct access via | |
159 | a percpu-variable. */ | |
160 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
161 | ||
162 | if (err) { | |
163 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
164 | have_vcpu_info_placement = 0; | |
c06ee78d | 165 | clamp_max_cpus(); |
60223a32 JF |
166 | } else { |
167 | /* This cpu is using the registered vcpu info, even if | |
168 | later ones fail to. */ | |
169 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 170 | } |
5ead97c8 JF |
171 | } |
172 | ||
9c7a7942 JF |
173 | /* |
174 | * On restore, set the vcpu placement up again. | |
175 | * If it fails, then we're in a bad state, since | |
176 | * we can't back out from using it... | |
177 | */ | |
178 | void xen_vcpu_restore(void) | |
179 | { | |
3905bb2a | 180 | int cpu; |
9c7a7942 | 181 | |
3905bb2a JF |
182 | for_each_online_cpu(cpu) { |
183 | bool other_cpu = (cpu != smp_processor_id()); | |
9c7a7942 | 184 | |
3905bb2a JF |
185 | if (other_cpu && |
186 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
187 | BUG(); | |
9c7a7942 | 188 | |
3905bb2a | 189 | xen_setup_runstate_info(cpu); |
9c7a7942 | 190 | |
3905bb2a | 191 | if (have_vcpu_info_placement) |
9c7a7942 | 192 | xen_vcpu_setup(cpu); |
9c7a7942 | 193 | |
3905bb2a JF |
194 | if (other_cpu && |
195 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
196 | BUG(); | |
9c7a7942 JF |
197 | } |
198 | } | |
199 | ||
5ead97c8 JF |
200 | static void __init xen_banner(void) |
201 | { | |
95c7c23b JF |
202 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
203 | struct xen_extraversion extra; | |
204 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
205 | ||
5ead97c8 | 206 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 207 | pv_info.name); |
95c7c23b JF |
208 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
209 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 210 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
211 | } |
212 | ||
5e626254 AP |
213 | #define CPUID_THERM_POWER_LEAF 6 |
214 | #define APERFMPERF_PRESENT 0 | |
215 | ||
e826fe1b JF |
216 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
217 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
218 | ||
73c154c6 KRW |
219 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
220 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
221 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
222 | ||
65ea5b03 PA |
223 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
224 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 225 | { |
82d64699 | 226 | unsigned maskebx = ~0; |
e826fe1b | 227 | unsigned maskecx = ~0; |
5ead97c8 | 228 | unsigned maskedx = ~0; |
73c154c6 | 229 | unsigned setecx = 0; |
5ead97c8 JF |
230 | /* |
231 | * Mask out inconvenient features, to try and disable as many | |
232 | * unsupported kernel subsystems as possible. | |
233 | */ | |
82d64699 JF |
234 | switch (*ax) { |
235 | case 1: | |
e826fe1b | 236 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 237 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 238 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
239 | break; |
240 | ||
73c154c6 KRW |
241 | case CPUID_MWAIT_LEAF: |
242 | /* Synthesize the values.. */ | |
243 | *ax = 0; | |
244 | *bx = 0; | |
245 | *cx = cpuid_leaf5_ecx_val; | |
246 | *dx = cpuid_leaf5_edx_val; | |
247 | return; | |
248 | ||
5e626254 AP |
249 | case CPUID_THERM_POWER_LEAF: |
250 | /* Disabling APERFMPERF for kernel usage */ | |
251 | maskecx = ~(1 << APERFMPERF_PRESENT); | |
252 | break; | |
253 | ||
82d64699 JF |
254 | case 0xb: |
255 | /* Suppress extended topology stuff */ | |
256 | maskebx = 0; | |
257 | break; | |
e826fe1b | 258 | } |
5ead97c8 JF |
259 | |
260 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
261 | : "=a" (*ax), |
262 | "=b" (*bx), | |
263 | "=c" (*cx), | |
264 | "=d" (*dx) | |
265 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 266 | |
82d64699 | 267 | *bx &= maskebx; |
e826fe1b | 268 | *cx &= maskecx; |
73c154c6 | 269 | *cx |= setecx; |
65ea5b03 | 270 | *dx &= maskedx; |
73c154c6 | 271 | |
5ead97c8 JF |
272 | } |
273 | ||
73c154c6 KRW |
274 | static bool __init xen_check_mwait(void) |
275 | { | |
df88b2d9 KRW |
276 | #if defined(CONFIG_ACPI) && !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) && \ |
277 | !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE) | |
73c154c6 KRW |
278 | struct xen_platform_op op = { |
279 | .cmd = XENPF_set_processor_pminfo, | |
280 | .u.set_pminfo.id = -1, | |
281 | .u.set_pminfo.type = XEN_PM_PDC, | |
282 | }; | |
283 | uint32_t buf[3]; | |
284 | unsigned int ax, bx, cx, dx; | |
285 | unsigned int mwait_mask; | |
286 | ||
287 | /* We need to determine whether it is OK to expose the MWAIT | |
288 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
289 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
290 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
291 | * checks against). The hypervisor won't expose the MWAIT flag because | |
292 | * it would break backwards compatibility; so we will find out directly | |
293 | * from the hardware and hypercall. | |
294 | */ | |
295 | if (!xen_initial_domain()) | |
296 | return false; | |
297 | ||
298 | ax = 1; | |
299 | cx = 0; | |
300 | ||
301 | native_cpuid(&ax, &bx, &cx, &dx); | |
302 | ||
303 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
304 | (1 << (X86_FEATURE_MWAIT % 32)); | |
305 | ||
306 | if ((cx & mwait_mask) != mwait_mask) | |
307 | return false; | |
308 | ||
309 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
310 | * ecx and edx. The hypercall provides only partial information. | |
311 | */ | |
312 | ||
313 | ax = CPUID_MWAIT_LEAF; | |
314 | bx = 0; | |
315 | cx = 0; | |
316 | dx = 0; | |
317 | ||
318 | native_cpuid(&ax, &bx, &cx, &dx); | |
319 | ||
320 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
321 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
322 | */ | |
323 | buf[0] = ACPI_PDC_REVISION_ID; | |
324 | buf[1] = 1; | |
325 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
326 | ||
327 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
328 | ||
329 | if ((HYPERVISOR_dom0_op(&op) == 0) && | |
330 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
331 | cpuid_leaf5_ecx_val = cx; | |
332 | cpuid_leaf5_edx_val = dx; | |
333 | } | |
334 | return true; | |
335 | #else | |
336 | return false; | |
337 | #endif | |
338 | } | |
ad3062a0 | 339 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
340 | { |
341 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 342 | unsigned int xsave_mask; |
e826fe1b JF |
343 | |
344 | cpuid_leaf1_edx_mask = | |
cef12ee5 | 345 | ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
346 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
347 | ||
348 | if (!xen_initial_domain()) | |
349 | cpuid_leaf1_edx_mask &= | |
350 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
351 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
947ccf9c | 352 | ax = 1; |
5e287830 | 353 | cx = 0; |
947ccf9c | 354 | xen_cpuid(&ax, &bx, &cx, &dx); |
e826fe1b | 355 | |
947ccf9c SH |
356 | xsave_mask = |
357 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
358 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
359 | ||
360 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
361 | if ((cx & xsave_mask) != xsave_mask) | |
362 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
363 | if (xen_check_mwait()) |
364 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
365 | } |
366 | ||
5ead97c8 JF |
367 | static void xen_set_debugreg(int reg, unsigned long val) |
368 | { | |
369 | HYPERVISOR_set_debugreg(reg, val); | |
370 | } | |
371 | ||
372 | static unsigned long xen_get_debugreg(int reg) | |
373 | { | |
374 | return HYPERVISOR_get_debugreg(reg); | |
375 | } | |
376 | ||
224101ed | 377 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 378 | { |
5ead97c8 | 379 | xen_mc_flush(); |
224101ed | 380 | paravirt_end_context_switch(next); |
5ead97c8 JF |
381 | } |
382 | ||
383 | static unsigned long xen_store_tr(void) | |
384 | { | |
385 | return 0; | |
386 | } | |
387 | ||
a05d2eba | 388 | /* |
cef43bf6 JF |
389 | * Set the page permissions for a particular virtual address. If the |
390 | * address is a vmalloc mapping (or other non-linear mapping), then | |
391 | * find the linear mapping of the page and also set its protections to | |
392 | * match. | |
a05d2eba JF |
393 | */ |
394 | static void set_aliased_prot(void *v, pgprot_t prot) | |
395 | { | |
396 | int level; | |
397 | pte_t *ptep; | |
398 | pte_t pte; | |
399 | unsigned long pfn; | |
400 | struct page *page; | |
401 | ||
402 | ptep = lookup_address((unsigned long)v, &level); | |
403 | BUG_ON(ptep == NULL); | |
404 | ||
405 | pfn = pte_pfn(*ptep); | |
406 | page = pfn_to_page(pfn); | |
407 | ||
408 | pte = pfn_pte(pfn, prot); | |
409 | ||
410 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
411 | BUG(); | |
412 | ||
413 | if (!PageHighMem(page)) { | |
414 | void *av = __va(PFN_PHYS(pfn)); | |
415 | ||
416 | if (av != v) | |
417 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
418 | BUG(); | |
419 | } else | |
420 | kmap_flush_unused(); | |
421 | } | |
422 | ||
38ffbe66 JF |
423 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
424 | { | |
a05d2eba | 425 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
426 | int i; |
427 | ||
a05d2eba JF |
428 | for(i = 0; i < entries; i += entries_per_page) |
429 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
430 | } |
431 | ||
432 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
433 | { | |
a05d2eba | 434 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
435 | int i; |
436 | ||
a05d2eba JF |
437 | for(i = 0; i < entries; i += entries_per_page) |
438 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
439 | } |
440 | ||
5ead97c8 JF |
441 | static void xen_set_ldt(const void *addr, unsigned entries) |
442 | { | |
5ead97c8 JF |
443 | struct mmuext_op *op; |
444 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
445 | ||
ab78f7ad JF |
446 | trace_xen_cpu_set_ldt(addr, entries); |
447 | ||
5ead97c8 JF |
448 | op = mcs.args; |
449 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 450 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
451 | op->arg2.nr_ents = entries; |
452 | ||
453 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
454 | ||
455 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
456 | } | |
457 | ||
6b68f01b | 458 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 459 | { |
5ead97c8 JF |
460 | unsigned long va = dtr->address; |
461 | unsigned int size = dtr->size + 1; | |
462 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 463 | unsigned long frames[pages]; |
5ead97c8 | 464 | int f; |
5ead97c8 | 465 | |
577eebea JF |
466 | /* |
467 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
468 | * 8-byte entries, or 16 4k pages.. | |
469 | */ | |
5ead97c8 JF |
470 | |
471 | BUG_ON(size > 65536); | |
472 | BUG_ON(va & ~PAGE_MASK); | |
473 | ||
5ead97c8 | 474 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 475 | int level; |
577eebea | 476 | pte_t *ptep; |
6ed6bf42 JF |
477 | unsigned long pfn, mfn; |
478 | void *virt; | |
479 | ||
577eebea JF |
480 | /* |
481 | * The GDT is per-cpu and is in the percpu data area. | |
482 | * That can be virtually mapped, so we need to do a | |
483 | * page-walk to get the underlying MFN for the | |
484 | * hypercall. The page can also be in the kernel's | |
485 | * linear range, so we need to RO that mapping too. | |
486 | */ | |
487 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
488 | BUG_ON(ptep == NULL); |
489 | ||
490 | pfn = pte_pfn(*ptep); | |
491 | mfn = pfn_to_mfn(pfn); | |
492 | virt = __va(PFN_PHYS(pfn)); | |
493 | ||
494 | frames[f] = mfn; | |
9976b39b | 495 | |
5ead97c8 | 496 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 497 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
498 | } |
499 | ||
3ce5fa7e JF |
500 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
501 | BUG(); | |
5ead97c8 JF |
502 | } |
503 | ||
577eebea JF |
504 | /* |
505 | * load_gdt for early boot, when the gdt is only mapped once | |
506 | */ | |
ad3062a0 | 507 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
508 | { |
509 | unsigned long va = dtr->address; | |
510 | unsigned int size = dtr->size + 1; | |
511 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
512 | unsigned long frames[pages]; | |
513 | int f; | |
514 | ||
515 | /* | |
516 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
517 | * 8-byte entries, or 16 4k pages.. | |
518 | */ | |
519 | ||
520 | BUG_ON(size > 65536); | |
521 | BUG_ON(va & ~PAGE_MASK); | |
522 | ||
523 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
524 | pte_t pte; | |
525 | unsigned long pfn, mfn; | |
526 | ||
527 | pfn = virt_to_pfn(va); | |
528 | mfn = pfn_to_mfn(pfn); | |
529 | ||
530 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
531 | ||
532 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
533 | BUG(); | |
534 | ||
535 | frames[f] = mfn; | |
536 | } | |
537 | ||
538 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
539 | BUG(); | |
540 | } | |
541 | ||
59290362 DV |
542 | static inline bool desc_equal(const struct desc_struct *d1, |
543 | const struct desc_struct *d2) | |
544 | { | |
545 | return d1->a == d2->a && d1->b == d2->b; | |
546 | } | |
547 | ||
5ead97c8 JF |
548 | static void load_TLS_descriptor(struct thread_struct *t, |
549 | unsigned int cpu, unsigned int i) | |
550 | { | |
551 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 552 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
553 | struct multicall_space mc = __xen_mc_entry(0); |
554 | ||
555 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
556 | } | |
557 | ||
558 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
559 | { | |
8b84ad94 | 560 | /* |
ccbeed3a TH |
561 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
562 | * and lazy gs handling is enabled, it means we're in a | |
563 | * context switch, and %gs has just been saved. This means we | |
564 | * can zero it out to prevent faults on exit from the | |
565 | * hypervisor if the next process has no %gs. Either way, it | |
566 | * has been saved, and the new value will get loaded properly. | |
567 | * This will go away as soon as Xen has been modified to not | |
568 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
569 | * |
570 | * On x86_64, this hack is not used for %gs, because gs points | |
571 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
572 | * must not zero %gs on x86_64 | |
573 | * | |
574 | * For x86_64, we need to zero %fs, otherwise we may get an | |
575 | * exception between the new %fs descriptor being loaded and | |
576 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 577 | */ |
8a95408e EH |
578 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
579 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 580 | lazy_load_gs(0); |
8a95408e EH |
581 | #else |
582 | loadsegment(fs, 0); | |
583 | #endif | |
584 | } | |
585 | ||
586 | xen_mc_batch(); | |
587 | ||
588 | load_TLS_descriptor(t, cpu, 0); | |
589 | load_TLS_descriptor(t, cpu, 1); | |
590 | load_TLS_descriptor(t, cpu, 2); | |
591 | ||
592 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
593 | } |
594 | ||
a8fc1089 EH |
595 | #ifdef CONFIG_X86_64 |
596 | static void xen_load_gs_index(unsigned int idx) | |
597 | { | |
598 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
599 | BUG(); | |
5ead97c8 | 600 | } |
a8fc1089 | 601 | #endif |
5ead97c8 JF |
602 | |
603 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 604 | const void *ptr) |
5ead97c8 | 605 | { |
cef43bf6 | 606 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 607 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 608 | |
ab78f7ad JF |
609 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
610 | ||
f120f13e JF |
611 | preempt_disable(); |
612 | ||
5ead97c8 JF |
613 | xen_mc_flush(); |
614 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
615 | BUG(); | |
f120f13e JF |
616 | |
617 | preempt_enable(); | |
5ead97c8 JF |
618 | } |
619 | ||
e176d367 | 620 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
621 | struct trap_info *info) |
622 | { | |
6cac5a92 JF |
623 | unsigned long addr; |
624 | ||
6d02c426 | 625 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
626 | return 0; |
627 | ||
628 | info->vector = vector; | |
6cac5a92 JF |
629 | |
630 | addr = gate_offset(*val); | |
631 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
632 | /* |
633 | * Look for known traps using IST, and substitute them | |
634 | * appropriately. The debugger ones are the only ones we care | |
05e36006 LJ |
635 | * about. Xen will handle faults like double_fault, |
636 | * so we should never see them. Warn if | |
b80119bb JF |
637 | * there's an unexpected IST-using fault handler. |
638 | */ | |
6cac5a92 JF |
639 | if (addr == (unsigned long)debug) |
640 | addr = (unsigned long)xen_debug; | |
641 | else if (addr == (unsigned long)int3) | |
642 | addr = (unsigned long)xen_int3; | |
643 | else if (addr == (unsigned long)stack_segment) | |
644 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
645 | else if (addr == (unsigned long)double_fault || |
646 | addr == (unsigned long)nmi) { | |
647 | /* Don't need to handle these */ | |
648 | return 0; | |
649 | #ifdef CONFIG_X86_MCE | |
650 | } else if (addr == (unsigned long)machine_check) { | |
05e36006 LJ |
651 | /* |
652 | * when xen hypervisor inject vMCE to guest, | |
653 | * use native mce handler to handle it | |
654 | */ | |
655 | ; | |
b80119bb JF |
656 | #endif |
657 | } else { | |
658 | /* Some other trap using IST? */ | |
659 | if (WARN_ON(val->ist != 0)) | |
660 | return 0; | |
661 | } | |
6cac5a92 JF |
662 | #endif /* CONFIG_X86_64 */ |
663 | info->address = addr; | |
664 | ||
e176d367 EH |
665 | info->cs = gate_segment(*val); |
666 | info->flags = val->dpl; | |
5ead97c8 | 667 | /* interrupt gates clear IF */ |
6d02c426 JF |
668 | if (val->type == GATE_INTERRUPT) |
669 | info->flags |= 1 << 2; | |
5ead97c8 JF |
670 | |
671 | return 1; | |
672 | } | |
673 | ||
674 | /* Locations of each CPU's IDT */ | |
6b68f01b | 675 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
676 | |
677 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
678 | also update Xen. */ | |
8d947344 | 679 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 680 | { |
5ead97c8 | 681 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
682 | unsigned long start, end; |
683 | ||
ab78f7ad JF |
684 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
685 | ||
f120f13e JF |
686 | preempt_disable(); |
687 | ||
780f36d8 CL |
688 | start = __this_cpu_read(idt_desc.address); |
689 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
690 | |
691 | xen_mc_flush(); | |
692 | ||
8d947344 | 693 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
694 | |
695 | if (p >= start && (p + 8) <= end) { | |
696 | struct trap_info info[2]; | |
697 | ||
698 | info[1].address = 0; | |
699 | ||
e176d367 | 700 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
701 | if (HYPERVISOR_set_trap_table(info)) |
702 | BUG(); | |
703 | } | |
f120f13e JF |
704 | |
705 | preempt_enable(); | |
5ead97c8 JF |
706 | } |
707 | ||
6b68f01b | 708 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 709 | struct trap_info *traps) |
5ead97c8 | 710 | { |
5ead97c8 JF |
711 | unsigned in, out, count; |
712 | ||
e176d367 | 713 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
714 | BUG_ON(count > 256); |
715 | ||
5ead97c8 | 716 | for (in = out = 0; in < count; in++) { |
e176d367 | 717 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 718 | |
e176d367 | 719 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
720 | out++; |
721 | } | |
722 | traps[out].address = 0; | |
f87e4cac JF |
723 | } |
724 | ||
725 | void xen_copy_trap_info(struct trap_info *traps) | |
726 | { | |
6b68f01b | 727 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
728 | |
729 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
730 | } |
731 | ||
732 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
733 | hold a spinlock to protect the static traps[] array (static because | |
734 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 735 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
736 | { |
737 | static DEFINE_SPINLOCK(lock); | |
738 | static struct trap_info traps[257]; | |
f87e4cac | 739 | |
ab78f7ad JF |
740 | trace_xen_cpu_load_idt(desc); |
741 | ||
f87e4cac JF |
742 | spin_lock(&lock); |
743 | ||
f120f13e JF |
744 | __get_cpu_var(idt_desc) = *desc; |
745 | ||
f87e4cac | 746 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
747 | |
748 | xen_mc_flush(); | |
749 | if (HYPERVISOR_set_trap_table(traps)) | |
750 | BUG(); | |
751 | ||
752 | spin_unlock(&lock); | |
753 | } | |
754 | ||
755 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
756 | they're handled differently. */ | |
757 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 758 | const void *desc, int type) |
5ead97c8 | 759 | { |
ab78f7ad JF |
760 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
761 | ||
f120f13e JF |
762 | preempt_disable(); |
763 | ||
014b15be GOC |
764 | switch (type) { |
765 | case DESC_LDT: | |
766 | case DESC_TSS: | |
5ead97c8 JF |
767 | /* ignore */ |
768 | break; | |
769 | ||
770 | default: { | |
9976b39b | 771 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
772 | |
773 | xen_mc_flush(); | |
014b15be | 774 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
775 | BUG(); |
776 | } | |
777 | ||
778 | } | |
f120f13e JF |
779 | |
780 | preempt_enable(); | |
5ead97c8 JF |
781 | } |
782 | ||
577eebea JF |
783 | /* |
784 | * Version of write_gdt_entry for use at early boot-time needed to | |
785 | * update an entry as simply as possible. | |
786 | */ | |
ad3062a0 | 787 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
788 | const void *desc, int type) |
789 | { | |
ab78f7ad JF |
790 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
791 | ||
577eebea JF |
792 | switch (type) { |
793 | case DESC_LDT: | |
794 | case DESC_TSS: | |
795 | /* ignore */ | |
796 | break; | |
797 | ||
798 | default: { | |
799 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
800 | ||
801 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
802 | dt[entry] = *(struct desc_struct *)desc; | |
803 | } | |
804 | ||
805 | } | |
806 | } | |
807 | ||
faca6227 | 808 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 809 | struct thread_struct *thread) |
5ead97c8 | 810 | { |
ab78f7ad JF |
811 | struct multicall_space mcs; |
812 | ||
813 | mcs = xen_mc_entry(0); | |
faca6227 | 814 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
815 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
816 | } | |
817 | ||
818 | static void xen_set_iopl_mask(unsigned mask) | |
819 | { | |
820 | struct physdev_set_iopl set_iopl; | |
821 | ||
822 | /* Force the change at ring 0. */ | |
823 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
824 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
825 | } | |
826 | ||
827 | static void xen_io_delay(void) | |
828 | { | |
829 | } | |
830 | ||
831 | #ifdef CONFIG_X86_LOCAL_APIC | |
558daa28 KRW |
832 | static unsigned long xen_set_apic_id(unsigned int x) |
833 | { | |
834 | WARN_ON(1); | |
835 | return x; | |
836 | } | |
837 | static unsigned int xen_get_apic_id(unsigned long x) | |
838 | { | |
839 | return ((x)>>24) & 0xFFu; | |
840 | } | |
ad66dd34 | 841 | static u32 xen_apic_read(u32 reg) |
5ead97c8 | 842 | { |
558daa28 KRW |
843 | struct xen_platform_op op = { |
844 | .cmd = XENPF_get_cpuinfo, | |
845 | .interface_version = XENPF_INTERFACE_VERSION, | |
846 | .u.pcpu_info.xen_cpuid = 0, | |
847 | }; | |
848 | int ret = 0; | |
849 | ||
850 | /* Shouldn't need this as APIC is turned off for PV, and we only | |
851 | * get called on the bootup processor. But just in case. */ | |
852 | if (!xen_initial_domain() || smp_processor_id()) | |
853 | return 0; | |
854 | ||
855 | if (reg == APIC_LVR) | |
856 | return 0x10; | |
857 | ||
858 | if (reg != APIC_ID) | |
859 | return 0; | |
860 | ||
861 | ret = HYPERVISOR_dom0_op(&op); | |
862 | if (ret) | |
863 | return 0; | |
864 | ||
865 | return op.u.pcpu_info.apic_id << 24; | |
5ead97c8 | 866 | } |
f87e4cac | 867 | |
ad66dd34 | 868 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
869 | { |
870 | /* Warn to see if there's any stray references */ | |
871 | WARN_ON(1); | |
872 | } | |
ad66dd34 | 873 | |
ad66dd34 SS |
874 | static u64 xen_apic_icr_read(void) |
875 | { | |
876 | return 0; | |
877 | } | |
878 | ||
879 | static void xen_apic_icr_write(u32 low, u32 id) | |
880 | { | |
881 | /* Warn to see if there's any stray references */ | |
882 | WARN_ON(1); | |
883 | } | |
884 | ||
885 | static void xen_apic_wait_icr_idle(void) | |
886 | { | |
887 | return; | |
888 | } | |
889 | ||
94a8c3c2 YL |
890 | static u32 xen_safe_apic_wait_icr_idle(void) |
891 | { | |
892 | return 0; | |
893 | } | |
894 | ||
c1eeb2de YL |
895 | static void set_xen_basic_apic_ops(void) |
896 | { | |
897 | apic->read = xen_apic_read; | |
898 | apic->write = xen_apic_write; | |
899 | apic->icr_read = xen_apic_icr_read; | |
900 | apic->icr_write = xen_apic_icr_write; | |
901 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
902 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
558daa28 KRW |
903 | apic->set_apic_id = xen_set_apic_id; |
904 | apic->get_apic_id = xen_get_apic_id; | |
f447d56d BG |
905 | |
906 | #ifdef CONFIG_SMP | |
907 | apic->send_IPI_allbutself = xen_send_IPI_allbutself; | |
908 | apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself; | |
909 | apic->send_IPI_mask = xen_send_IPI_mask; | |
910 | apic->send_IPI_all = xen_send_IPI_all; | |
911 | apic->send_IPI_self = xen_send_IPI_self; | |
912 | #endif | |
c1eeb2de | 913 | } |
ad66dd34 | 914 | |
5ead97c8 JF |
915 | #endif |
916 | ||
7b1333aa JF |
917 | static void xen_clts(void) |
918 | { | |
919 | struct multicall_space mcs; | |
920 | ||
921 | mcs = xen_mc_entry(0); | |
922 | ||
923 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
924 | ||
925 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
926 | } | |
927 | ||
a789ed5f JF |
928 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
929 | ||
930 | static unsigned long xen_read_cr0(void) | |
931 | { | |
2113f469 | 932 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
933 | |
934 | if (unlikely(cr0 == 0)) { | |
935 | cr0 = native_read_cr0(); | |
2113f469 | 936 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
937 | } |
938 | ||
939 | return cr0; | |
940 | } | |
941 | ||
7b1333aa JF |
942 | static void xen_write_cr0(unsigned long cr0) |
943 | { | |
944 | struct multicall_space mcs; | |
945 | ||
2113f469 | 946 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 947 | |
7b1333aa JF |
948 | /* Only pay attention to cr0.TS; everything else is |
949 | ignored. */ | |
950 | mcs = xen_mc_entry(0); | |
951 | ||
952 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
953 | ||
954 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
955 | } | |
956 | ||
5ead97c8 JF |
957 | static void xen_write_cr4(unsigned long cr4) |
958 | { | |
2956a351 JF |
959 | cr4 &= ~X86_CR4_PGE; |
960 | cr4 &= ~X86_CR4_PSE; | |
961 | ||
962 | native_write_cr4(cr4); | |
5ead97c8 JF |
963 | } |
964 | ||
1153968a JF |
965 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
966 | { | |
967 | int ret; | |
968 | ||
969 | ret = 0; | |
970 | ||
f63c2f24 | 971 | switch (msr) { |
1153968a JF |
972 | #ifdef CONFIG_X86_64 |
973 | unsigned which; | |
974 | u64 base; | |
975 | ||
976 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
977 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
978 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
979 | ||
980 | set: | |
981 | base = ((u64)high << 32) | low; | |
982 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 983 | ret = -EIO; |
1153968a JF |
984 | break; |
985 | #endif | |
d89961e2 JF |
986 | |
987 | case MSR_STAR: | |
988 | case MSR_CSTAR: | |
989 | case MSR_LSTAR: | |
990 | case MSR_SYSCALL_MASK: | |
991 | case MSR_IA32_SYSENTER_CS: | |
992 | case MSR_IA32_SYSENTER_ESP: | |
993 | case MSR_IA32_SYSENTER_EIP: | |
994 | /* Fast syscall setup is all done in hypercalls, so | |
995 | these are all ignored. Stub them out here to stop | |
996 | Xen console noise. */ | |
997 | break; | |
998 | ||
41f2e477 JF |
999 | case MSR_IA32_CR_PAT: |
1000 | if (smp_processor_id() == 0) | |
1001 | xen_set_pat(((u64)high << 32) | low); | |
1002 | break; | |
1003 | ||
1153968a JF |
1004 | default: |
1005 | ret = native_write_msr_safe(msr, low, high); | |
1006 | } | |
1007 | ||
1008 | return ret; | |
1009 | } | |
1010 | ||
0e91398f | 1011 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1012 | { |
1013 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1014 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1015 | xen_start_info->shared_info); | |
1016 | ||
1017 | HYPERVISOR_shared_info = | |
1018 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1019 | } else |
1020 | HYPERVISOR_shared_info = | |
1021 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1022 | ||
2e8fe719 JF |
1023 | #ifndef CONFIG_SMP |
1024 | /* In UP this is as good a place as any to set up shared info */ | |
1025 | xen_setup_vcpu_info_placement(); | |
1026 | #endif | |
d5edbc1f JF |
1027 | |
1028 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1029 | } |
1030 | ||
5f054e31 | 1031 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1032 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1033 | { |
1034 | int cpu; | |
1035 | ||
1036 | for_each_possible_cpu(cpu) | |
1037 | xen_vcpu_setup(cpu); | |
1038 | ||
1039 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1040 | percpu area for all cpus, so make use of it */ | |
1041 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
1042 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1043 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1044 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1045 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1046 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1047 | } |
5ead97c8 JF |
1048 | } |
1049 | ||
ab144f5e AK |
1050 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1051 | unsigned long addr, unsigned len) | |
6487673b JF |
1052 | { |
1053 | char *start, *end, *reloc; | |
1054 | unsigned ret; | |
1055 | ||
1056 | start = end = reloc = NULL; | |
1057 | ||
93b1eab3 JF |
1058 | #define SITE(op, x) \ |
1059 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1060 | if (have_vcpu_info_placement) { \ |
1061 | start = (char *)xen_##x##_direct; \ | |
1062 | end = xen_##x##_direct_end; \ | |
1063 | reloc = xen_##x##_direct_reloc; \ | |
1064 | } \ | |
1065 | goto patch_site | |
1066 | ||
1067 | switch (type) { | |
93b1eab3 JF |
1068 | SITE(pv_irq_ops, irq_enable); |
1069 | SITE(pv_irq_ops, irq_disable); | |
1070 | SITE(pv_irq_ops, save_fl); | |
1071 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1072 | #undef SITE |
1073 | ||
1074 | patch_site: | |
1075 | if (start == NULL || (end-start) > len) | |
1076 | goto default_patch; | |
1077 | ||
ab144f5e | 1078 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1079 | |
1080 | /* Note: because reloc is assigned from something that | |
1081 | appears to be an array, gcc assumes it's non-null, | |
1082 | but doesn't know its relationship with start and | |
1083 | end. */ | |
1084 | if (reloc > start && reloc < end) { | |
1085 | int reloc_off = reloc - start; | |
ab144f5e AK |
1086 | long *relocp = (long *)(insnbuf + reloc_off); |
1087 | long delta = start - (char *)addr; | |
6487673b JF |
1088 | |
1089 | *relocp += delta; | |
1090 | } | |
1091 | break; | |
1092 | ||
1093 | default_patch: | |
1094 | default: | |
ab144f5e AK |
1095 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1096 | addr, len); | |
6487673b JF |
1097 | break; |
1098 | } | |
1099 | ||
1100 | return ret; | |
1101 | } | |
1102 | ||
ad3062a0 | 1103 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1104 | .paravirt_enabled = 1, |
1105 | .shared_kernel_pmd = 0, | |
1106 | ||
318f5a2a AL |
1107 | #ifdef CONFIG_X86_64 |
1108 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1109 | #endif | |
1110 | ||
5ead97c8 | 1111 | .name = "Xen", |
93b1eab3 | 1112 | }; |
5ead97c8 | 1113 | |
ad3062a0 | 1114 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1115 | .patch = xen_patch, |
93b1eab3 | 1116 | }; |
5ead97c8 | 1117 | |
ad3062a0 | 1118 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1119 | .cpuid = xen_cpuid, |
1120 | ||
1121 | .set_debugreg = xen_set_debugreg, | |
1122 | .get_debugreg = xen_get_debugreg, | |
1123 | ||
7b1333aa | 1124 | .clts = xen_clts, |
5ead97c8 | 1125 | |
a789ed5f | 1126 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1127 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1128 | |
5ead97c8 JF |
1129 | .read_cr4 = native_read_cr4, |
1130 | .read_cr4_safe = native_read_cr4_safe, | |
1131 | .write_cr4 = xen_write_cr4, | |
1132 | ||
5ead97c8 JF |
1133 | .wbinvd = native_wbinvd, |
1134 | ||
1135 | .read_msr = native_read_msr_safe, | |
1ab46fd3 | 1136 | .rdmsr_regs = native_rdmsr_safe_regs, |
1153968a | 1137 | .write_msr = xen_write_msr_safe, |
1ab46fd3 KRW |
1138 | .wrmsr_regs = native_wrmsr_safe_regs, |
1139 | ||
5ead97c8 JF |
1140 | .read_tsc = native_read_tsc, |
1141 | .read_pmc = native_read_pmc, | |
1142 | ||
81e103f1 | 1143 | .iret = xen_iret, |
d75cd22f | 1144 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1145 | #ifdef CONFIG_X86_64 |
1146 | .usergs_sysret32 = xen_sysret32, | |
1147 | .usergs_sysret64 = xen_sysret64, | |
1148 | #endif | |
5ead97c8 JF |
1149 | |
1150 | .load_tr_desc = paravirt_nop, | |
1151 | .set_ldt = xen_set_ldt, | |
1152 | .load_gdt = xen_load_gdt, | |
1153 | .load_idt = xen_load_idt, | |
1154 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1155 | #ifdef CONFIG_X86_64 |
1156 | .load_gs_index = xen_load_gs_index, | |
1157 | #endif | |
5ead97c8 | 1158 | |
38ffbe66 JF |
1159 | .alloc_ldt = xen_alloc_ldt, |
1160 | .free_ldt = xen_free_ldt, | |
1161 | ||
5ead97c8 JF |
1162 | .store_gdt = native_store_gdt, |
1163 | .store_idt = native_store_idt, | |
1164 | .store_tr = xen_store_tr, | |
1165 | ||
1166 | .write_ldt_entry = xen_write_ldt_entry, | |
1167 | .write_gdt_entry = xen_write_gdt_entry, | |
1168 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1169 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1170 | |
1171 | .set_iopl_mask = xen_set_iopl_mask, | |
1172 | .io_delay = xen_io_delay, | |
1173 | ||
952d1d70 JF |
1174 | /* Xen takes care of %gs when switching to usermode for us */ |
1175 | .swapgs = paravirt_nop, | |
1176 | ||
224101ed JF |
1177 | .start_context_switch = paravirt_start_context_switch, |
1178 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1179 | }; |
1180 | ||
ad3062a0 | 1181 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1182 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1183 | .startup_ipi_hook = paravirt_nop, |
1184 | #endif | |
93b1eab3 JF |
1185 | }; |
1186 | ||
fefa629a JF |
1187 | static void xen_reboot(int reason) |
1188 | { | |
349c709f JF |
1189 | struct sched_shutdown r = { .reason = reason }; |
1190 | ||
349c709f | 1191 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1192 | BUG(); |
1193 | } | |
1194 | ||
1195 | static void xen_restart(char *msg) | |
1196 | { | |
1197 | xen_reboot(SHUTDOWN_reboot); | |
1198 | } | |
1199 | ||
1200 | static void xen_emergency_restart(void) | |
1201 | { | |
1202 | xen_reboot(SHUTDOWN_reboot); | |
1203 | } | |
1204 | ||
1205 | static void xen_machine_halt(void) | |
1206 | { | |
1207 | xen_reboot(SHUTDOWN_poweroff); | |
1208 | } | |
1209 | ||
b2abe506 TG |
1210 | static void xen_machine_power_off(void) |
1211 | { | |
1212 | if (pm_power_off) | |
1213 | pm_power_off(); | |
1214 | xen_reboot(SHUTDOWN_poweroff); | |
1215 | } | |
1216 | ||
fefa629a JF |
1217 | static void xen_crash_shutdown(struct pt_regs *regs) |
1218 | { | |
1219 | xen_reboot(SHUTDOWN_crash); | |
1220 | } | |
1221 | ||
f09f6d19 DD |
1222 | static int |
1223 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1224 | { | |
086748e5 | 1225 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1226 | return NOTIFY_DONE; |
1227 | } | |
1228 | ||
1229 | static struct notifier_block xen_panic_block = { | |
1230 | .notifier_call= xen_panic_event, | |
1231 | }; | |
1232 | ||
1233 | int xen_panic_handler_init(void) | |
1234 | { | |
1235 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1236 | return 0; | |
1237 | } | |
1238 | ||
ad3062a0 | 1239 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1240 | .restart = xen_restart, |
1241 | .halt = xen_machine_halt, | |
b2abe506 | 1242 | .power_off = xen_machine_power_off, |
fefa629a JF |
1243 | .shutdown = xen_machine_halt, |
1244 | .crash_shutdown = xen_crash_shutdown, | |
1245 | .emergency_restart = xen_emergency_restart, | |
1246 | }; | |
1247 | ||
577eebea JF |
1248 | /* |
1249 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1250 | * we do this, we have to be careful not to call any stack-protected | |
1251 | * function, which is most of the kernel. | |
1252 | */ | |
1253 | static void __init xen_setup_stackprotector(void) | |
1254 | { | |
1255 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1256 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1257 | ||
1258 | setup_stack_canary_segment(0); | |
1259 | switch_to_new_gdt(0); | |
1260 | ||
1261 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1262 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1263 | } | |
1264 | ||
5ead97c8 JF |
1265 | /* First C function to be called on Xen boot */ |
1266 | asmlinkage void __init xen_start_kernel(void) | |
1267 | { | |
ec35a69c KRW |
1268 | struct physdev_set_iopl set_iopl; |
1269 | int rc; | |
5ead97c8 JF |
1270 | pgd_t *pgd; |
1271 | ||
1272 | if (!xen_start_info) | |
1273 | return; | |
1274 | ||
6e833587 JF |
1275 | xen_domain_type = XEN_PV_DOMAIN; |
1276 | ||
7e77506a IC |
1277 | xen_setup_machphys_mapping(); |
1278 | ||
5ead97c8 | 1279 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1280 | pv_info = xen_info; |
1281 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1282 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1283 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1284 | |
6b18ae3e | 1285 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1286 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1287 | x86_init.oem.banner = xen_banner; |
845b3944 | 1288 | |
409771d2 | 1289 | xen_init_time_ops(); |
93b1eab3 | 1290 | |
ce2eef33 | 1291 | /* |
577eebea | 1292 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1293 | */ |
577eebea | 1294 | |
973df35e JF |
1295 | xen_init_mmu_ops(); |
1296 | ||
577eebea JF |
1297 | /* Prevent unwanted bits from being set in PTEs. */ |
1298 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
8eaffa67 | 1299 | #if 0 |
577eebea | 1300 | if (!xen_initial_domain()) |
8eaffa67 | 1301 | #endif |
577eebea JF |
1302 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
1303 | ||
1304 | __supported_pte_mask |= _PAGE_IOMAP; | |
1305 | ||
817a824b IC |
1306 | /* |
1307 | * Prevent page tables from being allocated in highmem, even | |
1308 | * if CONFIG_HIGHPTE is enabled. | |
1309 | */ | |
1310 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1311 | ||
b75fe4e5 | 1312 | /* Work out if we support NX */ |
4763ed4d | 1313 | x86_configure_nx(); |
b75fe4e5 | 1314 | |
577eebea JF |
1315 | xen_setup_features(); |
1316 | ||
1317 | /* Get mfn list */ | |
1318 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1319 | xen_build_dynamic_phys_to_machine(); | |
1320 | ||
1321 | /* | |
1322 | * Set up kernel GDT and segment registers, mainly so that | |
1323 | * -fstack-protector code can be executed. | |
1324 | */ | |
1325 | xen_setup_stackprotector(); | |
0d1edf46 | 1326 | |
ce2eef33 | 1327 | xen_init_irq_ops(); |
e826fe1b JF |
1328 | xen_init_cpuid_mask(); |
1329 | ||
94a8c3c2 | 1330 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1331 | /* |
94a8c3c2 | 1332 | * set up the basic apic ops. |
ad66dd34 | 1333 | */ |
c1eeb2de | 1334 | set_xen_basic_apic_ops(); |
ad66dd34 | 1335 | #endif |
93b1eab3 | 1336 | |
e57778a1 JF |
1337 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1338 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1339 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1340 | } | |
1341 | ||
fefa629a JF |
1342 | machine_ops = xen_machine_ops; |
1343 | ||
38341432 JF |
1344 | /* |
1345 | * The only reliable way to retain the initial address of the | |
1346 | * percpu gdt_page is to remember it here, so we can go and | |
1347 | * mark it RW later, when the initial percpu area is freed. | |
1348 | */ | |
1349 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1350 | |
a9e7062d | 1351 | xen_smp_init(); |
5ead97c8 | 1352 | |
c1f5db1a IC |
1353 | #ifdef CONFIG_ACPI_NUMA |
1354 | /* | |
1355 | * The pages we from Xen are not related to machine pages, so | |
1356 | * any NUMA information the kernel tries to get from ACPI will | |
1357 | * be meaningless. Prevent it from trying. | |
1358 | */ | |
1359 | acpi_numa = -1; | |
1360 | #endif | |
1361 | ||
5ead97c8 JF |
1362 | pgd = (pgd_t *)xen_start_info->pt_base; |
1363 | ||
60223a32 | 1364 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1365 | possible map and a non-dummy shared_info. */ |
60223a32 | 1366 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1367 | |
55d80856 | 1368 | local_irq_disable(); |
2ce802f6 | 1369 | early_boot_irqs_disabled = true; |
55d80856 | 1370 | |
084a2a4e | 1371 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1372 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1373 | |
33a84750 JF |
1374 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1375 | xen_build_mfn_list_list(); | |
1376 | ||
5ead97c8 JF |
1377 | /* keep using Xen gdt for now; no urgent need to change it */ |
1378 | ||
e68266b7 | 1379 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1380 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1381 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1382 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1383 | #else |
1384 | pv_info.kernel_rpl = 0; | |
1385 | #endif | |
5ead97c8 | 1386 | /* set the limit of our address space */ |
fb1d8404 | 1387 | xen_reserve_top(); |
5ead97c8 | 1388 | |
ec35a69c KRW |
1389 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1390 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1391 | * which pokes 0xcf8 port. | |
1392 | */ | |
1393 | set_iopl.iopl = 1; | |
1394 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1395 | if (rc != 0) | |
1396 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1397 | ||
7d087b68 | 1398 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1399 | /* set up basic CPUID stuff */ |
1400 | cpu_detect(&new_cpu_data); | |
1401 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1402 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1403 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1404 | #endif |
5ead97c8 JF |
1405 | |
1406 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1407 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1408 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1409 | ? __pa(xen_start_info->mod_start) : 0; | |
1410 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1411 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1412 | |
6e833587 | 1413 | if (!xen_initial_domain()) { |
83abc70a | 1414 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1415 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1416 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1417 | if (pci_xen) |
1418 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1419 | } else { |
c2419b4a JF |
1420 | const struct dom0_vga_console_info *info = |
1421 | (void *)((char *)xen_start_info + | |
1422 | xen_start_info->console.dom0.info_off); | |
1423 | ||
1424 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1425 | xen_start_info->console.domU.mfn = 0; | |
1426 | xen_start_info->console.domU.evtchn = 0; | |
1427 | ||
31b3c9d7 KRW |
1428 | xen_init_apic(); |
1429 | ||
5d990b62 CW |
1430 | /* Make sure ACS will be enabled */ |
1431 | pci_request_acs(); | |
211063dc KRW |
1432 | |
1433 | xen_acpi_sleep_register(); | |
9e124fe1 | 1434 | } |
76a8df7b DV |
1435 | #ifdef CONFIG_PCI |
1436 | /* PCI BIOS service won't work from a PV guest. */ | |
1437 | pci_probe &= ~PCI_PROBE_BIOS; | |
1438 | #endif | |
084a2a4e JF |
1439 | xen_raw_console_write("about to get started...\n"); |
1440 | ||
499d19b8 JF |
1441 | xen_setup_runstate_info(0); |
1442 | ||
5ead97c8 | 1443 | /* Start the world */ |
f5d36de0 | 1444 | #ifdef CONFIG_X86_32 |
f0d43100 | 1445 | i386_start_kernel(); |
f5d36de0 | 1446 | #else |
084a2a4e | 1447 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1448 | #endif |
5ead97c8 | 1449 | } |
bee6ab53 | 1450 | |
bee6ab53 SY |
1451 | static int init_hvm_pv_info(int *major, int *minor) |
1452 | { | |
1453 | uint32_t eax, ebx, ecx, edx, pages, msr, base; | |
1454 | u64 pfn; | |
1455 | ||
1456 | base = xen_cpuid_base(); | |
1457 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); | |
1458 | ||
1459 | *major = eax >> 16; | |
1460 | *minor = eax & 0xffff; | |
1461 | printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor); | |
1462 | ||
1463 | cpuid(base + 2, &pages, &msr, &ecx, &edx); | |
1464 | ||
1465 | pfn = __pa(hypercall_page); | |
1466 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1467 | ||
1468 | xen_setup_features(); | |
1469 | ||
cff520b9 | 1470 | pv_info.name = "Xen HVM"; |
bee6ab53 SY |
1471 | |
1472 | xen_domain_type = XEN_HVM_DOMAIN; | |
1473 | ||
1474 | return 0; | |
1475 | } | |
1476 | ||
44b46c3e | 1477 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1478 | { |
016b6f5f | 1479 | int cpu; |
bee6ab53 | 1480 | struct xen_add_to_physmap xatp; |
016b6f5f | 1481 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1482 | |
016b6f5f SS |
1483 | if (!shared_info_page) |
1484 | shared_info_page = (struct shared_info *) | |
1485 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1486 | xatp.domid = DOMID_SELF; |
1487 | xatp.idx = 0; | |
1488 | xatp.space = XENMAPSPACE_shared_info; | |
1489 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; | |
1490 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) | |
1491 | BUG(); | |
1492 | ||
1493 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; | |
1494 | ||
016b6f5f SS |
1495 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1496 | * page, we use it in the event channel upcall and in some pvclock | |
1497 | * related functions. We don't need the vcpu_info placement | |
1498 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
1499 | * HVM. | |
1500 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1501 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1502 | * in that case multiple vcpus might be online. */ | |
1503 | for_each_online_cpu(cpu) { | |
1504 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
1505 | } | |
bee6ab53 SY |
1506 | } |
1507 | ||
ca65f9fc | 1508 | #ifdef CONFIG_XEN_PVHVM |
38e20b07 SY |
1509 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1510 | unsigned long action, void *hcpu) | |
1511 | { | |
1512 | int cpu = (long)hcpu; | |
1513 | switch (action) { | |
1514 | case CPU_UP_PREPARE: | |
90d4f553 | 1515 | xen_vcpu_setup(cpu); |
99bbb3a8 SS |
1516 | if (xen_have_vector_callback) |
1517 | xen_init_lock_cpu(cpu); | |
38e20b07 SY |
1518 | break; |
1519 | default: | |
1520 | break; | |
1521 | } | |
1522 | return NOTIFY_OK; | |
1523 | } | |
1524 | ||
ad3062a0 | 1525 | static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = { |
38e20b07 SY |
1526 | .notifier_call = xen_hvm_cpu_notify, |
1527 | }; | |
1528 | ||
bee6ab53 SY |
1529 | static void __init xen_hvm_guest_init(void) |
1530 | { | |
1531 | int r; | |
1532 | int major, minor; | |
1533 | ||
1534 | r = init_hvm_pv_info(&major, &minor); | |
1535 | if (r < 0) | |
1536 | return; | |
1537 | ||
016b6f5f | 1538 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1539 | |
1540 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1541 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1542 | xen_hvm_smp_init(); |
38e20b07 | 1543 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1544 | xen_unplug_emulated_devices(); |
38e20b07 | 1545 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1546 | xen_hvm_init_time_ops(); |
59151001 | 1547 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1548 | } |
1549 | ||
1550 | static bool __init xen_hvm_platform(void) | |
1551 | { | |
1552 | if (xen_pv_domain()) | |
1553 | return false; | |
1554 | ||
1555 | if (!xen_cpuid_base()) | |
1556 | return false; | |
1557 | ||
1558 | return true; | |
1559 | } | |
1560 | ||
d9b8ca84 SY |
1561 | bool xen_hvm_need_lapic(void) |
1562 | { | |
1563 | if (xen_pv_domain()) | |
1564 | return false; | |
1565 | if (!xen_hvm_domain()) | |
1566 | return false; | |
1567 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1568 | return false; | |
1569 | return true; | |
1570 | } | |
1571 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1572 | ||
ad3062a0 | 1573 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1574 | .name = "Xen HVM", |
1575 | .detect = xen_hvm_platform, | |
1576 | .init_platform = xen_hvm_guest_init, | |
1577 | }; | |
1578 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1579 | #endif |