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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 | 25 | #include <linux/bootmem.h> |
7a2463dc | 26 | #include <linux/export.h> |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
96f28bc6 | 34 | #include <linux/edd.h> |
983bb6d2 | 35 | #include <linux/frame.h> |
5ead97c8 | 36 | |
0b34a166 | 37 | #include <linux/kexec.h> |
0b34a166 | 38 | |
1ccbf534 | 39 | #include <xen/xen.h> |
0ec53ecf | 40 | #include <xen/events.h> |
5ead97c8 | 41 | #include <xen/interface/xen.h> |
ecbf29cd | 42 | #include <xen/interface/version.h> |
5ead97c8 JF |
43 | #include <xen/interface/physdev.h> |
44 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 45 | #include <xen/interface/memory.h> |
f221b04f | 46 | #include <xen/interface/nmi.h> |
cef12ee5 | 47 | #include <xen/interface/xen-mca.h> |
5ead97c8 JF |
48 | #include <xen/features.h> |
49 | #include <xen/page.h> | |
38e20b07 | 50 | #include <xen/hvm.h> |
084a2a4e | 51 | #include <xen/hvc-console.h> |
211063dc | 52 | #include <xen/acpi.h> |
5ead97c8 JF |
53 | |
54 | #include <asm/paravirt.h> | |
7b6aa335 | 55 | #include <asm/apic.h> |
5ead97c8 | 56 | #include <asm/page.h> |
b5401a96 | 57 | #include <asm/xen/pci.h> |
5ead97c8 JF |
58 | #include <asm/xen/hypercall.h> |
59 | #include <asm/xen/hypervisor.h> | |
88e957d6 | 60 | #include <asm/xen/cpuid.h> |
5ead97c8 JF |
61 | #include <asm/fixmap.h> |
62 | #include <asm/processor.h> | |
707ebbc8 | 63 | #include <asm/proto.h> |
1153968a | 64 | #include <asm/msr-index.h> |
6cac5a92 | 65 | #include <asm/traps.h> |
5ead97c8 JF |
66 | #include <asm/setup.h> |
67 | #include <asm/desc.h> | |
817a824b | 68 | #include <asm/pgalloc.h> |
5ead97c8 | 69 | #include <asm/pgtable.h> |
f87e4cac | 70 | #include <asm/tlbflush.h> |
fefa629a | 71 | #include <asm/reboot.h> |
577eebea | 72 | #include <asm/stackprotector.h> |
bee6ab53 | 73 | #include <asm/hypervisor.h> |
f221b04f | 74 | #include <asm/mach_traps.h> |
73c154c6 | 75 | #include <asm/mwait.h> |
76a8df7b | 76 | #include <asm/pci_x86.h> |
a314e3eb | 77 | #include <asm/cpu.h> |
73c154c6 KRW |
78 | |
79 | #ifdef CONFIG_ACPI | |
80 | #include <linux/acpi.h> | |
81 | #include <asm/acpi.h> | |
82 | #include <acpi/pdc_intel.h> | |
83 | #include <acpi/processor.h> | |
84 | #include <xen/interface/platform.h> | |
85 | #endif | |
5ead97c8 JF |
86 | |
87 | #include "xen-ops.h" | |
3b827c1b | 88 | #include "mmu.h" |
f447d56d | 89 | #include "smp.h" |
5ead97c8 | 90 | #include "multicalls.h" |
65d0cf0b | 91 | #include "pmu.h" |
5ead97c8 JF |
92 | |
93 | EXPORT_SYMBOL_GPL(hypercall_page); | |
94 | ||
a520996a KRW |
95 | /* |
96 | * Pointer to the xen_vcpu_info structure or | |
97 | * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info | |
98 | * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info | |
99 | * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point | |
100 | * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to | |
101 | * acknowledge pending events. | |
102 | * Also more subtly it is used by the patched version of irq enable/disable | |
103 | * e.g. xen_irq_enable_direct and xen_iret in PV mode. | |
104 | * | |
105 | * The desire to be able to do those mask/unmask operations as a single | |
106 | * instruction by using the per-cpu offset held in %gs is the real reason | |
107 | * vcpu info is in a per-cpu pointer and the original reason for this | |
108 | * hypercall. | |
109 | * | |
110 | */ | |
5ead97c8 | 111 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
a520996a KRW |
112 | |
113 | /* | |
114 | * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info | |
115 | * hypercall. This can be used both in PV and PVHVM mode. The structure | |
116 | * overrides the default per_cpu(xen_vcpu, cpu) value. | |
117 | */ | |
5ead97c8 | 118 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); |
9f79991d | 119 | |
88e957d6 | 120 | /* Linux <-> Xen vCPU id mapping */ |
55467dea | 121 | DEFINE_PER_CPU(uint32_t, xen_vcpu_id); |
88e957d6 VK |
122 | EXPORT_PER_CPU_SYMBOL(xen_vcpu_id); |
123 | ||
6e833587 JF |
124 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
125 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
126 | ||
7e77506a IC |
127 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
128 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
129 | unsigned long machine_to_phys_nr; |
130 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 131 | |
5ead97c8 JF |
132 | struct start_info *xen_start_info; |
133 | EXPORT_SYMBOL_GPL(xen_start_info); | |
134 | ||
a0d695c8 | 135 | struct shared_info xen_dummy_shared_info; |
60223a32 | 136 | |
38341432 JF |
137 | void *xen_initial_gdt; |
138 | ||
bee6ab53 | 139 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
140 | __read_mostly int xen_have_vector_callback; |
141 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 142 | |
60223a32 JF |
143 | /* |
144 | * Point at some empty memory to start with. We map the real shared_info | |
145 | * page as soon as fixmap is up and running. | |
146 | */ | |
4648da7c | 147 | struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info; |
60223a32 JF |
148 | |
149 | /* | |
150 | * Flag to determine whether vcpu info placement is available on all | |
151 | * VCPUs. We assume it is to start with, and then set it to zero on | |
152 | * the first failure. This is because it can succeed on some VCPUs | |
153 | * and not others, since it can involve hypervisor memory allocation, | |
154 | * or because the guest failed to guarantee all the appropriate | |
155 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
156 | * | |
157 | * Note that any particular CPU may be using a placed vcpu structure, | |
158 | * but we can only optimise if the all are. | |
159 | * | |
160 | * 0: not available, 1: available | |
161 | */ | |
e4d04071 | 162 | static int have_vcpu_info_placement = 1; |
60223a32 | 163 | |
1c32cdc6 DV |
164 | struct tls_descs { |
165 | struct desc_struct desc[3]; | |
166 | }; | |
167 | ||
168 | /* | |
169 | * Updating the 3 TLS descriptors in the GDT on every task switch is | |
170 | * surprisingly expensive so we avoid updating them if they haven't | |
171 | * changed. Since Xen writes different descriptors than the one | |
172 | * passed in the update_descriptor hypercall we keep shadow copies to | |
173 | * compare against. | |
174 | */ | |
175 | static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); | |
176 | ||
c06ee78d MR |
177 | static void clamp_max_cpus(void) |
178 | { | |
179 | #ifdef CONFIG_SMP | |
180 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
181 | setup_max_cpus = MAX_VIRT_CPUS; | |
182 | #endif | |
183 | } | |
184 | ||
ee42d665 | 185 | void xen_vcpu_setup(int cpu) |
5ead97c8 | 186 | { |
60223a32 JF |
187 | struct vcpu_register_vcpu_info info; |
188 | int err; | |
189 | struct vcpu_info *vcpup; | |
190 | ||
a0d695c8 | 191 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 192 | |
7f1fc268 KRW |
193 | /* |
194 | * This path is called twice on PVHVM - first during bootup via | |
195 | * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being | |
196 | * hotplugged: cpu_up -> xen_hvm_cpu_notify. | |
197 | * As we can only do the VCPUOP_register_vcpu_info once lets | |
198 | * not over-write its result. | |
199 | * | |
200 | * For PV it is called during restore (xen_vcpu_restore) and bootup | |
201 | * (xen_setup_vcpu_info_placement). The hotplug mechanism does not | |
202 | * use this function. | |
203 | */ | |
204 | if (xen_hvm_domain()) { | |
205 | if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu)) | |
206 | return; | |
207 | } | |
e15a8621 VK |
208 | if (xen_vcpu_nr(cpu) < MAX_VIRT_CPUS) |
209 | per_cpu(xen_vcpu, cpu) = | |
210 | &HYPERVISOR_shared_info->vcpu_info[xen_vcpu_nr(cpu)]; | |
60223a32 | 211 | |
c06ee78d MR |
212 | if (!have_vcpu_info_placement) { |
213 | if (cpu >= MAX_VIRT_CPUS) | |
214 | clamp_max_cpus(); | |
215 | return; | |
216 | } | |
60223a32 | 217 | |
c06ee78d | 218 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 219 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
220 | info.offset = offset_in_page(vcpup); |
221 | ||
60223a32 JF |
222 | /* Check to see if the hypervisor will put the vcpu_info |
223 | structure where we want it, which allows direct access via | |
a520996a KRW |
224 | a percpu-variable. |
225 | N.B. This hypercall can _only_ be called once per CPU. Subsequent | |
226 | calls will error out with -EINVAL. This is due to the fact that | |
227 | hypervisor has no unregister variant and this hypercall does not | |
228 | allow to over-write info.mfn and info.offset. | |
229 | */ | |
ad5475f9 VK |
230 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, xen_vcpu_nr(cpu), |
231 | &info); | |
60223a32 JF |
232 | |
233 | if (err) { | |
234 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
235 | have_vcpu_info_placement = 0; | |
c06ee78d | 236 | clamp_max_cpus(); |
60223a32 JF |
237 | } else { |
238 | /* This cpu is using the registered vcpu info, even if | |
239 | later ones fail to. */ | |
240 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 241 | } |
5ead97c8 JF |
242 | } |
243 | ||
9c7a7942 JF |
244 | /* |
245 | * On restore, set the vcpu placement up again. | |
246 | * If it fails, then we're in a bad state, since | |
247 | * we can't back out from using it... | |
248 | */ | |
249 | void xen_vcpu_restore(void) | |
250 | { | |
3905bb2a | 251 | int cpu; |
9c7a7942 | 252 | |
9d328a94 | 253 | for_each_possible_cpu(cpu) { |
3905bb2a | 254 | bool other_cpu = (cpu != smp_processor_id()); |
ad5475f9 VK |
255 | bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, xen_vcpu_nr(cpu), |
256 | NULL); | |
9c7a7942 | 257 | |
9d328a94 | 258 | if (other_cpu && is_up && |
ad5475f9 | 259 | HYPERVISOR_vcpu_op(VCPUOP_down, xen_vcpu_nr(cpu), NULL)) |
3905bb2a | 260 | BUG(); |
9c7a7942 | 261 | |
3905bb2a | 262 | xen_setup_runstate_info(cpu); |
9c7a7942 | 263 | |
3905bb2a | 264 | if (have_vcpu_info_placement) |
9c7a7942 | 265 | xen_vcpu_setup(cpu); |
9c7a7942 | 266 | |
9d328a94 | 267 | if (other_cpu && is_up && |
ad5475f9 | 268 | HYPERVISOR_vcpu_op(VCPUOP_up, xen_vcpu_nr(cpu), NULL)) |
3905bb2a | 269 | BUG(); |
9c7a7942 JF |
270 | } |
271 | } | |
272 | ||
5ead97c8 JF |
273 | static void __init xen_banner(void) |
274 | { | |
95c7c23b JF |
275 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
276 | struct xen_extraversion extra; | |
277 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
278 | ||
d285d683 MR |
279 | pr_info("Booting paravirtualized kernel %son %s\n", |
280 | xen_feature(XENFEAT_auto_translated_physmap) ? | |
281 | "with PVH extensions " : "", pv_info.name); | |
95c7c23b JF |
282 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
283 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 284 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 | 285 | } |
394b40f6 KRW |
286 | /* Check if running on Xen version (major, minor) or later */ |
287 | bool | |
288 | xen_running_on_version_or_later(unsigned int major, unsigned int minor) | |
289 | { | |
290 | unsigned int version; | |
291 | ||
292 | if (!xen_domain()) | |
293 | return false; | |
294 | ||
295 | version = HYPERVISOR_xen_version(XENVER_version, NULL); | |
296 | if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || | |
297 | ((version >> 16) > major)) | |
298 | return true; | |
299 | return false; | |
300 | } | |
5ead97c8 | 301 | |
5e626254 AP |
302 | #define CPUID_THERM_POWER_LEAF 6 |
303 | #define APERFMPERF_PRESENT 0 | |
304 | ||
e826fe1b JF |
305 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
306 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
307 | ||
73c154c6 KRW |
308 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
309 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
310 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
311 | ||
65ea5b03 PA |
312 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
313 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 314 | { |
82d64699 | 315 | unsigned maskebx = ~0; |
e826fe1b | 316 | unsigned maskecx = ~0; |
5ead97c8 | 317 | unsigned maskedx = ~0; |
73c154c6 | 318 | unsigned setecx = 0; |
5ead97c8 JF |
319 | /* |
320 | * Mask out inconvenient features, to try and disable as many | |
321 | * unsupported kernel subsystems as possible. | |
322 | */ | |
82d64699 JF |
323 | switch (*ax) { |
324 | case 1: | |
e826fe1b | 325 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 326 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 327 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
328 | break; |
329 | ||
73c154c6 KRW |
330 | case CPUID_MWAIT_LEAF: |
331 | /* Synthesize the values.. */ | |
332 | *ax = 0; | |
333 | *bx = 0; | |
334 | *cx = cpuid_leaf5_ecx_val; | |
335 | *dx = cpuid_leaf5_edx_val; | |
336 | return; | |
337 | ||
5e626254 AP |
338 | case CPUID_THERM_POWER_LEAF: |
339 | /* Disabling APERFMPERF for kernel usage */ | |
340 | maskecx = ~(1 << APERFMPERF_PRESENT); | |
341 | break; | |
342 | ||
82d64699 JF |
343 | case 0xb: |
344 | /* Suppress extended topology stuff */ | |
345 | maskebx = 0; | |
346 | break; | |
e826fe1b | 347 | } |
5ead97c8 JF |
348 | |
349 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
350 | : "=a" (*ax), |
351 | "=b" (*bx), | |
352 | "=c" (*cx), | |
353 | "=d" (*dx) | |
354 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 355 | |
82d64699 | 356 | *bx &= maskebx; |
e826fe1b | 357 | *cx &= maskecx; |
73c154c6 | 358 | *cx |= setecx; |
65ea5b03 | 359 | *dx &= maskedx; |
5ead97c8 | 360 | } |
983bb6d2 | 361 | STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ |
5ead97c8 | 362 | |
73c154c6 KRW |
363 | static bool __init xen_check_mwait(void) |
364 | { | |
e3aa4e61 | 365 | #ifdef CONFIG_ACPI |
73c154c6 KRW |
366 | struct xen_platform_op op = { |
367 | .cmd = XENPF_set_processor_pminfo, | |
368 | .u.set_pminfo.id = -1, | |
369 | .u.set_pminfo.type = XEN_PM_PDC, | |
370 | }; | |
371 | uint32_t buf[3]; | |
372 | unsigned int ax, bx, cx, dx; | |
373 | unsigned int mwait_mask; | |
374 | ||
375 | /* We need to determine whether it is OK to expose the MWAIT | |
376 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
377 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
378 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
379 | * checks against). The hypervisor won't expose the MWAIT flag because | |
380 | * it would break backwards compatibility; so we will find out directly | |
381 | * from the hardware and hypercall. | |
382 | */ | |
383 | if (!xen_initial_domain()) | |
384 | return false; | |
385 | ||
e3aa4e61 LJ |
386 | /* |
387 | * When running under platform earlier than Xen4.2, do not expose | |
388 | * mwait, to avoid the risk of loading native acpi pad driver | |
389 | */ | |
390 | if (!xen_running_on_version_or_later(4, 2)) | |
391 | return false; | |
392 | ||
73c154c6 KRW |
393 | ax = 1; |
394 | cx = 0; | |
395 | ||
396 | native_cpuid(&ax, &bx, &cx, &dx); | |
397 | ||
398 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
399 | (1 << (X86_FEATURE_MWAIT % 32)); | |
400 | ||
401 | if ((cx & mwait_mask) != mwait_mask) | |
402 | return false; | |
403 | ||
404 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
405 | * ecx and edx. The hypercall provides only partial information. | |
406 | */ | |
407 | ||
408 | ax = CPUID_MWAIT_LEAF; | |
409 | bx = 0; | |
410 | cx = 0; | |
411 | dx = 0; | |
412 | ||
413 | native_cpuid(&ax, &bx, &cx, &dx); | |
414 | ||
415 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
416 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
417 | */ | |
418 | buf[0] = ACPI_PDC_REVISION_ID; | |
419 | buf[1] = 1; | |
420 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
421 | ||
422 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
423 | ||
cfafae94 | 424 | if ((HYPERVISOR_platform_op(&op) == 0) && |
73c154c6 KRW |
425 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { |
426 | cpuid_leaf5_ecx_val = cx; | |
427 | cpuid_leaf5_edx_val = dx; | |
428 | } | |
429 | return true; | |
430 | #else | |
431 | return false; | |
432 | #endif | |
433 | } | |
ad3062a0 | 434 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
435 | { |
436 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 437 | unsigned int xsave_mask; |
e826fe1b JF |
438 | |
439 | cpuid_leaf1_edx_mask = | |
cef12ee5 | 440 | ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
441 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
442 | ||
443 | if (!xen_initial_domain()) | |
444 | cpuid_leaf1_edx_mask &= | |
6efa20e4 | 445 | ~((1 << X86_FEATURE_ACPI)); /* disable ACPI */ |
4ea9b9ac ZD |
446 | |
447 | cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32)); | |
448 | ||
947ccf9c | 449 | ax = 1; |
5e287830 | 450 | cx = 0; |
d285d683 | 451 | cpuid(1, &ax, &bx, &cx, &dx); |
e826fe1b | 452 | |
947ccf9c SH |
453 | xsave_mask = |
454 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
455 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
456 | ||
457 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
458 | if ((cx & xsave_mask) != xsave_mask) | |
459 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
460 | if (xen_check_mwait()) |
461 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
462 | } |
463 | ||
5ead97c8 JF |
464 | static void xen_set_debugreg(int reg, unsigned long val) |
465 | { | |
466 | HYPERVISOR_set_debugreg(reg, val); | |
467 | } | |
468 | ||
469 | static unsigned long xen_get_debugreg(int reg) | |
470 | { | |
471 | return HYPERVISOR_get_debugreg(reg); | |
472 | } | |
473 | ||
224101ed | 474 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 475 | { |
5ead97c8 | 476 | xen_mc_flush(); |
224101ed | 477 | paravirt_end_context_switch(next); |
5ead97c8 JF |
478 | } |
479 | ||
480 | static unsigned long xen_store_tr(void) | |
481 | { | |
482 | return 0; | |
483 | } | |
484 | ||
a05d2eba | 485 | /* |
cef43bf6 JF |
486 | * Set the page permissions for a particular virtual address. If the |
487 | * address is a vmalloc mapping (or other non-linear mapping), then | |
488 | * find the linear mapping of the page and also set its protections to | |
489 | * match. | |
a05d2eba JF |
490 | */ |
491 | static void set_aliased_prot(void *v, pgprot_t prot) | |
492 | { | |
493 | int level; | |
494 | pte_t *ptep; | |
495 | pte_t pte; | |
496 | unsigned long pfn; | |
497 | struct page *page; | |
aa1acff3 | 498 | unsigned char dummy; |
a05d2eba JF |
499 | |
500 | ptep = lookup_address((unsigned long)v, &level); | |
501 | BUG_ON(ptep == NULL); | |
502 | ||
503 | pfn = pte_pfn(*ptep); | |
504 | page = pfn_to_page(pfn); | |
505 | ||
506 | pte = pfn_pte(pfn, prot); | |
507 | ||
aa1acff3 AL |
508 | /* |
509 | * Careful: update_va_mapping() will fail if the virtual address | |
510 | * we're poking isn't populated in the page tables. We don't | |
511 | * need to worry about the direct map (that's always in the page | |
512 | * tables), but we need to be careful about vmap space. In | |
513 | * particular, the top level page table can lazily propagate | |
514 | * entries between processes, so if we've switched mms since we | |
515 | * vmapped the target in the first place, we might not have the | |
516 | * top-level page table entry populated. | |
517 | * | |
518 | * We disable preemption because we want the same mm active when | |
519 | * we probe the target and when we issue the hypercall. We'll | |
520 | * have the same nominal mm, but if we're a kernel thread, lazy | |
521 | * mm dropping could change our pgd. | |
522 | * | |
523 | * Out of an abundance of caution, this uses __get_user() to fault | |
524 | * in the target address just in case there's some obscure case | |
525 | * in which the target address isn't readable. | |
526 | */ | |
527 | ||
528 | preempt_disable(); | |
529 | ||
99158f10 | 530 | probe_kernel_read(&dummy, v, 1); |
aa1acff3 | 531 | |
a05d2eba JF |
532 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) |
533 | BUG(); | |
534 | ||
535 | if (!PageHighMem(page)) { | |
536 | void *av = __va(PFN_PHYS(pfn)); | |
537 | ||
538 | if (av != v) | |
539 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
540 | BUG(); | |
541 | } else | |
542 | kmap_flush_unused(); | |
aa1acff3 AL |
543 | |
544 | preempt_enable(); | |
a05d2eba JF |
545 | } |
546 | ||
38ffbe66 JF |
547 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
548 | { | |
a05d2eba | 549 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
550 | int i; |
551 | ||
aa1acff3 AL |
552 | /* |
553 | * We need to mark the all aliases of the LDT pages RO. We | |
554 | * don't need to call vm_flush_aliases(), though, since that's | |
555 | * only responsible for flushing aliases out the TLBs, not the | |
556 | * page tables, and Xen will flush the TLB for us if needed. | |
557 | * | |
558 | * To avoid confusing future readers: none of this is necessary | |
559 | * to load the LDT. The hypervisor only checks this when the | |
560 | * LDT is faulted in due to subsequent descriptor access. | |
561 | */ | |
562 | ||
a05d2eba JF |
563 | for(i = 0; i < entries; i += entries_per_page) |
564 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
565 | } |
566 | ||
567 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
568 | { | |
a05d2eba | 569 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
570 | int i; |
571 | ||
a05d2eba JF |
572 | for(i = 0; i < entries; i += entries_per_page) |
573 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
574 | } |
575 | ||
5ead97c8 JF |
576 | static void xen_set_ldt(const void *addr, unsigned entries) |
577 | { | |
5ead97c8 JF |
578 | struct mmuext_op *op; |
579 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
580 | ||
ab78f7ad JF |
581 | trace_xen_cpu_set_ldt(addr, entries); |
582 | ||
5ead97c8 JF |
583 | op = mcs.args; |
584 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 585 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
586 | op->arg2.nr_ents = entries; |
587 | ||
588 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
589 | ||
590 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
591 | } | |
592 | ||
6b68f01b | 593 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 594 | { |
5ead97c8 JF |
595 | unsigned long va = dtr->address; |
596 | unsigned int size = dtr->size + 1; | |
585423c8 | 597 | unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); |
3ce5fa7e | 598 | unsigned long frames[pages]; |
5ead97c8 | 599 | int f; |
5ead97c8 | 600 | |
577eebea JF |
601 | /* |
602 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
603 | * 8-byte entries, or 16 4k pages.. | |
604 | */ | |
5ead97c8 JF |
605 | |
606 | BUG_ON(size > 65536); | |
607 | BUG_ON(va & ~PAGE_MASK); | |
608 | ||
5ead97c8 | 609 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 610 | int level; |
577eebea | 611 | pte_t *ptep; |
6ed6bf42 JF |
612 | unsigned long pfn, mfn; |
613 | void *virt; | |
614 | ||
577eebea JF |
615 | /* |
616 | * The GDT is per-cpu and is in the percpu data area. | |
617 | * That can be virtually mapped, so we need to do a | |
618 | * page-walk to get the underlying MFN for the | |
619 | * hypercall. The page can also be in the kernel's | |
620 | * linear range, so we need to RO that mapping too. | |
621 | */ | |
622 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
623 | BUG_ON(ptep == NULL); |
624 | ||
625 | pfn = pte_pfn(*ptep); | |
626 | mfn = pfn_to_mfn(pfn); | |
627 | virt = __va(PFN_PHYS(pfn)); | |
628 | ||
629 | frames[f] = mfn; | |
9976b39b | 630 | |
5ead97c8 | 631 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 632 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
633 | } |
634 | ||
3ce5fa7e JF |
635 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
636 | BUG(); | |
5ead97c8 JF |
637 | } |
638 | ||
577eebea JF |
639 | /* |
640 | * load_gdt for early boot, when the gdt is only mapped once | |
641 | */ | |
ad3062a0 | 642 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
643 | { |
644 | unsigned long va = dtr->address; | |
645 | unsigned int size = dtr->size + 1; | |
585423c8 | 646 | unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); |
577eebea JF |
647 | unsigned long frames[pages]; |
648 | int f; | |
649 | ||
650 | /* | |
651 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
652 | * 8-byte entries, or 16 4k pages.. | |
653 | */ | |
654 | ||
655 | BUG_ON(size > 65536); | |
656 | BUG_ON(va & ~PAGE_MASK); | |
657 | ||
658 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
659 | pte_t pte; | |
660 | unsigned long pfn, mfn; | |
661 | ||
662 | pfn = virt_to_pfn(va); | |
663 | mfn = pfn_to_mfn(pfn); | |
664 | ||
665 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
666 | ||
667 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
668 | BUG(); | |
669 | ||
670 | frames[f] = mfn; | |
671 | } | |
672 | ||
673 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
674 | BUG(); | |
675 | } | |
676 | ||
59290362 DV |
677 | static inline bool desc_equal(const struct desc_struct *d1, |
678 | const struct desc_struct *d2) | |
679 | { | |
680 | return d1->a == d2->a && d1->b == d2->b; | |
681 | } | |
682 | ||
5ead97c8 JF |
683 | static void load_TLS_descriptor(struct thread_struct *t, |
684 | unsigned int cpu, unsigned int i) | |
685 | { | |
1c32cdc6 DV |
686 | struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; |
687 | struct desc_struct *gdt; | |
688 | xmaddr_t maddr; | |
689 | struct multicall_space mc; | |
690 | ||
691 | if (desc_equal(shadow, &t->tls_array[i])) | |
692 | return; | |
693 | ||
694 | *shadow = t->tls_array[i]; | |
695 | ||
696 | gdt = get_cpu_gdt_table(cpu); | |
697 | maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
698 | mc = __xen_mc_entry(0); | |
5ead97c8 JF |
699 | |
700 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
701 | } | |
702 | ||
703 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
704 | { | |
8b84ad94 | 705 | /* |
ccbeed3a TH |
706 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
707 | * and lazy gs handling is enabled, it means we're in a | |
708 | * context switch, and %gs has just been saved. This means we | |
709 | * can zero it out to prevent faults on exit from the | |
710 | * hypervisor if the next process has no %gs. Either way, it | |
711 | * has been saved, and the new value will get loaded properly. | |
712 | * This will go away as soon as Xen has been modified to not | |
713 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
714 | * |
715 | * On x86_64, this hack is not used for %gs, because gs points | |
716 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
717 | * must not zero %gs on x86_64 | |
718 | * | |
719 | * For x86_64, we need to zero %fs, otherwise we may get an | |
720 | * exception between the new %fs descriptor being loaded and | |
721 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 722 | */ |
8a95408e EH |
723 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
724 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 725 | lazy_load_gs(0); |
8a95408e EH |
726 | #else |
727 | loadsegment(fs, 0); | |
728 | #endif | |
729 | } | |
730 | ||
731 | xen_mc_batch(); | |
732 | ||
733 | load_TLS_descriptor(t, cpu, 0); | |
734 | load_TLS_descriptor(t, cpu, 1); | |
735 | load_TLS_descriptor(t, cpu, 2); | |
736 | ||
737 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
738 | } |
739 | ||
a8fc1089 EH |
740 | #ifdef CONFIG_X86_64 |
741 | static void xen_load_gs_index(unsigned int idx) | |
742 | { | |
743 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
744 | BUG(); | |
5ead97c8 | 745 | } |
a8fc1089 | 746 | #endif |
5ead97c8 JF |
747 | |
748 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 749 | const void *ptr) |
5ead97c8 | 750 | { |
cef43bf6 | 751 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 752 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 753 | |
ab78f7ad JF |
754 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
755 | ||
f120f13e JF |
756 | preempt_disable(); |
757 | ||
5ead97c8 JF |
758 | xen_mc_flush(); |
759 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
760 | BUG(); | |
f120f13e JF |
761 | |
762 | preempt_enable(); | |
5ead97c8 JF |
763 | } |
764 | ||
e176d367 | 765 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
766 | struct trap_info *info) |
767 | { | |
6cac5a92 JF |
768 | unsigned long addr; |
769 | ||
6d02c426 | 770 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
771 | return 0; |
772 | ||
773 | info->vector = vector; | |
6cac5a92 JF |
774 | |
775 | addr = gate_offset(*val); | |
776 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
777 | /* |
778 | * Look for known traps using IST, and substitute them | |
779 | * appropriately. The debugger ones are the only ones we care | |
05e36006 LJ |
780 | * about. Xen will handle faults like double_fault, |
781 | * so we should never see them. Warn if | |
b80119bb JF |
782 | * there's an unexpected IST-using fault handler. |
783 | */ | |
6cac5a92 JF |
784 | if (addr == (unsigned long)debug) |
785 | addr = (unsigned long)xen_debug; | |
786 | else if (addr == (unsigned long)int3) | |
787 | addr = (unsigned long)xen_int3; | |
788 | else if (addr == (unsigned long)stack_segment) | |
789 | addr = (unsigned long)xen_stack_segment; | |
6efa20e4 | 790 | else if (addr == (unsigned long)double_fault) { |
b80119bb JF |
791 | /* Don't need to handle these */ |
792 | return 0; | |
793 | #ifdef CONFIG_X86_MCE | |
794 | } else if (addr == (unsigned long)machine_check) { | |
05e36006 LJ |
795 | /* |
796 | * when xen hypervisor inject vMCE to guest, | |
797 | * use native mce handler to handle it | |
798 | */ | |
799 | ; | |
b80119bb | 800 | #endif |
6efa20e4 KRW |
801 | } else if (addr == (unsigned long)nmi) |
802 | /* | |
803 | * Use the native version as well. | |
804 | */ | |
805 | ; | |
806 | else { | |
b80119bb JF |
807 | /* Some other trap using IST? */ |
808 | if (WARN_ON(val->ist != 0)) | |
809 | return 0; | |
810 | } | |
6cac5a92 JF |
811 | #endif /* CONFIG_X86_64 */ |
812 | info->address = addr; | |
813 | ||
e176d367 EH |
814 | info->cs = gate_segment(*val); |
815 | info->flags = val->dpl; | |
5ead97c8 | 816 | /* interrupt gates clear IF */ |
6d02c426 JF |
817 | if (val->type == GATE_INTERRUPT) |
818 | info->flags |= 1 << 2; | |
5ead97c8 JF |
819 | |
820 | return 1; | |
821 | } | |
822 | ||
823 | /* Locations of each CPU's IDT */ | |
6b68f01b | 824 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
825 | |
826 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
827 | also update Xen. */ | |
8d947344 | 828 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 829 | { |
5ead97c8 | 830 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
831 | unsigned long start, end; |
832 | ||
ab78f7ad JF |
833 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
834 | ||
f120f13e JF |
835 | preempt_disable(); |
836 | ||
780f36d8 CL |
837 | start = __this_cpu_read(idt_desc.address); |
838 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
839 | |
840 | xen_mc_flush(); | |
841 | ||
8d947344 | 842 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
843 | |
844 | if (p >= start && (p + 8) <= end) { | |
845 | struct trap_info info[2]; | |
846 | ||
847 | info[1].address = 0; | |
848 | ||
e176d367 | 849 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
850 | if (HYPERVISOR_set_trap_table(info)) |
851 | BUG(); | |
852 | } | |
f120f13e JF |
853 | |
854 | preempt_enable(); | |
5ead97c8 JF |
855 | } |
856 | ||
6b68f01b | 857 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 858 | struct trap_info *traps) |
5ead97c8 | 859 | { |
5ead97c8 JF |
860 | unsigned in, out, count; |
861 | ||
e176d367 | 862 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
863 | BUG_ON(count > 256); |
864 | ||
5ead97c8 | 865 | for (in = out = 0; in < count; in++) { |
e176d367 | 866 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 867 | |
e176d367 | 868 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
869 | out++; |
870 | } | |
871 | traps[out].address = 0; | |
f87e4cac JF |
872 | } |
873 | ||
874 | void xen_copy_trap_info(struct trap_info *traps) | |
875 | { | |
89cbc767 | 876 | const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); |
f87e4cac JF |
877 | |
878 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
879 | } |
880 | ||
881 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
882 | hold a spinlock to protect the static traps[] array (static because | |
883 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 884 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
885 | { |
886 | static DEFINE_SPINLOCK(lock); | |
887 | static struct trap_info traps[257]; | |
f87e4cac | 888 | |
ab78f7ad JF |
889 | trace_xen_cpu_load_idt(desc); |
890 | ||
f87e4cac JF |
891 | spin_lock(&lock); |
892 | ||
89cbc767 | 893 | memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); |
f120f13e | 894 | |
f87e4cac | 895 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
896 | |
897 | xen_mc_flush(); | |
898 | if (HYPERVISOR_set_trap_table(traps)) | |
899 | BUG(); | |
900 | ||
901 | spin_unlock(&lock); | |
902 | } | |
903 | ||
904 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
905 | they're handled differently. */ | |
906 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 907 | const void *desc, int type) |
5ead97c8 | 908 | { |
ab78f7ad JF |
909 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
910 | ||
f120f13e JF |
911 | preempt_disable(); |
912 | ||
014b15be GOC |
913 | switch (type) { |
914 | case DESC_LDT: | |
915 | case DESC_TSS: | |
5ead97c8 JF |
916 | /* ignore */ |
917 | break; | |
918 | ||
919 | default: { | |
9976b39b | 920 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
921 | |
922 | xen_mc_flush(); | |
014b15be | 923 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
924 | BUG(); |
925 | } | |
926 | ||
927 | } | |
f120f13e JF |
928 | |
929 | preempt_enable(); | |
5ead97c8 JF |
930 | } |
931 | ||
577eebea JF |
932 | /* |
933 | * Version of write_gdt_entry for use at early boot-time needed to | |
934 | * update an entry as simply as possible. | |
935 | */ | |
ad3062a0 | 936 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
937 | const void *desc, int type) |
938 | { | |
ab78f7ad JF |
939 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
940 | ||
577eebea JF |
941 | switch (type) { |
942 | case DESC_LDT: | |
943 | case DESC_TSS: | |
944 | /* ignore */ | |
945 | break; | |
946 | ||
947 | default: { | |
948 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
949 | ||
950 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
951 | dt[entry] = *(struct desc_struct *)desc; | |
952 | } | |
953 | ||
954 | } | |
955 | } | |
956 | ||
faca6227 | 957 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 958 | struct thread_struct *thread) |
5ead97c8 | 959 | { |
ab78f7ad JF |
960 | struct multicall_space mcs; |
961 | ||
962 | mcs = xen_mc_entry(0); | |
faca6227 | 963 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 | 964 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
8ef46a67 | 965 | tss->x86_tss.sp0 = thread->sp0; |
5ead97c8 JF |
966 | } |
967 | ||
b7a58459 | 968 | void xen_set_iopl_mask(unsigned mask) |
5ead97c8 JF |
969 | { |
970 | struct physdev_set_iopl set_iopl; | |
971 | ||
972 | /* Force the change at ring 0. */ | |
973 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
974 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
975 | } | |
976 | ||
977 | static void xen_io_delay(void) | |
978 | { | |
979 | } | |
980 | ||
7b1333aa JF |
981 | static void xen_clts(void) |
982 | { | |
983 | struct multicall_space mcs; | |
984 | ||
985 | mcs = xen_mc_entry(0); | |
986 | ||
987 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
988 | ||
989 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
990 | } | |
991 | ||
a789ed5f JF |
992 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
993 | ||
994 | static unsigned long xen_read_cr0(void) | |
995 | { | |
2113f469 | 996 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
997 | |
998 | if (unlikely(cr0 == 0)) { | |
999 | cr0 = native_read_cr0(); | |
2113f469 | 1000 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
1001 | } |
1002 | ||
1003 | return cr0; | |
1004 | } | |
1005 | ||
7b1333aa JF |
1006 | static void xen_write_cr0(unsigned long cr0) |
1007 | { | |
1008 | struct multicall_space mcs; | |
1009 | ||
2113f469 | 1010 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 1011 | |
7b1333aa JF |
1012 | /* Only pay attention to cr0.TS; everything else is |
1013 | ignored. */ | |
1014 | mcs = xen_mc_entry(0); | |
1015 | ||
1016 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
1017 | ||
1018 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1019 | } | |
1020 | ||
5ead97c8 JF |
1021 | static void xen_write_cr4(unsigned long cr4) |
1022 | { | |
3375d828 | 1023 | cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); |
2956a351 JF |
1024 | |
1025 | native_write_cr4(cr4); | |
5ead97c8 | 1026 | } |
1a7bbda5 KRW |
1027 | #ifdef CONFIG_X86_64 |
1028 | static inline unsigned long xen_read_cr8(void) | |
1029 | { | |
1030 | return 0; | |
1031 | } | |
1032 | static inline void xen_write_cr8(unsigned long val) | |
1033 | { | |
1034 | BUG_ON(val); | |
1035 | } | |
1036 | #endif | |
31795b47 BO |
1037 | |
1038 | static u64 xen_read_msr_safe(unsigned int msr, int *err) | |
1039 | { | |
1040 | u64 val; | |
1041 | ||
6b08cd63 BO |
1042 | if (pmu_msr_read(msr, &val, err)) |
1043 | return val; | |
1044 | ||
31795b47 BO |
1045 | val = native_read_msr_safe(msr, err); |
1046 | switch (msr) { | |
1047 | case MSR_IA32_APICBASE: | |
1048 | #ifdef CONFIG_X86_X2APIC | |
1049 | if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) | |
1050 | #endif | |
1051 | val &= ~X2APIC_ENABLE; | |
1052 | break; | |
1053 | } | |
1054 | return val; | |
1055 | } | |
1056 | ||
1153968a JF |
1057 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
1058 | { | |
1059 | int ret; | |
1060 | ||
1061 | ret = 0; | |
1062 | ||
f63c2f24 | 1063 | switch (msr) { |
1153968a JF |
1064 | #ifdef CONFIG_X86_64 |
1065 | unsigned which; | |
1066 | u64 base; | |
1067 | ||
1068 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
1069 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
1070 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
1071 | ||
1072 | set: | |
1073 | base = ((u64)high << 32) | low; | |
1074 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 1075 | ret = -EIO; |
1153968a JF |
1076 | break; |
1077 | #endif | |
d89961e2 JF |
1078 | |
1079 | case MSR_STAR: | |
1080 | case MSR_CSTAR: | |
1081 | case MSR_LSTAR: | |
1082 | case MSR_SYSCALL_MASK: | |
1083 | case MSR_IA32_SYSENTER_CS: | |
1084 | case MSR_IA32_SYSENTER_ESP: | |
1085 | case MSR_IA32_SYSENTER_EIP: | |
1086 | /* Fast syscall setup is all done in hypercalls, so | |
1087 | these are all ignored. Stub them out here to stop | |
1088 | Xen console noise. */ | |
2ecf91b6 | 1089 | break; |
41f2e477 | 1090 | |
1153968a | 1091 | default: |
6b08cd63 BO |
1092 | if (!pmu_msr_write(msr, low, high, &ret)) |
1093 | ret = native_write_msr_safe(msr, low, high); | |
1153968a JF |
1094 | } |
1095 | ||
1096 | return ret; | |
1097 | } | |
1098 | ||
dd2f4a00 AL |
1099 | static u64 xen_read_msr(unsigned int msr) |
1100 | { | |
1101 | /* | |
1102 | * This will silently swallow a #GP from RDMSR. It may be worth | |
1103 | * changing that. | |
1104 | */ | |
1105 | int err; | |
1106 | ||
1107 | return xen_read_msr_safe(msr, &err); | |
1108 | } | |
1109 | ||
1110 | static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) | |
1111 | { | |
1112 | /* | |
1113 | * This will silently swallow a #GP from WRMSR. It may be worth | |
1114 | * changing that. | |
1115 | */ | |
1116 | xen_write_msr_safe(msr, low, high); | |
1117 | } | |
1118 | ||
0e91398f | 1119 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1120 | { |
1121 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1122 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1123 | xen_start_info->shared_info); | |
1124 | ||
1125 | HYPERVISOR_shared_info = | |
1126 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1127 | } else |
1128 | HYPERVISOR_shared_info = | |
1129 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1130 | ||
2e8fe719 JF |
1131 | #ifndef CONFIG_SMP |
1132 | /* In UP this is as good a place as any to set up shared info */ | |
1133 | xen_setup_vcpu_info_placement(); | |
1134 | #endif | |
d5edbc1f JF |
1135 | |
1136 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1137 | } |
1138 | ||
5f054e31 | 1139 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1140 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1141 | { |
1142 | int cpu; | |
1143 | ||
88e957d6 VK |
1144 | for_each_possible_cpu(cpu) { |
1145 | /* Set up direct vCPU id mapping for PV guests. */ | |
1146 | per_cpu(xen_vcpu_id, cpu) = cpu; | |
60223a32 | 1147 | xen_vcpu_setup(cpu); |
88e957d6 | 1148 | } |
60223a32 JF |
1149 | |
1150 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
2771374d MR |
1151 | * percpu area for all cpus, so make use of it. Note that for |
1152 | * PVH we want to use native IRQ mechanism. */ | |
1153 | if (have_vcpu_info_placement && !xen_pvh_domain()) { | |
ecb93d1c JF |
1154 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1155 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1156 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1157 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1158 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1159 | } |
5ead97c8 JF |
1160 | } |
1161 | ||
ab144f5e AK |
1162 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1163 | unsigned long addr, unsigned len) | |
6487673b JF |
1164 | { |
1165 | char *start, *end, *reloc; | |
1166 | unsigned ret; | |
1167 | ||
1168 | start = end = reloc = NULL; | |
1169 | ||
93b1eab3 JF |
1170 | #define SITE(op, x) \ |
1171 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1172 | if (have_vcpu_info_placement) { \ |
1173 | start = (char *)xen_##x##_direct; \ | |
1174 | end = xen_##x##_direct_end; \ | |
1175 | reloc = xen_##x##_direct_reloc; \ | |
1176 | } \ | |
1177 | goto patch_site | |
1178 | ||
1179 | switch (type) { | |
93b1eab3 JF |
1180 | SITE(pv_irq_ops, irq_enable); |
1181 | SITE(pv_irq_ops, irq_disable); | |
1182 | SITE(pv_irq_ops, save_fl); | |
1183 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1184 | #undef SITE |
1185 | ||
1186 | patch_site: | |
1187 | if (start == NULL || (end-start) > len) | |
1188 | goto default_patch; | |
1189 | ||
ab144f5e | 1190 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1191 | |
1192 | /* Note: because reloc is assigned from something that | |
1193 | appears to be an array, gcc assumes it's non-null, | |
1194 | but doesn't know its relationship with start and | |
1195 | end. */ | |
1196 | if (reloc > start && reloc < end) { | |
1197 | int reloc_off = reloc - start; | |
ab144f5e AK |
1198 | long *relocp = (long *)(insnbuf + reloc_off); |
1199 | long delta = start - (char *)addr; | |
6487673b JF |
1200 | |
1201 | *relocp += delta; | |
1202 | } | |
1203 | break; | |
1204 | ||
1205 | default_patch: | |
1206 | default: | |
ab144f5e AK |
1207 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1208 | addr, len); | |
6487673b JF |
1209 | break; |
1210 | } | |
1211 | ||
1212 | return ret; | |
1213 | } | |
1214 | ||
ad3062a0 | 1215 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1216 | .shared_kernel_pmd = 0, |
1217 | ||
318f5a2a AL |
1218 | #ifdef CONFIG_X86_64 |
1219 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1220 | #endif | |
5ead97c8 | 1221 | .name = "Xen", |
93b1eab3 | 1222 | }; |
5ead97c8 | 1223 | |
ad3062a0 | 1224 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1225 | .patch = xen_patch, |
93b1eab3 | 1226 | }; |
5ead97c8 | 1227 | |
ad3062a0 | 1228 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1229 | .cpuid = xen_cpuid, |
1230 | ||
1231 | .set_debugreg = xen_set_debugreg, | |
1232 | .get_debugreg = xen_get_debugreg, | |
1233 | ||
7b1333aa | 1234 | .clts = xen_clts, |
5ead97c8 | 1235 | |
a789ed5f | 1236 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1237 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1238 | |
5ead97c8 JF |
1239 | .read_cr4 = native_read_cr4, |
1240 | .read_cr4_safe = native_read_cr4_safe, | |
1241 | .write_cr4 = xen_write_cr4, | |
1242 | ||
1a7bbda5 KRW |
1243 | #ifdef CONFIG_X86_64 |
1244 | .read_cr8 = xen_read_cr8, | |
1245 | .write_cr8 = xen_write_cr8, | |
1246 | #endif | |
1247 | ||
5ead97c8 JF |
1248 | .wbinvd = native_wbinvd, |
1249 | ||
dd2f4a00 AL |
1250 | .read_msr = xen_read_msr, |
1251 | .write_msr = xen_write_msr, | |
1252 | ||
c2ee03b2 AL |
1253 | .read_msr_safe = xen_read_msr_safe, |
1254 | .write_msr_safe = xen_write_msr_safe, | |
1ab46fd3 | 1255 | |
65d0cf0b | 1256 | .read_pmc = xen_read_pmc, |
5ead97c8 | 1257 | |
81e103f1 | 1258 | .iret = xen_iret, |
6fcac6d3 | 1259 | #ifdef CONFIG_X86_64 |
6fcac6d3 JF |
1260 | .usergs_sysret64 = xen_sysret64, |
1261 | #endif | |
5ead97c8 JF |
1262 | |
1263 | .load_tr_desc = paravirt_nop, | |
1264 | .set_ldt = xen_set_ldt, | |
1265 | .load_gdt = xen_load_gdt, | |
1266 | .load_idt = xen_load_idt, | |
1267 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1268 | #ifdef CONFIG_X86_64 |
1269 | .load_gs_index = xen_load_gs_index, | |
1270 | #endif | |
5ead97c8 | 1271 | |
38ffbe66 JF |
1272 | .alloc_ldt = xen_alloc_ldt, |
1273 | .free_ldt = xen_free_ldt, | |
1274 | ||
5ead97c8 JF |
1275 | .store_idt = native_store_idt, |
1276 | .store_tr = xen_store_tr, | |
1277 | ||
1278 | .write_ldt_entry = xen_write_ldt_entry, | |
1279 | .write_gdt_entry = xen_write_gdt_entry, | |
1280 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1281 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1282 | |
1283 | .set_iopl_mask = xen_set_iopl_mask, | |
1284 | .io_delay = xen_io_delay, | |
1285 | ||
952d1d70 JF |
1286 | /* Xen takes care of %gs when switching to usermode for us */ |
1287 | .swapgs = paravirt_nop, | |
1288 | ||
224101ed JF |
1289 | .start_context_switch = paravirt_start_context_switch, |
1290 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1291 | }; |
1292 | ||
fefa629a JF |
1293 | static void xen_reboot(int reason) |
1294 | { | |
349c709f | 1295 | struct sched_shutdown r = { .reason = reason }; |
65d0cf0b BO |
1296 | int cpu; |
1297 | ||
1298 | for_each_online_cpu(cpu) | |
1299 | xen_pmu_finish(cpu); | |
349c709f | 1300 | |
349c709f | 1301 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1302 | BUG(); |
1303 | } | |
1304 | ||
1305 | static void xen_restart(char *msg) | |
1306 | { | |
1307 | xen_reboot(SHUTDOWN_reboot); | |
1308 | } | |
1309 | ||
1310 | static void xen_emergency_restart(void) | |
1311 | { | |
1312 | xen_reboot(SHUTDOWN_reboot); | |
1313 | } | |
1314 | ||
1315 | static void xen_machine_halt(void) | |
1316 | { | |
1317 | xen_reboot(SHUTDOWN_poweroff); | |
1318 | } | |
1319 | ||
b2abe506 TG |
1320 | static void xen_machine_power_off(void) |
1321 | { | |
1322 | if (pm_power_off) | |
1323 | pm_power_off(); | |
1324 | xen_reboot(SHUTDOWN_poweroff); | |
1325 | } | |
1326 | ||
fefa629a JF |
1327 | static void xen_crash_shutdown(struct pt_regs *regs) |
1328 | { | |
1329 | xen_reboot(SHUTDOWN_crash); | |
1330 | } | |
1331 | ||
f09f6d19 DD |
1332 | static int |
1333 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1334 | { | |
c0253115 PT |
1335 | if (!kexec_crash_loaded()) |
1336 | xen_reboot(SHUTDOWN_crash); | |
f09f6d19 DD |
1337 | return NOTIFY_DONE; |
1338 | } | |
1339 | ||
1340 | static struct notifier_block xen_panic_block = { | |
1341 | .notifier_call= xen_panic_event, | |
bc5eb201 | 1342 | .priority = INT_MIN |
f09f6d19 DD |
1343 | }; |
1344 | ||
1345 | int xen_panic_handler_init(void) | |
1346 | { | |
1347 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1348 | return 0; | |
1349 | } | |
1350 | ||
ad3062a0 | 1351 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1352 | .restart = xen_restart, |
1353 | .halt = xen_machine_halt, | |
b2abe506 | 1354 | .power_off = xen_machine_power_off, |
fefa629a JF |
1355 | .shutdown = xen_machine_halt, |
1356 | .crash_shutdown = xen_crash_shutdown, | |
1357 | .emergency_restart = xen_emergency_restart, | |
1358 | }; | |
1359 | ||
f221b04f JB |
1360 | static unsigned char xen_get_nmi_reason(void) |
1361 | { | |
1362 | unsigned char reason = 0; | |
1363 | ||
1364 | /* Construct a value which looks like it came from port 0x61. */ | |
1365 | if (test_bit(_XEN_NMIREASON_io_error, | |
1366 | &HYPERVISOR_shared_info->arch.nmi_reason)) | |
1367 | reason |= NMI_REASON_IOCHK; | |
1368 | if (test_bit(_XEN_NMIREASON_pci_serr, | |
1369 | &HYPERVISOR_shared_info->arch.nmi_reason)) | |
1370 | reason |= NMI_REASON_SERR; | |
1371 | ||
1372 | return reason; | |
1373 | } | |
1374 | ||
96f28bc6 DV |
1375 | static void __init xen_boot_params_init_edd(void) |
1376 | { | |
1377 | #if IS_ENABLED(CONFIG_EDD) | |
1378 | struct xen_platform_op op; | |
1379 | struct edd_info *edd_info; | |
1380 | u32 *mbr_signature; | |
1381 | unsigned nr; | |
1382 | int ret; | |
1383 | ||
1384 | edd_info = boot_params.eddbuf; | |
1385 | mbr_signature = boot_params.edd_mbr_sig_buffer; | |
1386 | ||
1387 | op.cmd = XENPF_firmware_info; | |
1388 | ||
1389 | op.u.firmware_info.type = XEN_FW_DISK_INFO; | |
1390 | for (nr = 0; nr < EDDMAXNR; nr++) { | |
1391 | struct edd_info *info = edd_info + nr; | |
1392 | ||
1393 | op.u.firmware_info.index = nr; | |
1394 | info->params.length = sizeof(info->params); | |
1395 | set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, | |
1396 | &info->params); | |
cfafae94 | 1397 | ret = HYPERVISOR_platform_op(&op); |
96f28bc6 DV |
1398 | if (ret) |
1399 | break; | |
1400 | ||
1401 | #define C(x) info->x = op.u.firmware_info.u.disk_info.x | |
1402 | C(device); | |
1403 | C(version); | |
1404 | C(interface_support); | |
1405 | C(legacy_max_cylinder); | |
1406 | C(legacy_max_head); | |
1407 | C(legacy_sectors_per_track); | |
1408 | #undef C | |
1409 | } | |
1410 | boot_params.eddbuf_entries = nr; | |
1411 | ||
1412 | op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; | |
1413 | for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { | |
1414 | op.u.firmware_info.index = nr; | |
cfafae94 | 1415 | ret = HYPERVISOR_platform_op(&op); |
96f28bc6 DV |
1416 | if (ret) |
1417 | break; | |
1418 | mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; | |
1419 | } | |
1420 | boot_params.edd_mbr_sig_buf_entries = nr; | |
1421 | #endif | |
1422 | } | |
1423 | ||
577eebea JF |
1424 | /* |
1425 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1426 | * we do this, we have to be careful not to call any stack-protected | |
1427 | * function, which is most of the kernel. | |
5840c84b MR |
1428 | * |
1429 | * Note, that it is __ref because the only caller of this after init | |
1430 | * is PVH which is not going to use xen_load_gdt_boot or other | |
1431 | * __init functions. | |
577eebea | 1432 | */ |
c9f6e997 | 1433 | static void __ref xen_setup_gdt(int cpu) |
577eebea | 1434 | { |
8d656bbe MR |
1435 | if (xen_feature(XENFEAT_auto_translated_physmap)) { |
1436 | #ifdef CONFIG_X86_64 | |
1437 | unsigned long dummy; | |
1438 | ||
5840c84b MR |
1439 | load_percpu_segment(cpu); /* We need to access per-cpu area */ |
1440 | switch_to_new_gdt(cpu); /* GDT and GS set */ | |
8d656bbe MR |
1441 | |
1442 | /* We are switching of the Xen provided GDT to our HVM mode | |
1443 | * GDT. The new GDT has __KERNEL_CS with CS.L = 1 | |
1444 | * and we are jumping to reload it. | |
1445 | */ | |
1446 | asm volatile ("pushq %0\n" | |
1447 | "leaq 1f(%%rip),%0\n" | |
1448 | "pushq %0\n" | |
1449 | "lretq\n" | |
1450 | "1:\n" | |
1451 | : "=&r" (dummy) : "0" (__KERNEL_CS)); | |
1452 | ||
1453 | /* | |
1454 | * While not needed, we also set the %es, %ds, and %fs | |
1455 | * to zero. We don't care about %ss as it is NULL. | |
1456 | * Strictly speaking this is not needed as Xen zeros those | |
1457 | * out (and also MSR_FS_BASE, MSR_GS_BASE, MSR_KERNEL_GS_BASE) | |
1458 | * | |
1459 | * Linux zeros them in cpu_init() and in secondary_startup_64 | |
1460 | * (for BSP). | |
1461 | */ | |
1462 | loadsegment(es, 0); | |
1463 | loadsegment(ds, 0); | |
1464 | loadsegment(fs, 0); | |
1465 | #else | |
1466 | /* PVH: TODO Implement. */ | |
1467 | BUG(); | |
1468 | #endif | |
1469 | return; /* PVH does not need any PV GDT ops. */ | |
1470 | } | |
577eebea JF |
1471 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; |
1472 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1473 | ||
1474 | setup_stack_canary_segment(0); | |
1475 | switch_to_new_gdt(0); | |
1476 | ||
1477 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1478 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1479 | } | |
1480 | ||
a2ef5dc2 | 1481 | #ifdef CONFIG_XEN_PVH |
c9f6e997 RPM |
1482 | /* |
1483 | * A PV guest starts with default flags that are not set for PVH, set them | |
1484 | * here asap. | |
1485 | */ | |
1486 | static void xen_pvh_set_cr_flags(int cpu) | |
1487 | { | |
1488 | ||
1489 | /* Some of these are setup in 'secondary_startup_64'. The others: | |
1490 | * X86_CR0_TS, X86_CR0_PE, X86_CR0_ET are set by Xen for HVM guests | |
1491 | * (which PVH shared codepaths), while X86_CR0_PG is for PVH. */ | |
1492 | write_cr0(read_cr0() | X86_CR0_MP | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM); | |
afca5013 MR |
1493 | |
1494 | if (!cpu) | |
1495 | return; | |
1496 | /* | |
1497 | * For BSP, PSE PGE are set in probe_page_size_mask(), for APs | |
21c4cd10 | 1498 | * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__init_cpu(). |
afca5013 | 1499 | */ |
16bf9226 | 1500 | if (boot_cpu_has(X86_FEATURE_PSE)) |
375074cc | 1501 | cr4_set_bits_and_update_boot(X86_CR4_PSE); |
afca5013 | 1502 | |
c109bf95 | 1503 | if (boot_cpu_has(X86_FEATURE_PGE)) |
375074cc | 1504 | cr4_set_bits_and_update_boot(X86_CR4_PGE); |
c9f6e997 RPM |
1505 | } |
1506 | ||
1507 | /* | |
1508 | * Note, that it is ref - because the only caller of this after init | |
1509 | * is PVH which is not going to use xen_load_gdt_boot or other | |
1510 | * __init functions. | |
1511 | */ | |
1512 | void __ref xen_pvh_secondary_vcpu_init(int cpu) | |
1513 | { | |
1514 | xen_setup_gdt(cpu); | |
1515 | xen_pvh_set_cr_flags(cpu); | |
1516 | } | |
1517 | ||
d285d683 MR |
1518 | static void __init xen_pvh_early_guest_init(void) |
1519 | { | |
1520 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1521 | return; | |
1522 | ||
c9f6e997 RPM |
1523 | if (!xen_feature(XENFEAT_hvm_callback_vector)) |
1524 | return; | |
1525 | ||
1526 | xen_have_vector_callback = 1; | |
a2ef5dc2 MR |
1527 | |
1528 | xen_pvh_early_cpu_init(0, false); | |
c9f6e997 | 1529 | xen_pvh_set_cr_flags(0); |
d285d683 MR |
1530 | |
1531 | #ifdef CONFIG_X86_32 | |
1532 | BUG(); /* PVH: Implement proper support. */ | |
1533 | #endif | |
1534 | } | |
a2ef5dc2 | 1535 | #endif /* CONFIG_XEN_PVH */ |
d285d683 | 1536 | |
8d152e7a LR |
1537 | static void __init xen_dom0_set_legacy_features(void) |
1538 | { | |
1539 | x86_platform.legacy.rtc = 1; | |
1540 | } | |
1541 | ||
5ead97c8 | 1542 | /* First C function to be called on Xen boot */ |
2605fc21 | 1543 | asmlinkage __visible void __init xen_start_kernel(void) |
5ead97c8 | 1544 | { |
ec35a69c | 1545 | struct physdev_set_iopl set_iopl; |
d1e9abd6 | 1546 | unsigned long initrd_start = 0; |
ec35a69c | 1547 | int rc; |
5ead97c8 JF |
1548 | |
1549 | if (!xen_start_info) | |
1550 | return; | |
1551 | ||
6e833587 JF |
1552 | xen_domain_type = XEN_PV_DOMAIN; |
1553 | ||
d285d683 | 1554 | xen_setup_features(); |
a2ef5dc2 | 1555 | #ifdef CONFIG_XEN_PVH |
d285d683 | 1556 | xen_pvh_early_guest_init(); |
a2ef5dc2 | 1557 | #endif |
7e77506a IC |
1558 | xen_setup_machphys_mapping(); |
1559 | ||
5ead97c8 | 1560 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1561 | pv_info = xen_info; |
1562 | pv_init_ops = xen_init_ops; | |
f221b04f | 1563 | if (!xen_pvh_domain()) { |
d285d683 | 1564 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1565 | |
f221b04f JB |
1566 | x86_platform.get_nmi_reason = xen_get_nmi_reason; |
1567 | } | |
1568 | ||
abacaadc DV |
1569 | if (xen_feature(XENFEAT_auto_translated_physmap)) |
1570 | x86_init.resources.memory_setup = xen_auto_xlated_memory_setup; | |
1571 | else | |
1572 | x86_init.resources.memory_setup = xen_memory_setup; | |
42bbdb43 | 1573 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1574 | x86_init.oem.banner = xen_banner; |
845b3944 | 1575 | |
409771d2 | 1576 | xen_init_time_ops(); |
93b1eab3 | 1577 | |
ce2eef33 | 1578 | /* |
577eebea | 1579 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1580 | */ |
577eebea | 1581 | |
973df35e JF |
1582 | xen_init_mmu_ops(); |
1583 | ||
577eebea JF |
1584 | /* Prevent unwanted bits from being set in PTEs. */ |
1585 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
577eebea | 1586 | |
817a824b IC |
1587 | /* |
1588 | * Prevent page tables from being allocated in highmem, even | |
1589 | * if CONFIG_HIGHPTE is enabled. | |
1590 | */ | |
1591 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1592 | ||
b75fe4e5 | 1593 | /* Work out if we support NX */ |
4763ed4d | 1594 | x86_configure_nx(); |
b75fe4e5 | 1595 | |
577eebea | 1596 | /* Get mfn list */ |
696fd7c5 | 1597 | xen_build_dynamic_phys_to_machine(); |
577eebea JF |
1598 | |
1599 | /* | |
1600 | * Set up kernel GDT and segment registers, mainly so that | |
1601 | * -fstack-protector code can be executed. | |
1602 | */ | |
5840c84b | 1603 | xen_setup_gdt(0); |
0d1edf46 | 1604 | |
ce2eef33 | 1605 | xen_init_irq_ops(); |
e826fe1b JF |
1606 | xen_init_cpuid_mask(); |
1607 | ||
94a8c3c2 | 1608 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1609 | /* |
94a8c3c2 | 1610 | * set up the basic apic ops. |
ad66dd34 | 1611 | */ |
feb44f1f | 1612 | xen_init_apic(); |
ad66dd34 | 1613 | #endif |
93b1eab3 | 1614 | |
e57778a1 JF |
1615 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1616 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1617 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1618 | } | |
1619 | ||
fefa629a JF |
1620 | machine_ops = xen_machine_ops; |
1621 | ||
38341432 JF |
1622 | /* |
1623 | * The only reliable way to retain the initial address of the | |
1624 | * percpu gdt_page is to remember it here, so we can go and | |
1625 | * mark it RW later, when the initial percpu area is freed. | |
1626 | */ | |
1627 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1628 | |
a9e7062d | 1629 | xen_smp_init(); |
5ead97c8 | 1630 | |
c1f5db1a IC |
1631 | #ifdef CONFIG_ACPI_NUMA |
1632 | /* | |
1633 | * The pages we from Xen are not related to machine pages, so | |
1634 | * any NUMA information the kernel tries to get from ACPI will | |
1635 | * be meaningless. Prevent it from trying. | |
1636 | */ | |
1637 | acpi_numa = -1; | |
c79c4982 | 1638 | #endif |
60223a32 | 1639 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1640 | possible map and a non-dummy shared_info. */ |
60223a32 | 1641 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1642 | |
55d80856 | 1643 | local_irq_disable(); |
2ce802f6 | 1644 | early_boot_irqs_disabled = true; |
55d80856 | 1645 | |
084a2a4e | 1646 | xen_raw_console_write("mapping kernel into physical memory\n"); |
6c2681c8 JG |
1647 | xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, |
1648 | xen_start_info->nr_pages); | |
1649 | xen_reserve_special_pages(); | |
5ead97c8 | 1650 | |
5ead97c8 JF |
1651 | /* keep using Xen gdt for now; no urgent need to change it */ |
1652 | ||
e68266b7 | 1653 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1654 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1655 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1656 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1657 | #else |
1658 | pv_info.kernel_rpl = 0; | |
1659 | #endif | |
5ead97c8 | 1660 | /* set the limit of our address space */ |
fb1d8404 | 1661 | xen_reserve_top(); |
5ead97c8 | 1662 | |
d285d683 MR |
1663 | /* PVH: runs at default kernel iopl of 0 */ |
1664 | if (!xen_pvh_domain()) { | |
1665 | /* | |
1666 | * We used to do this in xen_arch_setup, but that is too late | |
1667 | * on AMD were early_cpu_init (run before ->arch_setup()) calls | |
1668 | * early_amd_init which pokes 0xcf8 port. | |
1669 | */ | |
1670 | set_iopl.iopl = 1; | |
1671 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1672 | if (rc != 0) | |
1673 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1674 | } | |
ec35a69c | 1675 | |
7d087b68 | 1676 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1677 | /* set up basic CPUID stuff */ |
1678 | cpu_detect(&new_cpu_data); | |
60e019eb | 1679 | set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); |
d560bc61 | 1680 | new_cpu_data.wp_works_ok = 1; |
16aaa537 | 1681 | new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); |
7d087b68 | 1682 | #endif |
5ead97c8 | 1683 | |
d1e9abd6 JG |
1684 | if (xen_start_info->mod_start) { |
1685 | if (xen_start_info->flags & SIF_MOD_START_PFN) | |
1686 | initrd_start = PFN_PHYS(xen_start_info->mod_start); | |
1687 | else | |
1688 | initrd_start = __pa(xen_start_info->mod_start); | |
1689 | } | |
1690 | ||
5ead97c8 | 1691 | /* Poke various useful things into boot_params */ |
30c82645 | 1692 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
d1e9abd6 | 1693 | boot_params.hdr.ramdisk_image = initrd_start; |
30c82645 | 1694 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; |
b7c3c5c1 | 1695 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
ea179481 | 1696 | boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; |
5ead97c8 | 1697 | |
6e833587 | 1698 | if (!xen_initial_domain()) { |
83abc70a | 1699 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1700 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1701 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1702 | if (pci_xen) |
1703 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1704 | } else { |
c2419b4a JF |
1705 | const struct dom0_vga_console_info *info = |
1706 | (void *)((char *)xen_start_info + | |
1707 | xen_start_info->console.dom0.info_off); | |
ffb8b233 KRW |
1708 | struct xen_platform_op op = { |
1709 | .cmd = XENPF_firmware_info, | |
1710 | .interface_version = XENPF_INTERFACE_VERSION, | |
1711 | .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, | |
1712 | }; | |
c2419b4a | 1713 | |
8d152e7a LR |
1714 | x86_platform.set_legacy_features = |
1715 | xen_dom0_set_legacy_features; | |
c2419b4a JF |
1716 | xen_init_vga(info, xen_start_info->console.dom0.info_size); |
1717 | xen_start_info->console.domU.mfn = 0; | |
1718 | xen_start_info->console.domU.evtchn = 0; | |
1719 | ||
cfafae94 | 1720 | if (HYPERVISOR_platform_op(&op) == 0) |
ffb8b233 KRW |
1721 | boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; |
1722 | ||
5d990b62 CW |
1723 | /* Make sure ACS will be enabled */ |
1724 | pci_request_acs(); | |
211063dc KRW |
1725 | |
1726 | xen_acpi_sleep_register(); | |
bd49940a KRW |
1727 | |
1728 | /* Avoid searching for BIOS MP tables */ | |
1729 | x86_init.mpparse.find_smp_config = x86_init_noop; | |
1730 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | |
96f28bc6 DV |
1731 | |
1732 | xen_boot_params_init_edd(); | |
9e124fe1 | 1733 | } |
76a8df7b DV |
1734 | #ifdef CONFIG_PCI |
1735 | /* PCI BIOS service won't work from a PV guest. */ | |
1736 | pci_probe &= ~PCI_PROBE_BIOS; | |
1737 | #endif | |
084a2a4e JF |
1738 | xen_raw_console_write("about to get started...\n"); |
1739 | ||
88e957d6 VK |
1740 | /* Let's presume PV guests always boot on vCPU with id 0. */ |
1741 | per_cpu(xen_vcpu_id, 0) = 0; | |
1742 | ||
499d19b8 JF |
1743 | xen_setup_runstate_info(0); |
1744 | ||
c7341d6a | 1745 | xen_efi_init(); |
be81c8a1 | 1746 | |
5ead97c8 | 1747 | /* Start the world */ |
f5d36de0 | 1748 | #ifdef CONFIG_X86_32 |
f0d43100 | 1749 | i386_start_kernel(); |
f5d36de0 | 1750 | #else |
5054daa2 | 1751 | cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ |
084a2a4e | 1752 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1753 | #endif |
5ead97c8 | 1754 | } |
bee6ab53 | 1755 | |
e9daff24 | 1756 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1757 | { |
e9daff24 | 1758 | int cpu; |
bee6ab53 | 1759 | struct xen_add_to_physmap xatp; |
e9daff24 | 1760 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1761 | |
e9daff24 KRW |
1762 | if (!shared_info_page) |
1763 | shared_info_page = (struct shared_info *) | |
1764 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1765 | xatp.domid = DOMID_SELF; |
1766 | xatp.idx = 0; | |
1767 | xatp.space = XENMAPSPACE_shared_info; | |
e9daff24 | 1768 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; |
bee6ab53 SY |
1769 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) |
1770 | BUG(); | |
1771 | ||
e9daff24 | 1772 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; |
bee6ab53 | 1773 | |
016b6f5f SS |
1774 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1775 | * page, we use it in the event channel upcall and in some pvclock | |
1776 | * related functions. We don't need the vcpu_info placement | |
1777 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
e9daff24 KRW |
1778 | * HVM. |
1779 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1780 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1781 | * in that case multiple vcpus might be online. */ | |
1782 | for_each_online_cpu(cpu) { | |
d5b17dbf | 1783 | /* Leave it to be NULL. */ |
e15a8621 | 1784 | if (xen_vcpu_nr(cpu) >= MAX_VIRT_CPUS) |
d5b17dbf | 1785 | continue; |
e15a8621 VK |
1786 | per_cpu(xen_vcpu, cpu) = |
1787 | &HYPERVISOR_shared_info->vcpu_info[xen_vcpu_nr(cpu)]; | |
016b6f5f | 1788 | } |
bee6ab53 SY |
1789 | } |
1790 | ||
e9daff24 | 1791 | #ifdef CONFIG_XEN_PVHVM |
4ff2d062 OH |
1792 | static void __init init_hvm_pv_info(void) |
1793 | { | |
e9daff24 | 1794 | int major, minor; |
5eb65be2 | 1795 | uint32_t eax, ebx, ecx, edx, pages, msr, base; |
4ff2d062 OH |
1796 | u64 pfn; |
1797 | ||
1798 | base = xen_cpuid_base(); | |
e9daff24 KRW |
1799 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); |
1800 | ||
1801 | major = eax >> 16; | |
1802 | minor = eax & 0xffff; | |
1803 | printk(KERN_INFO "Xen version %d.%d.\n", major, minor); | |
1804 | ||
4ff2d062 OH |
1805 | cpuid(base + 2, &pages, &msr, &ecx, &edx); |
1806 | ||
1807 | pfn = __pa(hypercall_page); | |
1808 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1809 | ||
1810 | xen_setup_features(); | |
1811 | ||
88e957d6 VK |
1812 | cpuid(base + 4, &eax, &ebx, &ecx, &edx); |
1813 | if (eax & XEN_HVM_CPUID_VCPU_ID_PRESENT) | |
1814 | this_cpu_write(xen_vcpu_id, ebx); | |
1815 | else | |
1816 | this_cpu_write(xen_vcpu_id, smp_processor_id()); | |
1817 | ||
4ff2d062 OH |
1818 | pv_info.name = "Xen HVM"; |
1819 | ||
1820 | xen_domain_type = XEN_HVM_DOMAIN; | |
1821 | } | |
1822 | ||
148f9bb8 PG |
1823 | static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action, |
1824 | void *hcpu) | |
38e20b07 SY |
1825 | { |
1826 | int cpu = (long)hcpu; | |
1827 | switch (action) { | |
1828 | case CPU_UP_PREPARE: | |
88e957d6 VK |
1829 | if (cpu_acpi_id(cpu) != U32_MAX) |
1830 | per_cpu(xen_vcpu_id, cpu) = cpu_acpi_id(cpu); | |
1831 | else | |
1832 | per_cpu(xen_vcpu_id, cpu) = cpu; | |
90d4f553 | 1833 | xen_vcpu_setup(cpu); |
7918c92a | 1834 | if (xen_have_vector_callback) { |
7918c92a KRW |
1835 | if (xen_feature(XENFEAT_hvm_safe_pvclock)) |
1836 | xen_setup_timer(cpu); | |
1837 | } | |
38e20b07 SY |
1838 | break; |
1839 | default: | |
1840 | break; | |
1841 | } | |
1842 | return NOTIFY_OK; | |
1843 | } | |
1844 | ||
148f9bb8 | 1845 | static struct notifier_block xen_hvm_cpu_notifier = { |
38e20b07 SY |
1846 | .notifier_call = xen_hvm_cpu_notify, |
1847 | }; | |
1848 | ||
0b34a166 VK |
1849 | #ifdef CONFIG_KEXEC_CORE |
1850 | static void xen_hvm_shutdown(void) | |
1851 | { | |
1852 | native_machine_shutdown(); | |
1853 | if (kexec_in_progress) | |
1854 | xen_reboot(SHUTDOWN_soft_reset); | |
1855 | } | |
1856 | ||
1857 | static void xen_hvm_crash_shutdown(struct pt_regs *regs) | |
1858 | { | |
1859 | native_machine_crash_shutdown(regs); | |
1860 | xen_reboot(SHUTDOWN_soft_reset); | |
1861 | } | |
1862 | #endif | |
1863 | ||
bee6ab53 SY |
1864 | static void __init xen_hvm_guest_init(void) |
1865 | { | |
a71dbdaa BO |
1866 | if (xen_pv_domain()) |
1867 | return; | |
1868 | ||
4ff2d062 | 1869 | init_hvm_pv_info(); |
bee6ab53 | 1870 | |
016b6f5f | 1871 | xen_hvm_init_shared_info(); |
38e20b07 | 1872 | |
669b0ae9 VC |
1873 | xen_panic_handler_init(); |
1874 | ||
38e20b07 SY |
1875 | if (xen_feature(XENFEAT_hvm_callback_vector)) |
1876 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1877 | xen_hvm_smp_init(); |
38e20b07 | 1878 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1879 | xen_unplug_emulated_devices(); |
38e20b07 | 1880 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1881 | xen_hvm_init_time_ops(); |
59151001 | 1882 | xen_hvm_init_mmu_ops(); |
0b34a166 VK |
1883 | #ifdef CONFIG_KEXEC_CORE |
1884 | machine_ops.shutdown = xen_hvm_shutdown; | |
1885 | machine_ops.crash_shutdown = xen_hvm_crash_shutdown; | |
1886 | #endif | |
bee6ab53 | 1887 | } |
a71dbdaa | 1888 | #endif |
bee6ab53 | 1889 | |
8d693b91 KRW |
1890 | static bool xen_nopv = false; |
1891 | static __init int xen_parse_nopv(char *arg) | |
1892 | { | |
1893 | xen_nopv = true; | |
1894 | return 0; | |
1895 | } | |
1896 | early_param("xen_nopv", xen_parse_nopv); | |
1897 | ||
a71dbdaa | 1898 | static uint32_t __init xen_platform(void) |
bee6ab53 | 1899 | { |
8d693b91 KRW |
1900 | if (xen_nopv) |
1901 | return 0; | |
1902 | ||
9df56f19 | 1903 | return xen_cpuid_base(); |
bee6ab53 SY |
1904 | } |
1905 | ||
d9b8ca84 SY |
1906 | bool xen_hvm_need_lapic(void) |
1907 | { | |
8d693b91 KRW |
1908 | if (xen_nopv) |
1909 | return false; | |
d9b8ca84 SY |
1910 | if (xen_pv_domain()) |
1911 | return false; | |
1912 | if (!xen_hvm_domain()) | |
1913 | return false; | |
1914 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1915 | return false; | |
1916 | return true; | |
1917 | } | |
1918 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1919 | ||
a71dbdaa BO |
1920 | static void xen_set_cpu_features(struct cpuinfo_x86 *c) |
1921 | { | |
91e2eea9 | 1922 | if (xen_pv_domain()) { |
a71dbdaa | 1923 | clear_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS); |
91e2eea9 BO |
1924 | set_cpu_cap(c, X86_FEATURE_XENPV); |
1925 | } | |
a71dbdaa BO |
1926 | } |
1927 | ||
1928 | const struct hypervisor_x86 x86_hyper_xen = { | |
1929 | .name = "Xen", | |
1930 | .detect = xen_platform, | |
1931 | #ifdef CONFIG_XEN_PVHVM | |
bee6ab53 | 1932 | .init_platform = xen_hvm_guest_init, |
a71dbdaa | 1933 | #endif |
4cca6ea0 | 1934 | .x2apic_available = xen_x2apic_para_available, |
a71dbdaa | 1935 | .set_cpu_features = xen_set_cpu_features, |
bee6ab53 | 1936 | }; |
a71dbdaa | 1937 | EXPORT_SYMBOL(x86_hyper_xen); |
a314e3eb SS |
1938 | |
1939 | #ifdef CONFIG_HOTPLUG_CPU | |
1940 | void xen_arch_register_cpu(int num) | |
1941 | { | |
1942 | arch_register_cpu(num); | |
1943 | } | |
1944 | EXPORT_SYMBOL(xen_arch_register_cpu); | |
1945 | ||
1946 | void xen_arch_unregister_cpu(int num) | |
1947 | { | |
1948 | arch_unregister_cpu(num); | |
1949 | } | |
1950 | EXPORT_SYMBOL(xen_arch_unregister_cpu); | |
1951 | #endif |