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x86: fix initialization of 'l' bit in ldt descriptors
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / xen / enlighten.c
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5ead97c8
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
f4f97b3e
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
084a2a4e 36#include <xen/hvc-console.h>
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37
38#include <asm/paravirt.h>
39#include <asm/page.h>
40#include <asm/xen/hypercall.h>
41#include <asm/xen/hypervisor.h>
42#include <asm/fixmap.h>
43#include <asm/processor.h>
1153968a 44#include <asm/msr-index.h>
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45#include <asm/setup.h>
46#include <asm/desc.h>
47#include <asm/pgtable.h>
f87e4cac 48#include <asm/tlbflush.h>
fefa629a 49#include <asm/reboot.h>
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50
51#include "xen-ops.h"
3b827c1b 52#include "mmu.h"
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53#include "multicalls.h"
54
55EXPORT_SYMBOL_GPL(hypercall_page);
56
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57DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
58DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 59
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60/*
61 * Identity map, in addition to plain kernel map. This needs to be
62 * large enough to allocate page table pages to allocate the rest.
63 * Each page can map 2MB.
64 */
65static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
66
67#ifdef CONFIG_X86_64
68/* l3 pud for userspace vsyscall mapping */
69static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
70#endif /* CONFIG_X86_64 */
71
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72/*
73 * Note about cr3 (pagetable base) values:
74 *
75 * xen_cr3 contains the current logical cr3 value; it contains the
76 * last set cr3. This may not be the current effective cr3, because
77 * its update may be being lazily deferred. However, a vcpu looking
78 * at its own cr3 can use this value knowing that it everything will
79 * be self-consistent.
80 *
81 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
82 * hypercall to set the vcpu cr3 is complete (so it may be a little
83 * out of date, but it will never be set early). If one vcpu is
84 * looking at another vcpu's cr3 value, it should use this variable.
85 */
86DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
87DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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88
89struct start_info *xen_start_info;
90EXPORT_SYMBOL_GPL(xen_start_info);
91
a0d695c8 92struct shared_info xen_dummy_shared_info;
60223a32
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93
94/*
95 * Point at some empty memory to start with. We map the real shared_info
96 * page as soon as fixmap is up and running.
97 */
a0d695c8 98struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
60223a32
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99
100/*
101 * Flag to determine whether vcpu info placement is available on all
102 * VCPUs. We assume it is to start with, and then set it to zero on
103 * the first failure. This is because it can succeed on some VCPUs
104 * and not others, since it can involve hypervisor memory allocation,
105 * or because the guest failed to guarantee all the appropriate
106 * constraints on all VCPUs (ie buffer can't cross a page boundary).
107 *
108 * Note that any particular CPU may be using a placed vcpu structure,
109 * but we can only optimise if the all are.
110 *
111 * 0: not available, 1: available
112 */
04c44a08 113static int have_vcpu_info_placement = 1;
60223a32 114
9c7a7942 115static void xen_vcpu_setup(int cpu)
5ead97c8 116{
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117 struct vcpu_register_vcpu_info info;
118 int err;
119 struct vcpu_info *vcpup;
120
a0d695c8 121 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 122 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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123
124 if (!have_vcpu_info_placement)
125 return; /* already tested, not available */
126
127 vcpup = &per_cpu(xen_vcpu_info, cpu);
128
129 info.mfn = virt_to_mfn(vcpup);
130 info.offset = offset_in_page(vcpup);
131
e3d26976 132 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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133 cpu, vcpup, info.mfn, info.offset);
134
135 /* Check to see if the hypervisor will put the vcpu_info
136 structure where we want it, which allows direct access via
137 a percpu-variable. */
138 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
139
140 if (err) {
141 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
142 have_vcpu_info_placement = 0;
143 } else {
144 /* This cpu is using the registered vcpu info, even if
145 later ones fail to. */
146 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 147
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148 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
149 cpu, vcpup);
150 }
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151}
152
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153/*
154 * On restore, set the vcpu placement up again.
155 * If it fails, then we're in a bad state, since
156 * we can't back out from using it...
157 */
158void xen_vcpu_restore(void)
159{
160 if (have_vcpu_info_placement) {
161 int cpu;
162
163 for_each_online_cpu(cpu) {
164 bool other_cpu = (cpu != smp_processor_id());
165
166 if (other_cpu &&
167 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
168 BUG();
169
170 xen_vcpu_setup(cpu);
171
172 if (other_cpu &&
173 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
174 BUG();
175 }
176
177 BUG_ON(!have_vcpu_info_placement);
178 }
179}
180
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181static void __init xen_banner(void)
182{
95c7c23b
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183 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
184 struct xen_extraversion extra;
185 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
186
5ead97c8 187 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 188 pv_info.name);
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189 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
190 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 191 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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192}
193
65ea5b03
PA
194static void xen_cpuid(unsigned int *ax, unsigned int *bx,
195 unsigned int *cx, unsigned int *dx)
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196{
197 unsigned maskedx = ~0;
198
199 /*
200 * Mask out inconvenient features, to try and disable as many
201 * unsupported kernel subsystems as possible.
202 */
65ea5b03 203 if (*ax == 1)
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204 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
205 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
dbe9e994
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206 (1 << X86_FEATURE_MCE) | /* disable MCE */
207 (1 << X86_FEATURE_MCA) | /* disable MCA */
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208 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
209
210 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
211 : "=a" (*ax),
212 "=b" (*bx),
213 "=c" (*cx),
214 "=d" (*dx)
215 : "0" (*ax), "2" (*cx));
216 *dx &= maskedx;
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217}
218
219static void xen_set_debugreg(int reg, unsigned long val)
220{
221 HYPERVISOR_set_debugreg(reg, val);
222}
223
224static unsigned long xen_get_debugreg(int reg)
225{
226 return HYPERVISOR_get_debugreg(reg);
227}
228
229static unsigned long xen_save_fl(void)
230{
231 struct vcpu_info *vcpu;
232 unsigned long flags;
233
5ead97c8 234 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 235
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236 /* flag has opposite sense of mask */
237 flags = !vcpu->evtchn_upcall_mask;
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238
239 /* convert to IF type flag
240 -0 -> 0x00000000
241 -1 -> 0xffffffff
242 */
243 return (-flags) & X86_EFLAGS_IF;
244}
245
246static void xen_restore_fl(unsigned long flags)
247{
248 struct vcpu_info *vcpu;
249
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250 /* convert from IF type flag */
251 flags = !(flags & X86_EFLAGS_IF);
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252
253 /* There's a one instruction preempt window here. We need to
254 make sure we're don't switch CPUs between getting the vcpu
255 pointer and updating the mask. */
256 preempt_disable();
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257 vcpu = x86_read_percpu(xen_vcpu);
258 vcpu->evtchn_upcall_mask = flags;
f120f13e 259 preempt_enable_no_resched();
5ead97c8 260
f120f13e
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261 /* Doesn't matter if we get preempted here, because any
262 pending event will get dealt with anyway. */
5ead97c8 263
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264 if (flags == 0) {
265 preempt_check_resched();
266 barrier(); /* unmask then check (avoid races) */
5ead97c8
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267 if (unlikely(vcpu->evtchn_upcall_pending))
268 force_evtchn_callback();
f120f13e 269 }
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270}
271
272static void xen_irq_disable(void)
273{
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274 /* There's a one instruction preempt window here. We need to
275 make sure we're don't switch CPUs between getting the vcpu
276 pointer and updating the mask. */
5ead97c8 277 preempt_disable();
f120f13e 278 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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279 preempt_enable_no_resched();
280}
281
282static void xen_irq_enable(void)
283{
284 struct vcpu_info *vcpu;
285
239d1fc0
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286 /* We don't need to worry about being preempted here, since
287 either a) interrupts are disabled, so no preemption, or b)
288 the caller is confused and is trying to re-enable interrupts
289 on an indeterminate processor. */
290
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291 vcpu = x86_read_percpu(xen_vcpu);
292 vcpu->evtchn_upcall_mask = 0;
293
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294 /* Doesn't matter if we get preempted here, because any
295 pending event will get dealt with anyway. */
5ead97c8 296
f120f13e 297 barrier(); /* unmask then check (avoid races) */
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298 if (unlikely(vcpu->evtchn_upcall_pending))
299 force_evtchn_callback();
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300}
301
302static void xen_safe_halt(void)
303{
304 /* Blocking includes an implicit local_irq_enable(). */
349c709f 305 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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306 BUG();
307}
308
309static void xen_halt(void)
310{
311 if (irqs_disabled())
312 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
313 else
314 xen_safe_halt();
315}
316
8965c1c0 317static void xen_leave_lazy(void)
5ead97c8 318{
8965c1c0 319 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 320 xen_mc_flush();
5ead97c8
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321}
322
323static unsigned long xen_store_tr(void)
324{
325 return 0;
326}
327
38ffbe66
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328static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
329{
330 unsigned pages = roundup(entries * LDT_ENTRY_SIZE, PAGE_SIZE);
331 void *v = ldt;
332 int i;
333
334 for(i = 0; i < pages; i += PAGE_SIZE)
335 make_lowmem_page_readonly(v + i);
336}
337
338static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
339{
340 unsigned pages = roundup(entries * LDT_ENTRY_SIZE, PAGE_SIZE);
341 void *v = ldt;
342 int i;
343
344 for(i = 0; i < pages; i += PAGE_SIZE)
345 make_lowmem_page_readwrite(v + i);
346}
347
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348static void xen_set_ldt(const void *addr, unsigned entries)
349{
5ead97c8
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350 struct mmuext_op *op;
351 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
352
353 op = mcs.args;
354 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 355 op->arg1.linear_addr = (unsigned long)addr;
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356 op->arg2.nr_ents = entries;
357
358 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
359
360 xen_mc_issue(PARAVIRT_LAZY_CPU);
361}
362
6b68f01b 363static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8
JF
364{
365 unsigned long *frames;
366 unsigned long va = dtr->address;
367 unsigned int size = dtr->size + 1;
368 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
369 int f;
370 struct multicall_space mcs;
371
372 /* A GDT can be up to 64k in size, which corresponds to 8192
373 8-byte entries, or 16 4k pages.. */
374
375 BUG_ON(size > 65536);
376 BUG_ON(va & ~PAGE_MASK);
377
378 mcs = xen_mc_entry(sizeof(*frames) * pages);
379 frames = mcs.args;
380
381 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
382 frames[f] = virt_to_mfn(va);
383 make_lowmem_page_readonly((void *)va);
384 }
385
386 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
387
388 xen_mc_issue(PARAVIRT_LAZY_CPU);
389}
390
391static void load_TLS_descriptor(struct thread_struct *t,
392 unsigned int cpu, unsigned int i)
393{
394 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
395 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
396 struct multicall_space mc = __xen_mc_entry(0);
397
398 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
399}
400
401static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
402{
8b84ad94
JF
403 /*
404 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
405 * it means we're in a context switch, and %gs has just been
406 * saved. This means we can zero it out to prevent faults on
407 * exit from the hypervisor if the next process has no %gs.
408 * Either way, it has been saved, and the new value will get
409 * loaded properly. This will go away as soon as Xen has been
410 * modified to not save/restore %gs for normal hypercalls.
8a95408e
EH
411 *
412 * On x86_64, this hack is not used for %gs, because gs points
413 * to KERNEL_GS_BASE (and uses it for PDA references), so we
414 * must not zero %gs on x86_64
415 *
416 * For x86_64, we need to zero %fs, otherwise we may get an
417 * exception between the new %fs descriptor being loaded and
418 * %fs being effectively cleared at __switch_to().
8b84ad94 419 */
8a95408e
EH
420 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
421#ifdef CONFIG_X86_32
8b84ad94 422 loadsegment(gs, 0);
8a95408e
EH
423#else
424 loadsegment(fs, 0);
425#endif
426 }
427
428 xen_mc_batch();
429
430 load_TLS_descriptor(t, cpu, 0);
431 load_TLS_descriptor(t, cpu, 1);
432 load_TLS_descriptor(t, cpu, 2);
433
434 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
435}
436
a8fc1089
EH
437#ifdef CONFIG_X86_64
438static void xen_load_gs_index(unsigned int idx)
439{
440 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
441 BUG();
5ead97c8 442}
a8fc1089 443#endif
5ead97c8
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444
445static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 446 const void *ptr)
5ead97c8
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447{
448 unsigned long lp = (unsigned long)&dt[entrynum];
449 xmaddr_t mach_lp = virt_to_machine(lp);
75b8bb3e 450 u64 entry = *(u64 *)ptr;
5ead97c8 451
f120f13e
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452 preempt_disable();
453
5ead97c8
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454 xen_mc_flush();
455 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
456 BUG();
f120f13e
JF
457
458 preempt_enable();
5ead97c8
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459}
460
e176d367 461static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
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462 struct trap_info *info)
463{
e176d367 464 if (val->type != 0xf && val->type != 0xe)
5ead97c8
JF
465 return 0;
466
467 info->vector = vector;
e176d367
EH
468 info->address = gate_offset(*val);
469 info->cs = gate_segment(*val);
470 info->flags = val->dpl;
5ead97c8 471 /* interrupt gates clear IF */
e176d367 472 if (val->type == 0xe)
5ead97c8
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473 info->flags |= 4;
474
475 return 1;
476}
477
478/* Locations of each CPU's IDT */
6b68f01b 479static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
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480
481/* Set an IDT entry. If the entry is part of the current IDT, then
482 also update Xen. */
8d947344 483static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 484{
5ead97c8 485 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
486 unsigned long start, end;
487
488 preempt_disable();
489
490 start = __get_cpu_var(idt_desc).address;
491 end = start + __get_cpu_var(idt_desc).size + 1;
5ead97c8
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492
493 xen_mc_flush();
494
8d947344 495 native_write_idt_entry(dt, entrynum, g);
5ead97c8
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496
497 if (p >= start && (p + 8) <= end) {
498 struct trap_info info[2];
499
500 info[1].address = 0;
501
e176d367 502 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
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503 if (HYPERVISOR_set_trap_table(info))
504 BUG();
505 }
f120f13e
JF
506
507 preempt_enable();
5ead97c8
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508}
509
6b68f01b 510static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 511 struct trap_info *traps)
5ead97c8 512{
5ead97c8
JF
513 unsigned in, out, count;
514
e176d367 515 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
516 BUG_ON(count > 256);
517
5ead97c8 518 for (in = out = 0; in < count; in++) {
e176d367 519 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 520
e176d367 521 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
522 out++;
523 }
524 traps[out].address = 0;
f87e4cac
JF
525}
526
527void xen_copy_trap_info(struct trap_info *traps)
528{
6b68f01b 529 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
530
531 xen_convert_trap_info(desc, traps);
f87e4cac
JF
532}
533
534/* Load a new IDT into Xen. In principle this can be per-CPU, so we
535 hold a spinlock to protect the static traps[] array (static because
536 it avoids allocation, and saves stack space). */
6b68f01b 537static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
538{
539 static DEFINE_SPINLOCK(lock);
540 static struct trap_info traps[257];
f87e4cac
JF
541
542 spin_lock(&lock);
543
f120f13e
JF
544 __get_cpu_var(idt_desc) = *desc;
545
f87e4cac 546 xen_convert_trap_info(desc, traps);
5ead97c8
JF
547
548 xen_mc_flush();
549 if (HYPERVISOR_set_trap_table(traps))
550 BUG();
551
552 spin_unlock(&lock);
553}
554
555/* Write a GDT descriptor entry. Ignore LDT descriptors, since
556 they're handled differently. */
557static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 558 const void *desc, int type)
5ead97c8 559{
f120f13e
JF
560 preempt_disable();
561
014b15be
GOC
562 switch (type) {
563 case DESC_LDT:
564 case DESC_TSS:
5ead97c8
JF
565 /* ignore */
566 break;
567
568 default: {
569 xmaddr_t maddr = virt_to_machine(&dt[entry]);
5ead97c8
JF
570
571 xen_mc_flush();
014b15be 572 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
573 BUG();
574 }
575
576 }
f120f13e
JF
577
578 preempt_enable();
5ead97c8
JF
579}
580
faca6227 581static void xen_load_sp0(struct tss_struct *tss,
f120f13e 582 struct thread_struct *thread)
5ead97c8
JF
583{
584 struct multicall_space mcs = xen_mc_entry(0);
faca6227 585 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
586 xen_mc_issue(PARAVIRT_LAZY_CPU);
587}
588
589static void xen_set_iopl_mask(unsigned mask)
590{
591 struct physdev_set_iopl set_iopl;
592
593 /* Force the change at ring 0. */
594 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
595 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
596}
597
598static void xen_io_delay(void)
599{
600}
601
602#ifdef CONFIG_X86_LOCAL_APIC
42e0a9aa 603static u32 xen_apic_read(unsigned long reg)
5ead97c8
JF
604{
605 return 0;
606}
f87e4cac 607
42e0a9aa 608static void xen_apic_write(unsigned long reg, u32 val)
f87e4cac
JF
609{
610 /* Warn to see if there's any stray references */
611 WARN_ON(1);
612}
5ead97c8
JF
613#endif
614
615static void xen_flush_tlb(void)
616{
d66bf8fc 617 struct mmuext_op *op;
41e332b2
JF
618 struct multicall_space mcs;
619
620 preempt_disable();
621
622 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 623
d66bf8fc
JF
624 op = mcs.args;
625 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
626 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
627
628 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
629
630 preempt_enable();
5ead97c8
JF
631}
632
633static void xen_flush_tlb_single(unsigned long addr)
634{
d66bf8fc 635 struct mmuext_op *op;
41e332b2
JF
636 struct multicall_space mcs;
637
638 preempt_disable();
5ead97c8 639
41e332b2 640 mcs = xen_mc_entry(sizeof(*op));
d66bf8fc
JF
641 op = mcs.args;
642 op->cmd = MMUEXT_INVLPG_LOCAL;
643 op->arg1.linear_addr = addr & PAGE_MASK;
644 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
645
646 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
647
648 preempt_enable();
5ead97c8
JF
649}
650
f87e4cac
JF
651static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
652 unsigned long va)
653{
d66bf8fc
JF
654 struct {
655 struct mmuext_op op;
656 cpumask_t mask;
657 } *args;
f87e4cac 658 cpumask_t cpumask = *cpus;
d66bf8fc 659 struct multicall_space mcs;
f87e4cac
JF
660
661 /*
662 * A couple of (to be removed) sanity checks:
663 *
664 * - current CPU must not be in mask
665 * - mask must exist :)
666 */
667 BUG_ON(cpus_empty(cpumask));
668 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
669 BUG_ON(!mm);
670
671 /* If a CPU which we ran on has gone down, OK. */
672 cpus_and(cpumask, cpumask, cpu_online_map);
673 if (cpus_empty(cpumask))
674 return;
675
d66bf8fc
JF
676 mcs = xen_mc_entry(sizeof(*args));
677 args = mcs.args;
678 args->mask = cpumask;
679 args->op.arg2.vcpumask = &args->mask;
680
f87e4cac 681 if (va == TLB_FLUSH_ALL) {
d66bf8fc 682 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 683 } else {
d66bf8fc
JF
684 args->op.cmd = MMUEXT_INVLPG_MULTI;
685 args->op.arg1.linear_addr = va;
f87e4cac
JF
686 }
687
d66bf8fc
JF
688 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
689
690 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
691}
692
7b1333aa
JF
693static void xen_clts(void)
694{
695 struct multicall_space mcs;
696
697 mcs = xen_mc_entry(0);
698
699 MULTI_fpu_taskswitch(mcs.mc, 0);
700
701 xen_mc_issue(PARAVIRT_LAZY_CPU);
702}
703
704static void xen_write_cr0(unsigned long cr0)
705{
706 struct multicall_space mcs;
707
708 /* Only pay attention to cr0.TS; everything else is
709 ignored. */
710 mcs = xen_mc_entry(0);
711
712 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
713
714 xen_mc_issue(PARAVIRT_LAZY_CPU);
715}
716
60223a32
JF
717static void xen_write_cr2(unsigned long cr2)
718{
719 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
720}
721
5ead97c8
JF
722static unsigned long xen_read_cr2(void)
723{
724 return x86_read_percpu(xen_vcpu)->arch.cr2;
725}
726
60223a32
JF
727static unsigned long xen_read_cr2_direct(void)
728{
729 return x86_read_percpu(xen_vcpu_info.arch.cr2);
730}
731
5ead97c8
JF
732static void xen_write_cr4(unsigned long cr4)
733{
2956a351
JF
734 cr4 &= ~X86_CR4_PGE;
735 cr4 &= ~X86_CR4_PSE;
736
737 native_write_cr4(cr4);
5ead97c8
JF
738}
739
5ead97c8
JF
740static unsigned long xen_read_cr3(void)
741{
742 return x86_read_percpu(xen_cr3);
743}
744
9f79991d
JF
745static void set_current_cr3(void *v)
746{
747 x86_write_percpu(xen_current_cr3, (unsigned long)v);
748}
749
d6182fbf 750static void __xen_write_cr3(bool kernel, unsigned long cr3)
5ead97c8 751{
9f79991d
JF
752 struct mmuext_op *op;
753 struct multicall_space mcs;
d6182fbf 754 unsigned long mfn;
9f79991d 755
d6182fbf
JF
756 if (cr3)
757 mfn = pfn_to_mfn(PFN_DOWN(cr3));
758 else
759 mfn = 0;
f120f13e 760
d6182fbf 761 WARN_ON(mfn == 0 && kernel);
5ead97c8 762
d6182fbf 763 mcs = __xen_mc_entry(sizeof(*op));
5ead97c8 764
9f79991d 765 op = mcs.args;
d6182fbf 766 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
9f79991d 767 op->arg1.mfn = mfn;
5ead97c8 768
9f79991d 769 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 770
d6182fbf
JF
771 if (kernel) {
772 x86_write_percpu(xen_cr3, cr3);
773
774 /* Update xen_current_cr3 once the batch has actually
775 been submitted. */
776 xen_mc_callback(set_current_cr3, (void *)cr3);
777 }
778}
779
780static void xen_write_cr3(unsigned long cr3)
781{
782 BUG_ON(preemptible());
783
784 xen_mc_batch(); /* disables interrupts */
785
786 /* Update while interrupts are disabled, so its atomic with
787 respect to ipis */
788 x86_write_percpu(xen_cr3, cr3);
789
790 __xen_write_cr3(true, cr3);
791
792#ifdef CONFIG_X86_64
793 {
794 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
795 if (user_pgd)
796 __xen_write_cr3(false, __pa(user_pgd));
797 else
798 __xen_write_cr3(false, 0);
799 }
800#endif
5ead97c8 801
9f79991d 802 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
803}
804
1153968a
JF
805static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
806{
807 int ret;
808
809 ret = 0;
810
811 switch(msr) {
812#ifdef CONFIG_X86_64
813 unsigned which;
814 u64 base;
815
816 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
817 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
818 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
819
820 set:
821 base = ((u64)high << 32) | low;
822 if (HYPERVISOR_set_segment_base(which, base) != 0)
823 ret = -EFAULT;
824 break;
825#endif
826 default:
827 ret = native_write_msr_safe(msr, low, high);
828 }
829
830 return ret;
831}
832
f4f97b3e
JF
833/* Early in boot, while setting up the initial pagetable, assume
834 everything is pinned. */
6944a9c8 835static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 836{
af7ae3b9 837#ifdef CONFIG_FLATMEM
f4f97b3e 838 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 839#endif
5ead97c8
JF
840 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
841}
842
6944a9c8 843/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 844 only init_mm and anything attached to that is pinned. */
6944a9c8 845static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
846{
847 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
848}
849
f6433706 850static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
851{
852 struct mmuext_op op;
f6433706 853 op.cmd = cmd;
74260714
JF
854 op.arg1.mfn = pfn_to_mfn(pfn);
855 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
856 BUG();
857}
858
f4f97b3e
JF
859/* This needs to make sure the new pte page is pinned iff its being
860 attached to a pinned pagetable. */
1c70e9bd 861static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 862{
f4f97b3e 863 struct page *page = pfn_to_page(pfn);
5ead97c8 864
f4f97b3e
JF
865 if (PagePinned(virt_to_page(mm->pgd))) {
866 SetPagePinned(page);
867
74260714 868 if (!PageHighMem(page)) {
f4f97b3e 869 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
870 if (level == PT_PTE)
871 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 872 } else
f4f97b3e
JF
873 /* make sure there are no stray mappings of
874 this page */
875 kmap_flush_unused();
876 }
5ead97c8
JF
877}
878
6944a9c8 879static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 880{
f6433706 881 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
882}
883
6944a9c8 884static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 885{
f6433706 886 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
887}
888
d6182fbf
JF
889static int xen_pgd_alloc(struct mm_struct *mm)
890{
891 pgd_t *pgd = mm->pgd;
892 int ret = 0;
893
894 BUG_ON(PagePinned(virt_to_page(pgd)));
895
896#ifdef CONFIG_X86_64
897 {
898 struct page *page = virt_to_page(pgd);
bf18bf94 899 pgd_t *user_pgd;
d6182fbf
JF
900
901 BUG_ON(page->private != 0);
902
bf18bf94
JF
903 ret = -ENOMEM;
904
905 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
906 page->private = (unsigned long)user_pgd;
907
908 if (user_pgd != NULL) {
909 user_pgd[pgd_index(VSYSCALL_START)] =
910 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
911 ret = 0;
912 }
d6182fbf
JF
913
914 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
915 }
916#endif
917
918 return ret;
919}
920
921static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
922{
923#ifdef CONFIG_X86_64
924 pgd_t *user_pgd = xen_get_user_pgd(pgd);
925
926 if (user_pgd)
927 free_page((unsigned long)user_pgd);
928#endif
929}
930
f4f97b3e 931/* This should never happen until we're OK to use struct page */
f6433706 932static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 933{
f4f97b3e
JF
934 struct page *page = pfn_to_page(pfn);
935
936 if (PagePinned(page)) {
74260714 937 if (!PageHighMem(page)) {
a684d69d
MM
938 if (level == PT_PTE)
939 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 940 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 941 }
c946c7de 942 ClearPagePinned(page);
f4f97b3e 943 }
5ead97c8
JF
944}
945
6944a9c8 946static void xen_release_pte(u32 pfn)
f6433706
MM
947{
948 xen_release_ptpage(pfn, PT_PTE);
949}
950
6944a9c8 951static void xen_release_pmd(u32 pfn)
f6433706
MM
952{
953 xen_release_ptpage(pfn, PT_PMD);
954}
955
f6e58732
JF
956#if PAGETABLE_LEVELS == 4
957static void xen_alloc_pud(struct mm_struct *mm, u32 pfn)
958{
959 xen_alloc_ptpage(mm, pfn, PT_PUD);
960}
961
962static void xen_release_pud(u32 pfn)
963{
964 xen_release_ptpage(pfn, PT_PUD);
965}
966#endif
967
f4f97b3e
JF
968#ifdef CONFIG_HIGHPTE
969static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 970{
f4f97b3e
JF
971 pgprot_t prot = PAGE_KERNEL;
972
973 if (PagePinned(page))
974 prot = PAGE_KERNEL_RO;
975
976 if (0 && PageHighMem(page))
977 printk("mapping highpte %lx type %d prot %s\n",
978 page_to_pfn(page), type,
979 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
980
981 return kmap_atomic_prot(page, type, prot);
5ead97c8 982}
f4f97b3e 983#endif
5ead97c8 984
9a4029fd
JF
985static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
986{
987 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
988 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
989 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
990 pte_val_ma(pte));
991
992 return pte;
993}
994
995/* Init-time set_pte while constructing initial pagetables, which
996 doesn't allow RO pagetable pages to be remapped RW */
997static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
998{
999 pte = mask_rw_pte(ptep, pte);
1000
1001 xen_set_pte(ptep, pte);
1002}
1003
5ead97c8
JF
1004static __init void xen_pagetable_setup_start(pgd_t *base)
1005{
5ead97c8
JF
1006}
1007
0e91398f 1008void xen_setup_shared_info(void)
5ead97c8
JF
1009{
1010 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1011 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1012 xen_start_info->shared_info);
1013
1014 HYPERVISOR_shared_info =
1015 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1016 } else
1017 HYPERVISOR_shared_info =
1018 (struct shared_info *)__va(xen_start_info->shared_info);
1019
2e8fe719
JF
1020#ifndef CONFIG_SMP
1021 /* In UP this is as good a place as any to set up shared info */
1022 xen_setup_vcpu_info_placement();
1023#endif
d5edbc1f
JF
1024
1025 xen_setup_mfn_list_list();
2e8fe719
JF
1026}
1027
1028static __init void xen_pagetable_setup_done(pgd_t *base)
1029{
0e91398f 1030 xen_setup_shared_info();
60223a32 1031}
5ead97c8 1032
e2426cf8
JF
1033static __init void xen_post_allocator_init(void)
1034{
8745f8b0 1035 pv_mmu_ops.set_pte = xen_set_pte;
e2426cf8
JF
1036 pv_mmu_ops.set_pmd = xen_set_pmd;
1037 pv_mmu_ops.set_pud = xen_set_pud;
f6e58732
JF
1038#if PAGETABLE_LEVELS == 4
1039 pv_mmu_ops.set_pgd = xen_set_pgd;
1040#endif
e2426cf8 1041
2e8fe719
JF
1042 /* This will work as long as patching hasn't happened yet
1043 (which it hasn't) */
6944a9c8
JF
1044 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1045 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1046 pv_mmu_ops.release_pte = xen_release_pte;
1047 pv_mmu_ops.release_pmd = xen_release_pmd;
8745f8b0
JF
1048#if PAGETABLE_LEVELS == 4
1049 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1050 pv_mmu_ops.release_pud = xen_release_pud;
1051#endif
e2426cf8 1052
bf18bf94
JF
1053#ifdef CONFIG_X86_64
1054 SetPagePinned(virt_to_page(level3_user_vsyscall));
1055#endif
e2426cf8
JF
1056 xen_mark_init_mm_pinned();
1057}
1058
60223a32 1059/* This is called once we have the cpu_possible_map */
0e91398f 1060void xen_setup_vcpu_info_placement(void)
60223a32
JF
1061{
1062 int cpu;
1063
1064 for_each_possible_cpu(cpu)
1065 xen_vcpu_setup(cpu);
1066
1067 /* xen_vcpu_setup managed to place the vcpu_info within the
1068 percpu area for all cpus, so make use of it */
5b09b287 1069#ifdef CONFIG_X86_32
60223a32
JF
1070 if (have_vcpu_info_placement) {
1071 printk(KERN_INFO "Xen: using vcpu_info placement\n");
1072
93b1eab3
JF
1073 pv_irq_ops.save_fl = xen_save_fl_direct;
1074 pv_irq_ops.restore_fl = xen_restore_fl_direct;
1075 pv_irq_ops.irq_disable = xen_irq_disable_direct;
1076 pv_irq_ops.irq_enable = xen_irq_enable_direct;
1077 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1078 }
5b09b287 1079#endif
5ead97c8
JF
1080}
1081
ab144f5e
AK
1082static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1083 unsigned long addr, unsigned len)
6487673b
JF
1084{
1085 char *start, *end, *reloc;
1086 unsigned ret;
1087
1088 start = end = reloc = NULL;
1089
93b1eab3
JF
1090#define SITE(op, x) \
1091 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1092 if (have_vcpu_info_placement) { \
1093 start = (char *)xen_##x##_direct; \
1094 end = xen_##x##_direct_end; \
1095 reloc = xen_##x##_direct_reloc; \
1096 } \
1097 goto patch_site
1098
1099 switch (type) {
5b09b287 1100#ifdef CONFIG_X86_32
93b1eab3
JF
1101 SITE(pv_irq_ops, irq_enable);
1102 SITE(pv_irq_ops, irq_disable);
1103 SITE(pv_irq_ops, save_fl);
1104 SITE(pv_irq_ops, restore_fl);
5b09b287 1105#endif /* CONFIG_X86_32 */
6487673b
JF
1106#undef SITE
1107
1108 patch_site:
1109 if (start == NULL || (end-start) > len)
1110 goto default_patch;
1111
ab144f5e 1112 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1113
1114 /* Note: because reloc is assigned from something that
1115 appears to be an array, gcc assumes it's non-null,
1116 but doesn't know its relationship with start and
1117 end. */
1118 if (reloc > start && reloc < end) {
1119 int reloc_off = reloc - start;
ab144f5e
AK
1120 long *relocp = (long *)(insnbuf + reloc_off);
1121 long delta = start - (char *)addr;
6487673b
JF
1122
1123 *relocp += delta;
1124 }
1125 break;
1126
1127 default_patch:
1128 default:
ab144f5e
AK
1129 ret = paravirt_patch_default(type, clobbers, insnbuf,
1130 addr, len);
6487673b
JF
1131 break;
1132 }
1133
1134 return ret;
1135}
1136
aeaaa59c
JF
1137static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1138{
1139 pte_t pte;
1140
1141 phys >>= PAGE_SHIFT;
1142
1143 switch (idx) {
1144 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1145#ifdef CONFIG_X86_F00F_BUG
1146 case FIX_F00F_IDT:
1147#endif
15664f96 1148#ifdef CONFIG_X86_32
aeaaa59c
JF
1149 case FIX_WP_TEST:
1150 case FIX_VDSO:
b3fe1243 1151# ifdef CONFIG_HIGHMEM
15664f96 1152 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
b3fe1243 1153# endif
15664f96
JF
1154#else
1155 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1156#endif
aeaaa59c
JF
1157#ifdef CONFIG_X86_LOCAL_APIC
1158 case FIX_APIC_BASE: /* maps dummy local APIC */
1159#endif
1160 pte = pfn_pte(phys, prot);
1161 break;
1162
1163 default:
1164 pte = mfn_pte(phys, prot);
1165 break;
1166 }
1167
1168 __native_set_fixmap(idx, pte);
bf18bf94
JF
1169
1170#ifdef CONFIG_X86_64
1171 /* Replicate changes to map the vsyscall page into the user
1172 pagetable vsyscall mapping. */
1173 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1174 unsigned long vaddr = __fix_to_virt(idx);
1175 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1176 }
1177#endif
aeaaa59c
JF
1178}
1179
93b1eab3 1180static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1181 .paravirt_enabled = 1,
1182 .shared_kernel_pmd = 0,
1183
1184 .name = "Xen",
93b1eab3 1185};
5ead97c8 1186
93b1eab3 1187static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1188 .patch = xen_patch,
5ead97c8 1189
93b1eab3 1190 .banner = xen_banner,
5ead97c8
JF
1191 .memory_setup = xen_memory_setup,
1192 .arch_setup = xen_arch_setup,
e2426cf8 1193 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1194};
5ead97c8 1195
93b1eab3 1196static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1197 .time_init = xen_time_init,
93b1eab3 1198
15c84731
JF
1199 .set_wallclock = xen_set_wallclock,
1200 .get_wallclock = xen_get_wallclock,
e93ef949 1201 .get_tsc_khz = xen_tsc_khz,
ab550288 1202 .sched_clock = xen_sched_clock,
93b1eab3 1203};
15c84731 1204
93b1eab3 1205static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1206 .cpuid = xen_cpuid,
1207
1208 .set_debugreg = xen_set_debugreg,
1209 .get_debugreg = xen_get_debugreg,
1210
7b1333aa 1211 .clts = xen_clts,
5ead97c8
JF
1212
1213 .read_cr0 = native_read_cr0,
7b1333aa 1214 .write_cr0 = xen_write_cr0,
5ead97c8 1215
5ead97c8
JF
1216 .read_cr4 = native_read_cr4,
1217 .read_cr4_safe = native_read_cr4_safe,
1218 .write_cr4 = xen_write_cr4,
1219
5ead97c8
JF
1220 .wbinvd = native_wbinvd,
1221
1222 .read_msr = native_read_msr_safe,
1153968a 1223 .write_msr = xen_write_msr_safe,
5ead97c8
JF
1224 .read_tsc = native_read_tsc,
1225 .read_pmc = native_read_pmc,
1226
81e103f1 1227 .iret = xen_iret,
d75cd22f 1228 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1229#ifdef CONFIG_X86_64
1230 .usergs_sysret32 = xen_sysret32,
1231 .usergs_sysret64 = xen_sysret64,
1232#endif
5ead97c8
JF
1233
1234 .load_tr_desc = paravirt_nop,
1235 .set_ldt = xen_set_ldt,
1236 .load_gdt = xen_load_gdt,
1237 .load_idt = xen_load_idt,
1238 .load_tls = xen_load_tls,
a8fc1089
EH
1239#ifdef CONFIG_X86_64
1240 .load_gs_index = xen_load_gs_index,
1241#endif
5ead97c8 1242
38ffbe66
JF
1243 .alloc_ldt = xen_alloc_ldt,
1244 .free_ldt = xen_free_ldt,
1245
5ead97c8
JF
1246 .store_gdt = native_store_gdt,
1247 .store_idt = native_store_idt,
1248 .store_tr = xen_store_tr,
1249
1250 .write_ldt_entry = xen_write_ldt_entry,
1251 .write_gdt_entry = xen_write_gdt_entry,
1252 .write_idt_entry = xen_write_idt_entry,
faca6227 1253 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1254
1255 .set_iopl_mask = xen_set_iopl_mask,
1256 .io_delay = xen_io_delay,
1257
952d1d70
JF
1258 /* Xen takes care of %gs when switching to usermode for us */
1259 .swapgs = paravirt_nop,
1260
8965c1c0
JF
1261 .lazy_mode = {
1262 .enter = paravirt_enter_lazy_cpu,
1263 .leave = xen_leave_lazy,
1264 },
93b1eab3
JF
1265};
1266
0725cbb9
JF
1267static void __init __xen_init_IRQ(void)
1268{
1269#ifdef CONFIG_X86_64
1270 int i;
1271
1272 /* Create identity vector->irq map */
1273 for(i = 0; i < NR_VECTORS; i++) {
1274 int cpu;
1275
1276 for_each_possible_cpu(cpu)
1277 per_cpu(vector_irq, cpu)[i] = i;
1278 }
1279#endif /* CONFIG_X86_64 */
1280
1281 xen_init_IRQ();
1282}
1283
93b1eab3 1284static const struct pv_irq_ops xen_irq_ops __initdata = {
0725cbb9 1285 .init_IRQ = __xen_init_IRQ,
93b1eab3
JF
1286 .save_fl = xen_save_fl,
1287 .restore_fl = xen_restore_fl,
1288 .irq_disable = xen_irq_disable,
1289 .irq_enable = xen_irq_enable,
1290 .safe_halt = xen_safe_halt,
1291 .halt = xen_halt,
fab58420 1292#ifdef CONFIG_X86_64
997409d3 1293 .adjust_exception_frame = xen_adjust_exception_frame,
fab58420 1294#endif
93b1eab3 1295};
5ead97c8 1296
93b1eab3 1297static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1298#ifdef CONFIG_X86_LOCAL_APIC
f87e4cac 1299 .apic_write = xen_apic_write,
5ead97c8
JF
1300 .apic_read = xen_apic_read,
1301 .setup_boot_clock = paravirt_nop,
1302 .setup_secondary_clock = paravirt_nop,
1303 .startup_ipi_hook = paravirt_nop,
1304#endif
93b1eab3
JF
1305};
1306
1307static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1308 .pagetable_setup_start = xen_pagetable_setup_start,
1309 .pagetable_setup_done = xen_pagetable_setup_done,
1310
1311 .read_cr2 = xen_read_cr2,
1312 .write_cr2 = xen_write_cr2,
1313
1314 .read_cr3 = xen_read_cr3,
1315 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1316
1317 .flush_tlb_user = xen_flush_tlb,
1318 .flush_tlb_kernel = xen_flush_tlb,
1319 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1320 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1321
1322 .pte_update = paravirt_nop,
1323 .pte_update_defer = paravirt_nop,
1324
d6182fbf
JF
1325 .pgd_alloc = xen_pgd_alloc,
1326 .pgd_free = xen_pgd_free,
eba0045f 1327
6944a9c8
JF
1328 .alloc_pte = xen_alloc_pte_init,
1329 .release_pte = xen_release_pte_init,
1330 .alloc_pmd = xen_alloc_pte_init,
1331 .alloc_pmd_clone = paravirt_nop,
1332 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1333
1334#ifdef CONFIG_HIGHPTE
1335 .kmap_atomic_pte = xen_kmap_atomic_pte,
1336#endif
5ead97c8 1337
22911b3f
JF
1338#ifdef CONFIG_X86_64
1339 .set_pte = xen_set_pte,
1340#else
851fa3c4 1341 .set_pte = xen_set_pte_init,
22911b3f 1342#endif
3b827c1b 1343 .set_pte_at = xen_set_pte_at,
e2426cf8 1344 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1345
08b882c6
JF
1346 .ptep_modify_prot_start = __ptep_modify_prot_start,
1347 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1348
3b827c1b 1349 .pte_val = xen_pte_val,
b56afe1d 1350 .pte_flags = native_pte_flags,
3b827c1b
JF
1351 .pgd_val = xen_pgd_val,
1352
1353 .make_pte = xen_make_pte,
1354 .make_pgd = xen_make_pgd,
1355
f6e58732 1356#ifdef CONFIG_X86_PAE
3b827c1b
JF
1357 .set_pte_atomic = xen_set_pte_atomic,
1358 .set_pte_present = xen_set_pte_at,
3b827c1b
JF
1359 .pte_clear = xen_pte_clear,
1360 .pmd_clear = xen_pmd_clear,
f6e58732
JF
1361#endif /* CONFIG_X86_PAE */
1362 .set_pud = xen_set_pud_hyper,
3b827c1b
JF
1363
1364 .make_pmd = xen_make_pmd,
1365 .pmd_val = xen_pmd_val,
3b827c1b 1366
f6e58732
JF
1367#if PAGETABLE_LEVELS == 4
1368 .pud_val = xen_pud_val,
1369 .make_pud = xen_make_pud,
1370 .set_pgd = xen_set_pgd_hyper,
1371
1372 .alloc_pud = xen_alloc_pte_init,
1373 .release_pud = xen_release_pte_init,
1374#endif /* PAGETABLE_LEVELS == 4 */
1375
3b827c1b
JF
1376 .activate_mm = xen_activate_mm,
1377 .dup_mmap = xen_dup_mmap,
1378 .exit_mmap = xen_exit_mmap,
1379
8965c1c0
JF
1380 .lazy_mode = {
1381 .enter = paravirt_enter_lazy_mmu,
1382 .leave = xen_leave_lazy,
1383 },
aeaaa59c
JF
1384
1385 .set_fixmap = xen_set_fixmap,
5ead97c8
JF
1386};
1387
fefa629a
JF
1388static void xen_reboot(int reason)
1389{
349c709f
JF
1390 struct sched_shutdown r = { .reason = reason };
1391
fefa629a
JF
1392#ifdef CONFIG_SMP
1393 smp_send_stop();
1394#endif
1395
349c709f 1396 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1397 BUG();
1398}
1399
1400static void xen_restart(char *msg)
1401{
1402 xen_reboot(SHUTDOWN_reboot);
1403}
1404
1405static void xen_emergency_restart(void)
1406{
1407 xen_reboot(SHUTDOWN_reboot);
1408}
1409
1410static void xen_machine_halt(void)
1411{
1412 xen_reboot(SHUTDOWN_poweroff);
1413}
1414
1415static void xen_crash_shutdown(struct pt_regs *regs)
1416{
1417 xen_reboot(SHUTDOWN_crash);
1418}
1419
1420static const struct machine_ops __initdata xen_machine_ops = {
1421 .restart = xen_restart,
1422 .halt = xen_machine_halt,
1423 .power_off = xen_machine_halt,
1424 .shutdown = xen_machine_halt,
1425 .crash_shutdown = xen_crash_shutdown,
1426 .emergency_restart = xen_emergency_restart,
1427};
1428
6487673b 1429
fb1d8404
JF
1430static void __init xen_reserve_top(void)
1431{
f5d36de0 1432#ifdef CONFIG_X86_32
fb1d8404
JF
1433 unsigned long top = HYPERVISOR_VIRT_START;
1434 struct xen_platform_parameters pp;
1435
1436 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1437 top = pp.virt_start;
1438
1439 reserve_top_address(-top + 2 * PAGE_SIZE);
f5d36de0 1440#endif /* CONFIG_X86_32 */
fb1d8404
JF
1441}
1442
084a2a4e
JF
1443/*
1444 * Like __va(), but returns address in the kernel mapping (which is
1445 * all we have until the physical memory mapping has been set up.
1446 */
1447static void *__ka(phys_addr_t paddr)
1448{
39dbc5bd 1449#ifdef CONFIG_X86_64
084a2a4e 1450 return (void *)(paddr + __START_KERNEL_map);
39dbc5bd
JF
1451#else
1452 return __va(paddr);
1453#endif
fb1d8404
JF
1454}
1455
084a2a4e
JF
1456/* Convert a machine address to physical address */
1457static unsigned long m2p(phys_addr_t maddr)
1458{
1459 phys_addr_t paddr;
1460
59438c9f 1461 maddr &= PTE_PFN_MASK;
084a2a4e
JF
1462 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1463
1464 return paddr;
fb1d8404
JF
1465}
1466
084a2a4e
JF
1467/* Convert a machine address to kernel virtual */
1468static void *m2v(phys_addr_t maddr)
1469{
1470 return __ka(m2p(maddr));
1471}
1472
39dbc5bd 1473#ifdef CONFIG_X86_64
084a2a4e
JF
1474static void walk(pgd_t *pgd, unsigned long addr)
1475{
1476 unsigned l4idx = pgd_index(addr);
1477 unsigned l3idx = pud_index(addr);
1478 unsigned l2idx = pmd_index(addr);
1479 unsigned l1idx = pte_index(addr);
1480 pgd_t l4;
1481 pud_t l3;
1482 pmd_t l2;
1483 pte_t l1;
1484
1485 xen_raw_printk("walk %p, %lx -> %d %d %d %d\n",
1486 pgd, addr, l4idx, l3idx, l2idx, l1idx);
1487
1488 l4 = pgd[l4idx];
1489 xen_raw_printk(" l4: %016lx\n", l4.pgd);
1490 xen_raw_printk(" %016lx\n", pgd_val(l4));
1491
1492 l3 = ((pud_t *)(m2v(l4.pgd)))[l3idx];
1493 xen_raw_printk(" l3: %016lx\n", l3.pud);
1494 xen_raw_printk(" %016lx\n", pud_val(l3));
1495
1496 l2 = ((pmd_t *)(m2v(l3.pud)))[l2idx];
1497 xen_raw_printk(" l2: %016lx\n", l2.pmd);
1498 xen_raw_printk(" %016lx\n", pmd_val(l2));
1499
1500 l1 = ((pte_t *)(m2v(l2.pmd)))[l1idx];
1501 xen_raw_printk(" l1: %016lx\n", l1.pte);
1502 xen_raw_printk(" %016lx\n", pte_val(l1));
1503}
39dbc5bd 1504#endif
084a2a4e
JF
1505
1506static void set_page_prot(void *addr, pgprot_t prot)
1507{
1508 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1509 pte_t pte = pfn_pte(pfn, prot);
1510
39dbc5bd 1511 xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016llx pte=%016llx\n",
084a2a4e
JF
1512 addr, pfn, get_phys_to_machine(pfn),
1513 pgprot_val(prot), pte.pte);
1514
1515 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1516 BUG();
1517}
1518
39dbc5bd 1519static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
d114e198
JF
1520{
1521 unsigned pmdidx, pteidx;
1522 unsigned ident_pte;
1523 unsigned long pfn;
1524
1525 ident_pte = 0;
1526 pfn = 0;
1527 for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1528 pte_t *pte_page;
1529
d114e198 1530 /* Reuse or allocate a page of ptes */
39dbc5bd
JF
1531 if (pmd_present(pmd[pmdidx]))
1532 pte_page = m2v(pmd[pmdidx].pmd);
d114e198
JF
1533 else {
1534 /* Check for free pte pages */
1535 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1536 break;
1537
1538 pte_page = &level1_ident_pgt[ident_pte];
1539 ident_pte += PTRS_PER_PTE;
1540
39dbc5bd 1541 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
d114e198
JF
1542 }
1543
1544 /* Install mappings */
1545 for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1546 pte_t pte;
1547
1548 if (pfn > max_pfn_mapped)
1549 max_pfn_mapped = pfn;
1550
1551 if (!pte_none(pte_page[pteidx]))
1552 continue;
1553
1554 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1555 pte_page[pteidx] = pte;
1556 }
1557 }
1558
1559 for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1560 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
39dbc5bd
JF
1561
1562 set_page_prot(pmd, PAGE_KERNEL_RO);
1563}
1564
1565#ifdef CONFIG_X86_64
1566static void convert_pfn_mfn(void *v)
1567{
1568 pte_t *pte = v;
1569 int i;
1570
1571 /* All levels are converted the same way, so just treat them
1572 as ptes. */
1573 for(i = 0; i < PTRS_PER_PTE; i++)
1574 pte[i] = xen_make_pte(pte[i].pte);
d114e198
JF
1575}
1576
084a2a4e
JF
1577/*
1578 * Set up the inital kernel pagetable.
1579 *
1580 * We can construct this by grafting the Xen provided pagetable into
1581 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1582 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1583 * means that only the kernel has a physical mapping to start with -
1584 * but that's enough to get __va working. We need to fill in the rest
1585 * of the physical mapping once some sort of allocator has been set
1586 * up.
1587 */
d114e198 1588static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e
JF
1589{
1590 pud_t *l3;
1591 pmd_t *l2;
1592
1593 /* Zap identity mapping */
1594 init_level4_pgt[0] = __pgd(0);
1595
1596 /* Pre-constructed entries are in pfn, so convert to mfn */
1597 convert_pfn_mfn(init_level4_pgt);
1598 convert_pfn_mfn(level3_ident_pgt);
1599 convert_pfn_mfn(level3_kernel_pgt);
1600
1601 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1602 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1603
1604 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1605 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1606
1607 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1608 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1609 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1610
d114e198 1611 /* Set up identity map */
39dbc5bd 1612 xen_map_identity_early(level2_ident_pgt, max_pfn);
d114e198 1613
084a2a4e
JF
1614 /* Make pagetable pieces RO */
1615 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1616 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1617 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
bf18bf94 1618 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
084a2a4e
JF
1619 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1620 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1621
1622 /* Pin down new L4 */
39dbc5bd
JF
1623 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1624 PFN_DOWN(__pa_symbol(init_level4_pgt)));
084a2a4e
JF
1625
1626 /* Unpin Xen-provided one */
1627 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1628
1629 /* Switch over */
1630 pgd = init_level4_pgt;
d6182fbf
JF
1631
1632 /*
1633 * At this stage there can be no user pgd, and no page
1634 * structure to attach it to, so make sure we just set kernel
1635 * pgd.
1636 */
1637 xen_mc_batch();
1638 __xen_write_cr3(true, __pa(pgd));
1639 xen_mc_issue(PARAVIRT_LAZY_CPU);
084a2a4e 1640
d114e198
JF
1641 reserve_early(__pa(xen_start_info->pt_base),
1642 __pa(xen_start_info->pt_base +
1643 xen_start_info->nr_pt_frames * PAGE_SIZE),
1644 "XEN PAGETABLES");
084a2a4e
JF
1645
1646 return pgd;
1647}
39dbc5bd
JF
1648#else /* !CONFIG_X86_64 */
1649static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1650
d114e198 1651static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e 1652{
39dbc5bd
JF
1653 pmd_t *kernel_pmd;
1654
084a2a4e
JF
1655 init_pg_tables_start = __pa(pgd);
1656 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1657 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1658
39dbc5bd
JF
1659 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1660 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
d114e198 1661
39dbc5bd
JF
1662 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1663
1664 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1665 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1666 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1667
1668 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1669 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1670 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1671
1672 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1673
1674 xen_write_cr3(__pa(swapper_pg_dir));
1675
1676 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1677
1678 return swapper_pg_dir;
fb1d8404 1679}
084a2a4e 1680#endif /* CONFIG_X86_64 */
fb1d8404 1681
5ead97c8
JF
1682/* First C function to be called on Xen boot */
1683asmlinkage void __init xen_start_kernel(void)
1684{
1685 pgd_t *pgd;
1686
1687 if (!xen_start_info)
1688 return;
1689
7999f4b4 1690 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1691
e57778a1
JF
1692 xen_setup_features();
1693
5ead97c8 1694 /* Install Xen paravirt ops */
93b1eab3
JF
1695 pv_info = xen_info;
1696 pv_init_ops = xen_init_ops;
1697 pv_time_ops = xen_time_ops;
1698 pv_cpu_ops = xen_cpu_ops;
1699 pv_irq_ops = xen_irq_ops;
1700 pv_apic_ops = xen_apic_ops;
1701 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1702
e57778a1
JF
1703 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1704 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1705 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1706 }
1707
fefa629a
JF
1708 machine_ops = xen_machine_ops;
1709
f5d36de0
JF
1710#ifdef CONFIG_X86_64
1711 /* Disable until direct per-cpu data access. */
1712 have_vcpu_info_placement = 0;
5b09b287 1713 x86_64_init_pda();
f87e4cac 1714#endif
5ead97c8 1715
a9e7062d 1716 xen_smp_init();
5ead97c8
JF
1717
1718 /* Get mfn list */
1719 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1720 xen_build_dynamic_phys_to_machine();
5ead97c8
JF
1721
1722 pgd = (pgd_t *)xen_start_info->pt_base;
1723
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JF
1724 /* Prevent unwanted bits from being set in PTEs. */
1725 __supported_pte_mask &= ~_PAGE_GLOBAL;
1726 if (!is_initial_xendomain())
1727 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
60223a32 1728
60223a32 1729 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1730 possible map and a non-dummy shared_info. */
60223a32 1731 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1732
084a2a4e 1733 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1734 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
5ead97c8 1735
084a2a4e 1736 init_mm.pgd = pgd;
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JF
1737
1738 /* keep using Xen gdt for now; no urgent need to change it */
1739
93b1eab3 1740 pv_info.kernel_rpl = 1;
5ead97c8 1741 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1742 pv_info.kernel_rpl = 0;
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JF
1743
1744 /* set the limit of our address space */
fb1d8404 1745 xen_reserve_top();
5ead97c8 1746
7d087b68 1747#ifdef CONFIG_X86_32
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JF
1748 /* set up basic CPUID stuff */
1749 cpu_detect(&new_cpu_data);
1750 new_cpu_data.hard_math = 1;
1751 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1752#endif
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JF
1753
1754 /* Poke various useful things into boot_params */
30c82645
PA
1755 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1756 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1757 ? __pa(xen_start_info->mod_start) : 0;
1758 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1759 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1760
9e124fe1 1761 if (!is_initial_xendomain()) {
83abc70a 1762 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1763 add_preferred_console("tty", 0, NULL);
b8c2d3df 1764 add_preferred_console("hvc", 0, NULL);
9e124fe1 1765 }
b8c2d3df 1766
084a2a4e
JF
1767 xen_raw_console_write("about to get started...\n");
1768
1769#if 0
1770 xen_raw_printk("&boot_params=%p __pa(&boot_params)=%lx __va(__pa(&boot_params))=%lx\n",
1771 &boot_params, __pa_symbol(&boot_params),
1772 __va(__pa_symbol(&boot_params)));
1773
1774 walk(pgd, &boot_params);
1775 walk(pgd, __va(__pa(&boot_params)));
1776#endif
b8c2d3df 1777
5ead97c8 1778 /* Start the world */
f5d36de0 1779#ifdef CONFIG_X86_32
f0d43100 1780 i386_start_kernel();
f5d36de0 1781#else
084a2a4e 1782 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1783#endif
5ead97c8 1784}