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5ead97c8
JF
1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
5ead97c8
JF
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
5ead97c8
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20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
5ead97c8
JF
25#include <linux/bootmem.h>
26#include <linux/module.h>
f4f97b3e
JF
27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
96f28bc6 34#include <linux/edd.h>
5ead97c8 35
1ccbf534 36#include <xen/xen.h>
0ec53ecf 37#include <xen/events.h>
5ead97c8 38#include <xen/interface/xen.h>
ecbf29cd 39#include <xen/interface/version.h>
5ead97c8
JF
40#include <xen/interface/physdev.h>
41#include <xen/interface/vcpu.h>
bee6ab53 42#include <xen/interface/memory.h>
cef12ee5 43#include <xen/interface/xen-mca.h>
5ead97c8
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44#include <xen/features.h>
45#include <xen/page.h>
38e20b07 46#include <xen/hvm.h>
084a2a4e 47#include <xen/hvc-console.h>
211063dc 48#include <xen/acpi.h>
5ead97c8
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49
50#include <asm/paravirt.h>
7b6aa335 51#include <asm/apic.h>
5ead97c8 52#include <asm/page.h>
b5401a96 53#include <asm/xen/pci.h>
5ead97c8
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54#include <asm/xen/hypercall.h>
55#include <asm/xen/hypervisor.h>
56#include <asm/fixmap.h>
57#include <asm/processor.h>
707ebbc8 58#include <asm/proto.h>
1153968a 59#include <asm/msr-index.h>
6cac5a92 60#include <asm/traps.h>
5ead97c8
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61#include <asm/setup.h>
62#include <asm/desc.h>
817a824b 63#include <asm/pgalloc.h>
5ead97c8 64#include <asm/pgtable.h>
f87e4cac 65#include <asm/tlbflush.h>
fefa629a 66#include <asm/reboot.h>
577eebea 67#include <asm/stackprotector.h>
bee6ab53 68#include <asm/hypervisor.h>
73c154c6 69#include <asm/mwait.h>
76a8df7b 70#include <asm/pci_x86.h>
c79c4982 71#include <asm/pat.h>
73c154c6
KRW
72
73#ifdef CONFIG_ACPI
74#include <linux/acpi.h>
75#include <asm/acpi.h>
76#include <acpi/pdc_intel.h>
77#include <acpi/processor.h>
78#include <xen/interface/platform.h>
79#endif
5ead97c8
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80
81#include "xen-ops.h"
3b827c1b 82#include "mmu.h"
f447d56d 83#include "smp.h"
5ead97c8
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84#include "multicalls.h"
85
86EXPORT_SYMBOL_GPL(hypercall_page);
87
a520996a
KRW
88/*
89 * Pointer to the xen_vcpu_info structure or
90 * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info
91 * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info
92 * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point
93 * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to
94 * acknowledge pending events.
95 * Also more subtly it is used by the patched version of irq enable/disable
96 * e.g. xen_irq_enable_direct and xen_iret in PV mode.
97 *
98 * The desire to be able to do those mask/unmask operations as a single
99 * instruction by using the per-cpu offset held in %gs is the real reason
100 * vcpu info is in a per-cpu pointer and the original reason for this
101 * hypercall.
102 *
103 */
5ead97c8 104DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
a520996a
KRW
105
106/*
107 * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info
108 * hypercall. This can be used both in PV and PVHVM mode. The structure
109 * overrides the default per_cpu(xen_vcpu, cpu) value.
110 */
5ead97c8 111DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 112
6e833587
JF
113enum xen_domain_type xen_domain_type = XEN_NATIVE;
114EXPORT_SYMBOL_GPL(xen_domain_type);
115
7e77506a
IC
116unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
117EXPORT_SYMBOL(machine_to_phys_mapping);
ccbcdf7c
JB
118unsigned long machine_to_phys_nr;
119EXPORT_SYMBOL(machine_to_phys_nr);
7e77506a 120
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121struct start_info *xen_start_info;
122EXPORT_SYMBOL_GPL(xen_start_info);
123
a0d695c8 124struct shared_info xen_dummy_shared_info;
60223a32 125
38341432
JF
126void *xen_initial_gdt;
127
bee6ab53 128RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
38e20b07
SY
129__read_mostly int xen_have_vector_callback;
130EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 131
60223a32
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132/*
133 * Point at some empty memory to start with. We map the real shared_info
134 * page as soon as fixmap is up and running.
135 */
4648da7c 136struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
60223a32
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137
138/*
139 * Flag to determine whether vcpu info placement is available on all
140 * VCPUs. We assume it is to start with, and then set it to zero on
141 * the first failure. This is because it can succeed on some VCPUs
142 * and not others, since it can involve hypervisor memory allocation,
143 * or because the guest failed to guarantee all the appropriate
144 * constraints on all VCPUs (ie buffer can't cross a page boundary).
145 *
146 * Note that any particular CPU may be using a placed vcpu structure,
147 * but we can only optimise if the all are.
148 *
149 * 0: not available, 1: available
150 */
e4d04071 151static int have_vcpu_info_placement = 1;
60223a32 152
1c32cdc6
DV
153struct tls_descs {
154 struct desc_struct desc[3];
155};
156
157/*
158 * Updating the 3 TLS descriptors in the GDT on every task switch is
159 * surprisingly expensive so we avoid updating them if they haven't
160 * changed. Since Xen writes different descriptors than the one
161 * passed in the update_descriptor hypercall we keep shadow copies to
162 * compare against.
163 */
164static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
165
c06ee78d
MR
166static void clamp_max_cpus(void)
167{
168#ifdef CONFIG_SMP
169 if (setup_max_cpus > MAX_VIRT_CPUS)
170 setup_max_cpus = MAX_VIRT_CPUS;
171#endif
172}
173
9c7a7942 174static void xen_vcpu_setup(int cpu)
5ead97c8 175{
60223a32
JF
176 struct vcpu_register_vcpu_info info;
177 int err;
178 struct vcpu_info *vcpup;
179
a0d695c8 180 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 181
7f1fc268
KRW
182 /*
183 * This path is called twice on PVHVM - first during bootup via
184 * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being
185 * hotplugged: cpu_up -> xen_hvm_cpu_notify.
186 * As we can only do the VCPUOP_register_vcpu_info once lets
187 * not over-write its result.
188 *
189 * For PV it is called during restore (xen_vcpu_restore) and bootup
190 * (xen_setup_vcpu_info_placement). The hotplug mechanism does not
191 * use this function.
192 */
193 if (xen_hvm_domain()) {
194 if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu))
195 return;
196 }
c06ee78d
MR
197 if (cpu < MAX_VIRT_CPUS)
198 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
60223a32 199
c06ee78d
MR
200 if (!have_vcpu_info_placement) {
201 if (cpu >= MAX_VIRT_CPUS)
202 clamp_max_cpus();
203 return;
204 }
60223a32 205
c06ee78d 206 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 207 info.mfn = arbitrary_virt_to_mfn(vcpup);
60223a32
JF
208 info.offset = offset_in_page(vcpup);
209
60223a32
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210 /* Check to see if the hypervisor will put the vcpu_info
211 structure where we want it, which allows direct access via
a520996a
KRW
212 a percpu-variable.
213 N.B. This hypercall can _only_ be called once per CPU. Subsequent
214 calls will error out with -EINVAL. This is due to the fact that
215 hypervisor has no unregister variant and this hypercall does not
216 allow to over-write info.mfn and info.offset.
217 */
60223a32
JF
218 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
219
220 if (err) {
221 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
222 have_vcpu_info_placement = 0;
c06ee78d 223 clamp_max_cpus();
60223a32
JF
224 } else {
225 /* This cpu is using the registered vcpu info, even if
226 later ones fail to. */
227 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 228 }
5ead97c8
JF
229}
230
9c7a7942
JF
231/*
232 * On restore, set the vcpu placement up again.
233 * If it fails, then we're in a bad state, since
234 * we can't back out from using it...
235 */
236void xen_vcpu_restore(void)
237{
3905bb2a 238 int cpu;
9c7a7942 239
9d328a94 240 for_each_possible_cpu(cpu) {
3905bb2a 241 bool other_cpu = (cpu != smp_processor_id());
9d328a94 242 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL);
9c7a7942 243
9d328a94 244 if (other_cpu && is_up &&
3905bb2a
JF
245 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
246 BUG();
9c7a7942 247
3905bb2a 248 xen_setup_runstate_info(cpu);
9c7a7942 249
3905bb2a 250 if (have_vcpu_info_placement)
9c7a7942 251 xen_vcpu_setup(cpu);
9c7a7942 252
9d328a94 253 if (other_cpu && is_up &&
3905bb2a
JF
254 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
255 BUG();
9c7a7942
JF
256 }
257}
258
5ead97c8
JF
259static void __init xen_banner(void)
260{
95c7c23b
JF
261 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
262 struct xen_extraversion extra;
263 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
264
5ead97c8 265 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 266 pv_info.name);
95c7c23b
JF
267 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
268 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 269 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8 270}
394b40f6
KRW
271/* Check if running on Xen version (major, minor) or later */
272bool
273xen_running_on_version_or_later(unsigned int major, unsigned int minor)
274{
275 unsigned int version;
276
277 if (!xen_domain())
278 return false;
279
280 version = HYPERVISOR_xen_version(XENVER_version, NULL);
281 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
282 ((version >> 16) > major))
283 return true;
284 return false;
285}
5ead97c8 286
5e626254
AP
287#define CPUID_THERM_POWER_LEAF 6
288#define APERFMPERF_PRESENT 0
289
e826fe1b
JF
290static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
291static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
292
73c154c6
KRW
293static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
294static __read_mostly unsigned int cpuid_leaf5_ecx_val;
295static __read_mostly unsigned int cpuid_leaf5_edx_val;
296
65ea5b03
PA
297static void xen_cpuid(unsigned int *ax, unsigned int *bx,
298 unsigned int *cx, unsigned int *dx)
5ead97c8 299{
82d64699 300 unsigned maskebx = ~0;
e826fe1b 301 unsigned maskecx = ~0;
5ead97c8 302 unsigned maskedx = ~0;
73c154c6 303 unsigned setecx = 0;
5ead97c8
JF
304 /*
305 * Mask out inconvenient features, to try and disable as many
306 * unsupported kernel subsystems as possible.
307 */
82d64699
JF
308 switch (*ax) {
309 case 1:
e826fe1b 310 maskecx = cpuid_leaf1_ecx_mask;
73c154c6 311 setecx = cpuid_leaf1_ecx_set_mask;
e826fe1b 312 maskedx = cpuid_leaf1_edx_mask;
82d64699
JF
313 break;
314
73c154c6
KRW
315 case CPUID_MWAIT_LEAF:
316 /* Synthesize the values.. */
317 *ax = 0;
318 *bx = 0;
319 *cx = cpuid_leaf5_ecx_val;
320 *dx = cpuid_leaf5_edx_val;
321 return;
322
5e626254
AP
323 case CPUID_THERM_POWER_LEAF:
324 /* Disabling APERFMPERF for kernel usage */
325 maskecx = ~(1 << APERFMPERF_PRESENT);
326 break;
327
82d64699
JF
328 case 0xb:
329 /* Suppress extended topology stuff */
330 maskebx = 0;
331 break;
e826fe1b 332 }
5ead97c8
JF
333
334 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
335 : "=a" (*ax),
336 "=b" (*bx),
337 "=c" (*cx),
338 "=d" (*dx)
339 : "0" (*ax), "2" (*cx));
e826fe1b 340
82d64699 341 *bx &= maskebx;
e826fe1b 342 *cx &= maskecx;
73c154c6 343 *cx |= setecx;
65ea5b03 344 *dx &= maskedx;
73c154c6 345
5ead97c8
JF
346}
347
73c154c6
KRW
348static bool __init xen_check_mwait(void)
349{
e3aa4e61 350#ifdef CONFIG_ACPI
73c154c6
KRW
351 struct xen_platform_op op = {
352 .cmd = XENPF_set_processor_pminfo,
353 .u.set_pminfo.id = -1,
354 .u.set_pminfo.type = XEN_PM_PDC,
355 };
356 uint32_t buf[3];
357 unsigned int ax, bx, cx, dx;
358 unsigned int mwait_mask;
359
360 /* We need to determine whether it is OK to expose the MWAIT
361 * capability to the kernel to harvest deeper than C3 states from ACPI
362 * _CST using the processor_harvest_xen.c module. For this to work, we
363 * need to gather the MWAIT_LEAF values (which the cstate.c code
364 * checks against). The hypervisor won't expose the MWAIT flag because
365 * it would break backwards compatibility; so we will find out directly
366 * from the hardware and hypercall.
367 */
368 if (!xen_initial_domain())
369 return false;
370
e3aa4e61
LJ
371 /*
372 * When running under platform earlier than Xen4.2, do not expose
373 * mwait, to avoid the risk of loading native acpi pad driver
374 */
375 if (!xen_running_on_version_or_later(4, 2))
376 return false;
377
73c154c6
KRW
378 ax = 1;
379 cx = 0;
380
381 native_cpuid(&ax, &bx, &cx, &dx);
382
383 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
384 (1 << (X86_FEATURE_MWAIT % 32));
385
386 if ((cx & mwait_mask) != mwait_mask)
387 return false;
388
389 /* We need to emulate the MWAIT_LEAF and for that we need both
390 * ecx and edx. The hypercall provides only partial information.
391 */
392
393 ax = CPUID_MWAIT_LEAF;
394 bx = 0;
395 cx = 0;
396 dx = 0;
397
398 native_cpuid(&ax, &bx, &cx, &dx);
399
400 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
401 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
402 */
403 buf[0] = ACPI_PDC_REVISION_ID;
404 buf[1] = 1;
405 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
406
407 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
408
409 if ((HYPERVISOR_dom0_op(&op) == 0) &&
410 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
411 cpuid_leaf5_ecx_val = cx;
412 cpuid_leaf5_edx_val = dx;
413 }
414 return true;
415#else
416 return false;
417#endif
418}
ad3062a0 419static void __init xen_init_cpuid_mask(void)
e826fe1b
JF
420{
421 unsigned int ax, bx, cx, dx;
947ccf9c 422 unsigned int xsave_mask;
e826fe1b
JF
423
424 cpuid_leaf1_edx_mask =
cef12ee5 425 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
426 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
427
428 if (!xen_initial_domain())
429 cpuid_leaf1_edx_mask &=
430 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
431 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
4ea9b9ac
ZD
432
433 cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32));
434
947ccf9c 435 ax = 1;
5e287830 436 cx = 0;
947ccf9c 437 xen_cpuid(&ax, &bx, &cx, &dx);
e826fe1b 438
947ccf9c
SH
439 xsave_mask =
440 (1 << (X86_FEATURE_XSAVE % 32)) |
441 (1 << (X86_FEATURE_OSXSAVE % 32));
442
443 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
444 if ((cx & xsave_mask) != xsave_mask)
445 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
73c154c6
KRW
446 if (xen_check_mwait())
447 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
e826fe1b
JF
448}
449
5ead97c8
JF
450static void xen_set_debugreg(int reg, unsigned long val)
451{
452 HYPERVISOR_set_debugreg(reg, val);
453}
454
455static unsigned long xen_get_debugreg(int reg)
456{
457 return HYPERVISOR_get_debugreg(reg);
458}
459
224101ed 460static void xen_end_context_switch(struct task_struct *next)
5ead97c8 461{
5ead97c8 462 xen_mc_flush();
224101ed 463 paravirt_end_context_switch(next);
5ead97c8
JF
464}
465
466static unsigned long xen_store_tr(void)
467{
468 return 0;
469}
470
a05d2eba 471/*
cef43bf6
JF
472 * Set the page permissions for a particular virtual address. If the
473 * address is a vmalloc mapping (or other non-linear mapping), then
474 * find the linear mapping of the page and also set its protections to
475 * match.
a05d2eba
JF
476 */
477static void set_aliased_prot(void *v, pgprot_t prot)
478{
479 int level;
480 pte_t *ptep;
481 pte_t pte;
482 unsigned long pfn;
483 struct page *page;
484
485 ptep = lookup_address((unsigned long)v, &level);
486 BUG_ON(ptep == NULL);
487
488 pfn = pte_pfn(*ptep);
489 page = pfn_to_page(pfn);
490
491 pte = pfn_pte(pfn, prot);
492
493 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
494 BUG();
495
496 if (!PageHighMem(page)) {
497 void *av = __va(PFN_PHYS(pfn));
498
499 if (av != v)
500 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
501 BUG();
502 } else
503 kmap_flush_unused();
504}
505
38ffbe66
JF
506static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
507{
a05d2eba 508 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
509 int i;
510
a05d2eba
JF
511 for(i = 0; i < entries; i += entries_per_page)
512 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
513}
514
515static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
516{
a05d2eba 517 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
518 int i;
519
a05d2eba
JF
520 for(i = 0; i < entries; i += entries_per_page)
521 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
522}
523
5ead97c8
JF
524static void xen_set_ldt(const void *addr, unsigned entries)
525{
5ead97c8
JF
526 struct mmuext_op *op;
527 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
528
ab78f7ad
JF
529 trace_xen_cpu_set_ldt(addr, entries);
530
5ead97c8
JF
531 op = mcs.args;
532 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 533 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
534 op->arg2.nr_ents = entries;
535
536 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
537
538 xen_mc_issue(PARAVIRT_LAZY_CPU);
539}
540
6b68f01b 541static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 542{
5ead97c8
JF
543 unsigned long va = dtr->address;
544 unsigned int size = dtr->size + 1;
545 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
3ce5fa7e 546 unsigned long frames[pages];
5ead97c8 547 int f;
5ead97c8 548
577eebea
JF
549 /*
550 * A GDT can be up to 64k in size, which corresponds to 8192
551 * 8-byte entries, or 16 4k pages..
552 */
5ead97c8
JF
553
554 BUG_ON(size > 65536);
555 BUG_ON(va & ~PAGE_MASK);
556
5ead97c8 557 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 558 int level;
577eebea 559 pte_t *ptep;
6ed6bf42
JF
560 unsigned long pfn, mfn;
561 void *virt;
562
577eebea
JF
563 /*
564 * The GDT is per-cpu and is in the percpu data area.
565 * That can be virtually mapped, so we need to do a
566 * page-walk to get the underlying MFN for the
567 * hypercall. The page can also be in the kernel's
568 * linear range, so we need to RO that mapping too.
569 */
570 ptep = lookup_address(va, &level);
6ed6bf42
JF
571 BUG_ON(ptep == NULL);
572
573 pfn = pte_pfn(*ptep);
574 mfn = pfn_to_mfn(pfn);
575 virt = __va(PFN_PHYS(pfn));
576
577 frames[f] = mfn;
9976b39b 578
5ead97c8 579 make_lowmem_page_readonly((void *)va);
6ed6bf42 580 make_lowmem_page_readonly(virt);
5ead97c8
JF
581 }
582
3ce5fa7e
JF
583 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
584 BUG();
5ead97c8
JF
585}
586
577eebea
JF
587/*
588 * load_gdt for early boot, when the gdt is only mapped once
589 */
ad3062a0 590static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
577eebea
JF
591{
592 unsigned long va = dtr->address;
593 unsigned int size = dtr->size + 1;
594 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
595 unsigned long frames[pages];
596 int f;
597
598 /*
599 * A GDT can be up to 64k in size, which corresponds to 8192
600 * 8-byte entries, or 16 4k pages..
601 */
602
603 BUG_ON(size > 65536);
604 BUG_ON(va & ~PAGE_MASK);
605
606 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
607 pte_t pte;
608 unsigned long pfn, mfn;
609
610 pfn = virt_to_pfn(va);
611 mfn = pfn_to_mfn(pfn);
612
613 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
614
615 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
616 BUG();
617
618 frames[f] = mfn;
619 }
620
621 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
622 BUG();
623}
624
59290362
DV
625static inline bool desc_equal(const struct desc_struct *d1,
626 const struct desc_struct *d2)
627{
628 return d1->a == d2->a && d1->b == d2->b;
629}
630
5ead97c8
JF
631static void load_TLS_descriptor(struct thread_struct *t,
632 unsigned int cpu, unsigned int i)
633{
1c32cdc6
DV
634 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
635 struct desc_struct *gdt;
636 xmaddr_t maddr;
637 struct multicall_space mc;
638
639 if (desc_equal(shadow, &t->tls_array[i]))
640 return;
641
642 *shadow = t->tls_array[i];
643
644 gdt = get_cpu_gdt_table(cpu);
645 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
646 mc = __xen_mc_entry(0);
5ead97c8
JF
647
648 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
649}
650
651static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
652{
8b84ad94 653 /*
ccbeed3a
TH
654 * XXX sleazy hack: If we're being called in a lazy-cpu zone
655 * and lazy gs handling is enabled, it means we're in a
656 * context switch, and %gs has just been saved. This means we
657 * can zero it out to prevent faults on exit from the
658 * hypervisor if the next process has no %gs. Either way, it
659 * has been saved, and the new value will get loaded properly.
660 * This will go away as soon as Xen has been modified to not
661 * save/restore %gs for normal hypercalls.
8a95408e
EH
662 *
663 * On x86_64, this hack is not used for %gs, because gs points
664 * to KERNEL_GS_BASE (and uses it for PDA references), so we
665 * must not zero %gs on x86_64
666 *
667 * For x86_64, we need to zero %fs, otherwise we may get an
668 * exception between the new %fs descriptor being loaded and
669 * %fs being effectively cleared at __switch_to().
8b84ad94 670 */
8a95408e
EH
671 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
672#ifdef CONFIG_X86_32
ccbeed3a 673 lazy_load_gs(0);
8a95408e
EH
674#else
675 loadsegment(fs, 0);
676#endif
677 }
678
679 xen_mc_batch();
680
681 load_TLS_descriptor(t, cpu, 0);
682 load_TLS_descriptor(t, cpu, 1);
683 load_TLS_descriptor(t, cpu, 2);
684
685 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
686}
687
a8fc1089
EH
688#ifdef CONFIG_X86_64
689static void xen_load_gs_index(unsigned int idx)
690{
691 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
692 BUG();
5ead97c8 693}
a8fc1089 694#endif
5ead97c8
JF
695
696static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 697 const void *ptr)
5ead97c8 698{
cef43bf6 699 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 700 u64 entry = *(u64 *)ptr;
5ead97c8 701
ab78f7ad
JF
702 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
703
f120f13e
JF
704 preempt_disable();
705
5ead97c8
JF
706 xen_mc_flush();
707 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
708 BUG();
f120f13e
JF
709
710 preempt_enable();
5ead97c8
JF
711}
712
e176d367 713static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
714 struct trap_info *info)
715{
6cac5a92
JF
716 unsigned long addr;
717
6d02c426 718 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
719 return 0;
720
721 info->vector = vector;
6cac5a92
JF
722
723 addr = gate_offset(*val);
724#ifdef CONFIG_X86_64
b80119bb
JF
725 /*
726 * Look for known traps using IST, and substitute them
727 * appropriately. The debugger ones are the only ones we care
05e36006
LJ
728 * about. Xen will handle faults like double_fault,
729 * so we should never see them. Warn if
b80119bb
JF
730 * there's an unexpected IST-using fault handler.
731 */
6cac5a92
JF
732 if (addr == (unsigned long)debug)
733 addr = (unsigned long)xen_debug;
734 else if (addr == (unsigned long)int3)
735 addr = (unsigned long)xen_int3;
736 else if (addr == (unsigned long)stack_segment)
737 addr = (unsigned long)xen_stack_segment;
b80119bb
JF
738 else if (addr == (unsigned long)double_fault ||
739 addr == (unsigned long)nmi) {
740 /* Don't need to handle these */
741 return 0;
742#ifdef CONFIG_X86_MCE
743 } else if (addr == (unsigned long)machine_check) {
05e36006
LJ
744 /*
745 * when xen hypervisor inject vMCE to guest,
746 * use native mce handler to handle it
747 */
748 ;
b80119bb
JF
749#endif
750 } else {
751 /* Some other trap using IST? */
752 if (WARN_ON(val->ist != 0))
753 return 0;
754 }
6cac5a92
JF
755#endif /* CONFIG_X86_64 */
756 info->address = addr;
757
e176d367
EH
758 info->cs = gate_segment(*val);
759 info->flags = val->dpl;
5ead97c8 760 /* interrupt gates clear IF */
6d02c426
JF
761 if (val->type == GATE_INTERRUPT)
762 info->flags |= 1 << 2;
5ead97c8
JF
763
764 return 1;
765}
766
767/* Locations of each CPU's IDT */
6b68f01b 768static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
769
770/* Set an IDT entry. If the entry is part of the current IDT, then
771 also update Xen. */
8d947344 772static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 773{
5ead97c8 774 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
775 unsigned long start, end;
776
ab78f7ad
JF
777 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
778
f120f13e
JF
779 preempt_disable();
780
780f36d8
CL
781 start = __this_cpu_read(idt_desc.address);
782 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
783
784 xen_mc_flush();
785
8d947344 786 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
787
788 if (p >= start && (p + 8) <= end) {
789 struct trap_info info[2];
790
791 info[1].address = 0;
792
e176d367 793 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
794 if (HYPERVISOR_set_trap_table(info))
795 BUG();
796 }
f120f13e
JF
797
798 preempt_enable();
5ead97c8
JF
799}
800
6b68f01b 801static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 802 struct trap_info *traps)
5ead97c8 803{
5ead97c8
JF
804 unsigned in, out, count;
805
e176d367 806 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
807 BUG_ON(count > 256);
808
5ead97c8 809 for (in = out = 0; in < count; in++) {
e176d367 810 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 811
e176d367 812 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
813 out++;
814 }
815 traps[out].address = 0;
f87e4cac
JF
816}
817
818void xen_copy_trap_info(struct trap_info *traps)
819{
6b68f01b 820 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
821
822 xen_convert_trap_info(desc, traps);
f87e4cac
JF
823}
824
825/* Load a new IDT into Xen. In principle this can be per-CPU, so we
826 hold a spinlock to protect the static traps[] array (static because
827 it avoids allocation, and saves stack space). */
6b68f01b 828static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
829{
830 static DEFINE_SPINLOCK(lock);
831 static struct trap_info traps[257];
f87e4cac 832
ab78f7ad
JF
833 trace_xen_cpu_load_idt(desc);
834
f87e4cac
JF
835 spin_lock(&lock);
836
f120f13e
JF
837 __get_cpu_var(idt_desc) = *desc;
838
f87e4cac 839 xen_convert_trap_info(desc, traps);
5ead97c8
JF
840
841 xen_mc_flush();
842 if (HYPERVISOR_set_trap_table(traps))
843 BUG();
844
845 spin_unlock(&lock);
846}
847
848/* Write a GDT descriptor entry. Ignore LDT descriptors, since
849 they're handled differently. */
850static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 851 const void *desc, int type)
5ead97c8 852{
ab78f7ad
JF
853 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
854
f120f13e
JF
855 preempt_disable();
856
014b15be
GOC
857 switch (type) {
858 case DESC_LDT:
859 case DESC_TSS:
5ead97c8
JF
860 /* ignore */
861 break;
862
863 default: {
9976b39b 864 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
865
866 xen_mc_flush();
014b15be 867 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
868 BUG();
869 }
870
871 }
f120f13e
JF
872
873 preempt_enable();
5ead97c8
JF
874}
875
577eebea
JF
876/*
877 * Version of write_gdt_entry for use at early boot-time needed to
878 * update an entry as simply as possible.
879 */
ad3062a0 880static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
577eebea
JF
881 const void *desc, int type)
882{
ab78f7ad
JF
883 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
884
577eebea
JF
885 switch (type) {
886 case DESC_LDT:
887 case DESC_TSS:
888 /* ignore */
889 break;
890
891 default: {
892 xmaddr_t maddr = virt_to_machine(&dt[entry]);
893
894 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
895 dt[entry] = *(struct desc_struct *)desc;
896 }
897
898 }
899}
900
faca6227 901static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 902 struct thread_struct *thread)
5ead97c8 903{
ab78f7ad
JF
904 struct multicall_space mcs;
905
906 mcs = xen_mc_entry(0);
faca6227 907 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
908 xen_mc_issue(PARAVIRT_LAZY_CPU);
909}
910
911static void xen_set_iopl_mask(unsigned mask)
912{
913 struct physdev_set_iopl set_iopl;
914
915 /* Force the change at ring 0. */
916 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
917 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
918}
919
920static void xen_io_delay(void)
921{
922}
923
924#ifdef CONFIG_X86_LOCAL_APIC
558daa28
KRW
925static unsigned long xen_set_apic_id(unsigned int x)
926{
927 WARN_ON(1);
928 return x;
929}
930static unsigned int xen_get_apic_id(unsigned long x)
931{
932 return ((x)>>24) & 0xFFu;
933}
ad66dd34 934static u32 xen_apic_read(u32 reg)
5ead97c8 935{
558daa28
KRW
936 struct xen_platform_op op = {
937 .cmd = XENPF_get_cpuinfo,
938 .interface_version = XENPF_INTERFACE_VERSION,
939 .u.pcpu_info.xen_cpuid = 0,
940 };
941 int ret = 0;
942
943 /* Shouldn't need this as APIC is turned off for PV, and we only
944 * get called on the bootup processor. But just in case. */
945 if (!xen_initial_domain() || smp_processor_id())
946 return 0;
947
948 if (reg == APIC_LVR)
949 return 0x10;
950
951 if (reg != APIC_ID)
952 return 0;
953
954 ret = HYPERVISOR_dom0_op(&op);
955 if (ret)
956 return 0;
957
958 return op.u.pcpu_info.apic_id << 24;
5ead97c8 959}
f87e4cac 960
ad66dd34 961static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
962{
963 /* Warn to see if there's any stray references */
964 WARN_ON(1);
965}
ad66dd34 966
ad66dd34
SS
967static u64 xen_apic_icr_read(void)
968{
969 return 0;
970}
971
972static void xen_apic_icr_write(u32 low, u32 id)
973{
974 /* Warn to see if there's any stray references */
975 WARN_ON(1);
976}
977
978static void xen_apic_wait_icr_idle(void)
979{
980 return;
981}
982
94a8c3c2
YL
983static u32 xen_safe_apic_wait_icr_idle(void)
984{
985 return 0;
986}
987
c1eeb2de
YL
988static void set_xen_basic_apic_ops(void)
989{
990 apic->read = xen_apic_read;
991 apic->write = xen_apic_write;
992 apic->icr_read = xen_apic_icr_read;
993 apic->icr_write = xen_apic_icr_write;
994 apic->wait_icr_idle = xen_apic_wait_icr_idle;
995 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
558daa28
KRW
996 apic->set_apic_id = xen_set_apic_id;
997 apic->get_apic_id = xen_get_apic_id;
f447d56d
BG
998
999#ifdef CONFIG_SMP
1000 apic->send_IPI_allbutself = xen_send_IPI_allbutself;
1001 apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself;
1002 apic->send_IPI_mask = xen_send_IPI_mask;
1003 apic->send_IPI_all = xen_send_IPI_all;
1004 apic->send_IPI_self = xen_send_IPI_self;
1005#endif
c1eeb2de 1006}
ad66dd34 1007
5ead97c8
JF
1008#endif
1009
7b1333aa
JF
1010static void xen_clts(void)
1011{
1012 struct multicall_space mcs;
1013
1014 mcs = xen_mc_entry(0);
1015
1016 MULTI_fpu_taskswitch(mcs.mc, 0);
1017
1018 xen_mc_issue(PARAVIRT_LAZY_CPU);
1019}
1020
a789ed5f
JF
1021static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
1022
1023static unsigned long xen_read_cr0(void)
1024{
2113f469 1025 unsigned long cr0 = this_cpu_read(xen_cr0_value);
a789ed5f
JF
1026
1027 if (unlikely(cr0 == 0)) {
1028 cr0 = native_read_cr0();
2113f469 1029 this_cpu_write(xen_cr0_value, cr0);
a789ed5f
JF
1030 }
1031
1032 return cr0;
1033}
1034
7b1333aa
JF
1035static void xen_write_cr0(unsigned long cr0)
1036{
1037 struct multicall_space mcs;
1038
2113f469 1039 this_cpu_write(xen_cr0_value, cr0);
a789ed5f 1040
7b1333aa
JF
1041 /* Only pay attention to cr0.TS; everything else is
1042 ignored. */
1043 mcs = xen_mc_entry(0);
1044
1045 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
1046
1047 xen_mc_issue(PARAVIRT_LAZY_CPU);
1048}
1049
5ead97c8
JF
1050static void xen_write_cr4(unsigned long cr4)
1051{
2956a351
JF
1052 cr4 &= ~X86_CR4_PGE;
1053 cr4 &= ~X86_CR4_PSE;
1054
1055 native_write_cr4(cr4);
5ead97c8 1056}
1a7bbda5
KRW
1057#ifdef CONFIG_X86_64
1058static inline unsigned long xen_read_cr8(void)
1059{
1060 return 0;
1061}
1062static inline void xen_write_cr8(unsigned long val)
1063{
1064 BUG_ON(val);
1065}
1066#endif
1153968a
JF
1067static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1068{
1069 int ret;
1070
1071 ret = 0;
1072
f63c2f24 1073 switch (msr) {
1153968a
JF
1074#ifdef CONFIG_X86_64
1075 unsigned which;
1076 u64 base;
1077
1078 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
1079 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
1080 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
1081
1082 set:
1083 base = ((u64)high << 32) | low;
1084 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 1085 ret = -EIO;
1153968a
JF
1086 break;
1087#endif
d89961e2
JF
1088
1089 case MSR_STAR:
1090 case MSR_CSTAR:
1091 case MSR_LSTAR:
1092 case MSR_SYSCALL_MASK:
1093 case MSR_IA32_SYSENTER_CS:
1094 case MSR_IA32_SYSENTER_ESP:
1095 case MSR_IA32_SYSENTER_EIP:
1096 /* Fast syscall setup is all done in hypercalls, so
1097 these are all ignored. Stub them out here to stop
1098 Xen console noise. */
1099 break;
1100
41f2e477
JF
1101 case MSR_IA32_CR_PAT:
1102 if (smp_processor_id() == 0)
1103 xen_set_pat(((u64)high << 32) | low);
1104 break;
1105
1153968a
JF
1106 default:
1107 ret = native_write_msr_safe(msr, low, high);
1108 }
1109
1110 return ret;
1111}
1112
0e91398f 1113void xen_setup_shared_info(void)
5ead97c8
JF
1114{
1115 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1116 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1117 xen_start_info->shared_info);
1118
1119 HYPERVISOR_shared_info =
1120 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1121 } else
1122 HYPERVISOR_shared_info =
1123 (struct shared_info *)__va(xen_start_info->shared_info);
1124
2e8fe719
JF
1125#ifndef CONFIG_SMP
1126 /* In UP this is as good a place as any to set up shared info */
1127 xen_setup_vcpu_info_placement();
1128#endif
d5edbc1f
JF
1129
1130 xen_setup_mfn_list_list();
2e8fe719
JF
1131}
1132
5f054e31 1133/* This is called once we have the cpu_possible_mask */
0e91398f 1134void xen_setup_vcpu_info_placement(void)
60223a32
JF
1135{
1136 int cpu;
1137
1138 for_each_possible_cpu(cpu)
1139 xen_vcpu_setup(cpu);
1140
1141 /* xen_vcpu_setup managed to place the vcpu_info within the
1142 percpu area for all cpus, so make use of it */
1143 if (have_vcpu_info_placement) {
ecb93d1c
JF
1144 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1145 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1146 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1147 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 1148 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1149 }
5ead97c8
JF
1150}
1151
ab144f5e
AK
1152static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1153 unsigned long addr, unsigned len)
6487673b
JF
1154{
1155 char *start, *end, *reloc;
1156 unsigned ret;
1157
1158 start = end = reloc = NULL;
1159
93b1eab3
JF
1160#define SITE(op, x) \
1161 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1162 if (have_vcpu_info_placement) { \
1163 start = (char *)xen_##x##_direct; \
1164 end = xen_##x##_direct_end; \
1165 reloc = xen_##x##_direct_reloc; \
1166 } \
1167 goto patch_site
1168
1169 switch (type) {
93b1eab3
JF
1170 SITE(pv_irq_ops, irq_enable);
1171 SITE(pv_irq_ops, irq_disable);
1172 SITE(pv_irq_ops, save_fl);
1173 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1174#undef SITE
1175
1176 patch_site:
1177 if (start == NULL || (end-start) > len)
1178 goto default_patch;
1179
ab144f5e 1180 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1181
1182 /* Note: because reloc is assigned from something that
1183 appears to be an array, gcc assumes it's non-null,
1184 but doesn't know its relationship with start and
1185 end. */
1186 if (reloc > start && reloc < end) {
1187 int reloc_off = reloc - start;
ab144f5e
AK
1188 long *relocp = (long *)(insnbuf + reloc_off);
1189 long delta = start - (char *)addr;
6487673b
JF
1190
1191 *relocp += delta;
1192 }
1193 break;
1194
1195 default_patch:
1196 default:
ab144f5e
AK
1197 ret = paravirt_patch_default(type, clobbers, insnbuf,
1198 addr, len);
6487673b
JF
1199 break;
1200 }
1201
1202 return ret;
1203}
1204
ad3062a0 1205static const struct pv_info xen_info __initconst = {
5ead97c8
JF
1206 .paravirt_enabled = 1,
1207 .shared_kernel_pmd = 0,
1208
318f5a2a
AL
1209#ifdef CONFIG_X86_64
1210 .extra_user_64bit_cs = FLAT_USER_CS64,
1211#endif
1212
5ead97c8 1213 .name = "Xen",
93b1eab3 1214};
5ead97c8 1215
ad3062a0 1216static const struct pv_init_ops xen_init_ops __initconst = {
6487673b 1217 .patch = xen_patch,
93b1eab3 1218};
5ead97c8 1219
ad3062a0 1220static const struct pv_cpu_ops xen_cpu_ops __initconst = {
5ead97c8
JF
1221 .cpuid = xen_cpuid,
1222
1223 .set_debugreg = xen_set_debugreg,
1224 .get_debugreg = xen_get_debugreg,
1225
7b1333aa 1226 .clts = xen_clts,
5ead97c8 1227
a789ed5f 1228 .read_cr0 = xen_read_cr0,
7b1333aa 1229 .write_cr0 = xen_write_cr0,
5ead97c8 1230
5ead97c8
JF
1231 .read_cr4 = native_read_cr4,
1232 .read_cr4_safe = native_read_cr4_safe,
1233 .write_cr4 = xen_write_cr4,
1234
1a7bbda5
KRW
1235#ifdef CONFIG_X86_64
1236 .read_cr8 = xen_read_cr8,
1237 .write_cr8 = xen_write_cr8,
1238#endif
1239
5ead97c8
JF
1240 .wbinvd = native_wbinvd,
1241
1242 .read_msr = native_read_msr_safe,
1153968a 1243 .write_msr = xen_write_msr_safe,
1ab46fd3 1244
5ead97c8
JF
1245 .read_tsc = native_read_tsc,
1246 .read_pmc = native_read_pmc,
1247
cd0608e7
KRW
1248 .read_tscp = native_read_tscp,
1249
81e103f1 1250 .iret = xen_iret,
d75cd22f 1251 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1252#ifdef CONFIG_X86_64
1253 .usergs_sysret32 = xen_sysret32,
1254 .usergs_sysret64 = xen_sysret64,
1255#endif
5ead97c8
JF
1256
1257 .load_tr_desc = paravirt_nop,
1258 .set_ldt = xen_set_ldt,
1259 .load_gdt = xen_load_gdt,
1260 .load_idt = xen_load_idt,
1261 .load_tls = xen_load_tls,
a8fc1089
EH
1262#ifdef CONFIG_X86_64
1263 .load_gs_index = xen_load_gs_index,
1264#endif
5ead97c8 1265
38ffbe66
JF
1266 .alloc_ldt = xen_alloc_ldt,
1267 .free_ldt = xen_free_ldt,
1268
5ead97c8
JF
1269 .store_idt = native_store_idt,
1270 .store_tr = xen_store_tr,
1271
1272 .write_ldt_entry = xen_write_ldt_entry,
1273 .write_gdt_entry = xen_write_gdt_entry,
1274 .write_idt_entry = xen_write_idt_entry,
faca6227 1275 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1276
1277 .set_iopl_mask = xen_set_iopl_mask,
1278 .io_delay = xen_io_delay,
1279
952d1d70
JF
1280 /* Xen takes care of %gs when switching to usermode for us */
1281 .swapgs = paravirt_nop,
1282
224101ed
JF
1283 .start_context_switch = paravirt_start_context_switch,
1284 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1285};
1286
ad3062a0 1287static const struct pv_apic_ops xen_apic_ops __initconst = {
5ead97c8 1288#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1289 .startup_ipi_hook = paravirt_nop,
1290#endif
93b1eab3
JF
1291};
1292
fefa629a
JF
1293static void xen_reboot(int reason)
1294{
349c709f
JF
1295 struct sched_shutdown r = { .reason = reason };
1296
349c709f 1297 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1298 BUG();
1299}
1300
1301static void xen_restart(char *msg)
1302{
1303 xen_reboot(SHUTDOWN_reboot);
1304}
1305
1306static void xen_emergency_restart(void)
1307{
1308 xen_reboot(SHUTDOWN_reboot);
1309}
1310
1311static void xen_machine_halt(void)
1312{
1313 xen_reboot(SHUTDOWN_poweroff);
1314}
1315
b2abe506
TG
1316static void xen_machine_power_off(void)
1317{
1318 if (pm_power_off)
1319 pm_power_off();
1320 xen_reboot(SHUTDOWN_poweroff);
1321}
1322
fefa629a
JF
1323static void xen_crash_shutdown(struct pt_regs *regs)
1324{
1325 xen_reboot(SHUTDOWN_crash);
1326}
1327
f09f6d19
DD
1328static int
1329xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1330{
086748e5 1331 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1332 return NOTIFY_DONE;
1333}
1334
1335static struct notifier_block xen_panic_block = {
1336 .notifier_call= xen_panic_event,
1337};
1338
1339int xen_panic_handler_init(void)
1340{
1341 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1342 return 0;
1343}
1344
ad3062a0 1345static const struct machine_ops xen_machine_ops __initconst = {
fefa629a
JF
1346 .restart = xen_restart,
1347 .halt = xen_machine_halt,
b2abe506 1348 .power_off = xen_machine_power_off,
fefa629a
JF
1349 .shutdown = xen_machine_halt,
1350 .crash_shutdown = xen_crash_shutdown,
1351 .emergency_restart = xen_emergency_restart,
1352};
1353
96f28bc6
DV
1354static void __init xen_boot_params_init_edd(void)
1355{
1356#if IS_ENABLED(CONFIG_EDD)
1357 struct xen_platform_op op;
1358 struct edd_info *edd_info;
1359 u32 *mbr_signature;
1360 unsigned nr;
1361 int ret;
1362
1363 edd_info = boot_params.eddbuf;
1364 mbr_signature = boot_params.edd_mbr_sig_buffer;
1365
1366 op.cmd = XENPF_firmware_info;
1367
1368 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1369 for (nr = 0; nr < EDDMAXNR; nr++) {
1370 struct edd_info *info = edd_info + nr;
1371
1372 op.u.firmware_info.index = nr;
1373 info->params.length = sizeof(info->params);
1374 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1375 &info->params);
1376 ret = HYPERVISOR_dom0_op(&op);
1377 if (ret)
1378 break;
1379
1380#define C(x) info->x = op.u.firmware_info.u.disk_info.x
1381 C(device);
1382 C(version);
1383 C(interface_support);
1384 C(legacy_max_cylinder);
1385 C(legacy_max_head);
1386 C(legacy_sectors_per_track);
1387#undef C
1388 }
1389 boot_params.eddbuf_entries = nr;
1390
1391 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1392 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1393 op.u.firmware_info.index = nr;
1394 ret = HYPERVISOR_dom0_op(&op);
1395 if (ret)
1396 break;
1397 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1398 }
1399 boot_params.edd_mbr_sig_buf_entries = nr;
1400#endif
1401}
1402
577eebea
JF
1403/*
1404 * Set up the GDT and segment registers for -fstack-protector. Until
1405 * we do this, we have to be careful not to call any stack-protected
1406 * function, which is most of the kernel.
1407 */
1408static void __init xen_setup_stackprotector(void)
1409{
1410 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1411 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1412
1413 setup_stack_canary_segment(0);
1414 switch_to_new_gdt(0);
1415
1416 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1417 pv_cpu_ops.load_gdt = xen_load_gdt;
1418}
1419
5ead97c8
JF
1420/* First C function to be called on Xen boot */
1421asmlinkage void __init xen_start_kernel(void)
1422{
ec35a69c
KRW
1423 struct physdev_set_iopl set_iopl;
1424 int rc;
5ead97c8
JF
1425
1426 if (!xen_start_info)
1427 return;
1428
6e833587
JF
1429 xen_domain_type = XEN_PV_DOMAIN;
1430
7e77506a
IC
1431 xen_setup_machphys_mapping();
1432
5ead97c8 1433 /* Install Xen paravirt ops */
93b1eab3
JF
1434 pv_info = xen_info;
1435 pv_init_ops = xen_init_ops;
93b1eab3 1436 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1437 pv_apic_ops = xen_apic_ops;
93b1eab3 1438
6b18ae3e 1439 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1440 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1441 x86_init.oem.banner = xen_banner;
845b3944 1442
409771d2 1443 xen_init_time_ops();
93b1eab3 1444
ce2eef33 1445 /*
577eebea 1446 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1447 */
577eebea 1448
973df35e
JF
1449 xen_init_mmu_ops();
1450
577eebea
JF
1451 /* Prevent unwanted bits from being set in PTEs. */
1452 __supported_pte_mask &= ~_PAGE_GLOBAL;
8eaffa67 1453#if 0
577eebea 1454 if (!xen_initial_domain())
8eaffa67 1455#endif
577eebea
JF
1456 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1457
1458 __supported_pte_mask |= _PAGE_IOMAP;
1459
817a824b
IC
1460 /*
1461 * Prevent page tables from being allocated in highmem, even
1462 * if CONFIG_HIGHPTE is enabled.
1463 */
1464 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1465
b75fe4e5 1466 /* Work out if we support NX */
4763ed4d 1467 x86_configure_nx();
b75fe4e5 1468
577eebea
JF
1469 xen_setup_features();
1470
1471 /* Get mfn list */
1472 if (!xen_feature(XENFEAT_auto_translated_physmap))
1473 xen_build_dynamic_phys_to_machine();
1474
1475 /*
1476 * Set up kernel GDT and segment registers, mainly so that
1477 * -fstack-protector code can be executed.
1478 */
1479 xen_setup_stackprotector();
0d1edf46 1480
ce2eef33 1481 xen_init_irq_ops();
e826fe1b
JF
1482 xen_init_cpuid_mask();
1483
94a8c3c2 1484#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1485 /*
94a8c3c2 1486 * set up the basic apic ops.
ad66dd34 1487 */
c1eeb2de 1488 set_xen_basic_apic_ops();
ad66dd34 1489#endif
93b1eab3 1490
e57778a1
JF
1491 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1492 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1493 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1494 }
1495
fefa629a
JF
1496 machine_ops = xen_machine_ops;
1497
38341432
JF
1498 /*
1499 * The only reliable way to retain the initial address of the
1500 * percpu gdt_page is to remember it here, so we can go and
1501 * mark it RW later, when the initial percpu area is freed.
1502 */
1503 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1504
a9e7062d 1505 xen_smp_init();
5ead97c8 1506
c1f5db1a
IC
1507#ifdef CONFIG_ACPI_NUMA
1508 /*
1509 * The pages we from Xen are not related to machine pages, so
1510 * any NUMA information the kernel tries to get from ACPI will
1511 * be meaningless. Prevent it from trying.
1512 */
1513 acpi_numa = -1;
1514#endif
c79c4982
KRW
1515#ifdef CONFIG_X86_PAT
1516 /*
1517 * For right now disable the PAT. We should remove this once
1518 * git commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1
1519 * (xen/pat: Disable PAT support for now) is reverted.
1520 */
1521 pat_enabled = 0;
1522#endif
60223a32 1523 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1524 possible map and a non-dummy shared_info. */
60223a32 1525 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1526
55d80856 1527 local_irq_disable();
2ce802f6 1528 early_boot_irqs_disabled = true;
55d80856 1529
084a2a4e 1530 xen_raw_console_write("mapping kernel into physical memory\n");
3699aad0 1531 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages);
5ead97c8 1532
33a84750
JF
1533 /* Allocate and initialize top and mid mfn levels for p2m structure */
1534 xen_build_mfn_list_list();
1535
5ead97c8
JF
1536 /* keep using Xen gdt for now; no urgent need to change it */
1537
e68266b7 1538#ifdef CONFIG_X86_32
93b1eab3 1539 pv_info.kernel_rpl = 1;
5ead97c8 1540 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1541 pv_info.kernel_rpl = 0;
e68266b7
IC
1542#else
1543 pv_info.kernel_rpl = 0;
1544#endif
5ead97c8 1545 /* set the limit of our address space */
fb1d8404 1546 xen_reserve_top();
5ead97c8 1547
ec35a69c
KRW
1548 /* We used to do this in xen_arch_setup, but that is too late on AMD
1549 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1550 * which pokes 0xcf8 port.
1551 */
1552 set_iopl.iopl = 1;
1553 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1554 if (rc != 0)
1555 xen_raw_printk("physdev_op failed %d\n", rc);
1556
7d087b68 1557#ifdef CONFIG_X86_32
5ead97c8
JF
1558 /* set up basic CPUID stuff */
1559 cpu_detect(&new_cpu_data);
60e019eb 1560 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
d560bc61 1561 new_cpu_data.wp_works_ok = 1;
5ead97c8 1562 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1563#endif
5ead97c8
JF
1564
1565 /* Poke various useful things into boot_params */
30c82645
PA
1566 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1567 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1568 ? __pa(xen_start_info->mod_start) : 0;
1569 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1570 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1571
6e833587 1572 if (!xen_initial_domain()) {
83abc70a 1573 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1574 add_preferred_console("tty", 0, NULL);
b8c2d3df 1575 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1576 if (pci_xen)
1577 x86_init.pci.arch_init = pci_xen_init;
5d990b62 1578 } else {
c2419b4a
JF
1579 const struct dom0_vga_console_info *info =
1580 (void *)((char *)xen_start_info +
1581 xen_start_info->console.dom0.info_off);
ffb8b233
KRW
1582 struct xen_platform_op op = {
1583 .cmd = XENPF_firmware_info,
1584 .interface_version = XENPF_INTERFACE_VERSION,
1585 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1586 };
c2419b4a
JF
1587
1588 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1589 xen_start_info->console.domU.mfn = 0;
1590 xen_start_info->console.domU.evtchn = 0;
1591
ffb8b233
KRW
1592 if (HYPERVISOR_dom0_op(&op) == 0)
1593 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1594
31b3c9d7
KRW
1595 xen_init_apic();
1596
5d990b62
CW
1597 /* Make sure ACS will be enabled */
1598 pci_request_acs();
211063dc
KRW
1599
1600 xen_acpi_sleep_register();
bd49940a
KRW
1601
1602 /* Avoid searching for BIOS MP tables */
1603 x86_init.mpparse.find_smp_config = x86_init_noop;
1604 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
96f28bc6
DV
1605
1606 xen_boot_params_init_edd();
9e124fe1 1607 }
76a8df7b
DV
1608#ifdef CONFIG_PCI
1609 /* PCI BIOS service won't work from a PV guest. */
1610 pci_probe &= ~PCI_PROBE_BIOS;
1611#endif
084a2a4e
JF
1612 xen_raw_console_write("about to get started...\n");
1613
499d19b8
JF
1614 xen_setup_runstate_info(0);
1615
5ead97c8 1616 /* Start the world */
f5d36de0 1617#ifdef CONFIG_X86_32
f0d43100 1618 i386_start_kernel();
f5d36de0 1619#else
084a2a4e 1620 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1621#endif
5ead97c8 1622}
bee6ab53 1623
e9daff24 1624void __ref xen_hvm_init_shared_info(void)
bee6ab53 1625{
e9daff24 1626 int cpu;
bee6ab53 1627 struct xen_add_to_physmap xatp;
e9daff24 1628 static struct shared_info *shared_info_page = 0;
bee6ab53 1629
e9daff24
KRW
1630 if (!shared_info_page)
1631 shared_info_page = (struct shared_info *)
1632 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1633 xatp.domid = DOMID_SELF;
1634 xatp.idx = 0;
1635 xatp.space = XENMAPSPACE_shared_info;
e9daff24 1636 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
bee6ab53
SY
1637 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1638 BUG();
1639
e9daff24 1640 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
bee6ab53 1641
016b6f5f
SS
1642 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1643 * page, we use it in the event channel upcall and in some pvclock
1644 * related functions. We don't need the vcpu_info placement
1645 * optimizations because we don't use any pv_mmu or pv_irq op on
e9daff24
KRW
1646 * HVM.
1647 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1648 * online but xen_hvm_init_shared_info is run at resume time too and
1649 * in that case multiple vcpus might be online. */
1650 for_each_online_cpu(cpu) {
d5b17dbf
KRW
1651 /* Leave it to be NULL. */
1652 if (cpu >= MAX_VIRT_CPUS)
1653 continue;
016b6f5f
SS
1654 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1655 }
bee6ab53
SY
1656}
1657
e9daff24 1658#ifdef CONFIG_XEN_PVHVM
4ff2d062
OH
1659static void __init init_hvm_pv_info(void)
1660{
e9daff24 1661 int major, minor;
5eb65be2 1662 uint32_t eax, ebx, ecx, edx, pages, msr, base;
4ff2d062
OH
1663 u64 pfn;
1664
1665 base = xen_cpuid_base();
e9daff24
KRW
1666 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1667
1668 major = eax >> 16;
1669 minor = eax & 0xffff;
1670 printk(KERN_INFO "Xen version %d.%d.\n", major, minor);
1671
4ff2d062
OH
1672 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1673
1674 pfn = __pa(hypercall_page);
1675 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1676
1677 xen_setup_features();
1678
1679 pv_info.name = "Xen HVM";
1680
1681 xen_domain_type = XEN_HVM_DOMAIN;
1682}
1683
38e20b07
SY
1684static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1685 unsigned long action, void *hcpu)
1686{
1687 int cpu = (long)hcpu;
1688 switch (action) {
1689 case CPU_UP_PREPARE:
90d4f553 1690 xen_vcpu_setup(cpu);
7918c92a 1691 if (xen_have_vector_callback) {
99bbb3a8 1692 xen_init_lock_cpu(cpu);
7918c92a
KRW
1693 if (xen_feature(XENFEAT_hvm_safe_pvclock))
1694 xen_setup_timer(cpu);
1695 }
38e20b07
SY
1696 break;
1697 default:
1698 break;
1699 }
1700 return NOTIFY_OK;
1701}
1702
ad3062a0 1703static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
38e20b07
SY
1704 .notifier_call = xen_hvm_cpu_notify,
1705};
1706
bee6ab53
SY
1707static void __init xen_hvm_guest_init(void)
1708{
4ff2d062 1709 init_hvm_pv_info();
bee6ab53 1710
016b6f5f 1711 xen_hvm_init_shared_info();
38e20b07
SY
1712
1713 if (xen_feature(XENFEAT_hvm_callback_vector))
1714 xen_have_vector_callback = 1;
99bbb3a8 1715 xen_hvm_smp_init();
38e20b07 1716 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1717 xen_unplug_emulated_devices();
38e20b07 1718 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1719 xen_hvm_init_time_ops();
59151001 1720 xen_hvm_init_mmu_ops();
bee6ab53
SY
1721}
1722
1723static bool __init xen_hvm_platform(void)
1724{
1725 if (xen_pv_domain())
1726 return false;
1727
e9daff24 1728 if (!xen_cpuid_base())
bee6ab53
SY
1729 return false;
1730
1731 return true;
1732}
1733
d9b8ca84
SY
1734bool xen_hvm_need_lapic(void)
1735{
1736 if (xen_pv_domain())
1737 return false;
1738 if (!xen_hvm_domain())
1739 return false;
1740 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1741 return false;
1742 return true;
1743}
1744EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1745
ad3062a0 1746const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
bee6ab53
SY
1747 .name = "Xen HVM",
1748 .detect = xen_hvm_platform,
1749 .init_platform = xen_hvm_guest_init,
4cca6ea0 1750 .x2apic_available = xen_x2apic_para_available,
bee6ab53
SY
1751};
1752EXPORT_SYMBOL(x86_hyper_xen_hvm);
ca65f9fc 1753#endif