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CommitLineData
5ead97c8
JF
1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
5ead97c8
JF
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
5ead97c8
JF
20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
5ead97c8
JF
25#include <linux/bootmem.h>
26#include <linux/module.h>
f4f97b3e
JF
27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
5ead97c8 34
1ccbf534 35#include <xen/xen.h>
5ead97c8 36#include <xen/interface/xen.h>
ecbf29cd 37#include <xen/interface/version.h>
5ead97c8
JF
38#include <xen/interface/physdev.h>
39#include <xen/interface/vcpu.h>
bee6ab53 40#include <xen/interface/memory.h>
5ead97c8
JF
41#include <xen/features.h>
42#include <xen/page.h>
38e20b07 43#include <xen/hvm.h>
084a2a4e 44#include <xen/hvc-console.h>
5ead97c8
JF
45
46#include <asm/paravirt.h>
7b6aa335 47#include <asm/apic.h>
5ead97c8 48#include <asm/page.h>
b5401a96 49#include <asm/xen/pci.h>
5ead97c8
JF
50#include <asm/xen/hypercall.h>
51#include <asm/xen/hypervisor.h>
52#include <asm/fixmap.h>
53#include <asm/processor.h>
707ebbc8 54#include <asm/proto.h>
1153968a 55#include <asm/msr-index.h>
6cac5a92 56#include <asm/traps.h>
5ead97c8
JF
57#include <asm/setup.h>
58#include <asm/desc.h>
817a824b 59#include <asm/pgalloc.h>
5ead97c8 60#include <asm/pgtable.h>
f87e4cac 61#include <asm/tlbflush.h>
fefa629a 62#include <asm/reboot.h>
577eebea 63#include <asm/stackprotector.h>
bee6ab53 64#include <asm/hypervisor.h>
73c154c6
KRW
65#include <asm/mwait.h>
66
67#ifdef CONFIG_ACPI
68#include <linux/acpi.h>
69#include <asm/acpi.h>
70#include <acpi/pdc_intel.h>
71#include <acpi/processor.h>
72#include <xen/interface/platform.h>
73#endif
5ead97c8
JF
74
75#include "xen-ops.h"
3b827c1b 76#include "mmu.h"
5ead97c8
JF
77#include "multicalls.h"
78
79EXPORT_SYMBOL_GPL(hypercall_page);
80
5ead97c8
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81DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
82DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 83
6e833587
JF
84enum xen_domain_type xen_domain_type = XEN_NATIVE;
85EXPORT_SYMBOL_GPL(xen_domain_type);
86
7e77506a
IC
87unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
88EXPORT_SYMBOL(machine_to_phys_mapping);
ccbcdf7c
JB
89unsigned long machine_to_phys_nr;
90EXPORT_SYMBOL(machine_to_phys_nr);
7e77506a 91
5ead97c8
JF
92struct start_info *xen_start_info;
93EXPORT_SYMBOL_GPL(xen_start_info);
94
a0d695c8 95struct shared_info xen_dummy_shared_info;
60223a32 96
38341432
JF
97void *xen_initial_gdt;
98
bee6ab53 99RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
38e20b07
SY
100__read_mostly int xen_have_vector_callback;
101EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 102
60223a32
JF
103/*
104 * Point at some empty memory to start with. We map the real shared_info
105 * page as soon as fixmap is up and running.
106 */
a0d695c8 107struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
60223a32
JF
108
109/*
110 * Flag to determine whether vcpu info placement is available on all
111 * VCPUs. We assume it is to start with, and then set it to zero on
112 * the first failure. This is because it can succeed on some VCPUs
113 * and not others, since it can involve hypervisor memory allocation,
114 * or because the guest failed to guarantee all the appropriate
115 * constraints on all VCPUs (ie buffer can't cross a page boundary).
116 *
117 * Note that any particular CPU may be using a placed vcpu structure,
118 * but we can only optimise if the all are.
119 *
120 * 0: not available, 1: available
121 */
e4d04071 122static int have_vcpu_info_placement = 1;
60223a32 123
c06ee78d
MR
124static void clamp_max_cpus(void)
125{
126#ifdef CONFIG_SMP
127 if (setup_max_cpus > MAX_VIRT_CPUS)
128 setup_max_cpus = MAX_VIRT_CPUS;
129#endif
130}
131
9c7a7942 132static void xen_vcpu_setup(int cpu)
5ead97c8 133{
60223a32
JF
134 struct vcpu_register_vcpu_info info;
135 int err;
136 struct vcpu_info *vcpup;
137
a0d695c8 138 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 139
c06ee78d
MR
140 if (cpu < MAX_VIRT_CPUS)
141 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
60223a32 142
c06ee78d
MR
143 if (!have_vcpu_info_placement) {
144 if (cpu >= MAX_VIRT_CPUS)
145 clamp_max_cpus();
146 return;
147 }
60223a32 148
c06ee78d 149 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 150 info.mfn = arbitrary_virt_to_mfn(vcpup);
60223a32
JF
151 info.offset = offset_in_page(vcpup);
152
60223a32
JF
153 /* Check to see if the hypervisor will put the vcpu_info
154 structure where we want it, which allows direct access via
155 a percpu-variable. */
156 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
157
158 if (err) {
159 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
160 have_vcpu_info_placement = 0;
c06ee78d 161 clamp_max_cpus();
60223a32
JF
162 } else {
163 /* This cpu is using the registered vcpu info, even if
164 later ones fail to. */
165 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 166 }
5ead97c8
JF
167}
168
9c7a7942
JF
169/*
170 * On restore, set the vcpu placement up again.
171 * If it fails, then we're in a bad state, since
172 * we can't back out from using it...
173 */
174void xen_vcpu_restore(void)
175{
3905bb2a 176 int cpu;
9c7a7942 177
3905bb2a
JF
178 for_each_online_cpu(cpu) {
179 bool other_cpu = (cpu != smp_processor_id());
9c7a7942 180
3905bb2a
JF
181 if (other_cpu &&
182 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
183 BUG();
9c7a7942 184
3905bb2a 185 xen_setup_runstate_info(cpu);
9c7a7942 186
3905bb2a 187 if (have_vcpu_info_placement)
9c7a7942 188 xen_vcpu_setup(cpu);
9c7a7942 189
3905bb2a
JF
190 if (other_cpu &&
191 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
192 BUG();
9c7a7942
JF
193 }
194}
195
5ead97c8
JF
196static void __init xen_banner(void)
197{
95c7c23b
JF
198 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
199 struct xen_extraversion extra;
200 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
201
5ead97c8 202 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 203 pv_info.name);
95c7c23b
JF
204 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
205 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 206 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8
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207}
208
e826fe1b
JF
209static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
210static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
211
73c154c6
KRW
212static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
213static __read_mostly unsigned int cpuid_leaf5_ecx_val;
214static __read_mostly unsigned int cpuid_leaf5_edx_val;
215
65ea5b03
PA
216static void xen_cpuid(unsigned int *ax, unsigned int *bx,
217 unsigned int *cx, unsigned int *dx)
5ead97c8 218{
82d64699 219 unsigned maskebx = ~0;
e826fe1b 220 unsigned maskecx = ~0;
5ead97c8 221 unsigned maskedx = ~0;
73c154c6 222 unsigned setecx = 0;
5ead97c8
JF
223 /*
224 * Mask out inconvenient features, to try and disable as many
225 * unsupported kernel subsystems as possible.
226 */
82d64699
JF
227 switch (*ax) {
228 case 1:
e826fe1b 229 maskecx = cpuid_leaf1_ecx_mask;
73c154c6 230 setecx = cpuid_leaf1_ecx_set_mask;
e826fe1b 231 maskedx = cpuid_leaf1_edx_mask;
82d64699
JF
232 break;
233
73c154c6
KRW
234 case CPUID_MWAIT_LEAF:
235 /* Synthesize the values.. */
236 *ax = 0;
237 *bx = 0;
238 *cx = cpuid_leaf5_ecx_val;
239 *dx = cpuid_leaf5_edx_val;
240 return;
241
82d64699
JF
242 case 0xb:
243 /* Suppress extended topology stuff */
244 maskebx = 0;
245 break;
e826fe1b 246 }
5ead97c8
JF
247
248 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
249 : "=a" (*ax),
250 "=b" (*bx),
251 "=c" (*cx),
252 "=d" (*dx)
253 : "0" (*ax), "2" (*cx));
e826fe1b 254
82d64699 255 *bx &= maskebx;
e826fe1b 256 *cx &= maskecx;
73c154c6 257 *cx |= setecx;
65ea5b03 258 *dx &= maskedx;
73c154c6 259
5ead97c8
JF
260}
261
73c154c6
KRW
262static bool __init xen_check_mwait(void)
263{
264#ifdef CONFIG_ACPI
265 struct xen_platform_op op = {
266 .cmd = XENPF_set_processor_pminfo,
267 .u.set_pminfo.id = -1,
268 .u.set_pminfo.type = XEN_PM_PDC,
269 };
270 uint32_t buf[3];
271 unsigned int ax, bx, cx, dx;
272 unsigned int mwait_mask;
273
274 /* We need to determine whether it is OK to expose the MWAIT
275 * capability to the kernel to harvest deeper than C3 states from ACPI
276 * _CST using the processor_harvest_xen.c module. For this to work, we
277 * need to gather the MWAIT_LEAF values (which the cstate.c code
278 * checks against). The hypervisor won't expose the MWAIT flag because
279 * it would break backwards compatibility; so we will find out directly
280 * from the hardware and hypercall.
281 */
282 if (!xen_initial_domain())
283 return false;
284
285 ax = 1;
286 cx = 0;
287
288 native_cpuid(&ax, &bx, &cx, &dx);
289
290 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
291 (1 << (X86_FEATURE_MWAIT % 32));
292
293 if ((cx & mwait_mask) != mwait_mask)
294 return false;
295
296 /* We need to emulate the MWAIT_LEAF and for that we need both
297 * ecx and edx. The hypercall provides only partial information.
298 */
299
300 ax = CPUID_MWAIT_LEAF;
301 bx = 0;
302 cx = 0;
303 dx = 0;
304
305 native_cpuid(&ax, &bx, &cx, &dx);
306
307 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
308 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
309 */
310 buf[0] = ACPI_PDC_REVISION_ID;
311 buf[1] = 1;
312 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
313
314 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
315
316 if ((HYPERVISOR_dom0_op(&op) == 0) &&
317 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
318 cpuid_leaf5_ecx_val = cx;
319 cpuid_leaf5_edx_val = dx;
320 }
321 return true;
322#else
323 return false;
324#endif
325}
ad3062a0 326static void __init xen_init_cpuid_mask(void)
e826fe1b
JF
327{
328 unsigned int ax, bx, cx, dx;
947ccf9c 329 unsigned int xsave_mask;
e826fe1b
JF
330
331 cpuid_leaf1_edx_mask =
332 ~((1 << X86_FEATURE_MCE) | /* disable MCE */
333 (1 << X86_FEATURE_MCA) | /* disable MCA */
ff12849a 334 (1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
335 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
336
337 if (!xen_initial_domain())
338 cpuid_leaf1_edx_mask &=
339 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
340 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
947ccf9c 341 ax = 1;
5e287830 342 cx = 0;
947ccf9c 343 xen_cpuid(&ax, &bx, &cx, &dx);
e826fe1b 344
947ccf9c
SH
345 xsave_mask =
346 (1 << (X86_FEATURE_XSAVE % 32)) |
347 (1 << (X86_FEATURE_OSXSAVE % 32));
348
349 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
350 if ((cx & xsave_mask) != xsave_mask)
351 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
73c154c6
KRW
352
353 if (xen_check_mwait())
354 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
e826fe1b
JF
355}
356
5ead97c8
JF
357static void xen_set_debugreg(int reg, unsigned long val)
358{
359 HYPERVISOR_set_debugreg(reg, val);
360}
361
362static unsigned long xen_get_debugreg(int reg)
363{
364 return HYPERVISOR_get_debugreg(reg);
365}
366
224101ed 367static void xen_end_context_switch(struct task_struct *next)
5ead97c8 368{
5ead97c8 369 xen_mc_flush();
224101ed 370 paravirt_end_context_switch(next);
5ead97c8
JF
371}
372
373static unsigned long xen_store_tr(void)
374{
375 return 0;
376}
377
a05d2eba 378/*
cef43bf6
JF
379 * Set the page permissions for a particular virtual address. If the
380 * address is a vmalloc mapping (or other non-linear mapping), then
381 * find the linear mapping of the page and also set its protections to
382 * match.
a05d2eba
JF
383 */
384static void set_aliased_prot(void *v, pgprot_t prot)
385{
386 int level;
387 pte_t *ptep;
388 pte_t pte;
389 unsigned long pfn;
390 struct page *page;
391
392 ptep = lookup_address((unsigned long)v, &level);
393 BUG_ON(ptep == NULL);
394
395 pfn = pte_pfn(*ptep);
396 page = pfn_to_page(pfn);
397
398 pte = pfn_pte(pfn, prot);
399
400 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
401 BUG();
402
403 if (!PageHighMem(page)) {
404 void *av = __va(PFN_PHYS(pfn));
405
406 if (av != v)
407 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
408 BUG();
409 } else
410 kmap_flush_unused();
411}
412
38ffbe66
JF
413static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
414{
a05d2eba 415 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
416 int i;
417
a05d2eba
JF
418 for(i = 0; i < entries; i += entries_per_page)
419 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
420}
421
422static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
423{
a05d2eba 424 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
425 int i;
426
a05d2eba
JF
427 for(i = 0; i < entries; i += entries_per_page)
428 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
429}
430
5ead97c8
JF
431static void xen_set_ldt(const void *addr, unsigned entries)
432{
5ead97c8
JF
433 struct mmuext_op *op;
434 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
435
ab78f7ad
JF
436 trace_xen_cpu_set_ldt(addr, entries);
437
5ead97c8
JF
438 op = mcs.args;
439 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 440 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
441 op->arg2.nr_ents = entries;
442
443 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
444
445 xen_mc_issue(PARAVIRT_LAZY_CPU);
446}
447
6b68f01b 448static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 449{
5ead97c8
JF
450 unsigned long va = dtr->address;
451 unsigned int size = dtr->size + 1;
452 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
3ce5fa7e 453 unsigned long frames[pages];
5ead97c8 454 int f;
5ead97c8 455
577eebea
JF
456 /*
457 * A GDT can be up to 64k in size, which corresponds to 8192
458 * 8-byte entries, or 16 4k pages..
459 */
5ead97c8
JF
460
461 BUG_ON(size > 65536);
462 BUG_ON(va & ~PAGE_MASK);
463
5ead97c8 464 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 465 int level;
577eebea 466 pte_t *ptep;
6ed6bf42
JF
467 unsigned long pfn, mfn;
468 void *virt;
469
577eebea
JF
470 /*
471 * The GDT is per-cpu and is in the percpu data area.
472 * That can be virtually mapped, so we need to do a
473 * page-walk to get the underlying MFN for the
474 * hypercall. The page can also be in the kernel's
475 * linear range, so we need to RO that mapping too.
476 */
477 ptep = lookup_address(va, &level);
6ed6bf42
JF
478 BUG_ON(ptep == NULL);
479
480 pfn = pte_pfn(*ptep);
481 mfn = pfn_to_mfn(pfn);
482 virt = __va(PFN_PHYS(pfn));
483
484 frames[f] = mfn;
9976b39b 485
5ead97c8 486 make_lowmem_page_readonly((void *)va);
6ed6bf42 487 make_lowmem_page_readonly(virt);
5ead97c8
JF
488 }
489
3ce5fa7e
JF
490 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
491 BUG();
5ead97c8
JF
492}
493
577eebea
JF
494/*
495 * load_gdt for early boot, when the gdt is only mapped once
496 */
ad3062a0 497static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
577eebea
JF
498{
499 unsigned long va = dtr->address;
500 unsigned int size = dtr->size + 1;
501 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
502 unsigned long frames[pages];
503 int f;
504
505 /*
506 * A GDT can be up to 64k in size, which corresponds to 8192
507 * 8-byte entries, or 16 4k pages..
508 */
509
510 BUG_ON(size > 65536);
511 BUG_ON(va & ~PAGE_MASK);
512
513 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
514 pte_t pte;
515 unsigned long pfn, mfn;
516
517 pfn = virt_to_pfn(va);
518 mfn = pfn_to_mfn(pfn);
519
520 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
521
522 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
523 BUG();
524
525 frames[f] = mfn;
526 }
527
528 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
529 BUG();
530}
531
5ead97c8
JF
532static void load_TLS_descriptor(struct thread_struct *t,
533 unsigned int cpu, unsigned int i)
534{
535 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
9976b39b 536 xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
5ead97c8
JF
537 struct multicall_space mc = __xen_mc_entry(0);
538
539 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
540}
541
542static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
543{
8b84ad94 544 /*
ccbeed3a
TH
545 * XXX sleazy hack: If we're being called in a lazy-cpu zone
546 * and lazy gs handling is enabled, it means we're in a
547 * context switch, and %gs has just been saved. This means we
548 * can zero it out to prevent faults on exit from the
549 * hypervisor if the next process has no %gs. Either way, it
550 * has been saved, and the new value will get loaded properly.
551 * This will go away as soon as Xen has been modified to not
552 * save/restore %gs for normal hypercalls.
8a95408e
EH
553 *
554 * On x86_64, this hack is not used for %gs, because gs points
555 * to KERNEL_GS_BASE (and uses it for PDA references), so we
556 * must not zero %gs on x86_64
557 *
558 * For x86_64, we need to zero %fs, otherwise we may get an
559 * exception between the new %fs descriptor being loaded and
560 * %fs being effectively cleared at __switch_to().
8b84ad94 561 */
8a95408e
EH
562 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
563#ifdef CONFIG_X86_32
ccbeed3a 564 lazy_load_gs(0);
8a95408e
EH
565#else
566 loadsegment(fs, 0);
567#endif
568 }
569
570 xen_mc_batch();
571
572 load_TLS_descriptor(t, cpu, 0);
573 load_TLS_descriptor(t, cpu, 1);
574 load_TLS_descriptor(t, cpu, 2);
575
576 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
577}
578
a8fc1089
EH
579#ifdef CONFIG_X86_64
580static void xen_load_gs_index(unsigned int idx)
581{
582 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
583 BUG();
5ead97c8 584}
a8fc1089 585#endif
5ead97c8
JF
586
587static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 588 const void *ptr)
5ead97c8 589{
cef43bf6 590 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 591 u64 entry = *(u64 *)ptr;
5ead97c8 592
ab78f7ad
JF
593 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
594
f120f13e
JF
595 preempt_disable();
596
5ead97c8
JF
597 xen_mc_flush();
598 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
599 BUG();
f120f13e
JF
600
601 preempt_enable();
5ead97c8
JF
602}
603
e176d367 604static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
605 struct trap_info *info)
606{
6cac5a92
JF
607 unsigned long addr;
608
6d02c426 609 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
610 return 0;
611
612 info->vector = vector;
6cac5a92
JF
613
614 addr = gate_offset(*val);
615#ifdef CONFIG_X86_64
b80119bb
JF
616 /*
617 * Look for known traps using IST, and substitute them
618 * appropriately. The debugger ones are the only ones we care
619 * about. Xen will handle faults like double_fault and
620 * machine_check, so we should never see them. Warn if
621 * there's an unexpected IST-using fault handler.
622 */
6cac5a92
JF
623 if (addr == (unsigned long)debug)
624 addr = (unsigned long)xen_debug;
625 else if (addr == (unsigned long)int3)
626 addr = (unsigned long)xen_int3;
627 else if (addr == (unsigned long)stack_segment)
628 addr = (unsigned long)xen_stack_segment;
b80119bb
JF
629 else if (addr == (unsigned long)double_fault ||
630 addr == (unsigned long)nmi) {
631 /* Don't need to handle these */
632 return 0;
633#ifdef CONFIG_X86_MCE
634 } else if (addr == (unsigned long)machine_check) {
635 return 0;
636#endif
637 } else {
638 /* Some other trap using IST? */
639 if (WARN_ON(val->ist != 0))
640 return 0;
641 }
6cac5a92
JF
642#endif /* CONFIG_X86_64 */
643 info->address = addr;
644
e176d367
EH
645 info->cs = gate_segment(*val);
646 info->flags = val->dpl;
5ead97c8 647 /* interrupt gates clear IF */
6d02c426
JF
648 if (val->type == GATE_INTERRUPT)
649 info->flags |= 1 << 2;
5ead97c8
JF
650
651 return 1;
652}
653
654/* Locations of each CPU's IDT */
6b68f01b 655static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
656
657/* Set an IDT entry. If the entry is part of the current IDT, then
658 also update Xen. */
8d947344 659static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 660{
5ead97c8 661 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
662 unsigned long start, end;
663
ab78f7ad
JF
664 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
665
f120f13e
JF
666 preempt_disable();
667
780f36d8
CL
668 start = __this_cpu_read(idt_desc.address);
669 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
670
671 xen_mc_flush();
672
8d947344 673 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
674
675 if (p >= start && (p + 8) <= end) {
676 struct trap_info info[2];
677
678 info[1].address = 0;
679
e176d367 680 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
681 if (HYPERVISOR_set_trap_table(info))
682 BUG();
683 }
f120f13e
JF
684
685 preempt_enable();
5ead97c8
JF
686}
687
6b68f01b 688static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 689 struct trap_info *traps)
5ead97c8 690{
5ead97c8
JF
691 unsigned in, out, count;
692
e176d367 693 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
694 BUG_ON(count > 256);
695
5ead97c8 696 for (in = out = 0; in < count; in++) {
e176d367 697 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 698
e176d367 699 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
700 out++;
701 }
702 traps[out].address = 0;
f87e4cac
JF
703}
704
705void xen_copy_trap_info(struct trap_info *traps)
706{
6b68f01b 707 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
708
709 xen_convert_trap_info(desc, traps);
f87e4cac
JF
710}
711
712/* Load a new IDT into Xen. In principle this can be per-CPU, so we
713 hold a spinlock to protect the static traps[] array (static because
714 it avoids allocation, and saves stack space). */
6b68f01b 715static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
716{
717 static DEFINE_SPINLOCK(lock);
718 static struct trap_info traps[257];
f87e4cac 719
ab78f7ad
JF
720 trace_xen_cpu_load_idt(desc);
721
f87e4cac
JF
722 spin_lock(&lock);
723
f120f13e
JF
724 __get_cpu_var(idt_desc) = *desc;
725
f87e4cac 726 xen_convert_trap_info(desc, traps);
5ead97c8
JF
727
728 xen_mc_flush();
729 if (HYPERVISOR_set_trap_table(traps))
730 BUG();
731
732 spin_unlock(&lock);
733}
734
735/* Write a GDT descriptor entry. Ignore LDT descriptors, since
736 they're handled differently. */
737static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 738 const void *desc, int type)
5ead97c8 739{
ab78f7ad
JF
740 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
741
f120f13e
JF
742 preempt_disable();
743
014b15be
GOC
744 switch (type) {
745 case DESC_LDT:
746 case DESC_TSS:
5ead97c8
JF
747 /* ignore */
748 break;
749
750 default: {
9976b39b 751 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
752
753 xen_mc_flush();
014b15be 754 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
755 BUG();
756 }
757
758 }
f120f13e
JF
759
760 preempt_enable();
5ead97c8
JF
761}
762
577eebea
JF
763/*
764 * Version of write_gdt_entry for use at early boot-time needed to
765 * update an entry as simply as possible.
766 */
ad3062a0 767static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
577eebea
JF
768 const void *desc, int type)
769{
ab78f7ad
JF
770 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
771
577eebea
JF
772 switch (type) {
773 case DESC_LDT:
774 case DESC_TSS:
775 /* ignore */
776 break;
777
778 default: {
779 xmaddr_t maddr = virt_to_machine(&dt[entry]);
780
781 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
782 dt[entry] = *(struct desc_struct *)desc;
783 }
784
785 }
786}
787
faca6227 788static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 789 struct thread_struct *thread)
5ead97c8 790{
ab78f7ad
JF
791 struct multicall_space mcs;
792
793 mcs = xen_mc_entry(0);
faca6227 794 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
795 xen_mc_issue(PARAVIRT_LAZY_CPU);
796}
797
798static void xen_set_iopl_mask(unsigned mask)
799{
800 struct physdev_set_iopl set_iopl;
801
802 /* Force the change at ring 0. */
803 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
804 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
805}
806
807static void xen_io_delay(void)
808{
809}
810
811#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 812static u32 xen_apic_read(u32 reg)
5ead97c8
JF
813{
814 return 0;
815}
f87e4cac 816
ad66dd34 817static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
818{
819 /* Warn to see if there's any stray references */
820 WARN_ON(1);
821}
ad66dd34 822
ad66dd34
SS
823static u64 xen_apic_icr_read(void)
824{
825 return 0;
826}
827
828static void xen_apic_icr_write(u32 low, u32 id)
829{
830 /* Warn to see if there's any stray references */
831 WARN_ON(1);
832}
833
834static void xen_apic_wait_icr_idle(void)
835{
836 return;
837}
838
94a8c3c2
YL
839static u32 xen_safe_apic_wait_icr_idle(void)
840{
841 return 0;
842}
843
c1eeb2de
YL
844static void set_xen_basic_apic_ops(void)
845{
846 apic->read = xen_apic_read;
847 apic->write = xen_apic_write;
848 apic->icr_read = xen_apic_icr_read;
849 apic->icr_write = xen_apic_icr_write;
850 apic->wait_icr_idle = xen_apic_wait_icr_idle;
851 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
852}
ad66dd34 853
5ead97c8
JF
854#endif
855
7b1333aa
JF
856static void xen_clts(void)
857{
858 struct multicall_space mcs;
859
860 mcs = xen_mc_entry(0);
861
862 MULTI_fpu_taskswitch(mcs.mc, 0);
863
864 xen_mc_issue(PARAVIRT_LAZY_CPU);
865}
866
a789ed5f
JF
867static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
868
869static unsigned long xen_read_cr0(void)
870{
2113f469 871 unsigned long cr0 = this_cpu_read(xen_cr0_value);
a789ed5f
JF
872
873 if (unlikely(cr0 == 0)) {
874 cr0 = native_read_cr0();
2113f469 875 this_cpu_write(xen_cr0_value, cr0);
a789ed5f
JF
876 }
877
878 return cr0;
879}
880
7b1333aa
JF
881static void xen_write_cr0(unsigned long cr0)
882{
883 struct multicall_space mcs;
884
2113f469 885 this_cpu_write(xen_cr0_value, cr0);
a789ed5f 886
7b1333aa
JF
887 /* Only pay attention to cr0.TS; everything else is
888 ignored. */
889 mcs = xen_mc_entry(0);
890
891 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
892
893 xen_mc_issue(PARAVIRT_LAZY_CPU);
894}
895
5ead97c8
JF
896static void xen_write_cr4(unsigned long cr4)
897{
2956a351
JF
898 cr4 &= ~X86_CR4_PGE;
899 cr4 &= ~X86_CR4_PSE;
900
901 native_write_cr4(cr4);
5ead97c8
JF
902}
903
1153968a
JF
904static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
905{
906 int ret;
907
908 ret = 0;
909
f63c2f24 910 switch (msr) {
1153968a
JF
911#ifdef CONFIG_X86_64
912 unsigned which;
913 u64 base;
914
915 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
916 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
917 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
918
919 set:
920 base = ((u64)high << 32) | low;
921 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 922 ret = -EIO;
1153968a
JF
923 break;
924#endif
d89961e2
JF
925
926 case MSR_STAR:
927 case MSR_CSTAR:
928 case MSR_LSTAR:
929 case MSR_SYSCALL_MASK:
930 case MSR_IA32_SYSENTER_CS:
931 case MSR_IA32_SYSENTER_ESP:
932 case MSR_IA32_SYSENTER_EIP:
933 /* Fast syscall setup is all done in hypercalls, so
934 these are all ignored. Stub them out here to stop
935 Xen console noise. */
936 break;
937
41f2e477
JF
938 case MSR_IA32_CR_PAT:
939 if (smp_processor_id() == 0)
940 xen_set_pat(((u64)high << 32) | low);
941 break;
942
1153968a
JF
943 default:
944 ret = native_write_msr_safe(msr, low, high);
945 }
946
947 return ret;
948}
949
0e91398f 950void xen_setup_shared_info(void)
5ead97c8
JF
951{
952 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
953 set_fixmap(FIX_PARAVIRT_BOOTMAP,
954 xen_start_info->shared_info);
955
956 HYPERVISOR_shared_info =
957 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
958 } else
959 HYPERVISOR_shared_info =
960 (struct shared_info *)__va(xen_start_info->shared_info);
961
2e8fe719
JF
962#ifndef CONFIG_SMP
963 /* In UP this is as good a place as any to set up shared info */
964 xen_setup_vcpu_info_placement();
965#endif
d5edbc1f
JF
966
967 xen_setup_mfn_list_list();
2e8fe719
JF
968}
969
60223a32 970/* This is called once we have the cpu_possible_map */
0e91398f 971void xen_setup_vcpu_info_placement(void)
60223a32
JF
972{
973 int cpu;
974
975 for_each_possible_cpu(cpu)
976 xen_vcpu_setup(cpu);
977
978 /* xen_vcpu_setup managed to place the vcpu_info within the
979 percpu area for all cpus, so make use of it */
980 if (have_vcpu_info_placement) {
ecb93d1c
JF
981 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
982 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
983 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
984 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 985 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 986 }
5ead97c8
JF
987}
988
ab144f5e
AK
989static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
990 unsigned long addr, unsigned len)
6487673b
JF
991{
992 char *start, *end, *reloc;
993 unsigned ret;
994
995 start = end = reloc = NULL;
996
93b1eab3
JF
997#define SITE(op, x) \
998 case PARAVIRT_PATCH(op.x): \
6487673b
JF
999 if (have_vcpu_info_placement) { \
1000 start = (char *)xen_##x##_direct; \
1001 end = xen_##x##_direct_end; \
1002 reloc = xen_##x##_direct_reloc; \
1003 } \
1004 goto patch_site
1005
1006 switch (type) {
93b1eab3
JF
1007 SITE(pv_irq_ops, irq_enable);
1008 SITE(pv_irq_ops, irq_disable);
1009 SITE(pv_irq_ops, save_fl);
1010 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1011#undef SITE
1012
1013 patch_site:
1014 if (start == NULL || (end-start) > len)
1015 goto default_patch;
1016
ab144f5e 1017 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1018
1019 /* Note: because reloc is assigned from something that
1020 appears to be an array, gcc assumes it's non-null,
1021 but doesn't know its relationship with start and
1022 end. */
1023 if (reloc > start && reloc < end) {
1024 int reloc_off = reloc - start;
ab144f5e
AK
1025 long *relocp = (long *)(insnbuf + reloc_off);
1026 long delta = start - (char *)addr;
6487673b
JF
1027
1028 *relocp += delta;
1029 }
1030 break;
1031
1032 default_patch:
1033 default:
ab144f5e
AK
1034 ret = paravirt_patch_default(type, clobbers, insnbuf,
1035 addr, len);
6487673b
JF
1036 break;
1037 }
1038
1039 return ret;
1040}
1041
ad3062a0 1042static const struct pv_info xen_info __initconst = {
5ead97c8
JF
1043 .paravirt_enabled = 1,
1044 .shared_kernel_pmd = 0,
1045
318f5a2a
AL
1046#ifdef CONFIG_X86_64
1047 .extra_user_64bit_cs = FLAT_USER_CS64,
1048#endif
1049
5ead97c8 1050 .name = "Xen",
93b1eab3 1051};
5ead97c8 1052
ad3062a0 1053static const struct pv_init_ops xen_init_ops __initconst = {
6487673b 1054 .patch = xen_patch,
93b1eab3 1055};
5ead97c8 1056
ad3062a0 1057static const struct pv_cpu_ops xen_cpu_ops __initconst = {
5ead97c8
JF
1058 .cpuid = xen_cpuid,
1059
1060 .set_debugreg = xen_set_debugreg,
1061 .get_debugreg = xen_get_debugreg,
1062
7b1333aa 1063 .clts = xen_clts,
5ead97c8 1064
a789ed5f 1065 .read_cr0 = xen_read_cr0,
7b1333aa 1066 .write_cr0 = xen_write_cr0,
5ead97c8 1067
5ead97c8
JF
1068 .read_cr4 = native_read_cr4,
1069 .read_cr4_safe = native_read_cr4_safe,
1070 .write_cr4 = xen_write_cr4,
1071
5ead97c8
JF
1072 .wbinvd = native_wbinvd,
1073
1074 .read_msr = native_read_msr_safe,
1153968a 1075 .write_msr = xen_write_msr_safe,
5ead97c8
JF
1076 .read_tsc = native_read_tsc,
1077 .read_pmc = native_read_pmc,
1078
81e103f1 1079 .iret = xen_iret,
d75cd22f 1080 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1081#ifdef CONFIG_X86_64
1082 .usergs_sysret32 = xen_sysret32,
1083 .usergs_sysret64 = xen_sysret64,
1084#endif
5ead97c8
JF
1085
1086 .load_tr_desc = paravirt_nop,
1087 .set_ldt = xen_set_ldt,
1088 .load_gdt = xen_load_gdt,
1089 .load_idt = xen_load_idt,
1090 .load_tls = xen_load_tls,
a8fc1089
EH
1091#ifdef CONFIG_X86_64
1092 .load_gs_index = xen_load_gs_index,
1093#endif
5ead97c8 1094
38ffbe66
JF
1095 .alloc_ldt = xen_alloc_ldt,
1096 .free_ldt = xen_free_ldt,
1097
5ead97c8
JF
1098 .store_gdt = native_store_gdt,
1099 .store_idt = native_store_idt,
1100 .store_tr = xen_store_tr,
1101
1102 .write_ldt_entry = xen_write_ldt_entry,
1103 .write_gdt_entry = xen_write_gdt_entry,
1104 .write_idt_entry = xen_write_idt_entry,
faca6227 1105 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1106
1107 .set_iopl_mask = xen_set_iopl_mask,
1108 .io_delay = xen_io_delay,
1109
952d1d70
JF
1110 /* Xen takes care of %gs when switching to usermode for us */
1111 .swapgs = paravirt_nop,
1112
224101ed
JF
1113 .start_context_switch = paravirt_start_context_switch,
1114 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1115};
1116
ad3062a0 1117static const struct pv_apic_ops xen_apic_ops __initconst = {
5ead97c8 1118#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1119 .startup_ipi_hook = paravirt_nop,
1120#endif
93b1eab3
JF
1121};
1122
fefa629a
JF
1123static void xen_reboot(int reason)
1124{
349c709f
JF
1125 struct sched_shutdown r = { .reason = reason };
1126
349c709f 1127 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1128 BUG();
1129}
1130
1131static void xen_restart(char *msg)
1132{
1133 xen_reboot(SHUTDOWN_reboot);
1134}
1135
1136static void xen_emergency_restart(void)
1137{
1138 xen_reboot(SHUTDOWN_reboot);
1139}
1140
1141static void xen_machine_halt(void)
1142{
1143 xen_reboot(SHUTDOWN_poweroff);
1144}
1145
b2abe506
TG
1146static void xen_machine_power_off(void)
1147{
1148 if (pm_power_off)
1149 pm_power_off();
1150 xen_reboot(SHUTDOWN_poweroff);
1151}
1152
fefa629a
JF
1153static void xen_crash_shutdown(struct pt_regs *regs)
1154{
1155 xen_reboot(SHUTDOWN_crash);
1156}
1157
f09f6d19
DD
1158static int
1159xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1160{
086748e5 1161 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1162 return NOTIFY_DONE;
1163}
1164
1165static struct notifier_block xen_panic_block = {
1166 .notifier_call= xen_panic_event,
1167};
1168
1169int xen_panic_handler_init(void)
1170{
1171 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1172 return 0;
1173}
1174
ad3062a0 1175static const struct machine_ops xen_machine_ops __initconst = {
fefa629a
JF
1176 .restart = xen_restart,
1177 .halt = xen_machine_halt,
b2abe506 1178 .power_off = xen_machine_power_off,
fefa629a
JF
1179 .shutdown = xen_machine_halt,
1180 .crash_shutdown = xen_crash_shutdown,
1181 .emergency_restart = xen_emergency_restart,
1182};
1183
577eebea
JF
1184/*
1185 * Set up the GDT and segment registers for -fstack-protector. Until
1186 * we do this, we have to be careful not to call any stack-protected
1187 * function, which is most of the kernel.
1188 */
1189static void __init xen_setup_stackprotector(void)
1190{
1191 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1192 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1193
1194 setup_stack_canary_segment(0);
1195 switch_to_new_gdt(0);
1196
1197 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1198 pv_cpu_ops.load_gdt = xen_load_gdt;
1199}
1200
5ead97c8
JF
1201/* First C function to be called on Xen boot */
1202asmlinkage void __init xen_start_kernel(void)
1203{
ec35a69c
KRW
1204 struct physdev_set_iopl set_iopl;
1205 int rc;
5ead97c8
JF
1206 pgd_t *pgd;
1207
1208 if (!xen_start_info)
1209 return;
1210
6e833587
JF
1211 xen_domain_type = XEN_PV_DOMAIN;
1212
7e77506a
IC
1213 xen_setup_machphys_mapping();
1214
5ead97c8 1215 /* Install Xen paravirt ops */
93b1eab3
JF
1216 pv_info = xen_info;
1217 pv_init_ops = xen_init_ops;
93b1eab3 1218 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1219 pv_apic_ops = xen_apic_ops;
93b1eab3 1220
6b18ae3e 1221 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1222 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1223 x86_init.oem.banner = xen_banner;
845b3944 1224
409771d2 1225 xen_init_time_ops();
93b1eab3 1226
ce2eef33 1227 /*
577eebea 1228 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1229 */
577eebea 1230
973df35e
JF
1231 xen_init_mmu_ops();
1232
577eebea
JF
1233 /* Prevent unwanted bits from being set in PTEs. */
1234 __supported_pte_mask &= ~_PAGE_GLOBAL;
8eaffa67 1235#if 0
577eebea 1236 if (!xen_initial_domain())
8eaffa67 1237#endif
577eebea
JF
1238 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1239
1240 __supported_pte_mask |= _PAGE_IOMAP;
1241
817a824b
IC
1242 /*
1243 * Prevent page tables from being allocated in highmem, even
1244 * if CONFIG_HIGHPTE is enabled.
1245 */
1246 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1247
b75fe4e5 1248 /* Work out if we support NX */
4763ed4d 1249 x86_configure_nx();
b75fe4e5 1250
577eebea
JF
1251 xen_setup_features();
1252
1253 /* Get mfn list */
1254 if (!xen_feature(XENFEAT_auto_translated_physmap))
1255 xen_build_dynamic_phys_to_machine();
1256
1257 /*
1258 * Set up kernel GDT and segment registers, mainly so that
1259 * -fstack-protector code can be executed.
1260 */
1261 xen_setup_stackprotector();
0d1edf46 1262
ce2eef33 1263 xen_init_irq_ops();
e826fe1b
JF
1264 xen_init_cpuid_mask();
1265
94a8c3c2 1266#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1267 /*
94a8c3c2 1268 * set up the basic apic ops.
ad66dd34 1269 */
c1eeb2de 1270 set_xen_basic_apic_ops();
ad66dd34 1271#endif
93b1eab3 1272
e57778a1
JF
1273 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1274 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1275 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1276 }
1277
fefa629a
JF
1278 machine_ops = xen_machine_ops;
1279
38341432
JF
1280 /*
1281 * The only reliable way to retain the initial address of the
1282 * percpu gdt_page is to remember it here, so we can go and
1283 * mark it RW later, when the initial percpu area is freed.
1284 */
1285 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1286
a9e7062d 1287 xen_smp_init();
5ead97c8 1288
c1f5db1a
IC
1289#ifdef CONFIG_ACPI_NUMA
1290 /*
1291 * The pages we from Xen are not related to machine pages, so
1292 * any NUMA information the kernel tries to get from ACPI will
1293 * be meaningless. Prevent it from trying.
1294 */
1295 acpi_numa = -1;
1296#endif
1297
5ead97c8
JF
1298 pgd = (pgd_t *)xen_start_info->pt_base;
1299
60223a32 1300 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1301 possible map and a non-dummy shared_info. */
60223a32 1302 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1303
55d80856 1304 local_irq_disable();
2ce802f6 1305 early_boot_irqs_disabled = true;
55d80856 1306
084a2a4e 1307 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1308 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
4ec5387c 1309 xen_ident_map_ISA();
5ead97c8 1310
33a84750
JF
1311 /* Allocate and initialize top and mid mfn levels for p2m structure */
1312 xen_build_mfn_list_list();
1313
5ead97c8
JF
1314 /* keep using Xen gdt for now; no urgent need to change it */
1315
e68266b7 1316#ifdef CONFIG_X86_32
93b1eab3 1317 pv_info.kernel_rpl = 1;
5ead97c8 1318 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1319 pv_info.kernel_rpl = 0;
e68266b7
IC
1320#else
1321 pv_info.kernel_rpl = 0;
1322#endif
5ead97c8 1323 /* set the limit of our address space */
fb1d8404 1324 xen_reserve_top();
5ead97c8 1325
ec35a69c
KRW
1326 /* We used to do this in xen_arch_setup, but that is too late on AMD
1327 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1328 * which pokes 0xcf8 port.
1329 */
1330 set_iopl.iopl = 1;
1331 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1332 if (rc != 0)
1333 xen_raw_printk("physdev_op failed %d\n", rc);
1334
7d087b68 1335#ifdef CONFIG_X86_32
5ead97c8
JF
1336 /* set up basic CPUID stuff */
1337 cpu_detect(&new_cpu_data);
1338 new_cpu_data.hard_math = 1;
d560bc61 1339 new_cpu_data.wp_works_ok = 1;
5ead97c8 1340 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1341#endif
5ead97c8
JF
1342
1343 /* Poke various useful things into boot_params */
30c82645
PA
1344 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1345 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1346 ? __pa(xen_start_info->mod_start) : 0;
1347 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1348 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1349
6e833587 1350 if (!xen_initial_domain()) {
83abc70a 1351 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1352 add_preferred_console("tty", 0, NULL);
b8c2d3df 1353 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1354 if (pci_xen)
1355 x86_init.pci.arch_init = pci_xen_init;
5d990b62 1356 } else {
c2419b4a
JF
1357 const struct dom0_vga_console_info *info =
1358 (void *)((char *)xen_start_info +
1359 xen_start_info->console.dom0.info_off);
1360
1361 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1362 xen_start_info->console.domU.mfn = 0;
1363 xen_start_info->console.domU.evtchn = 0;
1364
5d990b62
CW
1365 /* Make sure ACS will be enabled */
1366 pci_request_acs();
9e124fe1 1367 }
5d990b62 1368
b8c2d3df 1369
084a2a4e
JF
1370 xen_raw_console_write("about to get started...\n");
1371
499d19b8
JF
1372 xen_setup_runstate_info(0);
1373
5ead97c8 1374 /* Start the world */
f5d36de0 1375#ifdef CONFIG_X86_32
f0d43100 1376 i386_start_kernel();
f5d36de0 1377#else
084a2a4e 1378 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1379#endif
5ead97c8 1380}
bee6ab53 1381
bee6ab53
SY
1382static int init_hvm_pv_info(int *major, int *minor)
1383{
1384 uint32_t eax, ebx, ecx, edx, pages, msr, base;
1385 u64 pfn;
1386
1387 base = xen_cpuid_base();
1388 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1389
1390 *major = eax >> 16;
1391 *minor = eax & 0xffff;
1392 printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor);
1393
1394 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1395
1396 pfn = __pa(hypercall_page);
1397 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1398
1399 xen_setup_features();
1400
cff520b9 1401 pv_info.name = "Xen HVM";
bee6ab53
SY
1402
1403 xen_domain_type = XEN_HVM_DOMAIN;
1404
1405 return 0;
1406}
1407
44b46c3e 1408void __ref xen_hvm_init_shared_info(void)
bee6ab53 1409{
016b6f5f 1410 int cpu;
bee6ab53 1411 struct xen_add_to_physmap xatp;
016b6f5f 1412 static struct shared_info *shared_info_page = 0;
bee6ab53 1413
016b6f5f
SS
1414 if (!shared_info_page)
1415 shared_info_page = (struct shared_info *)
1416 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1417 xatp.domid = DOMID_SELF;
1418 xatp.idx = 0;
1419 xatp.space = XENMAPSPACE_shared_info;
1420 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1421 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1422 BUG();
1423
1424 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1425
016b6f5f
SS
1426 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1427 * page, we use it in the event channel upcall and in some pvclock
1428 * related functions. We don't need the vcpu_info placement
1429 * optimizations because we don't use any pv_mmu or pv_irq op on
1430 * HVM.
1431 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1432 * online but xen_hvm_init_shared_info is run at resume time too and
1433 * in that case multiple vcpus might be online. */
1434 for_each_online_cpu(cpu) {
1435 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1436 }
bee6ab53
SY
1437}
1438
ca65f9fc 1439#ifdef CONFIG_XEN_PVHVM
38e20b07
SY
1440static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1441 unsigned long action, void *hcpu)
1442{
1443 int cpu = (long)hcpu;
1444 switch (action) {
1445 case CPU_UP_PREPARE:
90d4f553 1446 xen_vcpu_setup(cpu);
99bbb3a8
SS
1447 if (xen_have_vector_callback)
1448 xen_init_lock_cpu(cpu);
38e20b07
SY
1449 break;
1450 default:
1451 break;
1452 }
1453 return NOTIFY_OK;
1454}
1455
ad3062a0 1456static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
38e20b07
SY
1457 .notifier_call = xen_hvm_cpu_notify,
1458};
1459
bee6ab53
SY
1460static void __init xen_hvm_guest_init(void)
1461{
1462 int r;
1463 int major, minor;
1464
1465 r = init_hvm_pv_info(&major, &minor);
1466 if (r < 0)
1467 return;
1468
016b6f5f 1469 xen_hvm_init_shared_info();
38e20b07
SY
1470
1471 if (xen_feature(XENFEAT_hvm_callback_vector))
1472 xen_have_vector_callback = 1;
99bbb3a8 1473 xen_hvm_smp_init();
38e20b07 1474 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1475 xen_unplug_emulated_devices();
38e20b07 1476 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1477 xen_hvm_init_time_ops();
59151001 1478 xen_hvm_init_mmu_ops();
bee6ab53
SY
1479}
1480
1481static bool __init xen_hvm_platform(void)
1482{
1483 if (xen_pv_domain())
1484 return false;
1485
1486 if (!xen_cpuid_base())
1487 return false;
1488
1489 return true;
1490}
1491
d9b8ca84
SY
1492bool xen_hvm_need_lapic(void)
1493{
1494 if (xen_pv_domain())
1495 return false;
1496 if (!xen_hvm_domain())
1497 return false;
1498 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1499 return false;
1500 return true;
1501}
1502EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1503
ad3062a0 1504const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
bee6ab53
SY
1505 .name = "Xen HVM",
1506 .detect = xen_hvm_platform,
1507 .init_platform = xen_hvm_guest_init,
1508};
1509EXPORT_SYMBOL(x86_hyper_xen_hvm);
ca65f9fc 1510#endif