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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/preempt.h> | |
f120f13e | 18 | #include <linux/hardirq.h> |
5ead97c8 JF |
19 | #include <linux/percpu.h> |
20 | #include <linux/delay.h> | |
21 | #include <linux/start_kernel.h> | |
22 | #include <linux/sched.h> | |
6cac5a92 | 23 | #include <linux/kprobes.h> |
5ead97c8 JF |
24 | #include <linux/bootmem.h> |
25 | #include <linux/module.h> | |
f4f97b3e JF |
26 | #include <linux/mm.h> |
27 | #include <linux/page-flags.h> | |
28 | #include <linux/highmem.h> | |
b8c2d3df | 29 | #include <linux/console.h> |
5d990b62 | 30 | #include <linux/pci.h> |
5a0e3ad6 | 31 | #include <linux/gfp.h> |
5ead97c8 | 32 | |
1ccbf534 | 33 | #include <xen/xen.h> |
5ead97c8 | 34 | #include <xen/interface/xen.h> |
ecbf29cd | 35 | #include <xen/interface/version.h> |
5ead97c8 JF |
36 | #include <xen/interface/physdev.h> |
37 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 38 | #include <xen/interface/memory.h> |
5ead97c8 JF |
39 | #include <xen/features.h> |
40 | #include <xen/page.h> | |
084a2a4e | 41 | #include <xen/hvc-console.h> |
5ead97c8 JF |
42 | |
43 | #include <asm/paravirt.h> | |
7b6aa335 | 44 | #include <asm/apic.h> |
5ead97c8 JF |
45 | #include <asm/page.h> |
46 | #include <asm/xen/hypercall.h> | |
47 | #include <asm/xen/hypervisor.h> | |
48 | #include <asm/fixmap.h> | |
49 | #include <asm/processor.h> | |
707ebbc8 | 50 | #include <asm/proto.h> |
1153968a | 51 | #include <asm/msr-index.h> |
6cac5a92 | 52 | #include <asm/traps.h> |
5ead97c8 JF |
53 | #include <asm/setup.h> |
54 | #include <asm/desc.h> | |
817a824b | 55 | #include <asm/pgalloc.h> |
5ead97c8 | 56 | #include <asm/pgtable.h> |
f87e4cac | 57 | #include <asm/tlbflush.h> |
fefa629a | 58 | #include <asm/reboot.h> |
bee6ab53 | 59 | #include <asm/setup.h> |
577eebea | 60 | #include <asm/stackprotector.h> |
bee6ab53 | 61 | #include <asm/hypervisor.h> |
5ead97c8 JF |
62 | |
63 | #include "xen-ops.h" | |
3b827c1b | 64 | #include "mmu.h" |
5ead97c8 JF |
65 | #include "multicalls.h" |
66 | ||
67 | EXPORT_SYMBOL_GPL(hypercall_page); | |
68 | ||
5ead97c8 JF |
69 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
70 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 71 | |
6e833587 JF |
72 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
73 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
74 | ||
5ead97c8 JF |
75 | struct start_info *xen_start_info; |
76 | EXPORT_SYMBOL_GPL(xen_start_info); | |
77 | ||
a0d695c8 | 78 | struct shared_info xen_dummy_shared_info; |
60223a32 | 79 | |
38341432 JF |
80 | void *xen_initial_gdt; |
81 | ||
bee6ab53 SY |
82 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
83 | ||
60223a32 JF |
84 | /* |
85 | * Point at some empty memory to start with. We map the real shared_info | |
86 | * page as soon as fixmap is up and running. | |
87 | */ | |
a0d695c8 | 88 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
89 | |
90 | /* | |
91 | * Flag to determine whether vcpu info placement is available on all | |
92 | * VCPUs. We assume it is to start with, and then set it to zero on | |
93 | * the first failure. This is because it can succeed on some VCPUs | |
94 | * and not others, since it can involve hypervisor memory allocation, | |
95 | * or because the guest failed to guarantee all the appropriate | |
96 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
97 | * | |
98 | * Note that any particular CPU may be using a placed vcpu structure, | |
99 | * but we can only optimise if the all are. | |
100 | * | |
101 | * 0: not available, 1: available | |
102 | */ | |
e4d04071 | 103 | static int have_vcpu_info_placement = 1; |
60223a32 | 104 | |
9c7a7942 | 105 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 106 | { |
60223a32 JF |
107 | struct vcpu_register_vcpu_info info; |
108 | int err; | |
109 | struct vcpu_info *vcpup; | |
110 | ||
a0d695c8 | 111 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
5ead97c8 | 112 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
60223a32 JF |
113 | |
114 | if (!have_vcpu_info_placement) | |
115 | return; /* already tested, not available */ | |
116 | ||
117 | vcpup = &per_cpu(xen_vcpu_info, cpu); | |
118 | ||
9976b39b | 119 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
120 | info.offset = offset_in_page(vcpup); |
121 | ||
e3d26976 | 122 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
60223a32 JF |
123 | cpu, vcpup, info.mfn, info.offset); |
124 | ||
125 | /* Check to see if the hypervisor will put the vcpu_info | |
126 | structure where we want it, which allows direct access via | |
127 | a percpu-variable. */ | |
128 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
129 | ||
130 | if (err) { | |
131 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
132 | have_vcpu_info_placement = 0; | |
133 | } else { | |
134 | /* This cpu is using the registered vcpu info, even if | |
135 | later ones fail to. */ | |
136 | per_cpu(xen_vcpu, cpu) = vcpup; | |
6487673b | 137 | |
60223a32 JF |
138 | printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n", |
139 | cpu, vcpup); | |
140 | } | |
5ead97c8 JF |
141 | } |
142 | ||
9c7a7942 JF |
143 | /* |
144 | * On restore, set the vcpu placement up again. | |
145 | * If it fails, then we're in a bad state, since | |
146 | * we can't back out from using it... | |
147 | */ | |
148 | void xen_vcpu_restore(void) | |
149 | { | |
3905bb2a | 150 | int cpu; |
9c7a7942 | 151 | |
3905bb2a JF |
152 | for_each_online_cpu(cpu) { |
153 | bool other_cpu = (cpu != smp_processor_id()); | |
9c7a7942 | 154 | |
3905bb2a JF |
155 | if (other_cpu && |
156 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
157 | BUG(); | |
9c7a7942 | 158 | |
3905bb2a | 159 | xen_setup_runstate_info(cpu); |
9c7a7942 | 160 | |
3905bb2a | 161 | if (have_vcpu_info_placement) |
9c7a7942 | 162 | xen_vcpu_setup(cpu); |
9c7a7942 | 163 | |
3905bb2a JF |
164 | if (other_cpu && |
165 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
166 | BUG(); | |
9c7a7942 JF |
167 | } |
168 | } | |
169 | ||
5ead97c8 JF |
170 | static void __init xen_banner(void) |
171 | { | |
95c7c23b JF |
172 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
173 | struct xen_extraversion extra; | |
174 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
175 | ||
5ead97c8 | 176 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 177 | pv_info.name); |
95c7c23b JF |
178 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
179 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 180 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
181 | } |
182 | ||
e826fe1b JF |
183 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
184 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
185 | ||
65ea5b03 PA |
186 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
187 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 188 | { |
82d64699 | 189 | unsigned maskebx = ~0; |
e826fe1b | 190 | unsigned maskecx = ~0; |
5ead97c8 JF |
191 | unsigned maskedx = ~0; |
192 | ||
193 | /* | |
194 | * Mask out inconvenient features, to try and disable as many | |
195 | * unsupported kernel subsystems as possible. | |
196 | */ | |
82d64699 JF |
197 | switch (*ax) { |
198 | case 1: | |
e826fe1b JF |
199 | maskecx = cpuid_leaf1_ecx_mask; |
200 | maskedx = cpuid_leaf1_edx_mask; | |
82d64699 JF |
201 | break; |
202 | ||
203 | case 0xb: | |
204 | /* Suppress extended topology stuff */ | |
205 | maskebx = 0; | |
206 | break; | |
e826fe1b | 207 | } |
5ead97c8 JF |
208 | |
209 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
210 | : "=a" (*ax), |
211 | "=b" (*bx), | |
212 | "=c" (*cx), | |
213 | "=d" (*dx) | |
214 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 215 | |
82d64699 | 216 | *bx &= maskebx; |
e826fe1b | 217 | *cx &= maskecx; |
65ea5b03 | 218 | *dx &= maskedx; |
5ead97c8 JF |
219 | } |
220 | ||
e826fe1b JF |
221 | static __init void xen_init_cpuid_mask(void) |
222 | { | |
223 | unsigned int ax, bx, cx, dx; | |
224 | ||
225 | cpuid_leaf1_edx_mask = | |
226 | ~((1 << X86_FEATURE_MCE) | /* disable MCE */ | |
227 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
228 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ | |
229 | ||
230 | if (!xen_initial_domain()) | |
231 | cpuid_leaf1_edx_mask &= | |
232 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
233 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
234 | ||
235 | ax = 1; | |
7adb4df4 | 236 | cx = 0; |
e826fe1b JF |
237 | xen_cpuid(&ax, &bx, &cx, &dx); |
238 | ||
239 | /* cpuid claims we support xsave; try enabling it to see what happens */ | |
240 | if (cx & (1 << (X86_FEATURE_XSAVE % 32))) { | |
241 | unsigned long cr4; | |
242 | ||
243 | set_in_cr4(X86_CR4_OSXSAVE); | |
244 | ||
245 | cr4 = read_cr4(); | |
246 | ||
247 | if ((cr4 & X86_CR4_OSXSAVE) == 0) | |
248 | cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_XSAVE % 32)); | |
249 | ||
250 | clear_in_cr4(X86_CR4_OSXSAVE); | |
251 | } | |
252 | } | |
253 | ||
5ead97c8 JF |
254 | static void xen_set_debugreg(int reg, unsigned long val) |
255 | { | |
256 | HYPERVISOR_set_debugreg(reg, val); | |
257 | } | |
258 | ||
259 | static unsigned long xen_get_debugreg(int reg) | |
260 | { | |
261 | return HYPERVISOR_get_debugreg(reg); | |
262 | } | |
263 | ||
224101ed | 264 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 265 | { |
5ead97c8 | 266 | xen_mc_flush(); |
224101ed | 267 | paravirt_end_context_switch(next); |
5ead97c8 JF |
268 | } |
269 | ||
270 | static unsigned long xen_store_tr(void) | |
271 | { | |
272 | return 0; | |
273 | } | |
274 | ||
a05d2eba | 275 | /* |
cef43bf6 JF |
276 | * Set the page permissions for a particular virtual address. If the |
277 | * address is a vmalloc mapping (or other non-linear mapping), then | |
278 | * find the linear mapping of the page and also set its protections to | |
279 | * match. | |
a05d2eba JF |
280 | */ |
281 | static void set_aliased_prot(void *v, pgprot_t prot) | |
282 | { | |
283 | int level; | |
284 | pte_t *ptep; | |
285 | pte_t pte; | |
286 | unsigned long pfn; | |
287 | struct page *page; | |
288 | ||
289 | ptep = lookup_address((unsigned long)v, &level); | |
290 | BUG_ON(ptep == NULL); | |
291 | ||
292 | pfn = pte_pfn(*ptep); | |
293 | page = pfn_to_page(pfn); | |
294 | ||
295 | pte = pfn_pte(pfn, prot); | |
296 | ||
297 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
298 | BUG(); | |
299 | ||
300 | if (!PageHighMem(page)) { | |
301 | void *av = __va(PFN_PHYS(pfn)); | |
302 | ||
303 | if (av != v) | |
304 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
305 | BUG(); | |
306 | } else | |
307 | kmap_flush_unused(); | |
308 | } | |
309 | ||
38ffbe66 JF |
310 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
311 | { | |
a05d2eba | 312 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
313 | int i; |
314 | ||
a05d2eba JF |
315 | for(i = 0; i < entries; i += entries_per_page) |
316 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
317 | } |
318 | ||
319 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
320 | { | |
a05d2eba | 321 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
322 | int i; |
323 | ||
a05d2eba JF |
324 | for(i = 0; i < entries; i += entries_per_page) |
325 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
326 | } |
327 | ||
5ead97c8 JF |
328 | static void xen_set_ldt(const void *addr, unsigned entries) |
329 | { | |
5ead97c8 JF |
330 | struct mmuext_op *op; |
331 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
332 | ||
333 | op = mcs.args; | |
334 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 335 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
336 | op->arg2.nr_ents = entries; |
337 | ||
338 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
339 | ||
340 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
341 | } | |
342 | ||
6b68f01b | 343 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 344 | { |
5ead97c8 JF |
345 | unsigned long va = dtr->address; |
346 | unsigned int size = dtr->size + 1; | |
347 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 348 | unsigned long frames[pages]; |
5ead97c8 | 349 | int f; |
5ead97c8 | 350 | |
577eebea JF |
351 | /* |
352 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
353 | * 8-byte entries, or 16 4k pages.. | |
354 | */ | |
5ead97c8 JF |
355 | |
356 | BUG_ON(size > 65536); | |
357 | BUG_ON(va & ~PAGE_MASK); | |
358 | ||
5ead97c8 | 359 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 360 | int level; |
577eebea | 361 | pte_t *ptep; |
6ed6bf42 JF |
362 | unsigned long pfn, mfn; |
363 | void *virt; | |
364 | ||
577eebea JF |
365 | /* |
366 | * The GDT is per-cpu and is in the percpu data area. | |
367 | * That can be virtually mapped, so we need to do a | |
368 | * page-walk to get the underlying MFN for the | |
369 | * hypercall. The page can also be in the kernel's | |
370 | * linear range, so we need to RO that mapping too. | |
371 | */ | |
372 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
373 | BUG_ON(ptep == NULL); |
374 | ||
375 | pfn = pte_pfn(*ptep); | |
376 | mfn = pfn_to_mfn(pfn); | |
377 | virt = __va(PFN_PHYS(pfn)); | |
378 | ||
379 | frames[f] = mfn; | |
9976b39b | 380 | |
5ead97c8 | 381 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 382 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
383 | } |
384 | ||
3ce5fa7e JF |
385 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
386 | BUG(); | |
5ead97c8 JF |
387 | } |
388 | ||
577eebea JF |
389 | /* |
390 | * load_gdt for early boot, when the gdt is only mapped once | |
391 | */ | |
392 | static __init void xen_load_gdt_boot(const struct desc_ptr *dtr) | |
393 | { | |
394 | unsigned long va = dtr->address; | |
395 | unsigned int size = dtr->size + 1; | |
396 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
397 | unsigned long frames[pages]; | |
398 | int f; | |
399 | ||
400 | /* | |
401 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
402 | * 8-byte entries, or 16 4k pages.. | |
403 | */ | |
404 | ||
405 | BUG_ON(size > 65536); | |
406 | BUG_ON(va & ~PAGE_MASK); | |
407 | ||
408 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
409 | pte_t pte; | |
410 | unsigned long pfn, mfn; | |
411 | ||
412 | pfn = virt_to_pfn(va); | |
413 | mfn = pfn_to_mfn(pfn); | |
414 | ||
415 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
416 | ||
417 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
418 | BUG(); | |
419 | ||
420 | frames[f] = mfn; | |
421 | } | |
422 | ||
423 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
424 | BUG(); | |
425 | } | |
426 | ||
5ead97c8 JF |
427 | static void load_TLS_descriptor(struct thread_struct *t, |
428 | unsigned int cpu, unsigned int i) | |
429 | { | |
430 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 431 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
432 | struct multicall_space mc = __xen_mc_entry(0); |
433 | ||
434 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
435 | } | |
436 | ||
437 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
438 | { | |
8b84ad94 | 439 | /* |
ccbeed3a TH |
440 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
441 | * and lazy gs handling is enabled, it means we're in a | |
442 | * context switch, and %gs has just been saved. This means we | |
443 | * can zero it out to prevent faults on exit from the | |
444 | * hypervisor if the next process has no %gs. Either way, it | |
445 | * has been saved, and the new value will get loaded properly. | |
446 | * This will go away as soon as Xen has been modified to not | |
447 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
448 | * |
449 | * On x86_64, this hack is not used for %gs, because gs points | |
450 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
451 | * must not zero %gs on x86_64 | |
452 | * | |
453 | * For x86_64, we need to zero %fs, otherwise we may get an | |
454 | * exception between the new %fs descriptor being loaded and | |
455 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 456 | */ |
8a95408e EH |
457 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
458 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 459 | lazy_load_gs(0); |
8a95408e EH |
460 | #else |
461 | loadsegment(fs, 0); | |
462 | #endif | |
463 | } | |
464 | ||
465 | xen_mc_batch(); | |
466 | ||
467 | load_TLS_descriptor(t, cpu, 0); | |
468 | load_TLS_descriptor(t, cpu, 1); | |
469 | load_TLS_descriptor(t, cpu, 2); | |
470 | ||
471 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
472 | } |
473 | ||
a8fc1089 EH |
474 | #ifdef CONFIG_X86_64 |
475 | static void xen_load_gs_index(unsigned int idx) | |
476 | { | |
477 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
478 | BUG(); | |
5ead97c8 | 479 | } |
a8fc1089 | 480 | #endif |
5ead97c8 JF |
481 | |
482 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 483 | const void *ptr) |
5ead97c8 | 484 | { |
cef43bf6 | 485 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 486 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 487 | |
f120f13e JF |
488 | preempt_disable(); |
489 | ||
5ead97c8 JF |
490 | xen_mc_flush(); |
491 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
492 | BUG(); | |
f120f13e JF |
493 | |
494 | preempt_enable(); | |
5ead97c8 JF |
495 | } |
496 | ||
e176d367 | 497 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
498 | struct trap_info *info) |
499 | { | |
6cac5a92 JF |
500 | unsigned long addr; |
501 | ||
6d02c426 | 502 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
503 | return 0; |
504 | ||
505 | info->vector = vector; | |
6cac5a92 JF |
506 | |
507 | addr = gate_offset(*val); | |
508 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
509 | /* |
510 | * Look for known traps using IST, and substitute them | |
511 | * appropriately. The debugger ones are the only ones we care | |
512 | * about. Xen will handle faults like double_fault and | |
513 | * machine_check, so we should never see them. Warn if | |
514 | * there's an unexpected IST-using fault handler. | |
515 | */ | |
6cac5a92 JF |
516 | if (addr == (unsigned long)debug) |
517 | addr = (unsigned long)xen_debug; | |
518 | else if (addr == (unsigned long)int3) | |
519 | addr = (unsigned long)xen_int3; | |
520 | else if (addr == (unsigned long)stack_segment) | |
521 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
522 | else if (addr == (unsigned long)double_fault || |
523 | addr == (unsigned long)nmi) { | |
524 | /* Don't need to handle these */ | |
525 | return 0; | |
526 | #ifdef CONFIG_X86_MCE | |
527 | } else if (addr == (unsigned long)machine_check) { | |
528 | return 0; | |
529 | #endif | |
530 | } else { | |
531 | /* Some other trap using IST? */ | |
532 | if (WARN_ON(val->ist != 0)) | |
533 | return 0; | |
534 | } | |
6cac5a92 JF |
535 | #endif /* CONFIG_X86_64 */ |
536 | info->address = addr; | |
537 | ||
e176d367 EH |
538 | info->cs = gate_segment(*val); |
539 | info->flags = val->dpl; | |
5ead97c8 | 540 | /* interrupt gates clear IF */ |
6d02c426 JF |
541 | if (val->type == GATE_INTERRUPT) |
542 | info->flags |= 1 << 2; | |
5ead97c8 JF |
543 | |
544 | return 1; | |
545 | } | |
546 | ||
547 | /* Locations of each CPU's IDT */ | |
6b68f01b | 548 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
549 | |
550 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
551 | also update Xen. */ | |
8d947344 | 552 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 553 | { |
5ead97c8 | 554 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
555 | unsigned long start, end; |
556 | ||
557 | preempt_disable(); | |
558 | ||
559 | start = __get_cpu_var(idt_desc).address; | |
560 | end = start + __get_cpu_var(idt_desc).size + 1; | |
5ead97c8 JF |
561 | |
562 | xen_mc_flush(); | |
563 | ||
8d947344 | 564 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
565 | |
566 | if (p >= start && (p + 8) <= end) { | |
567 | struct trap_info info[2]; | |
568 | ||
569 | info[1].address = 0; | |
570 | ||
e176d367 | 571 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
572 | if (HYPERVISOR_set_trap_table(info)) |
573 | BUG(); | |
574 | } | |
f120f13e JF |
575 | |
576 | preempt_enable(); | |
5ead97c8 JF |
577 | } |
578 | ||
6b68f01b | 579 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 580 | struct trap_info *traps) |
5ead97c8 | 581 | { |
5ead97c8 JF |
582 | unsigned in, out, count; |
583 | ||
e176d367 | 584 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
585 | BUG_ON(count > 256); |
586 | ||
5ead97c8 | 587 | for (in = out = 0; in < count; in++) { |
e176d367 | 588 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 589 | |
e176d367 | 590 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
591 | out++; |
592 | } | |
593 | traps[out].address = 0; | |
f87e4cac JF |
594 | } |
595 | ||
596 | void xen_copy_trap_info(struct trap_info *traps) | |
597 | { | |
6b68f01b | 598 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
599 | |
600 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
601 | } |
602 | ||
603 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
604 | hold a spinlock to protect the static traps[] array (static because | |
605 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 606 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
607 | { |
608 | static DEFINE_SPINLOCK(lock); | |
609 | static struct trap_info traps[257]; | |
f87e4cac JF |
610 | |
611 | spin_lock(&lock); | |
612 | ||
f120f13e JF |
613 | __get_cpu_var(idt_desc) = *desc; |
614 | ||
f87e4cac | 615 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
616 | |
617 | xen_mc_flush(); | |
618 | if (HYPERVISOR_set_trap_table(traps)) | |
619 | BUG(); | |
620 | ||
621 | spin_unlock(&lock); | |
622 | } | |
623 | ||
624 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
625 | they're handled differently. */ | |
626 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 627 | const void *desc, int type) |
5ead97c8 | 628 | { |
f120f13e JF |
629 | preempt_disable(); |
630 | ||
014b15be GOC |
631 | switch (type) { |
632 | case DESC_LDT: | |
633 | case DESC_TSS: | |
5ead97c8 JF |
634 | /* ignore */ |
635 | break; | |
636 | ||
637 | default: { | |
9976b39b | 638 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
639 | |
640 | xen_mc_flush(); | |
014b15be | 641 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
642 | BUG(); |
643 | } | |
644 | ||
645 | } | |
f120f13e JF |
646 | |
647 | preempt_enable(); | |
5ead97c8 JF |
648 | } |
649 | ||
577eebea JF |
650 | /* |
651 | * Version of write_gdt_entry for use at early boot-time needed to | |
652 | * update an entry as simply as possible. | |
653 | */ | |
654 | static __init void xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, | |
655 | const void *desc, int type) | |
656 | { | |
657 | switch (type) { | |
658 | case DESC_LDT: | |
659 | case DESC_TSS: | |
660 | /* ignore */ | |
661 | break; | |
662 | ||
663 | default: { | |
664 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
665 | ||
666 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
667 | dt[entry] = *(struct desc_struct *)desc; | |
668 | } | |
669 | ||
670 | } | |
671 | } | |
672 | ||
faca6227 | 673 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 674 | struct thread_struct *thread) |
5ead97c8 JF |
675 | { |
676 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 677 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
678 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
679 | } | |
680 | ||
681 | static void xen_set_iopl_mask(unsigned mask) | |
682 | { | |
683 | struct physdev_set_iopl set_iopl; | |
684 | ||
685 | /* Force the change at ring 0. */ | |
686 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
687 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
688 | } | |
689 | ||
690 | static void xen_io_delay(void) | |
691 | { | |
692 | } | |
693 | ||
694 | #ifdef CONFIG_X86_LOCAL_APIC | |
ad66dd34 | 695 | static u32 xen_apic_read(u32 reg) |
5ead97c8 JF |
696 | { |
697 | return 0; | |
698 | } | |
f87e4cac | 699 | |
ad66dd34 | 700 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
701 | { |
702 | /* Warn to see if there's any stray references */ | |
703 | WARN_ON(1); | |
704 | } | |
ad66dd34 | 705 | |
ad66dd34 SS |
706 | static u64 xen_apic_icr_read(void) |
707 | { | |
708 | return 0; | |
709 | } | |
710 | ||
711 | static void xen_apic_icr_write(u32 low, u32 id) | |
712 | { | |
713 | /* Warn to see if there's any stray references */ | |
714 | WARN_ON(1); | |
715 | } | |
716 | ||
717 | static void xen_apic_wait_icr_idle(void) | |
718 | { | |
719 | return; | |
720 | } | |
721 | ||
94a8c3c2 YL |
722 | static u32 xen_safe_apic_wait_icr_idle(void) |
723 | { | |
724 | return 0; | |
725 | } | |
726 | ||
c1eeb2de YL |
727 | static void set_xen_basic_apic_ops(void) |
728 | { | |
729 | apic->read = xen_apic_read; | |
730 | apic->write = xen_apic_write; | |
731 | apic->icr_read = xen_apic_icr_read; | |
732 | apic->icr_write = xen_apic_icr_write; | |
733 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
734 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
735 | } | |
ad66dd34 | 736 | |
5ead97c8 JF |
737 | #endif |
738 | ||
f87e4cac | 739 | |
7b1333aa JF |
740 | static void xen_clts(void) |
741 | { | |
742 | struct multicall_space mcs; | |
743 | ||
744 | mcs = xen_mc_entry(0); | |
745 | ||
746 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
747 | ||
748 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
749 | } | |
750 | ||
a789ed5f JF |
751 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
752 | ||
753 | static unsigned long xen_read_cr0(void) | |
754 | { | |
755 | unsigned long cr0 = percpu_read(xen_cr0_value); | |
756 | ||
757 | if (unlikely(cr0 == 0)) { | |
758 | cr0 = native_read_cr0(); | |
759 | percpu_write(xen_cr0_value, cr0); | |
760 | } | |
761 | ||
762 | return cr0; | |
763 | } | |
764 | ||
7b1333aa JF |
765 | static void xen_write_cr0(unsigned long cr0) |
766 | { | |
767 | struct multicall_space mcs; | |
768 | ||
a789ed5f JF |
769 | percpu_write(xen_cr0_value, cr0); |
770 | ||
7b1333aa JF |
771 | /* Only pay attention to cr0.TS; everything else is |
772 | ignored. */ | |
773 | mcs = xen_mc_entry(0); | |
774 | ||
775 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
776 | ||
777 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
778 | } | |
779 | ||
5ead97c8 JF |
780 | static void xen_write_cr4(unsigned long cr4) |
781 | { | |
2956a351 JF |
782 | cr4 &= ~X86_CR4_PGE; |
783 | cr4 &= ~X86_CR4_PSE; | |
784 | ||
785 | native_write_cr4(cr4); | |
5ead97c8 JF |
786 | } |
787 | ||
1153968a JF |
788 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
789 | { | |
790 | int ret; | |
791 | ||
792 | ret = 0; | |
793 | ||
f63c2f24 | 794 | switch (msr) { |
1153968a JF |
795 | #ifdef CONFIG_X86_64 |
796 | unsigned which; | |
797 | u64 base; | |
798 | ||
799 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
800 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
801 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
802 | ||
803 | set: | |
804 | base = ((u64)high << 32) | low; | |
805 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 806 | ret = -EIO; |
1153968a JF |
807 | break; |
808 | #endif | |
d89961e2 JF |
809 | |
810 | case MSR_STAR: | |
811 | case MSR_CSTAR: | |
812 | case MSR_LSTAR: | |
813 | case MSR_SYSCALL_MASK: | |
814 | case MSR_IA32_SYSENTER_CS: | |
815 | case MSR_IA32_SYSENTER_ESP: | |
816 | case MSR_IA32_SYSENTER_EIP: | |
817 | /* Fast syscall setup is all done in hypercalls, so | |
818 | these are all ignored. Stub them out here to stop | |
819 | Xen console noise. */ | |
820 | break; | |
821 | ||
1153968a JF |
822 | default: |
823 | ret = native_write_msr_safe(msr, low, high); | |
824 | } | |
825 | ||
826 | return ret; | |
827 | } | |
828 | ||
0e91398f | 829 | void xen_setup_shared_info(void) |
5ead97c8 JF |
830 | { |
831 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
832 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
833 | xen_start_info->shared_info); | |
834 | ||
835 | HYPERVISOR_shared_info = | |
836 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
837 | } else |
838 | HYPERVISOR_shared_info = | |
839 | (struct shared_info *)__va(xen_start_info->shared_info); | |
840 | ||
2e8fe719 JF |
841 | #ifndef CONFIG_SMP |
842 | /* In UP this is as good a place as any to set up shared info */ | |
843 | xen_setup_vcpu_info_placement(); | |
844 | #endif | |
d5edbc1f JF |
845 | |
846 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
847 | } |
848 | ||
60223a32 | 849 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 850 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
851 | { |
852 | int cpu; | |
853 | ||
854 | for_each_possible_cpu(cpu) | |
855 | xen_vcpu_setup(cpu); | |
856 | ||
857 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
858 | percpu area for all cpus, so make use of it */ | |
859 | if (have_vcpu_info_placement) { | |
860 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | |
861 | ||
ecb93d1c JF |
862 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
863 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
864 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
865 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 866 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 867 | } |
5ead97c8 JF |
868 | } |
869 | ||
ab144f5e AK |
870 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
871 | unsigned long addr, unsigned len) | |
6487673b JF |
872 | { |
873 | char *start, *end, *reloc; | |
874 | unsigned ret; | |
875 | ||
876 | start = end = reloc = NULL; | |
877 | ||
93b1eab3 JF |
878 | #define SITE(op, x) \ |
879 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
880 | if (have_vcpu_info_placement) { \ |
881 | start = (char *)xen_##x##_direct; \ | |
882 | end = xen_##x##_direct_end; \ | |
883 | reloc = xen_##x##_direct_reloc; \ | |
884 | } \ | |
885 | goto patch_site | |
886 | ||
887 | switch (type) { | |
93b1eab3 JF |
888 | SITE(pv_irq_ops, irq_enable); |
889 | SITE(pv_irq_ops, irq_disable); | |
890 | SITE(pv_irq_ops, save_fl); | |
891 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
892 | #undef SITE |
893 | ||
894 | patch_site: | |
895 | if (start == NULL || (end-start) > len) | |
896 | goto default_patch; | |
897 | ||
ab144f5e | 898 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
899 | |
900 | /* Note: because reloc is assigned from something that | |
901 | appears to be an array, gcc assumes it's non-null, | |
902 | but doesn't know its relationship with start and | |
903 | end. */ | |
904 | if (reloc > start && reloc < end) { | |
905 | int reloc_off = reloc - start; | |
ab144f5e AK |
906 | long *relocp = (long *)(insnbuf + reloc_off); |
907 | long delta = start - (char *)addr; | |
6487673b JF |
908 | |
909 | *relocp += delta; | |
910 | } | |
911 | break; | |
912 | ||
913 | default_patch: | |
914 | default: | |
ab144f5e AK |
915 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
916 | addr, len); | |
6487673b JF |
917 | break; |
918 | } | |
919 | ||
920 | return ret; | |
921 | } | |
922 | ||
93b1eab3 | 923 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
924 | .paravirt_enabled = 1, |
925 | .shared_kernel_pmd = 0, | |
926 | ||
927 | .name = "Xen", | |
93b1eab3 | 928 | }; |
5ead97c8 | 929 | |
93b1eab3 | 930 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 931 | .patch = xen_patch, |
93b1eab3 | 932 | }; |
5ead97c8 | 933 | |
93b1eab3 | 934 | static const struct pv_time_ops xen_time_ops __initdata = { |
ab550288 | 935 | .sched_clock = xen_sched_clock, |
93b1eab3 | 936 | }; |
15c84731 | 937 | |
93b1eab3 | 938 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
939 | .cpuid = xen_cpuid, |
940 | ||
941 | .set_debugreg = xen_set_debugreg, | |
942 | .get_debugreg = xen_get_debugreg, | |
943 | ||
7b1333aa | 944 | .clts = xen_clts, |
5ead97c8 | 945 | |
a789ed5f | 946 | .read_cr0 = xen_read_cr0, |
7b1333aa | 947 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 948 | |
5ead97c8 JF |
949 | .read_cr4 = native_read_cr4, |
950 | .read_cr4_safe = native_read_cr4_safe, | |
951 | .write_cr4 = xen_write_cr4, | |
952 | ||
5ead97c8 JF |
953 | .wbinvd = native_wbinvd, |
954 | ||
955 | .read_msr = native_read_msr_safe, | |
1153968a | 956 | .write_msr = xen_write_msr_safe, |
5ead97c8 JF |
957 | .read_tsc = native_read_tsc, |
958 | .read_pmc = native_read_pmc, | |
959 | ||
81e103f1 | 960 | .iret = xen_iret, |
d75cd22f | 961 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
962 | #ifdef CONFIG_X86_64 |
963 | .usergs_sysret32 = xen_sysret32, | |
964 | .usergs_sysret64 = xen_sysret64, | |
965 | #endif | |
5ead97c8 JF |
966 | |
967 | .load_tr_desc = paravirt_nop, | |
968 | .set_ldt = xen_set_ldt, | |
969 | .load_gdt = xen_load_gdt, | |
970 | .load_idt = xen_load_idt, | |
971 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
972 | #ifdef CONFIG_X86_64 |
973 | .load_gs_index = xen_load_gs_index, | |
974 | #endif | |
5ead97c8 | 975 | |
38ffbe66 JF |
976 | .alloc_ldt = xen_alloc_ldt, |
977 | .free_ldt = xen_free_ldt, | |
978 | ||
5ead97c8 JF |
979 | .store_gdt = native_store_gdt, |
980 | .store_idt = native_store_idt, | |
981 | .store_tr = xen_store_tr, | |
982 | ||
983 | .write_ldt_entry = xen_write_ldt_entry, | |
984 | .write_gdt_entry = xen_write_gdt_entry, | |
985 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 986 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
987 | |
988 | .set_iopl_mask = xen_set_iopl_mask, | |
989 | .io_delay = xen_io_delay, | |
990 | ||
952d1d70 JF |
991 | /* Xen takes care of %gs when switching to usermode for us */ |
992 | .swapgs = paravirt_nop, | |
993 | ||
224101ed JF |
994 | .start_context_switch = paravirt_start_context_switch, |
995 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
996 | }; |
997 | ||
93b1eab3 | 998 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 999 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1000 | .startup_ipi_hook = paravirt_nop, |
1001 | #endif | |
93b1eab3 JF |
1002 | }; |
1003 | ||
fefa629a JF |
1004 | static void xen_reboot(int reason) |
1005 | { | |
349c709f JF |
1006 | struct sched_shutdown r = { .reason = reason }; |
1007 | ||
fefa629a JF |
1008 | #ifdef CONFIG_SMP |
1009 | smp_send_stop(); | |
1010 | #endif | |
1011 | ||
349c709f | 1012 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1013 | BUG(); |
1014 | } | |
1015 | ||
1016 | static void xen_restart(char *msg) | |
1017 | { | |
1018 | xen_reboot(SHUTDOWN_reboot); | |
1019 | } | |
1020 | ||
1021 | static void xen_emergency_restart(void) | |
1022 | { | |
1023 | xen_reboot(SHUTDOWN_reboot); | |
1024 | } | |
1025 | ||
1026 | static void xen_machine_halt(void) | |
1027 | { | |
1028 | xen_reboot(SHUTDOWN_poweroff); | |
1029 | } | |
1030 | ||
1031 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1032 | { | |
1033 | xen_reboot(SHUTDOWN_crash); | |
1034 | } | |
1035 | ||
1036 | static const struct machine_ops __initdata xen_machine_ops = { | |
1037 | .restart = xen_restart, | |
1038 | .halt = xen_machine_halt, | |
1039 | .power_off = xen_machine_halt, | |
1040 | .shutdown = xen_machine_halt, | |
1041 | .crash_shutdown = xen_crash_shutdown, | |
1042 | .emergency_restart = xen_emergency_restart, | |
1043 | }; | |
1044 | ||
577eebea JF |
1045 | /* |
1046 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1047 | * we do this, we have to be careful not to call any stack-protected | |
1048 | * function, which is most of the kernel. | |
1049 | */ | |
1050 | static void __init xen_setup_stackprotector(void) | |
1051 | { | |
1052 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1053 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1054 | ||
1055 | setup_stack_canary_segment(0); | |
1056 | switch_to_new_gdt(0); | |
1057 | ||
1058 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1059 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1060 | } | |
1061 | ||
5ead97c8 JF |
1062 | /* First C function to be called on Xen boot */ |
1063 | asmlinkage void __init xen_start_kernel(void) | |
1064 | { | |
1065 | pgd_t *pgd; | |
1066 | ||
1067 | if (!xen_start_info) | |
1068 | return; | |
1069 | ||
6e833587 JF |
1070 | xen_domain_type = XEN_PV_DOMAIN; |
1071 | ||
5ead97c8 | 1072 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1073 | pv_info = xen_info; |
1074 | pv_init_ops = xen_init_ops; | |
1075 | pv_time_ops = xen_time_ops; | |
1076 | pv_cpu_ops = xen_cpu_ops; | |
93b1eab3 | 1077 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1078 | |
6b18ae3e | 1079 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1080 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1081 | x86_init.oem.banner = xen_banner; |
845b3944 TG |
1082 | |
1083 | x86_init.timers.timer_init = xen_time_init; | |
736decac TG |
1084 | x86_init.timers.setup_percpu_clockev = x86_init_noop; |
1085 | x86_cpuinit.setup_percpu_clockev = x86_init_noop; | |
6b18ae3e | 1086 | |
2d826404 | 1087 | x86_platform.calibrate_tsc = xen_tsc_khz; |
7bd867df FT |
1088 | x86_platform.get_wallclock = xen_get_wallclock; |
1089 | x86_platform.set_wallclock = xen_set_wallclock; | |
93b1eab3 | 1090 | |
ce2eef33 | 1091 | /* |
577eebea | 1092 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1093 | */ |
577eebea | 1094 | |
973df35e JF |
1095 | xen_init_mmu_ops(); |
1096 | ||
577eebea JF |
1097 | /* Prevent unwanted bits from being set in PTEs. */ |
1098 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
1099 | if (!xen_initial_domain()) | |
1100 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1101 | ||
1102 | __supported_pte_mask |= _PAGE_IOMAP; | |
1103 | ||
817a824b IC |
1104 | /* |
1105 | * Prevent page tables from being allocated in highmem, even | |
1106 | * if CONFIG_HIGHPTE is enabled. | |
1107 | */ | |
1108 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1109 | ||
b75fe4e5 | 1110 | /* Work out if we support NX */ |
4763ed4d | 1111 | x86_configure_nx(); |
b75fe4e5 | 1112 | |
577eebea JF |
1113 | xen_setup_features(); |
1114 | ||
1115 | /* Get mfn list */ | |
1116 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1117 | xen_build_dynamic_phys_to_machine(); | |
1118 | ||
1119 | /* | |
1120 | * Set up kernel GDT and segment registers, mainly so that | |
1121 | * -fstack-protector code can be executed. | |
1122 | */ | |
1123 | xen_setup_stackprotector(); | |
0d1edf46 | 1124 | |
ce2eef33 | 1125 | xen_init_irq_ops(); |
e826fe1b JF |
1126 | xen_init_cpuid_mask(); |
1127 | ||
94a8c3c2 | 1128 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1129 | /* |
94a8c3c2 | 1130 | * set up the basic apic ops. |
ad66dd34 | 1131 | */ |
c1eeb2de | 1132 | set_xen_basic_apic_ops(); |
ad66dd34 | 1133 | #endif |
93b1eab3 | 1134 | |
e57778a1 JF |
1135 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1136 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1137 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1138 | } | |
1139 | ||
fefa629a JF |
1140 | machine_ops = xen_machine_ops; |
1141 | ||
38341432 JF |
1142 | /* |
1143 | * The only reliable way to retain the initial address of the | |
1144 | * percpu gdt_page is to remember it here, so we can go and | |
1145 | * mark it RW later, when the initial percpu area is freed. | |
1146 | */ | |
1147 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1148 | |
a9e7062d | 1149 | xen_smp_init(); |
5ead97c8 | 1150 | |
5ead97c8 JF |
1151 | pgd = (pgd_t *)xen_start_info->pt_base; |
1152 | ||
60223a32 | 1153 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1154 | possible map and a non-dummy shared_info. */ |
60223a32 | 1155 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1156 | |
55d80856 JF |
1157 | local_irq_disable(); |
1158 | early_boot_irqs_off(); | |
1159 | ||
084a2a4e | 1160 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1161 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1162 | |
084a2a4e | 1163 | init_mm.pgd = pgd; |
5ead97c8 JF |
1164 | |
1165 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1166 | ||
e68266b7 | 1167 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1168 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1169 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1170 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1171 | #else |
1172 | pv_info.kernel_rpl = 0; | |
1173 | #endif | |
5ead97c8 JF |
1174 | |
1175 | /* set the limit of our address space */ | |
fb1d8404 | 1176 | xen_reserve_top(); |
5ead97c8 | 1177 | |
7d087b68 | 1178 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1179 | /* set up basic CPUID stuff */ |
1180 | cpu_detect(&new_cpu_data); | |
1181 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1182 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1183 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1184 | #endif |
5ead97c8 JF |
1185 | |
1186 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1187 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1188 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1189 | ? __pa(xen_start_info->mod_start) : 0; | |
1190 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1191 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1192 | |
6e833587 | 1193 | if (!xen_initial_domain()) { |
83abc70a | 1194 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1195 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1196 | add_preferred_console("hvc", 0, NULL); |
5d990b62 CW |
1197 | } else { |
1198 | /* Make sure ACS will be enabled */ | |
1199 | pci_request_acs(); | |
9e124fe1 | 1200 | } |
5d990b62 | 1201 | |
b8c2d3df | 1202 | |
084a2a4e JF |
1203 | xen_raw_console_write("about to get started...\n"); |
1204 | ||
499d19b8 JF |
1205 | xen_setup_runstate_info(0); |
1206 | ||
5ead97c8 | 1207 | /* Start the world */ |
f5d36de0 | 1208 | #ifdef CONFIG_X86_32 |
f0d43100 | 1209 | i386_start_kernel(); |
f5d36de0 | 1210 | #else |
084a2a4e | 1211 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1212 | #endif |
5ead97c8 | 1213 | } |
bee6ab53 SY |
1214 | |
1215 | static uint32_t xen_cpuid_base(void) | |
1216 | { | |
1217 | uint32_t base, eax, ebx, ecx, edx; | |
1218 | char signature[13]; | |
1219 | ||
1220 | for (base = 0x40000000; base < 0x40010000; base += 0x100) { | |
1221 | cpuid(base, &eax, &ebx, &ecx, &edx); | |
1222 | *(uint32_t *)(signature + 0) = ebx; | |
1223 | *(uint32_t *)(signature + 4) = ecx; | |
1224 | *(uint32_t *)(signature + 8) = edx; | |
1225 | signature[12] = 0; | |
1226 | ||
1227 | if (!strcmp("XenVMMXenVMM", signature) && ((eax - base) >= 2)) | |
1228 | return base; | |
1229 | } | |
1230 | ||
1231 | return 0; | |
1232 | } | |
1233 | ||
1234 | static int init_hvm_pv_info(int *major, int *minor) | |
1235 | { | |
1236 | uint32_t eax, ebx, ecx, edx, pages, msr, base; | |
1237 | u64 pfn; | |
1238 | ||
1239 | base = xen_cpuid_base(); | |
1240 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); | |
1241 | ||
1242 | *major = eax >> 16; | |
1243 | *minor = eax & 0xffff; | |
1244 | printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor); | |
1245 | ||
1246 | cpuid(base + 2, &pages, &msr, &ecx, &edx); | |
1247 | ||
1248 | pfn = __pa(hypercall_page); | |
1249 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1250 | ||
1251 | xen_setup_features(); | |
1252 | ||
1253 | pv_info = xen_info; | |
1254 | pv_info.kernel_rpl = 0; | |
1255 | ||
1256 | xen_domain_type = XEN_HVM_DOMAIN; | |
1257 | ||
1258 | return 0; | |
1259 | } | |
1260 | ||
1261 | static void __init init_shared_info(void) | |
1262 | { | |
1263 | struct xen_add_to_physmap xatp; | |
1264 | struct shared_info *shared_info_page; | |
1265 | ||
1266 | shared_info_page = (struct shared_info *) | |
1267 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
1268 | xatp.domid = DOMID_SELF; | |
1269 | xatp.idx = 0; | |
1270 | xatp.space = XENMAPSPACE_shared_info; | |
1271 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; | |
1272 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) | |
1273 | BUG(); | |
1274 | ||
1275 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; | |
1276 | ||
1277 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; | |
1278 | } | |
1279 | ||
1280 | static void __init xen_hvm_guest_init(void) | |
1281 | { | |
1282 | int r; | |
1283 | int major, minor; | |
1284 | ||
1285 | r = init_hvm_pv_info(&major, &minor); | |
1286 | if (r < 0) | |
1287 | return; | |
1288 | ||
1289 | init_shared_info(); | |
1290 | } | |
1291 | ||
1292 | static bool __init xen_hvm_platform(void) | |
1293 | { | |
1294 | if (xen_pv_domain()) | |
1295 | return false; | |
1296 | ||
1297 | if (!xen_cpuid_base()) | |
1298 | return false; | |
1299 | ||
1300 | return true; | |
1301 | } | |
1302 | ||
1303 | const __refconst struct hypervisor_x86 x86_hyper_xen_hvm = { | |
1304 | .name = "Xen HVM", | |
1305 | .detect = xen_hvm_platform, | |
1306 | .init_platform = xen_hvm_guest_init, | |
1307 | }; | |
1308 | EXPORT_SYMBOL(x86_hyper_xen_hvm); |