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Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/smp.h> | |
17 | #include <linux/preempt.h> | |
f120f13e | 18 | #include <linux/hardirq.h> |
5ead97c8 JF |
19 | #include <linux/percpu.h> |
20 | #include <linux/delay.h> | |
21 | #include <linux/start_kernel.h> | |
22 | #include <linux/sched.h> | |
6cac5a92 | 23 | #include <linux/kprobes.h> |
5ead97c8 JF |
24 | #include <linux/bootmem.h> |
25 | #include <linux/module.h> | |
f4f97b3e JF |
26 | #include <linux/mm.h> |
27 | #include <linux/page-flags.h> | |
28 | #include <linux/highmem.h> | |
b8c2d3df | 29 | #include <linux/console.h> |
5d990b62 | 30 | #include <linux/pci.h> |
5ead97c8 | 31 | |
1ccbf534 | 32 | #include <xen/xen.h> |
5ead97c8 | 33 | #include <xen/interface/xen.h> |
ecbf29cd | 34 | #include <xen/interface/version.h> |
5ead97c8 JF |
35 | #include <xen/interface/physdev.h> |
36 | #include <xen/interface/vcpu.h> | |
37 | #include <xen/features.h> | |
38 | #include <xen/page.h> | |
084a2a4e | 39 | #include <xen/hvc-console.h> |
5ead97c8 JF |
40 | |
41 | #include <asm/paravirt.h> | |
7b6aa335 | 42 | #include <asm/apic.h> |
5ead97c8 JF |
43 | #include <asm/page.h> |
44 | #include <asm/xen/hypercall.h> | |
45 | #include <asm/xen/hypervisor.h> | |
46 | #include <asm/fixmap.h> | |
47 | #include <asm/processor.h> | |
707ebbc8 | 48 | #include <asm/proto.h> |
1153968a | 49 | #include <asm/msr-index.h> |
6cac5a92 | 50 | #include <asm/traps.h> |
5ead97c8 JF |
51 | #include <asm/setup.h> |
52 | #include <asm/desc.h> | |
53 | #include <asm/pgtable.h> | |
f87e4cac | 54 | #include <asm/tlbflush.h> |
fefa629a | 55 | #include <asm/reboot.h> |
577eebea | 56 | #include <asm/stackprotector.h> |
5ead97c8 JF |
57 | |
58 | #include "xen-ops.h" | |
3b827c1b | 59 | #include "mmu.h" |
5ead97c8 JF |
60 | #include "multicalls.h" |
61 | ||
62 | EXPORT_SYMBOL_GPL(hypercall_page); | |
63 | ||
5ead97c8 JF |
64 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
65 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 66 | |
6e833587 JF |
67 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
68 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
69 | ||
5ead97c8 JF |
70 | struct start_info *xen_start_info; |
71 | EXPORT_SYMBOL_GPL(xen_start_info); | |
72 | ||
a0d695c8 | 73 | struct shared_info xen_dummy_shared_info; |
60223a32 | 74 | |
38341432 JF |
75 | void *xen_initial_gdt; |
76 | ||
60223a32 JF |
77 | /* |
78 | * Point at some empty memory to start with. We map the real shared_info | |
79 | * page as soon as fixmap is up and running. | |
80 | */ | |
a0d695c8 | 81 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
82 | |
83 | /* | |
84 | * Flag to determine whether vcpu info placement is available on all | |
85 | * VCPUs. We assume it is to start with, and then set it to zero on | |
86 | * the first failure. This is because it can succeed on some VCPUs | |
87 | * and not others, since it can involve hypervisor memory allocation, | |
88 | * or because the guest failed to guarantee all the appropriate | |
89 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
90 | * | |
91 | * Note that any particular CPU may be using a placed vcpu structure, | |
92 | * but we can only optimise if the all are. | |
93 | * | |
94 | * 0: not available, 1: available | |
95 | */ | |
e4d04071 | 96 | static int have_vcpu_info_placement = 1; |
60223a32 | 97 | |
9c7a7942 | 98 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 99 | { |
60223a32 JF |
100 | struct vcpu_register_vcpu_info info; |
101 | int err; | |
102 | struct vcpu_info *vcpup; | |
103 | ||
a0d695c8 | 104 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
5ead97c8 | 105 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
60223a32 JF |
106 | |
107 | if (!have_vcpu_info_placement) | |
108 | return; /* already tested, not available */ | |
109 | ||
110 | vcpup = &per_cpu(xen_vcpu_info, cpu); | |
111 | ||
9976b39b | 112 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
113 | info.offset = offset_in_page(vcpup); |
114 | ||
e3d26976 | 115 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
60223a32 JF |
116 | cpu, vcpup, info.mfn, info.offset); |
117 | ||
118 | /* Check to see if the hypervisor will put the vcpu_info | |
119 | structure where we want it, which allows direct access via | |
120 | a percpu-variable. */ | |
121 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
122 | ||
123 | if (err) { | |
124 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
125 | have_vcpu_info_placement = 0; | |
126 | } else { | |
127 | /* This cpu is using the registered vcpu info, even if | |
128 | later ones fail to. */ | |
129 | per_cpu(xen_vcpu, cpu) = vcpup; | |
6487673b | 130 | |
60223a32 JF |
131 | printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n", |
132 | cpu, vcpup); | |
133 | } | |
5ead97c8 JF |
134 | } |
135 | ||
9c7a7942 JF |
136 | /* |
137 | * On restore, set the vcpu placement up again. | |
138 | * If it fails, then we're in a bad state, since | |
139 | * we can't back out from using it... | |
140 | */ | |
141 | void xen_vcpu_restore(void) | |
142 | { | |
3905bb2a | 143 | int cpu; |
9c7a7942 | 144 | |
3905bb2a JF |
145 | for_each_online_cpu(cpu) { |
146 | bool other_cpu = (cpu != smp_processor_id()); | |
9c7a7942 | 147 | |
3905bb2a JF |
148 | if (other_cpu && |
149 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
150 | BUG(); | |
9c7a7942 | 151 | |
3905bb2a | 152 | xen_setup_runstate_info(cpu); |
9c7a7942 | 153 | |
3905bb2a | 154 | if (have_vcpu_info_placement) |
9c7a7942 | 155 | xen_vcpu_setup(cpu); |
9c7a7942 | 156 | |
3905bb2a JF |
157 | if (other_cpu && |
158 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
159 | BUG(); | |
9c7a7942 JF |
160 | } |
161 | } | |
162 | ||
5ead97c8 JF |
163 | static void __init xen_banner(void) |
164 | { | |
95c7c23b JF |
165 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
166 | struct xen_extraversion extra; | |
167 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
168 | ||
5ead97c8 | 169 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 170 | pv_info.name); |
95c7c23b JF |
171 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
172 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 173 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
174 | } |
175 | ||
e826fe1b JF |
176 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
177 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
178 | ||
65ea5b03 PA |
179 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
180 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 181 | { |
82d64699 | 182 | unsigned maskebx = ~0; |
e826fe1b | 183 | unsigned maskecx = ~0; |
5ead97c8 JF |
184 | unsigned maskedx = ~0; |
185 | ||
186 | /* | |
187 | * Mask out inconvenient features, to try and disable as many | |
188 | * unsupported kernel subsystems as possible. | |
189 | */ | |
82d64699 JF |
190 | switch (*ax) { |
191 | case 1: | |
e826fe1b JF |
192 | maskecx = cpuid_leaf1_ecx_mask; |
193 | maskedx = cpuid_leaf1_edx_mask; | |
82d64699 JF |
194 | break; |
195 | ||
196 | case 0xb: | |
197 | /* Suppress extended topology stuff */ | |
198 | maskebx = 0; | |
199 | break; | |
e826fe1b | 200 | } |
5ead97c8 JF |
201 | |
202 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
203 | : "=a" (*ax), |
204 | "=b" (*bx), | |
205 | "=c" (*cx), | |
206 | "=d" (*dx) | |
207 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 208 | |
82d64699 | 209 | *bx &= maskebx; |
e826fe1b | 210 | *cx &= maskecx; |
65ea5b03 | 211 | *dx &= maskedx; |
5ead97c8 JF |
212 | } |
213 | ||
e826fe1b JF |
214 | static __init void xen_init_cpuid_mask(void) |
215 | { | |
216 | unsigned int ax, bx, cx, dx; | |
217 | ||
218 | cpuid_leaf1_edx_mask = | |
219 | ~((1 << X86_FEATURE_MCE) | /* disable MCE */ | |
220 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
221 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ | |
222 | ||
223 | if (!xen_initial_domain()) | |
224 | cpuid_leaf1_edx_mask &= | |
225 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
226 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
227 | ||
228 | ax = 1; | |
7adb4df4 | 229 | cx = 0; |
e826fe1b JF |
230 | xen_cpuid(&ax, &bx, &cx, &dx); |
231 | ||
232 | /* cpuid claims we support xsave; try enabling it to see what happens */ | |
233 | if (cx & (1 << (X86_FEATURE_XSAVE % 32))) { | |
234 | unsigned long cr4; | |
235 | ||
236 | set_in_cr4(X86_CR4_OSXSAVE); | |
237 | ||
238 | cr4 = read_cr4(); | |
239 | ||
240 | if ((cr4 & X86_CR4_OSXSAVE) == 0) | |
241 | cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_XSAVE % 32)); | |
242 | ||
243 | clear_in_cr4(X86_CR4_OSXSAVE); | |
244 | } | |
245 | } | |
246 | ||
5ead97c8 JF |
247 | static void xen_set_debugreg(int reg, unsigned long val) |
248 | { | |
249 | HYPERVISOR_set_debugreg(reg, val); | |
250 | } | |
251 | ||
252 | static unsigned long xen_get_debugreg(int reg) | |
253 | { | |
254 | return HYPERVISOR_get_debugreg(reg); | |
255 | } | |
256 | ||
224101ed | 257 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 258 | { |
5ead97c8 | 259 | xen_mc_flush(); |
224101ed | 260 | paravirt_end_context_switch(next); |
5ead97c8 JF |
261 | } |
262 | ||
263 | static unsigned long xen_store_tr(void) | |
264 | { | |
265 | return 0; | |
266 | } | |
267 | ||
a05d2eba | 268 | /* |
cef43bf6 JF |
269 | * Set the page permissions for a particular virtual address. If the |
270 | * address is a vmalloc mapping (or other non-linear mapping), then | |
271 | * find the linear mapping of the page and also set its protections to | |
272 | * match. | |
a05d2eba JF |
273 | */ |
274 | static void set_aliased_prot(void *v, pgprot_t prot) | |
275 | { | |
276 | int level; | |
277 | pte_t *ptep; | |
278 | pte_t pte; | |
279 | unsigned long pfn; | |
280 | struct page *page; | |
281 | ||
282 | ptep = lookup_address((unsigned long)v, &level); | |
283 | BUG_ON(ptep == NULL); | |
284 | ||
285 | pfn = pte_pfn(*ptep); | |
286 | page = pfn_to_page(pfn); | |
287 | ||
288 | pte = pfn_pte(pfn, prot); | |
289 | ||
290 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
291 | BUG(); | |
292 | ||
293 | if (!PageHighMem(page)) { | |
294 | void *av = __va(PFN_PHYS(pfn)); | |
295 | ||
296 | if (av != v) | |
297 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
298 | BUG(); | |
299 | } else | |
300 | kmap_flush_unused(); | |
301 | } | |
302 | ||
38ffbe66 JF |
303 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
304 | { | |
a05d2eba | 305 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
306 | int i; |
307 | ||
a05d2eba JF |
308 | for(i = 0; i < entries; i += entries_per_page) |
309 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
310 | } |
311 | ||
312 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
313 | { | |
a05d2eba | 314 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
315 | int i; |
316 | ||
a05d2eba JF |
317 | for(i = 0; i < entries; i += entries_per_page) |
318 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
319 | } |
320 | ||
5ead97c8 JF |
321 | static void xen_set_ldt(const void *addr, unsigned entries) |
322 | { | |
5ead97c8 JF |
323 | struct mmuext_op *op; |
324 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
325 | ||
326 | op = mcs.args; | |
327 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 328 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
329 | op->arg2.nr_ents = entries; |
330 | ||
331 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
332 | ||
333 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
334 | } | |
335 | ||
6b68f01b | 336 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 337 | { |
5ead97c8 JF |
338 | unsigned long va = dtr->address; |
339 | unsigned int size = dtr->size + 1; | |
340 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 341 | unsigned long frames[pages]; |
5ead97c8 | 342 | int f; |
5ead97c8 | 343 | |
577eebea JF |
344 | /* |
345 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
346 | * 8-byte entries, or 16 4k pages.. | |
347 | */ | |
5ead97c8 JF |
348 | |
349 | BUG_ON(size > 65536); | |
350 | BUG_ON(va & ~PAGE_MASK); | |
351 | ||
5ead97c8 | 352 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 353 | int level; |
577eebea | 354 | pte_t *ptep; |
6ed6bf42 JF |
355 | unsigned long pfn, mfn; |
356 | void *virt; | |
357 | ||
577eebea JF |
358 | /* |
359 | * The GDT is per-cpu and is in the percpu data area. | |
360 | * That can be virtually mapped, so we need to do a | |
361 | * page-walk to get the underlying MFN for the | |
362 | * hypercall. The page can also be in the kernel's | |
363 | * linear range, so we need to RO that mapping too. | |
364 | */ | |
365 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
366 | BUG_ON(ptep == NULL); |
367 | ||
368 | pfn = pte_pfn(*ptep); | |
369 | mfn = pfn_to_mfn(pfn); | |
370 | virt = __va(PFN_PHYS(pfn)); | |
371 | ||
372 | frames[f] = mfn; | |
9976b39b | 373 | |
5ead97c8 | 374 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 375 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
376 | } |
377 | ||
3ce5fa7e JF |
378 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
379 | BUG(); | |
5ead97c8 JF |
380 | } |
381 | ||
577eebea JF |
382 | /* |
383 | * load_gdt for early boot, when the gdt is only mapped once | |
384 | */ | |
385 | static __init void xen_load_gdt_boot(const struct desc_ptr *dtr) | |
386 | { | |
387 | unsigned long va = dtr->address; | |
388 | unsigned int size = dtr->size + 1; | |
389 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
390 | unsigned long frames[pages]; | |
391 | int f; | |
392 | ||
393 | /* | |
394 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
395 | * 8-byte entries, or 16 4k pages.. | |
396 | */ | |
397 | ||
398 | BUG_ON(size > 65536); | |
399 | BUG_ON(va & ~PAGE_MASK); | |
400 | ||
401 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
402 | pte_t pte; | |
403 | unsigned long pfn, mfn; | |
404 | ||
405 | pfn = virt_to_pfn(va); | |
406 | mfn = pfn_to_mfn(pfn); | |
407 | ||
408 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
409 | ||
410 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
411 | BUG(); | |
412 | ||
413 | frames[f] = mfn; | |
414 | } | |
415 | ||
416 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
417 | BUG(); | |
418 | } | |
419 | ||
5ead97c8 JF |
420 | static void load_TLS_descriptor(struct thread_struct *t, |
421 | unsigned int cpu, unsigned int i) | |
422 | { | |
423 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 424 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
425 | struct multicall_space mc = __xen_mc_entry(0); |
426 | ||
427 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
428 | } | |
429 | ||
430 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
431 | { | |
8b84ad94 | 432 | /* |
ccbeed3a TH |
433 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
434 | * and lazy gs handling is enabled, it means we're in a | |
435 | * context switch, and %gs has just been saved. This means we | |
436 | * can zero it out to prevent faults on exit from the | |
437 | * hypervisor if the next process has no %gs. Either way, it | |
438 | * has been saved, and the new value will get loaded properly. | |
439 | * This will go away as soon as Xen has been modified to not | |
440 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
441 | * |
442 | * On x86_64, this hack is not used for %gs, because gs points | |
443 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
444 | * must not zero %gs on x86_64 | |
445 | * | |
446 | * For x86_64, we need to zero %fs, otherwise we may get an | |
447 | * exception between the new %fs descriptor being loaded and | |
448 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 449 | */ |
8a95408e EH |
450 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
451 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 452 | lazy_load_gs(0); |
8a95408e EH |
453 | #else |
454 | loadsegment(fs, 0); | |
455 | #endif | |
456 | } | |
457 | ||
458 | xen_mc_batch(); | |
459 | ||
460 | load_TLS_descriptor(t, cpu, 0); | |
461 | load_TLS_descriptor(t, cpu, 1); | |
462 | load_TLS_descriptor(t, cpu, 2); | |
463 | ||
464 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
465 | } |
466 | ||
a8fc1089 EH |
467 | #ifdef CONFIG_X86_64 |
468 | static void xen_load_gs_index(unsigned int idx) | |
469 | { | |
470 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
471 | BUG(); | |
5ead97c8 | 472 | } |
a8fc1089 | 473 | #endif |
5ead97c8 JF |
474 | |
475 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 476 | const void *ptr) |
5ead97c8 | 477 | { |
cef43bf6 | 478 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 479 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 480 | |
f120f13e JF |
481 | preempt_disable(); |
482 | ||
5ead97c8 JF |
483 | xen_mc_flush(); |
484 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
485 | BUG(); | |
f120f13e JF |
486 | |
487 | preempt_enable(); | |
5ead97c8 JF |
488 | } |
489 | ||
e176d367 | 490 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
491 | struct trap_info *info) |
492 | { | |
6cac5a92 JF |
493 | unsigned long addr; |
494 | ||
6d02c426 | 495 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
496 | return 0; |
497 | ||
498 | info->vector = vector; | |
6cac5a92 JF |
499 | |
500 | addr = gate_offset(*val); | |
501 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
502 | /* |
503 | * Look for known traps using IST, and substitute them | |
504 | * appropriately. The debugger ones are the only ones we care | |
505 | * about. Xen will handle faults like double_fault and | |
506 | * machine_check, so we should never see them. Warn if | |
507 | * there's an unexpected IST-using fault handler. | |
508 | */ | |
6cac5a92 JF |
509 | if (addr == (unsigned long)debug) |
510 | addr = (unsigned long)xen_debug; | |
511 | else if (addr == (unsigned long)int3) | |
512 | addr = (unsigned long)xen_int3; | |
513 | else if (addr == (unsigned long)stack_segment) | |
514 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
515 | else if (addr == (unsigned long)double_fault || |
516 | addr == (unsigned long)nmi) { | |
517 | /* Don't need to handle these */ | |
518 | return 0; | |
519 | #ifdef CONFIG_X86_MCE | |
520 | } else if (addr == (unsigned long)machine_check) { | |
521 | return 0; | |
522 | #endif | |
523 | } else { | |
524 | /* Some other trap using IST? */ | |
525 | if (WARN_ON(val->ist != 0)) | |
526 | return 0; | |
527 | } | |
6cac5a92 JF |
528 | #endif /* CONFIG_X86_64 */ |
529 | info->address = addr; | |
530 | ||
e176d367 EH |
531 | info->cs = gate_segment(*val); |
532 | info->flags = val->dpl; | |
5ead97c8 | 533 | /* interrupt gates clear IF */ |
6d02c426 JF |
534 | if (val->type == GATE_INTERRUPT) |
535 | info->flags |= 1 << 2; | |
5ead97c8 JF |
536 | |
537 | return 1; | |
538 | } | |
539 | ||
540 | /* Locations of each CPU's IDT */ | |
6b68f01b | 541 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
542 | |
543 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
544 | also update Xen. */ | |
8d947344 | 545 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 546 | { |
5ead97c8 | 547 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
548 | unsigned long start, end; |
549 | ||
550 | preempt_disable(); | |
551 | ||
552 | start = __get_cpu_var(idt_desc).address; | |
553 | end = start + __get_cpu_var(idt_desc).size + 1; | |
5ead97c8 JF |
554 | |
555 | xen_mc_flush(); | |
556 | ||
8d947344 | 557 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
558 | |
559 | if (p >= start && (p + 8) <= end) { | |
560 | struct trap_info info[2]; | |
561 | ||
562 | info[1].address = 0; | |
563 | ||
e176d367 | 564 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
565 | if (HYPERVISOR_set_trap_table(info)) |
566 | BUG(); | |
567 | } | |
f120f13e JF |
568 | |
569 | preempt_enable(); | |
5ead97c8 JF |
570 | } |
571 | ||
6b68f01b | 572 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 573 | struct trap_info *traps) |
5ead97c8 | 574 | { |
5ead97c8 JF |
575 | unsigned in, out, count; |
576 | ||
e176d367 | 577 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
578 | BUG_ON(count > 256); |
579 | ||
5ead97c8 | 580 | for (in = out = 0; in < count; in++) { |
e176d367 | 581 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 582 | |
e176d367 | 583 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
584 | out++; |
585 | } | |
586 | traps[out].address = 0; | |
f87e4cac JF |
587 | } |
588 | ||
589 | void xen_copy_trap_info(struct trap_info *traps) | |
590 | { | |
6b68f01b | 591 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
592 | |
593 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
594 | } |
595 | ||
596 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
597 | hold a spinlock to protect the static traps[] array (static because | |
598 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 599 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
600 | { |
601 | static DEFINE_SPINLOCK(lock); | |
602 | static struct trap_info traps[257]; | |
f87e4cac JF |
603 | |
604 | spin_lock(&lock); | |
605 | ||
f120f13e JF |
606 | __get_cpu_var(idt_desc) = *desc; |
607 | ||
f87e4cac | 608 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
609 | |
610 | xen_mc_flush(); | |
611 | if (HYPERVISOR_set_trap_table(traps)) | |
612 | BUG(); | |
613 | ||
614 | spin_unlock(&lock); | |
615 | } | |
616 | ||
617 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
618 | they're handled differently. */ | |
619 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 620 | const void *desc, int type) |
5ead97c8 | 621 | { |
f120f13e JF |
622 | preempt_disable(); |
623 | ||
014b15be GOC |
624 | switch (type) { |
625 | case DESC_LDT: | |
626 | case DESC_TSS: | |
5ead97c8 JF |
627 | /* ignore */ |
628 | break; | |
629 | ||
630 | default: { | |
9976b39b | 631 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
632 | |
633 | xen_mc_flush(); | |
014b15be | 634 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
635 | BUG(); |
636 | } | |
637 | ||
638 | } | |
f120f13e JF |
639 | |
640 | preempt_enable(); | |
5ead97c8 JF |
641 | } |
642 | ||
577eebea JF |
643 | /* |
644 | * Version of write_gdt_entry for use at early boot-time needed to | |
645 | * update an entry as simply as possible. | |
646 | */ | |
647 | static __init void xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, | |
648 | const void *desc, int type) | |
649 | { | |
650 | switch (type) { | |
651 | case DESC_LDT: | |
652 | case DESC_TSS: | |
653 | /* ignore */ | |
654 | break; | |
655 | ||
656 | default: { | |
657 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
658 | ||
659 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
660 | dt[entry] = *(struct desc_struct *)desc; | |
661 | } | |
662 | ||
663 | } | |
664 | } | |
665 | ||
faca6227 | 666 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 667 | struct thread_struct *thread) |
5ead97c8 JF |
668 | { |
669 | struct multicall_space mcs = xen_mc_entry(0); | |
faca6227 | 670 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
671 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
672 | } | |
673 | ||
674 | static void xen_set_iopl_mask(unsigned mask) | |
675 | { | |
676 | struct physdev_set_iopl set_iopl; | |
677 | ||
678 | /* Force the change at ring 0. */ | |
679 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
680 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
681 | } | |
682 | ||
683 | static void xen_io_delay(void) | |
684 | { | |
685 | } | |
686 | ||
687 | #ifdef CONFIG_X86_LOCAL_APIC | |
ad66dd34 | 688 | static u32 xen_apic_read(u32 reg) |
5ead97c8 JF |
689 | { |
690 | return 0; | |
691 | } | |
f87e4cac | 692 | |
ad66dd34 | 693 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
694 | { |
695 | /* Warn to see if there's any stray references */ | |
696 | WARN_ON(1); | |
697 | } | |
ad66dd34 | 698 | |
ad66dd34 SS |
699 | static u64 xen_apic_icr_read(void) |
700 | { | |
701 | return 0; | |
702 | } | |
703 | ||
704 | static void xen_apic_icr_write(u32 low, u32 id) | |
705 | { | |
706 | /* Warn to see if there's any stray references */ | |
707 | WARN_ON(1); | |
708 | } | |
709 | ||
710 | static void xen_apic_wait_icr_idle(void) | |
711 | { | |
712 | return; | |
713 | } | |
714 | ||
94a8c3c2 YL |
715 | static u32 xen_safe_apic_wait_icr_idle(void) |
716 | { | |
717 | return 0; | |
718 | } | |
719 | ||
c1eeb2de YL |
720 | static void set_xen_basic_apic_ops(void) |
721 | { | |
722 | apic->read = xen_apic_read; | |
723 | apic->write = xen_apic_write; | |
724 | apic->icr_read = xen_apic_icr_read; | |
725 | apic->icr_write = xen_apic_icr_write; | |
726 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
727 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
728 | } | |
ad66dd34 | 729 | |
5ead97c8 JF |
730 | #endif |
731 | ||
f87e4cac | 732 | |
7b1333aa JF |
733 | static void xen_clts(void) |
734 | { | |
735 | struct multicall_space mcs; | |
736 | ||
737 | mcs = xen_mc_entry(0); | |
738 | ||
739 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
740 | ||
741 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
742 | } | |
743 | ||
a789ed5f JF |
744 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
745 | ||
746 | static unsigned long xen_read_cr0(void) | |
747 | { | |
748 | unsigned long cr0 = percpu_read(xen_cr0_value); | |
749 | ||
750 | if (unlikely(cr0 == 0)) { | |
751 | cr0 = native_read_cr0(); | |
752 | percpu_write(xen_cr0_value, cr0); | |
753 | } | |
754 | ||
755 | return cr0; | |
756 | } | |
757 | ||
7b1333aa JF |
758 | static void xen_write_cr0(unsigned long cr0) |
759 | { | |
760 | struct multicall_space mcs; | |
761 | ||
a789ed5f JF |
762 | percpu_write(xen_cr0_value, cr0); |
763 | ||
7b1333aa JF |
764 | /* Only pay attention to cr0.TS; everything else is |
765 | ignored. */ | |
766 | mcs = xen_mc_entry(0); | |
767 | ||
768 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
769 | ||
770 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
771 | } | |
772 | ||
5ead97c8 JF |
773 | static void xen_write_cr4(unsigned long cr4) |
774 | { | |
2956a351 JF |
775 | cr4 &= ~X86_CR4_PGE; |
776 | cr4 &= ~X86_CR4_PSE; | |
777 | ||
778 | native_write_cr4(cr4); | |
5ead97c8 JF |
779 | } |
780 | ||
1153968a JF |
781 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
782 | { | |
783 | int ret; | |
784 | ||
785 | ret = 0; | |
786 | ||
f63c2f24 | 787 | switch (msr) { |
1153968a JF |
788 | #ifdef CONFIG_X86_64 |
789 | unsigned which; | |
790 | u64 base; | |
791 | ||
792 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
793 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
794 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
795 | ||
796 | set: | |
797 | base = ((u64)high << 32) | low; | |
798 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 799 | ret = -EIO; |
1153968a JF |
800 | break; |
801 | #endif | |
d89961e2 JF |
802 | |
803 | case MSR_STAR: | |
804 | case MSR_CSTAR: | |
805 | case MSR_LSTAR: | |
806 | case MSR_SYSCALL_MASK: | |
807 | case MSR_IA32_SYSENTER_CS: | |
808 | case MSR_IA32_SYSENTER_ESP: | |
809 | case MSR_IA32_SYSENTER_EIP: | |
810 | /* Fast syscall setup is all done in hypercalls, so | |
811 | these are all ignored. Stub them out here to stop | |
812 | Xen console noise. */ | |
813 | break; | |
814 | ||
1153968a JF |
815 | default: |
816 | ret = native_write_msr_safe(msr, low, high); | |
817 | } | |
818 | ||
819 | return ret; | |
820 | } | |
821 | ||
0e91398f | 822 | void xen_setup_shared_info(void) |
5ead97c8 JF |
823 | { |
824 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
825 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
826 | xen_start_info->shared_info); | |
827 | ||
828 | HYPERVISOR_shared_info = | |
829 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
830 | } else |
831 | HYPERVISOR_shared_info = | |
832 | (struct shared_info *)__va(xen_start_info->shared_info); | |
833 | ||
2e8fe719 JF |
834 | #ifndef CONFIG_SMP |
835 | /* In UP this is as good a place as any to set up shared info */ | |
836 | xen_setup_vcpu_info_placement(); | |
837 | #endif | |
d5edbc1f JF |
838 | |
839 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
840 | } |
841 | ||
60223a32 | 842 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 843 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
844 | { |
845 | int cpu; | |
846 | ||
847 | for_each_possible_cpu(cpu) | |
848 | xen_vcpu_setup(cpu); | |
849 | ||
850 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
851 | percpu area for all cpus, so make use of it */ | |
852 | if (have_vcpu_info_placement) { | |
853 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | |
854 | ||
ecb93d1c JF |
855 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
856 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
857 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
858 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 859 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 860 | } |
5ead97c8 JF |
861 | } |
862 | ||
ab144f5e AK |
863 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
864 | unsigned long addr, unsigned len) | |
6487673b JF |
865 | { |
866 | char *start, *end, *reloc; | |
867 | unsigned ret; | |
868 | ||
869 | start = end = reloc = NULL; | |
870 | ||
93b1eab3 JF |
871 | #define SITE(op, x) \ |
872 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
873 | if (have_vcpu_info_placement) { \ |
874 | start = (char *)xen_##x##_direct; \ | |
875 | end = xen_##x##_direct_end; \ | |
876 | reloc = xen_##x##_direct_reloc; \ | |
877 | } \ | |
878 | goto patch_site | |
879 | ||
880 | switch (type) { | |
93b1eab3 JF |
881 | SITE(pv_irq_ops, irq_enable); |
882 | SITE(pv_irq_ops, irq_disable); | |
883 | SITE(pv_irq_ops, save_fl); | |
884 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
885 | #undef SITE |
886 | ||
887 | patch_site: | |
888 | if (start == NULL || (end-start) > len) | |
889 | goto default_patch; | |
890 | ||
ab144f5e | 891 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
892 | |
893 | /* Note: because reloc is assigned from something that | |
894 | appears to be an array, gcc assumes it's non-null, | |
895 | but doesn't know its relationship with start and | |
896 | end. */ | |
897 | if (reloc > start && reloc < end) { | |
898 | int reloc_off = reloc - start; | |
ab144f5e AK |
899 | long *relocp = (long *)(insnbuf + reloc_off); |
900 | long delta = start - (char *)addr; | |
6487673b JF |
901 | |
902 | *relocp += delta; | |
903 | } | |
904 | break; | |
905 | ||
906 | default_patch: | |
907 | default: | |
ab144f5e AK |
908 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
909 | addr, len); | |
6487673b JF |
910 | break; |
911 | } | |
912 | ||
913 | return ret; | |
914 | } | |
915 | ||
93b1eab3 | 916 | static const struct pv_info xen_info __initdata = { |
5ead97c8 JF |
917 | .paravirt_enabled = 1, |
918 | .shared_kernel_pmd = 0, | |
919 | ||
920 | .name = "Xen", | |
93b1eab3 | 921 | }; |
5ead97c8 | 922 | |
93b1eab3 | 923 | static const struct pv_init_ops xen_init_ops __initdata = { |
6487673b | 924 | .patch = xen_patch, |
93b1eab3 | 925 | }; |
5ead97c8 | 926 | |
93b1eab3 | 927 | static const struct pv_time_ops xen_time_ops __initdata = { |
ab550288 | 928 | .sched_clock = xen_sched_clock, |
93b1eab3 | 929 | }; |
15c84731 | 930 | |
93b1eab3 | 931 | static const struct pv_cpu_ops xen_cpu_ops __initdata = { |
5ead97c8 JF |
932 | .cpuid = xen_cpuid, |
933 | ||
934 | .set_debugreg = xen_set_debugreg, | |
935 | .get_debugreg = xen_get_debugreg, | |
936 | ||
7b1333aa | 937 | .clts = xen_clts, |
5ead97c8 | 938 | |
a789ed5f | 939 | .read_cr0 = xen_read_cr0, |
7b1333aa | 940 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 941 | |
5ead97c8 JF |
942 | .read_cr4 = native_read_cr4, |
943 | .read_cr4_safe = native_read_cr4_safe, | |
944 | .write_cr4 = xen_write_cr4, | |
945 | ||
5ead97c8 JF |
946 | .wbinvd = native_wbinvd, |
947 | ||
948 | .read_msr = native_read_msr_safe, | |
1153968a | 949 | .write_msr = xen_write_msr_safe, |
5ead97c8 JF |
950 | .read_tsc = native_read_tsc, |
951 | .read_pmc = native_read_pmc, | |
952 | ||
81e103f1 | 953 | .iret = xen_iret, |
d75cd22f | 954 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
955 | #ifdef CONFIG_X86_64 |
956 | .usergs_sysret32 = xen_sysret32, | |
957 | .usergs_sysret64 = xen_sysret64, | |
958 | #endif | |
5ead97c8 JF |
959 | |
960 | .load_tr_desc = paravirt_nop, | |
961 | .set_ldt = xen_set_ldt, | |
962 | .load_gdt = xen_load_gdt, | |
963 | .load_idt = xen_load_idt, | |
964 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
965 | #ifdef CONFIG_X86_64 |
966 | .load_gs_index = xen_load_gs_index, | |
967 | #endif | |
5ead97c8 | 968 | |
38ffbe66 JF |
969 | .alloc_ldt = xen_alloc_ldt, |
970 | .free_ldt = xen_free_ldt, | |
971 | ||
5ead97c8 JF |
972 | .store_gdt = native_store_gdt, |
973 | .store_idt = native_store_idt, | |
974 | .store_tr = xen_store_tr, | |
975 | ||
976 | .write_ldt_entry = xen_write_ldt_entry, | |
977 | .write_gdt_entry = xen_write_gdt_entry, | |
978 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 979 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
980 | |
981 | .set_iopl_mask = xen_set_iopl_mask, | |
982 | .io_delay = xen_io_delay, | |
983 | ||
952d1d70 JF |
984 | /* Xen takes care of %gs when switching to usermode for us */ |
985 | .swapgs = paravirt_nop, | |
986 | ||
224101ed JF |
987 | .start_context_switch = paravirt_start_context_switch, |
988 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
989 | }; |
990 | ||
93b1eab3 | 991 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
5ead97c8 | 992 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
993 | .startup_ipi_hook = paravirt_nop, |
994 | #endif | |
93b1eab3 JF |
995 | }; |
996 | ||
fefa629a JF |
997 | static void xen_reboot(int reason) |
998 | { | |
349c709f JF |
999 | struct sched_shutdown r = { .reason = reason }; |
1000 | ||
fefa629a JF |
1001 | #ifdef CONFIG_SMP |
1002 | smp_send_stop(); | |
1003 | #endif | |
1004 | ||
349c709f | 1005 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1006 | BUG(); |
1007 | } | |
1008 | ||
1009 | static void xen_restart(char *msg) | |
1010 | { | |
1011 | xen_reboot(SHUTDOWN_reboot); | |
1012 | } | |
1013 | ||
1014 | static void xen_emergency_restart(void) | |
1015 | { | |
1016 | xen_reboot(SHUTDOWN_reboot); | |
1017 | } | |
1018 | ||
1019 | static void xen_machine_halt(void) | |
1020 | { | |
1021 | xen_reboot(SHUTDOWN_poweroff); | |
1022 | } | |
1023 | ||
1024 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1025 | { | |
1026 | xen_reboot(SHUTDOWN_crash); | |
1027 | } | |
1028 | ||
1029 | static const struct machine_ops __initdata xen_machine_ops = { | |
1030 | .restart = xen_restart, | |
1031 | .halt = xen_machine_halt, | |
1032 | .power_off = xen_machine_halt, | |
1033 | .shutdown = xen_machine_halt, | |
1034 | .crash_shutdown = xen_crash_shutdown, | |
1035 | .emergency_restart = xen_emergency_restart, | |
1036 | }; | |
1037 | ||
577eebea JF |
1038 | /* |
1039 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1040 | * we do this, we have to be careful not to call any stack-protected | |
1041 | * function, which is most of the kernel. | |
1042 | */ | |
1043 | static void __init xen_setup_stackprotector(void) | |
1044 | { | |
1045 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1046 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1047 | ||
1048 | setup_stack_canary_segment(0); | |
1049 | switch_to_new_gdt(0); | |
1050 | ||
1051 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1052 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1053 | } | |
1054 | ||
5ead97c8 JF |
1055 | /* First C function to be called on Xen boot */ |
1056 | asmlinkage void __init xen_start_kernel(void) | |
1057 | { | |
1058 | pgd_t *pgd; | |
1059 | ||
1060 | if (!xen_start_info) | |
1061 | return; | |
1062 | ||
6e833587 JF |
1063 | xen_domain_type = XEN_PV_DOMAIN; |
1064 | ||
5ead97c8 | 1065 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1066 | pv_info = xen_info; |
1067 | pv_init_ops = xen_init_ops; | |
1068 | pv_time_ops = xen_time_ops; | |
1069 | pv_cpu_ops = xen_cpu_ops; | |
93b1eab3 | 1070 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1071 | |
6b18ae3e | 1072 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1073 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1074 | x86_init.oem.banner = xen_banner; |
845b3944 TG |
1075 | |
1076 | x86_init.timers.timer_init = xen_time_init; | |
736decac TG |
1077 | x86_init.timers.setup_percpu_clockev = x86_init_noop; |
1078 | x86_cpuinit.setup_percpu_clockev = x86_init_noop; | |
6b18ae3e | 1079 | |
2d826404 | 1080 | x86_platform.calibrate_tsc = xen_tsc_khz; |
7bd867df FT |
1081 | x86_platform.get_wallclock = xen_get_wallclock; |
1082 | x86_platform.set_wallclock = xen_set_wallclock; | |
93b1eab3 | 1083 | |
ce2eef33 | 1084 | /* |
577eebea | 1085 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1086 | */ |
577eebea | 1087 | |
973df35e JF |
1088 | xen_init_mmu_ops(); |
1089 | ||
577eebea JF |
1090 | /* Prevent unwanted bits from being set in PTEs. */ |
1091 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
1092 | if (!xen_initial_domain()) | |
1093 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1094 | ||
1095 | __supported_pte_mask |= _PAGE_IOMAP; | |
1096 | ||
b75fe4e5 | 1097 | /* Work out if we support NX */ |
4763ed4d | 1098 | x86_configure_nx(); |
b75fe4e5 | 1099 | |
577eebea JF |
1100 | xen_setup_features(); |
1101 | ||
1102 | /* Get mfn list */ | |
1103 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1104 | xen_build_dynamic_phys_to_machine(); | |
1105 | ||
1106 | /* | |
1107 | * Set up kernel GDT and segment registers, mainly so that | |
1108 | * -fstack-protector code can be executed. | |
1109 | */ | |
1110 | xen_setup_stackprotector(); | |
0d1edf46 | 1111 | |
ce2eef33 | 1112 | xen_init_irq_ops(); |
e826fe1b JF |
1113 | xen_init_cpuid_mask(); |
1114 | ||
94a8c3c2 | 1115 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1116 | /* |
94a8c3c2 | 1117 | * set up the basic apic ops. |
ad66dd34 | 1118 | */ |
c1eeb2de | 1119 | set_xen_basic_apic_ops(); |
ad66dd34 | 1120 | #endif |
93b1eab3 | 1121 | |
e57778a1 JF |
1122 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1123 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1124 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1125 | } | |
1126 | ||
fefa629a JF |
1127 | machine_ops = xen_machine_ops; |
1128 | ||
38341432 JF |
1129 | /* |
1130 | * The only reliable way to retain the initial address of the | |
1131 | * percpu gdt_page is to remember it here, so we can go and | |
1132 | * mark it RW later, when the initial percpu area is freed. | |
1133 | */ | |
1134 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1135 | |
a9e7062d | 1136 | xen_smp_init(); |
5ead97c8 | 1137 | |
5ead97c8 JF |
1138 | pgd = (pgd_t *)xen_start_info->pt_base; |
1139 | ||
60223a32 | 1140 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1141 | possible map and a non-dummy shared_info. */ |
60223a32 | 1142 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1143 | |
55d80856 JF |
1144 | local_irq_disable(); |
1145 | early_boot_irqs_off(); | |
1146 | ||
084a2a4e | 1147 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1148 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
5ead97c8 | 1149 | |
084a2a4e | 1150 | init_mm.pgd = pgd; |
5ead97c8 JF |
1151 | |
1152 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1153 | ||
e68266b7 | 1154 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1155 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1156 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1157 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1158 | #else |
1159 | pv_info.kernel_rpl = 0; | |
1160 | #endif | |
5ead97c8 JF |
1161 | |
1162 | /* set the limit of our address space */ | |
fb1d8404 | 1163 | xen_reserve_top(); |
5ead97c8 | 1164 | |
7d087b68 | 1165 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1166 | /* set up basic CPUID stuff */ |
1167 | cpu_detect(&new_cpu_data); | |
1168 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1169 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1170 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1171 | #endif |
5ead97c8 JF |
1172 | |
1173 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1174 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1175 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1176 | ? __pa(xen_start_info->mod_start) : 0; | |
1177 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1178 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1179 | |
6e833587 | 1180 | if (!xen_initial_domain()) { |
83abc70a | 1181 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1182 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1183 | add_preferred_console("hvc", 0, NULL); |
5d990b62 CW |
1184 | } else { |
1185 | /* Make sure ACS will be enabled */ | |
1186 | pci_request_acs(); | |
9e124fe1 | 1187 | } |
5d990b62 | 1188 | |
b8c2d3df | 1189 | |
084a2a4e JF |
1190 | xen_raw_console_write("about to get started...\n"); |
1191 | ||
499d19b8 JF |
1192 | xen_setup_runstate_info(0); |
1193 | ||
5ead97c8 | 1194 | /* Start the world */ |
f5d36de0 | 1195 | #ifdef CONFIG_X86_32 |
f0d43100 | 1196 | i386_start_kernel(); |
f5d36de0 | 1197 | #else |
084a2a4e | 1198 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1199 | #endif |
5ead97c8 | 1200 | } |