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e1dab14c VK |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
14 | #include <linux/cpu.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
19 | #include <linux/hardirq.h> | |
20 | #include <linux/percpu.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
24 | #include <linux/kprobes.h> | |
25 | #include <linux/bootmem.h> | |
26 | #include <linux/export.h> | |
27 | #include <linux/mm.h> | |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
30 | #include <linux/console.h> | |
31 | #include <linux/pci.h> | |
32 | #include <linux/gfp.h> | |
33 | #include <linux/memblock.h> | |
34 | #include <linux/edd.h> | |
35 | #include <linux/frame.h> | |
36 | ||
37 | #include <xen/xen.h> | |
38 | #include <xen/events.h> | |
39 | #include <xen/interface/xen.h> | |
40 | #include <xen/interface/version.h> | |
41 | #include <xen/interface/physdev.h> | |
42 | #include <xen/interface/vcpu.h> | |
43 | #include <xen/interface/memory.h> | |
44 | #include <xen/interface/nmi.h> | |
45 | #include <xen/interface/xen-mca.h> | |
46 | #include <xen/features.h> | |
47 | #include <xen/page.h> | |
48 | #include <xen/hvc-console.h> | |
49 | #include <xen/acpi.h> | |
50 | ||
51 | #include <asm/paravirt.h> | |
52 | #include <asm/apic.h> | |
53 | #include <asm/page.h> | |
54 | #include <asm/xen/pci.h> | |
55 | #include <asm/xen/hypercall.h> | |
56 | #include <asm/xen/hypervisor.h> | |
57 | #include <asm/xen/cpuid.h> | |
58 | #include <asm/fixmap.h> | |
59 | #include <asm/processor.h> | |
60 | #include <asm/proto.h> | |
61 | #include <asm/msr-index.h> | |
62 | #include <asm/traps.h> | |
63 | #include <asm/setup.h> | |
64 | #include <asm/desc.h> | |
65 | #include <asm/pgalloc.h> | |
66 | #include <asm/pgtable.h> | |
67 | #include <asm/tlbflush.h> | |
68 | #include <asm/reboot.h> | |
69 | #include <asm/stackprotector.h> | |
70 | #include <asm/hypervisor.h> | |
71 | #include <asm/mach_traps.h> | |
72 | #include <asm/mwait.h> | |
73 | #include <asm/pci_x86.h> | |
74 | #include <asm/cpu.h> | |
75 | ||
76 | #ifdef CONFIG_ACPI | |
77 | #include <linux/acpi.h> | |
78 | #include <asm/acpi.h> | |
79 | #include <acpi/pdc_intel.h> | |
80 | #include <acpi/processor.h> | |
81 | #include <xen/interface/platform.h> | |
82 | #endif | |
83 | ||
84 | #include "xen-ops.h" | |
85 | #include "mmu.h" | |
86 | #include "smp.h" | |
87 | #include "multicalls.h" | |
88 | #include "pmu.h" | |
89 | ||
90 | void *xen_initial_gdt; | |
91 | ||
e1dab14c VK |
92 | static int xen_cpu_up_prepare_pv(unsigned int cpu); |
93 | static int xen_cpu_dead_pv(unsigned int cpu); | |
94 | ||
95 | struct tls_descs { | |
96 | struct desc_struct desc[3]; | |
97 | }; | |
98 | ||
99 | /* | |
100 | * Updating the 3 TLS descriptors in the GDT on every task switch is | |
101 | * surprisingly expensive so we avoid updating them if they haven't | |
102 | * changed. Since Xen writes different descriptors than the one | |
103 | * passed in the update_descriptor hypercall we keep shadow copies to | |
104 | * compare against. | |
105 | */ | |
106 | static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); | |
107 | ||
e1dab14c VK |
108 | static void __init xen_banner(void) |
109 | { | |
110 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); | |
111 | struct xen_extraversion extra; | |
112 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
113 | ||
989513a7 | 114 | pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); |
e1dab14c VK |
115 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
116 | version >> 16, version & 0xffff, extra.extraversion, | |
117 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); | |
118 | } | |
119 | /* Check if running on Xen version (major, minor) or later */ | |
120 | bool | |
121 | xen_running_on_version_or_later(unsigned int major, unsigned int minor) | |
122 | { | |
123 | unsigned int version; | |
124 | ||
125 | if (!xen_domain()) | |
126 | return false; | |
127 | ||
128 | version = HYPERVISOR_xen_version(XENVER_version, NULL); | |
129 | if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || | |
130 | ((version >> 16) > major)) | |
131 | return true; | |
132 | return false; | |
133 | } | |
134 | ||
e1dab14c VK |
135 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; |
136 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
137 | ||
138 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, | |
139 | unsigned int *cx, unsigned int *dx) | |
140 | { | |
141 | unsigned maskebx = ~0; | |
6807cf65 | 142 | |
e1dab14c VK |
143 | /* |
144 | * Mask out inconvenient features, to try and disable as many | |
145 | * unsupported kernel subsystems as possible. | |
146 | */ | |
147 | switch (*ax) { | |
e1dab14c VK |
148 | case CPUID_MWAIT_LEAF: |
149 | /* Synthesize the values.. */ | |
150 | *ax = 0; | |
151 | *bx = 0; | |
152 | *cx = cpuid_leaf5_ecx_val; | |
153 | *dx = cpuid_leaf5_edx_val; | |
154 | return; | |
155 | ||
e1dab14c VK |
156 | case 0xb: |
157 | /* Suppress extended topology stuff */ | |
158 | maskebx = 0; | |
159 | break; | |
160 | } | |
161 | ||
162 | asm(XEN_EMULATE_PREFIX "cpuid" | |
163 | : "=a" (*ax), | |
164 | "=b" (*bx), | |
165 | "=c" (*cx), | |
166 | "=d" (*dx) | |
167 | : "0" (*ax), "2" (*cx)); | |
168 | ||
169 | *bx &= maskebx; | |
e1dab14c VK |
170 | } |
171 | STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ | |
172 | ||
173 | static bool __init xen_check_mwait(void) | |
174 | { | |
175 | #ifdef CONFIG_ACPI | |
176 | struct xen_platform_op op = { | |
177 | .cmd = XENPF_set_processor_pminfo, | |
178 | .u.set_pminfo.id = -1, | |
179 | .u.set_pminfo.type = XEN_PM_PDC, | |
180 | }; | |
181 | uint32_t buf[3]; | |
182 | unsigned int ax, bx, cx, dx; | |
183 | unsigned int mwait_mask; | |
184 | ||
185 | /* We need to determine whether it is OK to expose the MWAIT | |
186 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
187 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
188 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
189 | * checks against). The hypervisor won't expose the MWAIT flag because | |
190 | * it would break backwards compatibility; so we will find out directly | |
191 | * from the hardware and hypercall. | |
192 | */ | |
193 | if (!xen_initial_domain()) | |
194 | return false; | |
195 | ||
196 | /* | |
197 | * When running under platform earlier than Xen4.2, do not expose | |
198 | * mwait, to avoid the risk of loading native acpi pad driver | |
199 | */ | |
200 | if (!xen_running_on_version_or_later(4, 2)) | |
201 | return false; | |
202 | ||
203 | ax = 1; | |
204 | cx = 0; | |
205 | ||
206 | native_cpuid(&ax, &bx, &cx, &dx); | |
207 | ||
208 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
209 | (1 << (X86_FEATURE_MWAIT % 32)); | |
210 | ||
211 | if ((cx & mwait_mask) != mwait_mask) | |
212 | return false; | |
213 | ||
214 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
215 | * ecx and edx. The hypercall provides only partial information. | |
216 | */ | |
217 | ||
218 | ax = CPUID_MWAIT_LEAF; | |
219 | bx = 0; | |
220 | cx = 0; | |
221 | dx = 0; | |
222 | ||
223 | native_cpuid(&ax, &bx, &cx, &dx); | |
224 | ||
225 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
226 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
227 | */ | |
228 | buf[0] = ACPI_PDC_REVISION_ID; | |
229 | buf[1] = 1; | |
230 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
231 | ||
232 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
233 | ||
234 | if ((HYPERVISOR_platform_op(&op) == 0) && | |
235 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
236 | cpuid_leaf5_ecx_val = cx; | |
237 | cpuid_leaf5_edx_val = dx; | |
238 | } | |
239 | return true; | |
240 | #else | |
241 | return false; | |
242 | #endif | |
243 | } | |
e1dab14c | 244 | |
6807cf65 JG |
245 | static bool __init xen_check_xsave(void) |
246 | { | |
40f4ac0b | 247 | unsigned int cx, xsave_mask; |
e1dab14c | 248 | |
40f4ac0b JG |
249 | cx = cpuid_ecx(1); |
250 | ||
251 | xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | | |
252 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
253 | ||
254 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
255 | return (cx & xsave_mask) == xsave_mask; | |
e1dab14c VK |
256 | } |
257 | ||
0808e80c JG |
258 | static void __init xen_init_capabilities(void) |
259 | { | |
0808e80c | 260 | setup_force_cpu_cap(X86_FEATURE_XENPV); |
3ee99df3 | 261 | setup_clear_cpu_cap(X86_FEATURE_DCA); |
fd9145fd | 262 | setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); |
88f3256f | 263 | setup_clear_cpu_cap(X86_FEATURE_MTRR); |
aa107156 | 264 | setup_clear_cpu_cap(X86_FEATURE_ACC); |
e657fccb | 265 | setup_clear_cpu_cap(X86_FEATURE_X2APIC); |
f2f931c6 | 266 | setup_clear_cpu_cap(X86_FEATURE_SME); |
b778d6bf | 267 | |
660da7c9 AL |
268 | /* |
269 | * Xen PV would need some work to support PCID: CR3 handling as well | |
270 | * as xen_flush_tlb_others() would need updating. | |
271 | */ | |
272 | setup_clear_cpu_cap(X86_FEATURE_PCID); | |
b778d6bf JG |
273 | |
274 | if (!xen_initial_domain()) | |
275 | setup_clear_cpu_cap(X86_FEATURE_ACPI); | |
ea01598b JG |
276 | |
277 | if (xen_check_mwait()) | |
278 | setup_force_cpu_cap(X86_FEATURE_MWAIT); | |
279 | else | |
280 | setup_clear_cpu_cap(X86_FEATURE_MWAIT); | |
6807cf65 | 281 | |
40f4ac0b | 282 | if (!xen_check_xsave()) { |
6807cf65 JG |
283 | setup_clear_cpu_cap(X86_FEATURE_XSAVE); |
284 | setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); | |
285 | } | |
0808e80c JG |
286 | } |
287 | ||
e1dab14c VK |
288 | static void xen_set_debugreg(int reg, unsigned long val) |
289 | { | |
290 | HYPERVISOR_set_debugreg(reg, val); | |
291 | } | |
292 | ||
293 | static unsigned long xen_get_debugreg(int reg) | |
294 | { | |
295 | return HYPERVISOR_get_debugreg(reg); | |
296 | } | |
297 | ||
298 | static void xen_end_context_switch(struct task_struct *next) | |
299 | { | |
300 | xen_mc_flush(); | |
301 | paravirt_end_context_switch(next); | |
302 | } | |
303 | ||
304 | static unsigned long xen_store_tr(void) | |
305 | { | |
306 | return 0; | |
307 | } | |
308 | ||
309 | /* | |
310 | * Set the page permissions for a particular virtual address. If the | |
311 | * address is a vmalloc mapping (or other non-linear mapping), then | |
312 | * find the linear mapping of the page and also set its protections to | |
313 | * match. | |
314 | */ | |
315 | static void set_aliased_prot(void *v, pgprot_t prot) | |
316 | { | |
317 | int level; | |
318 | pte_t *ptep; | |
319 | pte_t pte; | |
320 | unsigned long pfn; | |
321 | struct page *page; | |
322 | unsigned char dummy; | |
323 | ||
324 | ptep = lookup_address((unsigned long)v, &level); | |
325 | BUG_ON(ptep == NULL); | |
326 | ||
327 | pfn = pte_pfn(*ptep); | |
328 | page = pfn_to_page(pfn); | |
329 | ||
330 | pte = pfn_pte(pfn, prot); | |
331 | ||
332 | /* | |
333 | * Careful: update_va_mapping() will fail if the virtual address | |
334 | * we're poking isn't populated in the page tables. We don't | |
335 | * need to worry about the direct map (that's always in the page | |
336 | * tables), but we need to be careful about vmap space. In | |
337 | * particular, the top level page table can lazily propagate | |
338 | * entries between processes, so if we've switched mms since we | |
339 | * vmapped the target in the first place, we might not have the | |
340 | * top-level page table entry populated. | |
341 | * | |
342 | * We disable preemption because we want the same mm active when | |
343 | * we probe the target and when we issue the hypercall. We'll | |
344 | * have the same nominal mm, but if we're a kernel thread, lazy | |
345 | * mm dropping could change our pgd. | |
346 | * | |
347 | * Out of an abundance of caution, this uses __get_user() to fault | |
348 | * in the target address just in case there's some obscure case | |
349 | * in which the target address isn't readable. | |
350 | */ | |
351 | ||
352 | preempt_disable(); | |
353 | ||
354 | probe_kernel_read(&dummy, v, 1); | |
355 | ||
356 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
357 | BUG(); | |
358 | ||
359 | if (!PageHighMem(page)) { | |
360 | void *av = __va(PFN_PHYS(pfn)); | |
361 | ||
362 | if (av != v) | |
363 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
364 | BUG(); | |
365 | } else | |
366 | kmap_flush_unused(); | |
367 | ||
368 | preempt_enable(); | |
369 | } | |
370 | ||
371 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) | |
372 | { | |
373 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; | |
374 | int i; | |
375 | ||
376 | /* | |
377 | * We need to mark the all aliases of the LDT pages RO. We | |
378 | * don't need to call vm_flush_aliases(), though, since that's | |
379 | * only responsible for flushing aliases out the TLBs, not the | |
380 | * page tables, and Xen will flush the TLB for us if needed. | |
381 | * | |
382 | * To avoid confusing future readers: none of this is necessary | |
383 | * to load the LDT. The hypervisor only checks this when the | |
384 | * LDT is faulted in due to subsequent descriptor access. | |
385 | */ | |
386 | ||
387 | for (i = 0; i < entries; i += entries_per_page) | |
388 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
389 | } | |
390 | ||
391 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
392 | { | |
393 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; | |
394 | int i; | |
395 | ||
396 | for (i = 0; i < entries; i += entries_per_page) | |
397 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
398 | } | |
399 | ||
400 | static void xen_set_ldt(const void *addr, unsigned entries) | |
401 | { | |
402 | struct mmuext_op *op; | |
403 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
404 | ||
405 | trace_xen_cpu_set_ldt(addr, entries); | |
406 | ||
407 | op = mcs.args; | |
408 | op->cmd = MMUEXT_SET_LDT; | |
409 | op->arg1.linear_addr = (unsigned long)addr; | |
410 | op->arg2.nr_ents = entries; | |
411 | ||
412 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
413 | ||
414 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
415 | } | |
416 | ||
417 | static void xen_load_gdt(const struct desc_ptr *dtr) | |
418 | { | |
419 | unsigned long va = dtr->address; | |
420 | unsigned int size = dtr->size + 1; | |
421 | unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); | |
422 | unsigned long frames[pages]; | |
423 | int f; | |
424 | ||
425 | /* | |
426 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
427 | * 8-byte entries, or 16 4k pages.. | |
428 | */ | |
429 | ||
430 | BUG_ON(size > 65536); | |
431 | BUG_ON(va & ~PAGE_MASK); | |
432 | ||
433 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
434 | int level; | |
435 | pte_t *ptep; | |
436 | unsigned long pfn, mfn; | |
437 | void *virt; | |
438 | ||
439 | /* | |
440 | * The GDT is per-cpu and is in the percpu data area. | |
441 | * That can be virtually mapped, so we need to do a | |
442 | * page-walk to get the underlying MFN for the | |
443 | * hypercall. The page can also be in the kernel's | |
444 | * linear range, so we need to RO that mapping too. | |
445 | */ | |
446 | ptep = lookup_address(va, &level); | |
447 | BUG_ON(ptep == NULL); | |
448 | ||
449 | pfn = pte_pfn(*ptep); | |
450 | mfn = pfn_to_mfn(pfn); | |
451 | virt = __va(PFN_PHYS(pfn)); | |
452 | ||
453 | frames[f] = mfn; | |
454 | ||
455 | make_lowmem_page_readonly((void *)va); | |
456 | make_lowmem_page_readonly(virt); | |
457 | } | |
458 | ||
459 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
460 | BUG(); | |
461 | } | |
462 | ||
463 | /* | |
464 | * load_gdt for early boot, when the gdt is only mapped once | |
465 | */ | |
466 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) | |
467 | { | |
468 | unsigned long va = dtr->address; | |
469 | unsigned int size = dtr->size + 1; | |
470 | unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); | |
471 | unsigned long frames[pages]; | |
472 | int f; | |
473 | ||
474 | /* | |
475 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
476 | * 8-byte entries, or 16 4k pages.. | |
477 | */ | |
478 | ||
479 | BUG_ON(size > 65536); | |
480 | BUG_ON(va & ~PAGE_MASK); | |
481 | ||
482 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
483 | pte_t pte; | |
484 | unsigned long pfn, mfn; | |
485 | ||
486 | pfn = virt_to_pfn(va); | |
487 | mfn = pfn_to_mfn(pfn); | |
488 | ||
489 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
490 | ||
491 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
492 | BUG(); | |
493 | ||
494 | frames[f] = mfn; | |
495 | } | |
496 | ||
497 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
498 | BUG(); | |
499 | } | |
500 | ||
501 | static inline bool desc_equal(const struct desc_struct *d1, | |
502 | const struct desc_struct *d2) | |
503 | { | |
9a98e778 | 504 | return !memcmp(d1, d2, sizeof(*d1)); |
e1dab14c VK |
505 | } |
506 | ||
507 | static void load_TLS_descriptor(struct thread_struct *t, | |
508 | unsigned int cpu, unsigned int i) | |
509 | { | |
510 | struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; | |
511 | struct desc_struct *gdt; | |
512 | xmaddr_t maddr; | |
513 | struct multicall_space mc; | |
514 | ||
515 | if (desc_equal(shadow, &t->tls_array[i])) | |
516 | return; | |
517 | ||
518 | *shadow = t->tls_array[i]; | |
519 | ||
520 | gdt = get_cpu_gdt_rw(cpu); | |
521 | maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
522 | mc = __xen_mc_entry(0); | |
523 | ||
524 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
525 | } | |
526 | ||
527 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
528 | { | |
529 | /* | |
530 | * XXX sleazy hack: If we're being called in a lazy-cpu zone | |
531 | * and lazy gs handling is enabled, it means we're in a | |
532 | * context switch, and %gs has just been saved. This means we | |
533 | * can zero it out to prevent faults on exit from the | |
534 | * hypervisor if the next process has no %gs. Either way, it | |
535 | * has been saved, and the new value will get loaded properly. | |
536 | * This will go away as soon as Xen has been modified to not | |
537 | * save/restore %gs for normal hypercalls. | |
538 | * | |
539 | * On x86_64, this hack is not used for %gs, because gs points | |
540 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
541 | * must not zero %gs on x86_64 | |
542 | * | |
543 | * For x86_64, we need to zero %fs, otherwise we may get an | |
544 | * exception between the new %fs descriptor being loaded and | |
545 | * %fs being effectively cleared at __switch_to(). | |
546 | */ | |
547 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { | |
548 | #ifdef CONFIG_X86_32 | |
549 | lazy_load_gs(0); | |
550 | #else | |
551 | loadsegment(fs, 0); | |
552 | #endif | |
553 | } | |
554 | ||
555 | xen_mc_batch(); | |
556 | ||
557 | load_TLS_descriptor(t, cpu, 0); | |
558 | load_TLS_descriptor(t, cpu, 1); | |
559 | load_TLS_descriptor(t, cpu, 2); | |
560 | ||
561 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
562 | } | |
563 | ||
564 | #ifdef CONFIG_X86_64 | |
565 | static void xen_load_gs_index(unsigned int idx) | |
566 | { | |
567 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
568 | BUG(); | |
569 | } | |
570 | #endif | |
571 | ||
572 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
573 | const void *ptr) | |
574 | { | |
575 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); | |
576 | u64 entry = *(u64 *)ptr; | |
577 | ||
578 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); | |
579 | ||
580 | preempt_disable(); | |
581 | ||
582 | xen_mc_flush(); | |
583 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
584 | BUG(); | |
585 | ||
586 | preempt_enable(); | |
587 | } | |
588 | ||
5878d5d6 JG |
589 | #ifdef CONFIG_X86_64 |
590 | struct trap_array_entry { | |
591 | void (*orig)(void); | |
592 | void (*xen)(void); | |
593 | bool ist_okay; | |
594 | }; | |
595 | ||
596 | static struct trap_array_entry trap_array[] = { | |
597 | { debug, xen_xendebug, true }, | |
598 | { int3, xen_xenint3, true }, | |
599 | { double_fault, xen_double_fault, true }, | |
600 | #ifdef CONFIG_X86_MCE | |
601 | { machine_check, xen_machine_check, true }, | |
602 | #endif | |
603 | { nmi, xen_nmi, true }, | |
604 | { overflow, xen_overflow, false }, | |
605 | #ifdef CONFIG_IA32_EMULATION | |
606 | { entry_INT80_compat, xen_entry_INT80_compat, false }, | |
607 | #endif | |
608 | { page_fault, xen_page_fault, false }, | |
609 | { divide_error, xen_divide_error, false }, | |
610 | { bounds, xen_bounds, false }, | |
611 | { invalid_op, xen_invalid_op, false }, | |
612 | { device_not_available, xen_device_not_available, false }, | |
613 | { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false }, | |
614 | { invalid_TSS, xen_invalid_TSS, false }, | |
615 | { segment_not_present, xen_segment_not_present, false }, | |
616 | { stack_segment, xen_stack_segment, false }, | |
617 | { general_protection, xen_general_protection, false }, | |
618 | { spurious_interrupt_bug, xen_spurious_interrupt_bug, false }, | |
619 | { coprocessor_error, xen_coprocessor_error, false }, | |
620 | { alignment_check, xen_alignment_check, false }, | |
621 | { simd_coprocessor_error, xen_simd_coprocessor_error, false }, | |
622 | }; | |
623 | ||
624 | static bool get_trap_addr(void **addr, unsigned int ist) | |
625 | { | |
626 | unsigned int nr; | |
627 | bool ist_okay = false; | |
628 | ||
629 | /* | |
630 | * Replace trap handler addresses by Xen specific ones. | |
631 | * Check for known traps using IST and whitelist them. | |
632 | * The debugger ones are the only ones we care about. | |
633 | * Xen will handle faults like double_fault, * so we should never see | |
634 | * them. Warn if there's an unexpected IST-using fault handler. | |
635 | */ | |
636 | for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { | |
637 | struct trap_array_entry *entry = trap_array + nr; | |
638 | ||
639 | if (*addr == entry->orig) { | |
640 | *addr = entry->xen; | |
641 | ist_okay = entry->ist_okay; | |
642 | break; | |
643 | } | |
644 | } | |
645 | ||
646 | if (WARN_ON(ist != 0 && !ist_okay)) | |
647 | return false; | |
648 | ||
649 | return true; | |
650 | } | |
651 | #endif | |
652 | ||
e1dab14c VK |
653 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
654 | struct trap_info *info) | |
655 | { | |
656 | unsigned long addr; | |
657 | ||
64b163fa | 658 | if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) |
e1dab14c VK |
659 | return 0; |
660 | ||
661 | info->vector = vector; | |
662 | ||
64b163fa | 663 | addr = gate_offset(val); |
e1dab14c | 664 | #ifdef CONFIG_X86_64 |
5878d5d6 | 665 | if (!get_trap_addr((void **)&addr, val->bits.ist)) |
e1dab14c | 666 | return 0; |
e1dab14c VK |
667 | #endif /* CONFIG_X86_64 */ |
668 | info->address = addr; | |
669 | ||
64b163fa TG |
670 | info->cs = gate_segment(val); |
671 | info->flags = val->bits.dpl; | |
e1dab14c | 672 | /* interrupt gates clear IF */ |
64b163fa | 673 | if (val->bits.type == GATE_INTERRUPT) |
e1dab14c VK |
674 | info->flags |= 1 << 2; |
675 | ||
676 | return 1; | |
677 | } | |
678 | ||
679 | /* Locations of each CPU's IDT */ | |
680 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); | |
681 | ||
682 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
683 | also update Xen. */ | |
684 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) | |
685 | { | |
686 | unsigned long p = (unsigned long)&dt[entrynum]; | |
687 | unsigned long start, end; | |
688 | ||
689 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); | |
690 | ||
691 | preempt_disable(); | |
692 | ||
693 | start = __this_cpu_read(idt_desc.address); | |
694 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
695 | ||
696 | xen_mc_flush(); | |
697 | ||
698 | native_write_idt_entry(dt, entrynum, g); | |
699 | ||
700 | if (p >= start && (p + 8) <= end) { | |
701 | struct trap_info info[2]; | |
702 | ||
703 | info[1].address = 0; | |
704 | ||
705 | if (cvt_gate_to_trap(entrynum, g, &info[0])) | |
706 | if (HYPERVISOR_set_trap_table(info)) | |
707 | BUG(); | |
708 | } | |
709 | ||
710 | preempt_enable(); | |
711 | } | |
712 | ||
713 | static void xen_convert_trap_info(const struct desc_ptr *desc, | |
714 | struct trap_info *traps) | |
715 | { | |
716 | unsigned in, out, count; | |
717 | ||
718 | count = (desc->size+1) / sizeof(gate_desc); | |
719 | BUG_ON(count > 256); | |
720 | ||
721 | for (in = out = 0; in < count; in++) { | |
722 | gate_desc *entry = (gate_desc *)(desc->address) + in; | |
723 | ||
724 | if (cvt_gate_to_trap(in, entry, &traps[out])) | |
725 | out++; | |
726 | } | |
727 | traps[out].address = 0; | |
728 | } | |
729 | ||
730 | void xen_copy_trap_info(struct trap_info *traps) | |
731 | { | |
732 | const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); | |
733 | ||
734 | xen_convert_trap_info(desc, traps); | |
735 | } | |
736 | ||
737 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
738 | hold a spinlock to protect the static traps[] array (static because | |
739 | it avoids allocation, and saves stack space). */ | |
740 | static void xen_load_idt(const struct desc_ptr *desc) | |
741 | { | |
742 | static DEFINE_SPINLOCK(lock); | |
743 | static struct trap_info traps[257]; | |
744 | ||
745 | trace_xen_cpu_load_idt(desc); | |
746 | ||
747 | spin_lock(&lock); | |
748 | ||
749 | memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); | |
750 | ||
751 | xen_convert_trap_info(desc, traps); | |
752 | ||
753 | xen_mc_flush(); | |
754 | if (HYPERVISOR_set_trap_table(traps)) | |
755 | BUG(); | |
756 | ||
757 | spin_unlock(&lock); | |
758 | } | |
759 | ||
760 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
761 | they're handled differently. */ | |
762 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
763 | const void *desc, int type) | |
764 | { | |
765 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); | |
766 | ||
767 | preempt_disable(); | |
768 | ||
769 | switch (type) { | |
770 | case DESC_LDT: | |
771 | case DESC_TSS: | |
772 | /* ignore */ | |
773 | break; | |
774 | ||
775 | default: { | |
776 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); | |
777 | ||
778 | xen_mc_flush(); | |
779 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
780 | BUG(); | |
781 | } | |
782 | ||
783 | } | |
784 | ||
785 | preempt_enable(); | |
786 | } | |
787 | ||
788 | /* | |
789 | * Version of write_gdt_entry for use at early boot-time needed to | |
790 | * update an entry as simply as possible. | |
791 | */ | |
792 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, | |
793 | const void *desc, int type) | |
794 | { | |
795 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); | |
796 | ||
797 | switch (type) { | |
798 | case DESC_LDT: | |
799 | case DESC_TSS: | |
800 | /* ignore */ | |
801 | break; | |
802 | ||
803 | default: { | |
804 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
805 | ||
806 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
807 | dt[entry] = *(struct desc_struct *)desc; | |
808 | } | |
809 | ||
810 | } | |
811 | } | |
812 | ||
813 | static void xen_load_sp0(struct tss_struct *tss, | |
814 | struct thread_struct *thread) | |
815 | { | |
816 | struct multicall_space mcs; | |
817 | ||
818 | mcs = xen_mc_entry(0); | |
819 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); | |
820 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
821 | tss->x86_tss.sp0 = thread->sp0; | |
822 | } | |
823 | ||
824 | void xen_set_iopl_mask(unsigned mask) | |
825 | { | |
826 | struct physdev_set_iopl set_iopl; | |
827 | ||
828 | /* Force the change at ring 0. */ | |
829 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
830 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
831 | } | |
832 | ||
833 | static void xen_io_delay(void) | |
834 | { | |
835 | } | |
836 | ||
837 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); | |
838 | ||
839 | static unsigned long xen_read_cr0(void) | |
840 | { | |
841 | unsigned long cr0 = this_cpu_read(xen_cr0_value); | |
842 | ||
843 | if (unlikely(cr0 == 0)) { | |
844 | cr0 = native_read_cr0(); | |
845 | this_cpu_write(xen_cr0_value, cr0); | |
846 | } | |
847 | ||
848 | return cr0; | |
849 | } | |
850 | ||
851 | static void xen_write_cr0(unsigned long cr0) | |
852 | { | |
853 | struct multicall_space mcs; | |
854 | ||
855 | this_cpu_write(xen_cr0_value, cr0); | |
856 | ||
857 | /* Only pay attention to cr0.TS; everything else is | |
858 | ignored. */ | |
859 | mcs = xen_mc_entry(0); | |
860 | ||
861 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
862 | ||
863 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
864 | } | |
865 | ||
866 | static void xen_write_cr4(unsigned long cr4) | |
867 | { | |
868 | cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); | |
869 | ||
870 | native_write_cr4(cr4); | |
871 | } | |
872 | #ifdef CONFIG_X86_64 | |
873 | static inline unsigned long xen_read_cr8(void) | |
874 | { | |
875 | return 0; | |
876 | } | |
877 | static inline void xen_write_cr8(unsigned long val) | |
878 | { | |
879 | BUG_ON(val); | |
880 | } | |
881 | #endif | |
882 | ||
883 | static u64 xen_read_msr_safe(unsigned int msr, int *err) | |
884 | { | |
885 | u64 val; | |
886 | ||
887 | if (pmu_msr_read(msr, &val, err)) | |
888 | return val; | |
889 | ||
890 | val = native_read_msr_safe(msr, err); | |
891 | switch (msr) { | |
892 | case MSR_IA32_APICBASE: | |
893 | #ifdef CONFIG_X86_X2APIC | |
894 | if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) | |
895 | #endif | |
896 | val &= ~X2APIC_ENABLE; | |
897 | break; | |
898 | } | |
899 | return val; | |
900 | } | |
901 | ||
902 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) | |
903 | { | |
904 | int ret; | |
905 | ||
906 | ret = 0; | |
907 | ||
908 | switch (msr) { | |
909 | #ifdef CONFIG_X86_64 | |
910 | unsigned which; | |
911 | u64 base; | |
912 | ||
913 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
914 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
915 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
916 | ||
917 | set: | |
918 | base = ((u64)high << 32) | low; | |
919 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
920 | ret = -EIO; | |
921 | break; | |
922 | #endif | |
923 | ||
924 | case MSR_STAR: | |
925 | case MSR_CSTAR: | |
926 | case MSR_LSTAR: | |
927 | case MSR_SYSCALL_MASK: | |
928 | case MSR_IA32_SYSENTER_CS: | |
929 | case MSR_IA32_SYSENTER_ESP: | |
930 | case MSR_IA32_SYSENTER_EIP: | |
931 | /* Fast syscall setup is all done in hypercalls, so | |
932 | these are all ignored. Stub them out here to stop | |
933 | Xen console noise. */ | |
934 | break; | |
935 | ||
936 | default: | |
937 | if (!pmu_msr_write(msr, low, high, &ret)) | |
938 | ret = native_write_msr_safe(msr, low, high); | |
939 | } | |
940 | ||
941 | return ret; | |
942 | } | |
943 | ||
944 | static u64 xen_read_msr(unsigned int msr) | |
945 | { | |
946 | /* | |
947 | * This will silently swallow a #GP from RDMSR. It may be worth | |
948 | * changing that. | |
949 | */ | |
950 | int err; | |
951 | ||
952 | return xen_read_msr_safe(msr, &err); | |
953 | } | |
954 | ||
955 | static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) | |
956 | { | |
957 | /* | |
958 | * This will silently swallow a #GP from WRMSR. It may be worth | |
959 | * changing that. | |
960 | */ | |
961 | xen_write_msr_safe(msr, low, high); | |
962 | } | |
963 | ||
964 | void xen_setup_shared_info(void) | |
965 | { | |
989513a7 | 966 | set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); |
e1dab14c | 967 | |
989513a7 JG |
968 | HYPERVISOR_shared_info = |
969 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
e1dab14c | 970 | |
e1dab14c | 971 | xen_setup_mfn_list_list(); |
d162809f | 972 | |
0e4d5837 AA |
973 | if (system_state == SYSTEM_BOOTING) { |
974 | #ifndef CONFIG_SMP | |
975 | /* | |
976 | * In UP this is as good a place as any to set up shared info. | |
977 | * Limit this to boot only, at restore vcpu setup is done via | |
978 | * xen_vcpu_restore(). | |
979 | */ | |
980 | xen_setup_vcpu_info_placement(); | |
981 | #endif | |
982 | /* | |
983 | * Now that shared info is set up we can start using routines | |
984 | * that point to pvclock area. | |
985 | */ | |
d162809f | 986 | xen_init_time_ops(); |
0e4d5837 | 987 | } |
e1dab14c VK |
988 | } |
989 | ||
990 | /* This is called once we have the cpu_possible_mask */ | |
0e4d5837 | 991 | void __ref xen_setup_vcpu_info_placement(void) |
e1dab14c VK |
992 | { |
993 | int cpu; | |
994 | ||
995 | for_each_possible_cpu(cpu) { | |
996 | /* Set up direct vCPU id mapping for PV guests. */ | |
997 | per_cpu(xen_vcpu_id, cpu) = cpu; | |
c9b5d98b AA |
998 | |
999 | /* | |
1000 | * xen_vcpu_setup(cpu) can fail -- in which case it | |
1001 | * falls back to the shared_info version for cpus | |
1002 | * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. | |
1003 | * | |
1004 | * xen_cpu_up_prepare_pv() handles the rest by failing | |
1005 | * them in hotplug. | |
1006 | */ | |
1007 | (void) xen_vcpu_setup(cpu); | |
e1dab14c VK |
1008 | } |
1009 | ||
1010 | /* | |
1011 | * xen_vcpu_setup managed to place the vcpu_info within the | |
1012 | * percpu area for all cpus, so make use of it. | |
1013 | */ | |
1014 | if (xen_have_vcpu_info_placement) { | |
1015 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); | |
1016 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1017 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1018 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
1019 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; | |
1020 | } | |
1021 | } | |
1022 | ||
e1dab14c VK |
1023 | static const struct pv_info xen_info __initconst = { |
1024 | .shared_kernel_pmd = 0, | |
1025 | ||
1026 | #ifdef CONFIG_X86_64 | |
1027 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1028 | #endif | |
1029 | .name = "Xen", | |
1030 | }; | |
1031 | ||
e1dab14c VK |
1032 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
1033 | .cpuid = xen_cpuid, | |
1034 | ||
1035 | .set_debugreg = xen_set_debugreg, | |
1036 | .get_debugreg = xen_get_debugreg, | |
1037 | ||
1038 | .read_cr0 = xen_read_cr0, | |
1039 | .write_cr0 = xen_write_cr0, | |
1040 | ||
e1dab14c VK |
1041 | .write_cr4 = xen_write_cr4, |
1042 | ||
1043 | #ifdef CONFIG_X86_64 | |
1044 | .read_cr8 = xen_read_cr8, | |
1045 | .write_cr8 = xen_write_cr8, | |
1046 | #endif | |
1047 | ||
1048 | .wbinvd = native_wbinvd, | |
1049 | ||
1050 | .read_msr = xen_read_msr, | |
1051 | .write_msr = xen_write_msr, | |
1052 | ||
1053 | .read_msr_safe = xen_read_msr_safe, | |
1054 | .write_msr_safe = xen_write_msr_safe, | |
1055 | ||
1056 | .read_pmc = xen_read_pmc, | |
1057 | ||
1058 | .iret = xen_iret, | |
1059 | #ifdef CONFIG_X86_64 | |
1060 | .usergs_sysret64 = xen_sysret64, | |
1061 | #endif | |
1062 | ||
1063 | .load_tr_desc = paravirt_nop, | |
1064 | .set_ldt = xen_set_ldt, | |
1065 | .load_gdt = xen_load_gdt, | |
1066 | .load_idt = xen_load_idt, | |
1067 | .load_tls = xen_load_tls, | |
1068 | #ifdef CONFIG_X86_64 | |
1069 | .load_gs_index = xen_load_gs_index, | |
1070 | #endif | |
1071 | ||
1072 | .alloc_ldt = xen_alloc_ldt, | |
1073 | .free_ldt = xen_free_ldt, | |
1074 | ||
e1dab14c VK |
1075 | .store_tr = xen_store_tr, |
1076 | ||
1077 | .write_ldt_entry = xen_write_ldt_entry, | |
1078 | .write_gdt_entry = xen_write_gdt_entry, | |
1079 | .write_idt_entry = xen_write_idt_entry, | |
1080 | .load_sp0 = xen_load_sp0, | |
1081 | ||
1082 | .set_iopl_mask = xen_set_iopl_mask, | |
1083 | .io_delay = xen_io_delay, | |
1084 | ||
1085 | /* Xen takes care of %gs when switching to usermode for us */ | |
1086 | .swapgs = paravirt_nop, | |
1087 | ||
1088 | .start_context_switch = paravirt_start_context_switch, | |
1089 | .end_context_switch = xen_end_context_switch, | |
1090 | }; | |
1091 | ||
1092 | static void xen_restart(char *msg) | |
1093 | { | |
1094 | xen_reboot(SHUTDOWN_reboot); | |
1095 | } | |
1096 | ||
1097 | static void xen_machine_halt(void) | |
1098 | { | |
1099 | xen_reboot(SHUTDOWN_poweroff); | |
1100 | } | |
1101 | ||
1102 | static void xen_machine_power_off(void) | |
1103 | { | |
1104 | if (pm_power_off) | |
1105 | pm_power_off(); | |
1106 | xen_reboot(SHUTDOWN_poweroff); | |
1107 | } | |
1108 | ||
1109 | static void xen_crash_shutdown(struct pt_regs *regs) | |
1110 | { | |
1111 | xen_reboot(SHUTDOWN_crash); | |
1112 | } | |
1113 | ||
1114 | static const struct machine_ops xen_machine_ops __initconst = { | |
1115 | .restart = xen_restart, | |
1116 | .halt = xen_machine_halt, | |
1117 | .power_off = xen_machine_power_off, | |
1118 | .shutdown = xen_machine_halt, | |
1119 | .crash_shutdown = xen_crash_shutdown, | |
1120 | .emergency_restart = xen_emergency_restart, | |
1121 | }; | |
1122 | ||
1123 | static unsigned char xen_get_nmi_reason(void) | |
1124 | { | |
1125 | unsigned char reason = 0; | |
1126 | ||
1127 | /* Construct a value which looks like it came from port 0x61. */ | |
1128 | if (test_bit(_XEN_NMIREASON_io_error, | |
1129 | &HYPERVISOR_shared_info->arch.nmi_reason)) | |
1130 | reason |= NMI_REASON_IOCHK; | |
1131 | if (test_bit(_XEN_NMIREASON_pci_serr, | |
1132 | &HYPERVISOR_shared_info->arch.nmi_reason)) | |
1133 | reason |= NMI_REASON_SERR; | |
1134 | ||
1135 | return reason; | |
1136 | } | |
1137 | ||
1138 | static void __init xen_boot_params_init_edd(void) | |
1139 | { | |
1140 | #if IS_ENABLED(CONFIG_EDD) | |
1141 | struct xen_platform_op op; | |
1142 | struct edd_info *edd_info; | |
1143 | u32 *mbr_signature; | |
1144 | unsigned nr; | |
1145 | int ret; | |
1146 | ||
1147 | edd_info = boot_params.eddbuf; | |
1148 | mbr_signature = boot_params.edd_mbr_sig_buffer; | |
1149 | ||
1150 | op.cmd = XENPF_firmware_info; | |
1151 | ||
1152 | op.u.firmware_info.type = XEN_FW_DISK_INFO; | |
1153 | for (nr = 0; nr < EDDMAXNR; nr++) { | |
1154 | struct edd_info *info = edd_info + nr; | |
1155 | ||
1156 | op.u.firmware_info.index = nr; | |
1157 | info->params.length = sizeof(info->params); | |
1158 | set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, | |
1159 | &info->params); | |
1160 | ret = HYPERVISOR_platform_op(&op); | |
1161 | if (ret) | |
1162 | break; | |
1163 | ||
1164 | #define C(x) info->x = op.u.firmware_info.u.disk_info.x | |
1165 | C(device); | |
1166 | C(version); | |
1167 | C(interface_support); | |
1168 | C(legacy_max_cylinder); | |
1169 | C(legacy_max_head); | |
1170 | C(legacy_sectors_per_track); | |
1171 | #undef C | |
1172 | } | |
1173 | boot_params.eddbuf_entries = nr; | |
1174 | ||
1175 | op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; | |
1176 | for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { | |
1177 | op.u.firmware_info.index = nr; | |
1178 | ret = HYPERVISOR_platform_op(&op); | |
1179 | if (ret) | |
1180 | break; | |
1181 | mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; | |
1182 | } | |
1183 | boot_params.edd_mbr_sig_buf_entries = nr; | |
1184 | #endif | |
1185 | } | |
1186 | ||
1187 | /* | |
1188 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1189 | * we do this, we have to be careful not to call any stack-protected | |
1190 | * function, which is most of the kernel. | |
1191 | */ | |
1192 | static void xen_setup_gdt(int cpu) | |
1193 | { | |
1194 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1195 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1196 | ||
1197 | setup_stack_canary_segment(0); | |
1198 | switch_to_new_gdt(0); | |
1199 | ||
1200 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1201 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1202 | } | |
1203 | ||
1204 | static void __init xen_dom0_set_legacy_features(void) | |
1205 | { | |
1206 | x86_platform.legacy.rtc = 1; | |
1207 | } | |
1208 | ||
1209 | /* First C function to be called on Xen boot */ | |
1210 | asmlinkage __visible void __init xen_start_kernel(void) | |
1211 | { | |
1212 | struct physdev_set_iopl set_iopl; | |
1213 | unsigned long initrd_start = 0; | |
1214 | int rc; | |
1215 | ||
1216 | if (!xen_start_info) | |
1217 | return; | |
1218 | ||
1219 | xen_domain_type = XEN_PV_DOMAIN; | |
1220 | ||
1221 | xen_setup_features(); | |
1222 | ||
1223 | xen_setup_machphys_mapping(); | |
1224 | ||
1225 | /* Install Xen paravirt ops */ | |
1226 | pv_info = xen_info; | |
edcb5cf8 | 1227 | pv_init_ops.patch = paravirt_patch_default; |
e1dab14c VK |
1228 | pv_cpu_ops = xen_cpu_ops; |
1229 | ||
1230 | x86_platform.get_nmi_reason = xen_get_nmi_reason; | |
1231 | ||
1232 | x86_init.resources.memory_setup = xen_memory_setup; | |
1233 | x86_init.oem.arch_setup = xen_arch_setup; | |
1234 | x86_init.oem.banner = xen_banner; | |
1235 | ||
e1dab14c VK |
1236 | /* |
1237 | * Set up some pagetable state before starting to set any ptes. | |
1238 | */ | |
1239 | ||
1240 | xen_init_mmu_ops(); | |
1241 | ||
1242 | /* Prevent unwanted bits from being set in PTEs. */ | |
1243 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
1244 | ||
1245 | /* | |
1246 | * Prevent page tables from being allocated in highmem, even | |
1247 | * if CONFIG_HIGHPTE is enabled. | |
1248 | */ | |
1249 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1250 | ||
1251 | /* Work out if we support NX */ | |
1252 | x86_configure_nx(); | |
1253 | ||
1254 | /* Get mfn list */ | |
1255 | xen_build_dynamic_phys_to_machine(); | |
1256 | ||
1257 | /* | |
1258 | * Set up kernel GDT and segment registers, mainly so that | |
1259 | * -fstack-protector code can be executed. | |
1260 | */ | |
1261 | xen_setup_gdt(0); | |
1262 | ||
1263 | xen_init_irq_ops(); | |
0808e80c | 1264 | xen_init_capabilities(); |
e1dab14c VK |
1265 | |
1266 | #ifdef CONFIG_X86_LOCAL_APIC | |
1267 | /* | |
1268 | * set up the basic apic ops. | |
1269 | */ | |
1270 | xen_init_apic(); | |
1271 | #endif | |
1272 | ||
1273 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { | |
1274 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1275 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1276 | } | |
1277 | ||
1278 | machine_ops = xen_machine_ops; | |
1279 | ||
1280 | /* | |
1281 | * The only reliable way to retain the initial address of the | |
1282 | * percpu gdt_page is to remember it here, so we can go and | |
1283 | * mark it RW later, when the initial percpu area is freed. | |
1284 | */ | |
1285 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
1286 | ||
1287 | xen_smp_init(); | |
1288 | ||
1289 | #ifdef CONFIG_ACPI_NUMA | |
1290 | /* | |
1291 | * The pages we from Xen are not related to machine pages, so | |
1292 | * any NUMA information the kernel tries to get from ACPI will | |
1293 | * be meaningless. Prevent it from trying. | |
1294 | */ | |
1295 | acpi_numa = -1; | |
1296 | #endif | |
ad73fd59 AA |
1297 | /* Let's presume PV guests always boot on vCPU with id 0. */ |
1298 | per_cpu(xen_vcpu_id, 0) = 0; | |
1299 | ||
1300 | /* | |
1301 | * Setup xen_vcpu early because start_kernel needs it for | |
1302 | * local_irq_disable(), irqs_disabled(). | |
1303 | * | |
1304 | * Don't do the full vcpu_info placement stuff until we have | |
1305 | * the cpu_possible_mask and a non-dummy shared_info. | |
1306 | */ | |
1307 | xen_vcpu_info_reset(0); | |
e1dab14c VK |
1308 | |
1309 | WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); | |
1310 | ||
1311 | local_irq_disable(); | |
1312 | early_boot_irqs_disabled = true; | |
1313 | ||
1314 | xen_raw_console_write("mapping kernel into physical memory\n"); | |
1315 | xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, | |
1316 | xen_start_info->nr_pages); | |
1317 | xen_reserve_special_pages(); | |
1318 | ||
1319 | /* keep using Xen gdt for now; no urgent need to change it */ | |
1320 | ||
1321 | #ifdef CONFIG_X86_32 | |
1322 | pv_info.kernel_rpl = 1; | |
1323 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) | |
1324 | pv_info.kernel_rpl = 0; | |
1325 | #else | |
1326 | pv_info.kernel_rpl = 0; | |
1327 | #endif | |
1328 | /* set the limit of our address space */ | |
1329 | xen_reserve_top(); | |
1330 | ||
1331 | /* | |
1332 | * We used to do this in xen_arch_setup, but that is too late | |
1333 | * on AMD were early_cpu_init (run before ->arch_setup()) calls | |
1334 | * early_amd_init which pokes 0xcf8 port. | |
1335 | */ | |
1336 | set_iopl.iopl = 1; | |
1337 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1338 | if (rc != 0) | |
1339 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1340 | ||
1341 | #ifdef CONFIG_X86_32 | |
1342 | /* set up basic CPUID stuff */ | |
1343 | cpu_detect(&new_cpu_data); | |
1344 | set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); | |
1345 | new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); | |
1346 | #endif | |
1347 | ||
1348 | if (xen_start_info->mod_start) { | |
1349 | if (xen_start_info->flags & SIF_MOD_START_PFN) | |
1350 | initrd_start = PFN_PHYS(xen_start_info->mod_start); | |
1351 | else | |
1352 | initrd_start = __pa(xen_start_info->mod_start); | |
1353 | } | |
1354 | ||
1355 | /* Poke various useful things into boot_params */ | |
1356 | boot_params.hdr.type_of_loader = (9 << 4) | 0; | |
1357 | boot_params.hdr.ramdisk_image = initrd_start; | |
1358 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
1359 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); | |
1360 | boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; | |
1361 | ||
1362 | if (!xen_initial_domain()) { | |
1363 | add_preferred_console("xenboot", 0, NULL); | |
1364 | add_preferred_console("tty", 0, NULL); | |
1365 | add_preferred_console("hvc", 0, NULL); | |
1366 | if (pci_xen) | |
1367 | x86_init.pci.arch_init = pci_xen_init; | |
1368 | } else { | |
1369 | const struct dom0_vga_console_info *info = | |
1370 | (void *)((char *)xen_start_info + | |
1371 | xen_start_info->console.dom0.info_off); | |
1372 | struct xen_platform_op op = { | |
1373 | .cmd = XENPF_firmware_info, | |
1374 | .interface_version = XENPF_INTERFACE_VERSION, | |
1375 | .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, | |
1376 | }; | |
1377 | ||
1378 | x86_platform.set_legacy_features = | |
1379 | xen_dom0_set_legacy_features; | |
1380 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1381 | xen_start_info->console.domU.mfn = 0; | |
1382 | xen_start_info->console.domU.evtchn = 0; | |
1383 | ||
1384 | if (HYPERVISOR_platform_op(&op) == 0) | |
1385 | boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; | |
1386 | ||
1387 | /* Make sure ACS will be enabled */ | |
1388 | pci_request_acs(); | |
1389 | ||
1390 | xen_acpi_sleep_register(); | |
1391 | ||
1392 | /* Avoid searching for BIOS MP tables */ | |
1393 | x86_init.mpparse.find_smp_config = x86_init_noop; | |
1394 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | |
1395 | ||
1396 | xen_boot_params_init_edd(); | |
1397 | } | |
1398 | #ifdef CONFIG_PCI | |
1399 | /* PCI BIOS service won't work from a PV guest. */ | |
1400 | pci_probe &= ~PCI_PROBE_BIOS; | |
1401 | #endif | |
1402 | xen_raw_console_write("about to get started...\n"); | |
1403 | ||
ad73fd59 | 1404 | /* We need this for printk timestamps */ |
e1dab14c VK |
1405 | xen_setup_runstate_info(0); |
1406 | ||
1407 | xen_efi_init(); | |
1408 | ||
1409 | /* Start the world */ | |
1410 | #ifdef CONFIG_X86_32 | |
1411 | i386_start_kernel(); | |
1412 | #else | |
1413 | cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ | |
1414 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); | |
1415 | #endif | |
1416 | } | |
1417 | ||
1418 | static int xen_cpu_up_prepare_pv(unsigned int cpu) | |
1419 | { | |
1420 | int rc; | |
1421 | ||
c9b5d98b AA |
1422 | if (per_cpu(xen_vcpu, cpu) == NULL) |
1423 | return -ENODEV; | |
1424 | ||
e1dab14c VK |
1425 | xen_setup_timer(cpu); |
1426 | ||
1427 | rc = xen_smp_intr_init(cpu); | |
1428 | if (rc) { | |
1429 | WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", | |
1430 | cpu, rc); | |
1431 | return rc; | |
1432 | } | |
04e95761 VK |
1433 | |
1434 | rc = xen_smp_intr_init_pv(cpu); | |
1435 | if (rc) { | |
1436 | WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", | |
1437 | cpu, rc); | |
1438 | return rc; | |
1439 | } | |
1440 | ||
e1dab14c VK |
1441 | return 0; |
1442 | } | |
1443 | ||
1444 | static int xen_cpu_dead_pv(unsigned int cpu) | |
1445 | { | |
1446 | xen_smp_intr_free(cpu); | |
04e95761 | 1447 | xen_smp_intr_free_pv(cpu); |
e1dab14c VK |
1448 | |
1449 | xen_teardown_timer(cpu); | |
1450 | ||
1451 | return 0; | |
1452 | } | |
1453 | ||
1454 | static uint32_t __init xen_platform_pv(void) | |
1455 | { | |
1456 | if (xen_pv_domain()) | |
1457 | return xen_cpuid_base(); | |
1458 | ||
1459 | return 0; | |
1460 | } | |
1461 | ||
e1dab14c VK |
1462 | const struct hypervisor_x86 x86_hyper_xen_pv = { |
1463 | .name = "Xen PV", | |
1464 | .detect = xen_platform_pv, | |
e1dab14c VK |
1465 | .pin_vcpu = xen_pin_vcpu, |
1466 | }; | |
1467 | EXPORT_SYMBOL(x86_hyper_xen_pv); |