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xen: make use of pte_t union
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1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
3b827c1b 43#include <linux/bug.h>
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44
45#include <asm/pgtable.h>
46#include <asm/tlbflush.h>
47#include <asm/mmu_context.h>
f4f97b3e 48#include <asm/paravirt.h>
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49
50#include <asm/xen/hypercall.h>
f4f97b3e 51#include <asm/xen/hypervisor.h>
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52
53#include <xen/page.h>
54#include <xen/interface/xen.h>
55
f4f97b3e 56#include "multicalls.h"
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57#include "mmu.h"
58
59xmaddr_t arbitrary_virt_to_machine(unsigned long address)
60{
da7bfc50 61 unsigned int level;
f0646e43 62 pte_t *pte = lookup_address(address, &level);
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63 unsigned offset = address & PAGE_MASK;
64
65 BUG_ON(pte == NULL);
66
67 return XMADDR((pte_mfn(*pte) << PAGE_SHIFT) + offset);
68}
69
70void make_lowmem_page_readonly(void *vaddr)
71{
72 pte_t *pte, ptev;
73 unsigned long address = (unsigned long)vaddr;
da7bfc50 74 unsigned int level;
3b827c1b 75
f0646e43 76 pte = lookup_address(address, &level);
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77 BUG_ON(pte == NULL);
78
79 ptev = pte_wrprotect(*pte);
80
81 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
82 BUG();
83}
84
85void make_lowmem_page_readwrite(void *vaddr)
86{
87 pte_t *pte, ptev;
88 unsigned long address = (unsigned long)vaddr;
da7bfc50 89 unsigned int level;
3b827c1b 90
f0646e43 91 pte = lookup_address(address, &level);
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92 BUG_ON(pte == NULL);
93
94 ptev = pte_mkwrite(*pte);
95
96 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
97 BUG();
98}
99
100
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101void xen_set_pmd(pmd_t *ptr, pmd_t val)
102{
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103 struct multicall_space mcs;
104 struct mmu_update *u;
3b827c1b 105
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106 preempt_disable();
107
108 mcs = xen_mc_entry(sizeof(*u));
109 u = mcs.args;
110 u->ptr = virt_to_machine(ptr).maddr;
111 u->val = pmd_val_ma(val);
112 MULTI_mmu_update(mcs.mc, u, 1, NULL, DOMID_SELF);
113
114 xen_mc_issue(PARAVIRT_LAZY_MMU);
115
116 preempt_enable();
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117}
118
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119/*
120 * Associate a virtual page frame with a given physical page frame
121 * and protection flags for that frame.
122 */
123void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
124{
125 pgd_t *pgd;
126 pud_t *pud;
127 pmd_t *pmd;
128 pte_t *pte;
129
130 pgd = swapper_pg_dir + pgd_index(vaddr);
131 if (pgd_none(*pgd)) {
132 BUG();
133 return;
134 }
135 pud = pud_offset(pgd, vaddr);
136 if (pud_none(*pud)) {
137 BUG();
138 return;
139 }
140 pmd = pmd_offset(pud, vaddr);
141 if (pmd_none(*pmd)) {
142 BUG();
143 return;
144 }
145 pte = pte_offset_kernel(pmd, vaddr);
146 /* <mfn,flags> stored as-is, to permit clearing entries */
147 xen_set_pte(pte, mfn_pte(mfn, flags));
148
149 /*
150 * It's enough to flush this one mapping.
151 * (PGE mappings get flushed as well)
152 */
153 __flush_tlb_one(vaddr);
154}
155
156void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
157 pte_t *ptep, pte_t pteval)
158{
d66bf8fc 159 if (mm == current->mm || mm == &init_mm) {
8965c1c0 160 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
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161 struct multicall_space mcs;
162 mcs = xen_mc_entry(0);
163
164 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
165 xen_mc_issue(PARAVIRT_LAZY_MMU);
166 return;
167 } else
168 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
169 return;
170 }
171 xen_set_pte(ptep, pteval);
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172}
173
174#ifdef CONFIG_X86_PAE
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175void xen_set_pud(pud_t *ptr, pud_t val)
176{
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177 struct multicall_space mcs;
178 struct mmu_update *u;
f4f97b3e 179
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180 preempt_disable();
181
182 mcs = xen_mc_entry(sizeof(*u));
183 u = mcs.args;
184 u->ptr = virt_to_machine(ptr).maddr;
185 u->val = pud_val_ma(val);
186 MULTI_mmu_update(mcs.mc, u, 1, NULL, DOMID_SELF);
187
188 xen_mc_issue(PARAVIRT_LAZY_MMU);
189
190 preempt_enable();
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191}
192
193void xen_set_pte(pte_t *ptep, pte_t pte)
194{
195 ptep->pte_high = pte.pte_high;
196 smp_wmb();
197 ptep->pte_low = pte.pte_low;
198}
199
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200void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
201{
202 set_64bit((u64 *)ptep, pte_val_ma(pte));
203}
204
205void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
206{
207 ptep->pte_low = 0;
208 smp_wmb(); /* make sure low gets written first */
209 ptep->pte_high = 0;
210}
211
212void xen_pmd_clear(pmd_t *pmdp)
213{
214 xen_set_pmd(pmdp, __pmd(0));
215}
216
abf33038 217pteval_t xen_pte_val(pte_t pte)
3b827c1b 218{
430442e3 219 pteval_t ret = pte.pte;
3b827c1b 220
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221 if (ret & _PAGE_PRESENT)
222 ret = machine_to_phys(XMADDR(ret)).paddr | _PAGE_PRESENT;
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223
224 return ret;
225}
226
abf33038 227pmdval_t xen_pmd_val(pmd_t pmd)
3b827c1b 228{
abf33038 229 pmdval_t ret = pmd.pmd;
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230 if (ret & _PAGE_PRESENT)
231 ret = machine_to_phys(XMADDR(ret)).paddr | _PAGE_PRESENT;
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232 return ret;
233}
234
abf33038 235pgdval_t xen_pgd_val(pgd_t pgd)
3b827c1b 236{
abf33038 237 pgdval_t ret = pgd.pgd;
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238 if (ret & _PAGE_PRESENT)
239 ret = machine_to_phys(XMADDR(ret)).paddr | _PAGE_PRESENT;
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240 return ret;
241}
242
abf33038 243pte_t xen_make_pte(pteval_t pte)
3b827c1b 244{
a89780f3 245 if (pte & _PAGE_PRESENT) {
3b827c1b 246 pte = phys_to_machine(XPADDR(pte)).maddr;
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247 pte &= ~(_PAGE_PCD | _PAGE_PWT);
248 }
3b827c1b 249
c8e5393a 250 return (pte_t){ .pte = pte };
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251}
252
abf33038 253pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 254{
430442e3 255 if (pmd & _PAGE_PRESENT)
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256 pmd = phys_to_machine(XPADDR(pmd)).maddr;
257
258 return (pmd_t){ pmd };
259}
260
abf33038 261pgd_t xen_make_pgd(pgdval_t pgd)
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262{
263 if (pgd & _PAGE_PRESENT)
264 pgd = phys_to_machine(XPADDR(pgd)).maddr;
265
266 return (pgd_t){ pgd };
267}
268#else /* !PAE */
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269void xen_set_pte(pte_t *ptep, pte_t pte)
270{
271 *ptep = pte;
272}
273
abf33038 274pteval_t xen_pte_val(pte_t pte)
3b827c1b 275{
430442e3 276 pteval_t ret = pte.pte;
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277
278 if (ret & _PAGE_PRESENT)
279 ret = machine_to_phys(XMADDR(ret)).paddr;
280
281 return ret;
282}
283
abf33038 284pgdval_t xen_pgd_val(pgd_t pgd)
3b827c1b 285{
abf33038 286 pteval_t ret = pgd.pgd;
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287 if (ret & _PAGE_PRESENT)
288 ret = machine_to_phys(XMADDR(ret)).paddr | _PAGE_PRESENT;
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289 return ret;
290}
291
abf33038 292pte_t xen_make_pte(pteval_t pte)
3b827c1b 293{
a89780f3 294 if (pte & _PAGE_PRESENT) {
3b827c1b 295 pte = phys_to_machine(XPADDR(pte)).maddr;
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296 pte &= ~(_PAGE_PCD | _PAGE_PWT);
297 }
2c80b01b 298
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299 return (pte_t){ pte };
300}
301
abf33038 302pgd_t xen_make_pgd(pgdval_t pgd)
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303{
304 if (pgd & _PAGE_PRESENT)
305 pgd = phys_to_machine(XPADDR(pgd)).maddr;
306
307 return (pgd_t){ pgd };
308}
309#endif /* CONFIG_X86_PAE */
310
f4f97b3e
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311/*
312 (Yet another) pagetable walker. This one is intended for pinning a
313 pagetable. This means that it walks a pagetable and calls the
314 callback function on each page it finds making up the page table,
315 at every level. It walks the entire pagetable, but it only bothers
316 pinning pte pages which are below pte_limit. In the normal case
317 this will be TASK_SIZE, but at boot we need to pin up to
318 FIXADDR_TOP. But the important bit is that we don't pin beyond
319 there, because then we start getting into Xen's ptes.
320*/
74260714 321static int pgd_walk(pgd_t *pgd_base, int (*func)(struct page *, enum pt_level),
f4f97b3e 322 unsigned long limit)
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323{
324 pgd_t *pgd = pgd_base;
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325 int flush = 0;
326 unsigned long addr = 0;
327 unsigned long pgd_next;
328
329 BUG_ON(limit > FIXADDR_TOP);
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330
331 if (xen_feature(XENFEAT_auto_translated_physmap))
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332 return 0;
333
334 for (; addr != FIXADDR_TOP; pgd++, addr = pgd_next) {
335 pud_t *pud;
336 unsigned long pud_limit, pud_next;
3b827c1b 337
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338 pgd_next = pud_limit = pgd_addr_end(addr, FIXADDR_TOP);
339
340 if (!pgd_val(*pgd))
3b827c1b 341 continue;
f4f97b3e 342
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343 pud = pud_offset(pgd, 0);
344
345 if (PTRS_PER_PUD > 1) /* not folded */
74260714 346 flush |= (*func)(virt_to_page(pud), PT_PUD);
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347
348 for (; addr != pud_limit; pud++, addr = pud_next) {
349 pmd_t *pmd;
350 unsigned long pmd_limit;
351
352 pud_next = pud_addr_end(addr, pud_limit);
353
354 if (pud_next < limit)
355 pmd_limit = pud_next;
356 else
357 pmd_limit = limit;
3b827c1b 358
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359 if (pud_none(*pud))
360 continue;
f4f97b3e 361
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362 pmd = pmd_offset(pud, 0);
363
364 if (PTRS_PER_PMD > 1) /* not folded */
74260714 365 flush |= (*func)(virt_to_page(pmd), PT_PMD);
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366
367 for (; addr != pmd_limit; pmd++) {
368 addr += (PAGE_SIZE * PTRS_PER_PTE);
369 if ((pmd_limit-1) < (addr-1)) {
370 addr = pmd_limit;
371 break;
372 }
3b827c1b 373
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374 if (pmd_none(*pmd))
375 continue;
376
74260714 377 flush |= (*func)(pmd_page(*pmd), PT_PTE);
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378 }
379 }
380 }
381
74260714 382 flush |= (*func)(virt_to_page(pgd_base), PT_PGD);
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383
384 return flush;
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385}
386
74260714
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387static spinlock_t *lock_pte(struct page *page)
388{
389 spinlock_t *ptl = NULL;
390
391#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
392 ptl = __pte_lockptr(page);
393 spin_lock(ptl);
394#endif
395
396 return ptl;
397}
398
399static void do_unlock(void *v)
400{
401 spinlock_t *ptl = v;
402 spin_unlock(ptl);
403}
404
405static void xen_do_pin(unsigned level, unsigned long pfn)
406{
407 struct mmuext_op *op;
408 struct multicall_space mcs;
409
410 mcs = __xen_mc_entry(sizeof(*op));
411 op = mcs.args;
412 op->cmd = level;
413 op->arg1.mfn = pfn_to_mfn(pfn);
414 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
415}
416
417static int pin_page(struct page *page, enum pt_level level)
f4f97b3e
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418{
419 unsigned pgfl = test_and_set_bit(PG_pinned, &page->flags);
420 int flush;
421
422 if (pgfl)
423 flush = 0; /* already pinned */
424 else if (PageHighMem(page))
425 /* kmaps need flushing if we found an unpinned
426 highpage */
427 flush = 1;
428 else {
429 void *pt = lowmem_page_address(page);
430 unsigned long pfn = page_to_pfn(page);
431 struct multicall_space mcs = __xen_mc_entry(0);
74260714 432 spinlock_t *ptl;
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433
434 flush = 0;
435
74260714
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436 ptl = NULL;
437 if (level == PT_PTE)
438 ptl = lock_pte(page);
439
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440 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
441 pfn_pte(pfn, PAGE_KERNEL_RO),
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442 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
443
444 if (level == PT_PTE)
445 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
446
447 if (ptl) {
448 /* Queue a deferred unlock for when this batch
449 is completed. */
450 xen_mc_callback(do_unlock, ptl);
451 }
f4f97b3e
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452 }
453
454 return flush;
455}
3b827c1b 456
f4f97b3e
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457/* This is called just after a mm has been created, but it has not
458 been used yet. We need to make sure that its pagetable is all
459 read-only, and can be pinned. */
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460void xen_pgd_pin(pgd_t *pgd)
461{
74260714 462 unsigned level;
3b827c1b 463
f4f97b3e 464 xen_mc_batch();
3b827c1b 465
f87e4cac
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466 if (pgd_walk(pgd, pin_page, TASK_SIZE)) {
467 /* re-enable interrupts for kmap_flush_unused */
468 xen_mc_issue(0);
f4f97b3e 469 kmap_flush_unused();
f87e4cac
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470 xen_mc_batch();
471 }
f4f97b3e 472
f4f97b3e 473#ifdef CONFIG_X86_PAE
74260714 474 level = MMUEXT_PIN_L3_TABLE;
3b827c1b 475#else
74260714 476 level = MMUEXT_PIN_L2_TABLE;
3b827c1b 477#endif
74260714
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478
479 xen_do_pin(level, PFN_DOWN(__pa(pgd)));
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480
481 xen_mc_issue(0);
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482}
483
f4f97b3e
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484/* The init_mm pagetable is really pinned as soon as its created, but
485 that's before we have page structures to store the bits. So do all
486 the book-keeping now. */
74260714 487static __init int mark_pinned(struct page *page, enum pt_level level)
3b827c1b 488{
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489 SetPagePinned(page);
490 return 0;
491}
3b827c1b 492
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493void __init xen_mark_init_mm_pinned(void)
494{
495 pgd_walk(init_mm.pgd, mark_pinned, FIXADDR_TOP);
496}
3b827c1b 497
74260714 498static int unpin_page(struct page *page, enum pt_level level)
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499{
500 unsigned pgfl = test_and_clear_bit(PG_pinned, &page->flags);
3b827c1b 501
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502 if (pgfl && !PageHighMem(page)) {
503 void *pt = lowmem_page_address(page);
504 unsigned long pfn = page_to_pfn(page);
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505 spinlock_t *ptl = NULL;
506 struct multicall_space mcs;
507
508 if (level == PT_PTE) {
509 ptl = lock_pte(page);
510
511 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
512 }
513
514 mcs = __xen_mc_entry(0);
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515
516 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
517 pfn_pte(pfn, PAGE_KERNEL),
74260714
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518 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
519
520 if (ptl) {
521 /* unlock when batch completed */
522 xen_mc_callback(do_unlock, ptl);
523 }
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524 }
525
526 return 0; /* never need to flush on unpin */
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527}
528
f4f97b3e
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529/* Release a pagetables pages back as normal RW */
530static void xen_pgd_unpin(pgd_t *pgd)
531{
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532 xen_mc_batch();
533
74260714 534 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e
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535
536 pgd_walk(pgd, unpin_page, TASK_SIZE);
537
538 xen_mc_issue(0);
539}
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540
541void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
542{
f4f97b3e 543 spin_lock(&next->page_table_lock);
3b827c1b 544 xen_pgd_pin(next->pgd);
f4f97b3e 545 spin_unlock(&next->page_table_lock);
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JF
546}
547
548void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
549{
f4f97b3e 550 spin_lock(&mm->page_table_lock);
3b827c1b 551 xen_pgd_pin(mm->pgd);
f4f97b3e 552 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
553}
554
3b827c1b 555
f87e4cac
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556#ifdef CONFIG_SMP
557/* Another cpu may still have their %cr3 pointing at the pagetable, so
558 we need to repoint it somewhere else before we can unpin it. */
559static void drop_other_mm_ref(void *info)
560{
561 struct mm_struct *mm = info;
3b827c1b 562
f87e4cac
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563 if (__get_cpu_var(cpu_tlbstate).active_mm == mm)
564 leave_mm(smp_processor_id());
9f79991d
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565
566 /* If this cpu still has a stale cr3 reference, then make sure
567 it has been flushed. */
568 if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) {
569 load_cr3(swapper_pg_dir);
570 arch_flush_lazy_cpu_mode();
571 }
f87e4cac 572}
3b827c1b 573
f87e4cac
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574static void drop_mm_ref(struct mm_struct *mm)
575{
9f79991d
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576 cpumask_t mask;
577 unsigned cpu;
578
f87e4cac
JF
579 if (current->active_mm == mm) {
580 if (current->mm == mm)
581 load_cr3(swapper_pg_dir);
582 else
583 leave_mm(smp_processor_id());
9f79991d
JF
584 arch_flush_lazy_cpu_mode();
585 }
586
587 /* Get the "official" set of cpus referring to our pagetable. */
588 mask = mm->cpu_vm_mask;
589
590 /* It's possible that a vcpu may have a stale reference to our
591 cr3, because its in lazy mode, and it hasn't yet flushed
592 its set of pending hypercalls yet. In this case, we can
593 look at its actual current cr3 value, and force it to flush
594 if needed. */
595 for_each_online_cpu(cpu) {
596 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
597 cpu_set(cpu, mask);
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598 }
599
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600 if (!cpus_empty(mask))
601 xen_smp_call_function_mask(mask, drop_other_mm_ref, mm, 1);
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602}
603#else
604static void drop_mm_ref(struct mm_struct *mm)
605{
606 if (current->active_mm == mm)
607 load_cr3(swapper_pg_dir);
608}
609#endif
610
611/*
612 * While a process runs, Xen pins its pagetables, which means that the
613 * hypervisor forces it to be read-only, and it controls all updates
614 * to it. This means that all pagetable updates have to go via the
615 * hypervisor, which is moderately expensive.
616 *
617 * Since we're pulling the pagetable down, we switch to use init_mm,
618 * unpin old process pagetable and mark it all read-write, which
619 * allows further operations on it to be simple memory accesses.
620 *
621 * The only subtle point is that another CPU may be still using the
622 * pagetable because of lazy tlb flushing. This means we need need to
623 * switch all CPUs off this pagetable before we can unpin it.
624 */
625void xen_exit_mmap(struct mm_struct *mm)
626{
627 get_cpu(); /* make sure we don't move around */
628 drop_mm_ref(mm);
629 put_cpu();
3b827c1b 630
f120f13e 631 spin_lock(&mm->page_table_lock);
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632
633 /* pgd may not be pinned in the error exit path of execve */
634 if (PagePinned(virt_to_page(mm->pgd)))
635 xen_pgd_unpin(mm->pgd);
74260714 636
f120f13e 637 spin_unlock(&mm->page_table_lock);
3b827c1b 638}