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3b827c1b
JF
1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
d2cb2145 45#include <linux/vmalloc.h>
44408ad7 46#include <linux/module.h>
5a0e3ad6 47#include <linux/gfp.h>
a9ce6bc1 48#include <linux/memblock.h>
2222e71b 49#include <linux/seq_file.h>
3b827c1b 50
84708807
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51#include <trace/events/xen.h>
52
3b827c1b
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53#include <asm/pgtable.h>
54#include <asm/tlbflush.h>
5deb30d1 55#include <asm/fixmap.h>
3b827c1b 56#include <asm/mmu_context.h>
319f3ba5 57#include <asm/setup.h>
f4f97b3e 58#include <asm/paravirt.h>
7347b408 59#include <asm/e820.h>
cbcd79c2 60#include <asm/linkage.h>
08bbc9da 61#include <asm/page.h>
fef5ba79 62#include <asm/init.h>
41f2e477 63#include <asm/pat.h>
900cba88 64#include <asm/smp.h>
3b827c1b
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65
66#include <asm/xen/hypercall.h>
f4f97b3e 67#include <asm/xen/hypervisor.h>
3b827c1b 68
c0011dbf 69#include <xen/xen.h>
3b827c1b
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70#include <xen/page.h>
71#include <xen/interface/xen.h>
59151001 72#include <xen/interface/hvm/hvm_op.h>
319f3ba5 73#include <xen/interface/version.h>
c0011dbf 74#include <xen/interface/memory.h>
319f3ba5 75#include <xen/hvc-console.h>
3b827c1b 76
f4f97b3e 77#include "multicalls.h"
3b827c1b 78#include "mmu.h"
994025ca
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79#include "debugfs.h"
80
19001c8c
AN
81/*
82 * Protects atomic reservation decrease/increase against concurrent increases.
06f521d5 83 * Also protects non-atomic updates of current_pages and balloon lists.
19001c8c
AN
84 */
85DEFINE_SPINLOCK(xen_reservation_lock);
86
319f3ba5
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87/*
88 * Identity map, in addition to plain kernel map. This needs to be
89 * large enough to allocate page table pages to allocate the rest.
90 * Each page can map 2MB.
91 */
764f0138
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92#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
93static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
319f3ba5
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94
95#ifdef CONFIG_X86_64
96/* l3 pud for userspace vsyscall mapping */
97static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
98#endif /* CONFIG_X86_64 */
99
100/*
101 * Note about cr3 (pagetable base) values:
102 *
103 * xen_cr3 contains the current logical cr3 value; it contains the
104 * last set cr3. This may not be the current effective cr3, because
105 * its update may be being lazily deferred. However, a vcpu looking
106 * at its own cr3 can use this value knowing that it everything will
107 * be self-consistent.
108 *
109 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
110 * hypercall to set the vcpu cr3 is complete (so it may be a little
111 * out of date, but it will never be set early). If one vcpu is
112 * looking at another vcpu's cr3 value, it should use this variable.
113 */
114DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
115DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
116
117
d6182fbf
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118/*
119 * Just beyond the highest usermode address. STACK_TOP_MAX has a
120 * redzone above it, so round it up to a PGD boundary.
121 */
122#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
123
9976b39b
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124unsigned long arbitrary_virt_to_mfn(void *vaddr)
125{
126 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
127
128 return PFN_DOWN(maddr.maddr);
129}
130
ce803e70 131xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 132{
ce803e70 133 unsigned long address = (unsigned long)vaddr;
da7bfc50 134 unsigned int level;
9f32d21c
CL
135 pte_t *pte;
136 unsigned offset;
3b827c1b 137
9f32d21c
CL
138 /*
139 * if the PFN is in the linear mapped vaddr range, we can just use
140 * the (quick) virt_to_machine() p2m lookup
141 */
142 if (virt_addr_valid(vaddr))
143 return virt_to_machine(vaddr);
144
145 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 146
9f32d21c
CL
147 pte = lookup_address(address, &level);
148 BUG_ON(pte == NULL);
149 offset = address & ~PAGE_MASK;
ebd879e3 150 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b 151}
de23be5f 152EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
3b827c1b
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153
154void make_lowmem_page_readonly(void *vaddr)
155{
156 pte_t *pte, ptev;
157 unsigned long address = (unsigned long)vaddr;
da7bfc50 158 unsigned int level;
3b827c1b 159
f0646e43 160 pte = lookup_address(address, &level);
fef5ba79
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161 if (pte == NULL)
162 return; /* vaddr missing */
3b827c1b
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163
164 ptev = pte_wrprotect(*pte);
165
166 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
167 BUG();
168}
169
170void make_lowmem_page_readwrite(void *vaddr)
171{
172 pte_t *pte, ptev;
173 unsigned long address = (unsigned long)vaddr;
da7bfc50 174 unsigned int level;
3b827c1b 175
f0646e43 176 pte = lookup_address(address, &level);
fef5ba79
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177 if (pte == NULL)
178 return; /* vaddr missing */
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179
180 ptev = pte_mkwrite(*pte);
181
182 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
183 BUG();
184}
185
186
7708ad64 187static bool xen_page_pinned(void *ptr)
e2426cf8
JF
188{
189 struct page *page = virt_to_page(ptr);
190
191 return PagePinned(page);
192}
193
eba3ff8b 194void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
c0011dbf
JF
195{
196 struct multicall_space mcs;
197 struct mmu_update *u;
198
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199 trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
200
c0011dbf
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201 mcs = xen_mc_entry(sizeof(*u));
202 u = mcs.args;
203
204 /* ptep might be kmapped when using 32-bit HIGHPTE */
d5108316 205 u->ptr = virt_to_machine(ptep).maddr;
c0011dbf
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206 u->val = pte_val_ma(pteval);
207
eba3ff8b 208 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
c0011dbf
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209
210 xen_mc_issue(PARAVIRT_LAZY_MMU);
211}
eba3ff8b
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212EXPORT_SYMBOL_GPL(xen_set_domain_pte);
213
7708ad64 214static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 215{
d66bf8fc
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216 struct multicall_space mcs;
217 struct mmu_update *u;
3b827c1b 218
400d3494
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219 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
220
994025ca 221 if (mcs.mc != NULL) {
400d3494 222 mcs.mc->args[1]++;
994025ca 223 } else {
400d3494
JF
224 mcs = __xen_mc_entry(sizeof(*u));
225 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
226 }
d66bf8fc 227
d66bf8fc 228 u = mcs.args;
400d3494
JF
229 *u = *update;
230}
231
dcf7435c
JF
232static void xen_extend_mmuext_op(const struct mmuext_op *op)
233{
234 struct multicall_space mcs;
235 struct mmuext_op *u;
236
237 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
238
239 if (mcs.mc != NULL) {
240 mcs.mc->args[1]++;
241 } else {
242 mcs = __xen_mc_entry(sizeof(*u));
243 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
244 }
245
246 u = mcs.args;
247 *u = *op;
248}
249
4c13629f 250static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
400d3494
JF
251{
252 struct mmu_update u;
253
254 preempt_disable();
255
256 xen_mc_batch();
257
ce803e70
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258 /* ptr may be ioremapped for 64-bit pagetable setup */
259 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 260 u.val = pmd_val_ma(val);
7708ad64 261 xen_extend_mmu_update(&u);
d66bf8fc
JF
262
263 xen_mc_issue(PARAVIRT_LAZY_MMU);
264
265 preempt_enable();
3b827c1b
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266}
267
4c13629f 268static void xen_set_pmd(pmd_t *ptr, pmd_t val)
e2426cf8 269{
84708807
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270 trace_xen_mmu_set_pmd(ptr, val);
271
e2426cf8
JF
272 /* If page is not pinned, we can just update the entry
273 directly */
7708ad64 274 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
275 *ptr = val;
276 return;
277 }
278
279 xen_set_pmd_hyper(ptr, val);
280}
281
3b827c1b
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282/*
283 * Associate a virtual page frame with a given physical page frame
284 * and protection flags for that frame.
285 */
286void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
287{
836fe2f2 288 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
289}
290
4a35c13c 291static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
3b827c1b 292{
4a35c13c 293 struct mmu_update u;
c0011dbf 294
4a35c13c
JF
295 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
296 return false;
994025ca 297
4a35c13c 298 xen_mc_batch();
d66bf8fc 299
4a35c13c
JF
300 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
301 u.val = pte_val_ma(pteval);
302 xen_extend_mmu_update(&u);
a99ac5e8 303
4a35c13c 304 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 305
4a35c13c
JF
306 return true;
307}
308
84708807 309static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
4a35c13c 310{
4a35c13c 311 if (!xen_batched_set_pte(ptep, pteval))
a99ac5e8 312 native_set_pte(ptep, pteval);
3b827c1b
JF
313}
314
84708807
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315static void xen_set_pte(pte_t *ptep, pte_t pteval)
316{
317 trace_xen_mmu_set_pte(ptep, pteval);
318 __xen_set_pte(ptep, pteval);
319}
320
4c13629f 321static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
4a35c13c
JF
322 pte_t *ptep, pte_t pteval)
323{
84708807
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324 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
325 __xen_set_pte(ptep, pteval);
3b827c1b
JF
326}
327
f63c2f24
T
328pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
329 unsigned long addr, pte_t *ptep)
947a69c9 330{
e57778a1 331 /* Just return the pte as-is. We preserve the bits on commit */
84708807 332 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
e57778a1
JF
333 return *ptep;
334}
335
336void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
337 pte_t *ptep, pte_t pte)
338{
400d3494 339 struct mmu_update u;
e57778a1 340
84708807 341 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
400d3494 342 xen_mc_batch();
947a69c9 343
d5108316 344 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 345 u.val = pte_val_ma(pte);
7708ad64 346 xen_extend_mmu_update(&u);
947a69c9 347
e57778a1 348 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
349}
350
ebb9cfe2
JF
351/* Assume pteval_t is equivalent to all the other *val_t types. */
352static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 353{
ebb9cfe2 354 if (val & _PAGE_PRESENT) {
59438c9f 355 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
b7e5ffe5
KRW
356 unsigned long pfn = mfn_to_pfn(mfn);
357
77be1fab 358 pteval_t flags = val & PTE_FLAGS_MASK;
b7e5ffe5
KRW
359 if (unlikely(pfn == ~0))
360 val = flags & ~_PAGE_PRESENT;
361 else
362 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
ebb9cfe2 363 }
947a69c9 364
ebb9cfe2 365 return val;
947a69c9
JF
366}
367
ebb9cfe2 368static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 369{
ebb9cfe2 370 if (val & _PAGE_PRESENT) {
59438c9f 371 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 372 pteval_t flags = val & PTE_FLAGS_MASK;
fb38923e 373 unsigned long mfn;
cfd8951e 374
fb38923e
KRW
375 if (!xen_feature(XENFEAT_auto_translated_physmap))
376 mfn = get_phys_to_machine(pfn);
377 else
378 mfn = pfn;
cfd8951e
JF
379 /*
380 * If there's no mfn for the pfn, then just create an
381 * empty non-present pte. Unfortunately this loses
382 * information about the original pfn, so
383 * pte_mfn_to_pfn is asymmetric.
384 */
385 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
386 mfn = 0;
387 flags = 0;
fb38923e
KRW
388 } else {
389 /*
390 * Paramount to do this test _after_ the
391 * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY &
392 * IDENTITY_FRAME_BIT resolves to true.
393 */
394 mfn &= ~FOREIGN_FRAME_BIT;
395 if (mfn & IDENTITY_FRAME_BIT) {
396 mfn &= ~IDENTITY_FRAME_BIT;
397 flags |= _PAGE_IOMAP;
398 }
cfd8951e 399 }
cfd8951e 400 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
947a69c9
JF
401 }
402
ebb9cfe2 403 return val;
947a69c9
JF
404}
405
c0011dbf
JF
406static pteval_t iomap_pte(pteval_t val)
407{
408 if (val & _PAGE_PRESENT) {
409 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
410 pteval_t flags = val & PTE_FLAGS_MASK;
411
412 /* We assume the pte frame number is a MFN, so
413 just use it as-is. */
414 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
415 }
416
417 return val;
418}
419
4c13629f 420static pteval_t xen_pte_val(pte_t pte)
947a69c9 421{
41f2e477 422 pteval_t pteval = pte.pte;
8eaffa67 423#if 0
41f2e477
JF
424 /* If this is a WC pte, convert back from Xen WC to Linux WC */
425 if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
426 WARN_ON(!pat_enabled);
427 pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
428 }
8eaffa67 429#endif
41f2e477
JF
430 if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
431 return pteval;
432
433 return pte_mfn_to_pfn(pteval);
947a69c9 434}
da5de7c2 435PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 436
4c13629f 437static pgdval_t xen_pgd_val(pgd_t pgd)
947a69c9 438{
ebb9cfe2 439 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 440}
da5de7c2 441PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9 442
41f2e477
JF
443/*
444 * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7
445 * are reserved for now, to correspond to the Intel-reserved PAT
446 * types.
447 *
448 * We expect Linux's PAT set as follows:
449 *
450 * Idx PTE flags Linux Xen Default
451 * 0 WB WB WB
452 * 1 PWT WC WT WT
453 * 2 PCD UC- UC- UC-
454 * 3 PCD PWT UC UC UC
455 * 4 PAT WB WC WB
456 * 5 PAT PWT WC WP WT
457 * 6 PAT PCD UC- UC UC-
458 * 7 PAT PCD PWT UC UC UC
459 */
460
461void xen_set_pat(u64 pat)
462{
463 /* We expect Linux to use a PAT setting of
464 * UC UC- WC WB (ignoring the PAT flag) */
465 WARN_ON(pat != 0x0007010600070106ull);
466}
467
4c13629f 468static pte_t xen_make_pte(pteval_t pte)
947a69c9 469{
7347b408 470 phys_addr_t addr = (pte & PTE_PFN_MASK);
8eaffa67 471#if 0
41f2e477
JF
472 /* If Linux is trying to set a WC pte, then map to the Xen WC.
473 * If _PAGE_PAT is set, then it probably means it is really
474 * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
475 * things work out OK...
476 *
477 * (We should never see kernel mappings with _PAGE_PSE set,
478 * but we could see hugetlbfs mappings, I think.).
479 */
480 if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
481 if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
482 pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
483 }
8eaffa67 484#endif
7347b408
AN
485 /*
486 * Unprivileged domains are allowed to do IOMAPpings for
487 * PCI passthrough, but not map ISA space. The ISA
488 * mappings are just dummy local mappings to keep other
489 * parts of the kernel happy.
490 */
491 if (unlikely(pte & _PAGE_IOMAP) &&
492 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
c0011dbf 493 pte = iomap_pte(pte);
7347b408
AN
494 } else {
495 pte &= ~_PAGE_IOMAP;
c0011dbf 496 pte = pte_pfn_to_mfn(pte);
7347b408 497 }
c0011dbf 498
ebb9cfe2 499 return native_make_pte(pte);
947a69c9 500}
da5de7c2 501PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9 502
4c13629f 503static pgd_t xen_make_pgd(pgdval_t pgd)
947a69c9 504{
ebb9cfe2
JF
505 pgd = pte_pfn_to_mfn(pgd);
506 return native_make_pgd(pgd);
947a69c9 507}
da5de7c2 508PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9 509
4c13629f 510static pmdval_t xen_pmd_val(pmd_t pmd)
947a69c9 511{
ebb9cfe2 512 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 513}
da5de7c2 514PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 515
4c13629f 516static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 517{
400d3494 518 struct mmu_update u;
f4f97b3e 519
d66bf8fc
JF
520 preempt_disable();
521
400d3494
JF
522 xen_mc_batch();
523
ce803e70
JF
524 /* ptr may be ioremapped for 64-bit pagetable setup */
525 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 526 u.val = pud_val_ma(val);
7708ad64 527 xen_extend_mmu_update(&u);
d66bf8fc
JF
528
529 xen_mc_issue(PARAVIRT_LAZY_MMU);
530
531 preempt_enable();
f4f97b3e
JF
532}
533
4c13629f 534static void xen_set_pud(pud_t *ptr, pud_t val)
e2426cf8 535{
84708807
JF
536 trace_xen_mmu_set_pud(ptr, val);
537
e2426cf8
JF
538 /* If page is not pinned, we can just update the entry
539 directly */
7708ad64 540 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
541 *ptr = val;
542 return;
543 }
544
545 xen_set_pud_hyper(ptr, val);
546}
547
f6e58732 548#ifdef CONFIG_X86_PAE
4c13629f 549static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
3b827c1b 550{
84708807 551 trace_xen_mmu_set_pte_atomic(ptep, pte);
f6e58732 552 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
553}
554
4c13629f 555static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
3b827c1b 556{
84708807 557 trace_xen_mmu_pte_clear(mm, addr, ptep);
4a35c13c
JF
558 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
559 native_pte_clear(mm, addr, ptep);
3b827c1b
JF
560}
561
4c13629f 562static void xen_pmd_clear(pmd_t *pmdp)
3b827c1b 563{
84708807 564 trace_xen_mmu_pmd_clear(pmdp);
e2426cf8 565 set_pmd(pmdp, __pmd(0));
3b827c1b 566}
f6e58732 567#endif /* CONFIG_X86_PAE */
3b827c1b 568
4c13629f 569static pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 570{
ebb9cfe2 571 pmd = pte_pfn_to_mfn(pmd);
947a69c9 572 return native_make_pmd(pmd);
3b827c1b 573}
da5de7c2 574PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 575
f6e58732 576#if PAGETABLE_LEVELS == 4
4c13629f 577static pudval_t xen_pud_val(pud_t pud)
f6e58732
JF
578{
579 return pte_mfn_to_pfn(pud.pud);
580}
da5de7c2 581PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732 582
4c13629f 583static pud_t xen_make_pud(pudval_t pud)
f6e58732
JF
584{
585 pud = pte_pfn_to_mfn(pud);
586
587 return native_make_pud(pud);
588}
da5de7c2 589PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 590
4c13629f 591static pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 592{
d6182fbf
JF
593 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
594 unsigned offset = pgd - pgd_page;
595 pgd_t *user_ptr = NULL;
f6e58732 596
d6182fbf
JF
597 if (offset < pgd_index(USER_LIMIT)) {
598 struct page *page = virt_to_page(pgd_page);
599 user_ptr = (pgd_t *)page->private;
600 if (user_ptr)
601 user_ptr += offset;
602 }
f6e58732 603
d6182fbf
JF
604 return user_ptr;
605}
606
607static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
608{
609 struct mmu_update u;
f6e58732
JF
610
611 u.ptr = virt_to_machine(ptr).maddr;
612 u.val = pgd_val_ma(val);
7708ad64 613 xen_extend_mmu_update(&u);
d6182fbf
JF
614}
615
616/*
617 * Raw hypercall-based set_pgd, intended for in early boot before
618 * there's a page structure. This implies:
619 * 1. The only existing pagetable is the kernel's
620 * 2. It is always pinned
621 * 3. It has no user pagetable attached to it
622 */
4c13629f 623static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
d6182fbf
JF
624{
625 preempt_disable();
626
627 xen_mc_batch();
628
629 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
630
631 xen_mc_issue(PARAVIRT_LAZY_MMU);
632
633 preempt_enable();
634}
635
4c13629f 636static void xen_set_pgd(pgd_t *ptr, pgd_t val)
f6e58732 637{
d6182fbf
JF
638 pgd_t *user_ptr = xen_get_user_pgd(ptr);
639
84708807
JF
640 trace_xen_mmu_set_pgd(ptr, user_ptr, val);
641
f6e58732
JF
642 /* If page is not pinned, we can just update the entry
643 directly */
7708ad64 644 if (!xen_page_pinned(ptr)) {
f6e58732 645 *ptr = val;
d6182fbf 646 if (user_ptr) {
7708ad64 647 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
648 *user_ptr = val;
649 }
f6e58732
JF
650 return;
651 }
652
d6182fbf
JF
653 /* If it's pinned, then we can at least batch the kernel and
654 user updates together. */
655 xen_mc_batch();
656
657 __xen_set_pgd_hyper(ptr, val);
658 if (user_ptr)
659 __xen_set_pgd_hyper(user_ptr, val);
660
661 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
662}
663#endif /* PAGETABLE_LEVELS == 4 */
664
f4f97b3e 665/*
5deb30d1
JF
666 * (Yet another) pagetable walker. This one is intended for pinning a
667 * pagetable. This means that it walks a pagetable and calls the
668 * callback function on each page it finds making up the page table,
669 * at every level. It walks the entire pagetable, but it only bothers
670 * pinning pte pages which are below limit. In the normal case this
671 * will be STACK_TOP_MAX, but at boot we need to pin up to
672 * FIXADDR_TOP.
673 *
674 * For 32-bit the important bit is that we don't pin beyond there,
675 * because then we start getting into Xen's ptes.
676 *
677 * For 64-bit, we must skip the Xen hole in the middle of the address
678 * space, just after the big x86-64 virtual hole.
679 */
86bbc2c2
IC
680static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
681 int (*func)(struct mm_struct *mm, struct page *,
682 enum pt_level),
683 unsigned long limit)
3b827c1b 684{
f4f97b3e 685 int flush = 0;
5deb30d1
JF
686 unsigned hole_low, hole_high;
687 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
688 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 689
5deb30d1
JF
690 /* The limit is the last byte to be touched */
691 limit--;
692 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
693
694 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
695 return 0;
696
5deb30d1
JF
697 /*
698 * 64-bit has a great big hole in the middle of the address
699 * space, which contains the Xen mappings. On 32-bit these
700 * will end up making a zero-sized hole and so is a no-op.
701 */
d6182fbf 702 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
703 hole_high = pgd_index(PAGE_OFFSET);
704
705 pgdidx_limit = pgd_index(limit);
706#if PTRS_PER_PUD > 1
707 pudidx_limit = pud_index(limit);
708#else
709 pudidx_limit = 0;
710#endif
711#if PTRS_PER_PMD > 1
712 pmdidx_limit = pmd_index(limit);
713#else
714 pmdidx_limit = 0;
715#endif
716
5deb30d1 717 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 718 pud_t *pud;
3b827c1b 719
5deb30d1
JF
720 if (pgdidx >= hole_low && pgdidx < hole_high)
721 continue;
f4f97b3e 722
5deb30d1 723 if (!pgd_val(pgd[pgdidx]))
3b827c1b 724 continue;
f4f97b3e 725
5deb30d1 726 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
727
728 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 729 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 730
5deb30d1 731 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 732 pmd_t *pmd;
f4f97b3e 733
5deb30d1
JF
734 if (pgdidx == pgdidx_limit &&
735 pudidx > pudidx_limit)
736 goto out;
3b827c1b 737
5deb30d1 738 if (pud_none(pud[pudidx]))
3b827c1b 739 continue;
f4f97b3e 740
5deb30d1 741 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
742
743 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 744 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 745
5deb30d1
JF
746 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
747 struct page *pte;
748
749 if (pgdidx == pgdidx_limit &&
750 pudidx == pudidx_limit &&
751 pmdidx > pmdidx_limit)
752 goto out;
3b827c1b 753
5deb30d1 754 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
755 continue;
756
5deb30d1 757 pte = pmd_page(pmd[pmdidx]);
eefb47f6 758 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
759 }
760 }
761 }
11ad93e5 762
5deb30d1 763out:
11ad93e5
JF
764 /* Do the top level last, so that the callbacks can use it as
765 a cue to do final things like tlb flushes. */
eefb47f6 766 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
767
768 return flush;
3b827c1b
JF
769}
770
86bbc2c2
IC
771static int xen_pgd_walk(struct mm_struct *mm,
772 int (*func)(struct mm_struct *mm, struct page *,
773 enum pt_level),
774 unsigned long limit)
775{
776 return __xen_pgd_walk(mm, mm->pgd, func, limit);
777}
778
7708ad64
JF
779/* If we're using split pte locks, then take the page's lock and
780 return a pointer to it. Otherwise return NULL. */
eefb47f6 781static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
782{
783 spinlock_t *ptl = NULL;
784
f7d0b926 785#if USE_SPLIT_PTLOCKS
74260714 786 ptl = __pte_lockptr(page);
eefb47f6 787 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
788#endif
789
790 return ptl;
791}
792
7708ad64 793static void xen_pte_unlock(void *v)
74260714
JF
794{
795 spinlock_t *ptl = v;
796 spin_unlock(ptl);
797}
798
799static void xen_do_pin(unsigned level, unsigned long pfn)
800{
dcf7435c 801 struct mmuext_op op;
74260714 802
dcf7435c
JF
803 op.cmd = level;
804 op.arg1.mfn = pfn_to_mfn(pfn);
805
806 xen_extend_mmuext_op(&op);
74260714
JF
807}
808
eefb47f6
JF
809static int xen_pin_page(struct mm_struct *mm, struct page *page,
810 enum pt_level level)
f4f97b3e 811{
d60cd46b 812 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
813 int flush;
814
815 if (pgfl)
816 flush = 0; /* already pinned */
817 else if (PageHighMem(page))
818 /* kmaps need flushing if we found an unpinned
819 highpage */
820 flush = 1;
821 else {
822 void *pt = lowmem_page_address(page);
823 unsigned long pfn = page_to_pfn(page);
824 struct multicall_space mcs = __xen_mc_entry(0);
74260714 825 spinlock_t *ptl;
f4f97b3e
JF
826
827 flush = 0;
828
11ad93e5
JF
829 /*
830 * We need to hold the pagetable lock between the time
831 * we make the pagetable RO and when we actually pin
832 * it. If we don't, then other users may come in and
833 * attempt to update the pagetable by writing it,
834 * which will fail because the memory is RO but not
835 * pinned, so Xen won't do the trap'n'emulate.
836 *
837 * If we're using split pte locks, we can't hold the
838 * entire pagetable's worth of locks during the
839 * traverse, because we may wrap the preempt count (8
840 * bits). The solution is to mark RO and pin each PTE
841 * page while holding the lock. This means the number
842 * of locks we end up holding is never more than a
843 * batch size (~32 entries, at present).
844 *
845 * If we're not using split pte locks, we needn't pin
846 * the PTE pages independently, because we're
847 * protected by the overall pagetable lock.
848 */
74260714
JF
849 ptl = NULL;
850 if (level == PT_PTE)
eefb47f6 851 ptl = xen_pte_lock(page, mm);
74260714 852
f4f97b3e
JF
853 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
854 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
855 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
856
11ad93e5 857 if (ptl) {
74260714
JF
858 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
859
74260714
JF
860 /* Queue a deferred unlock for when this batch
861 is completed. */
7708ad64 862 xen_mc_callback(xen_pte_unlock, ptl);
74260714 863 }
f4f97b3e
JF
864 }
865
866 return flush;
867}
3b827c1b 868
f4f97b3e
JF
869/* This is called just after a mm has been created, but it has not
870 been used yet. We need to make sure that its pagetable is all
871 read-only, and can be pinned. */
eefb47f6 872static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 873{
5f94fb5b
JF
874 trace_xen_mmu_pgd_pin(mm, pgd);
875
f4f97b3e 876 xen_mc_batch();
3b827c1b 877
86bbc2c2 878 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 879 /* re-enable interrupts for flushing */
f87e4cac 880 xen_mc_issue(0);
d05fdf31 881
f4f97b3e 882 kmap_flush_unused();
d05fdf31 883
f87e4cac
JF
884 xen_mc_batch();
885 }
f4f97b3e 886
d6182fbf
JF
887#ifdef CONFIG_X86_64
888 {
889 pgd_t *user_pgd = xen_get_user_pgd(pgd);
890
891 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
892
893 if (user_pgd) {
eefb47f6 894 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
895 xen_do_pin(MMUEXT_PIN_L4_TABLE,
896 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
897 }
898 }
899#else /* CONFIG_X86_32 */
5deb30d1
JF
900#ifdef CONFIG_X86_PAE
901 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 902 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 903 PT_PMD);
5deb30d1 904#endif
28499143 905 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 906#endif /* CONFIG_X86_64 */
f4f97b3e 907 xen_mc_issue(0);
3b827c1b
JF
908}
909
eefb47f6
JF
910static void xen_pgd_pin(struct mm_struct *mm)
911{
912 __xen_pgd_pin(mm, mm->pgd);
913}
914
0e91398f
JF
915/*
916 * On save, we need to pin all pagetables to make sure they get their
917 * mfns turned into pfns. Search the list for any unpinned pgds and pin
918 * them (unpinned pgds are not currently in use, probably because the
919 * process is under construction or destruction).
eefb47f6
JF
920 *
921 * Expected to be called in stop_machine() ("equivalent to taking
922 * every spinlock in the system"), so the locking doesn't really
923 * matter all that much.
0e91398f
JF
924 */
925void xen_mm_pin_all(void)
926{
0e91398f 927 struct page *page;
74260714 928
a79e53d8 929 spin_lock(&pgd_lock);
f4f97b3e 930
0e91398f
JF
931 list_for_each_entry(page, &pgd_list, lru) {
932 if (!PagePinned(page)) {
eefb47f6 933 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
934 SetPageSavePinned(page);
935 }
936 }
937
a79e53d8 938 spin_unlock(&pgd_lock);
3b827c1b
JF
939}
940
c1f2f09e
EH
941/*
942 * The init_mm pagetable is really pinned as soon as its created, but
943 * that's before we have page structures to store the bits. So do all
944 * the book-keeping now.
945 */
3f508953 946static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
eefb47f6 947 enum pt_level level)
3b827c1b 948{
f4f97b3e
JF
949 SetPagePinned(page);
950 return 0;
951}
3b827c1b 952
b96229b5 953static void __init xen_mark_init_mm_pinned(void)
f4f97b3e 954{
eefb47f6 955 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 956}
3b827c1b 957
eefb47f6
JF
958static int xen_unpin_page(struct mm_struct *mm, struct page *page,
959 enum pt_level level)
f4f97b3e 960{
d60cd46b 961 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 962
f4f97b3e
JF
963 if (pgfl && !PageHighMem(page)) {
964 void *pt = lowmem_page_address(page);
965 unsigned long pfn = page_to_pfn(page);
74260714
JF
966 spinlock_t *ptl = NULL;
967 struct multicall_space mcs;
968
11ad93e5
JF
969 /*
970 * Do the converse to pin_page. If we're using split
971 * pte locks, we must be holding the lock for while
972 * the pte page is unpinned but still RO to prevent
973 * concurrent updates from seeing it in this
974 * partially-pinned state.
975 */
74260714 976 if (level == PT_PTE) {
eefb47f6 977 ptl = xen_pte_lock(page, mm);
74260714 978
11ad93e5
JF
979 if (ptl)
980 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
981 }
982
983 mcs = __xen_mc_entry(0);
f4f97b3e
JF
984
985 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
986 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
987 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
988
989 if (ptl) {
990 /* unlock when batch completed */
7708ad64 991 xen_mc_callback(xen_pte_unlock, ptl);
74260714 992 }
f4f97b3e
JF
993 }
994
995 return 0; /* never need to flush on unpin */
3b827c1b
JF
996}
997
f4f97b3e 998/* Release a pagetables pages back as normal RW */
eefb47f6 999static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 1000{
5f94fb5b
JF
1001 trace_xen_mmu_pgd_unpin(mm, pgd);
1002
f4f97b3e
JF
1003 xen_mc_batch();
1004
74260714 1005 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 1006
d6182fbf
JF
1007#ifdef CONFIG_X86_64
1008 {
1009 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1010
1011 if (user_pgd) {
f63c2f24
T
1012 xen_do_pin(MMUEXT_UNPIN_TABLE,
1013 PFN_DOWN(__pa(user_pgd)));
eefb47f6 1014 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
1015 }
1016 }
1017#endif
1018
5deb30d1
JF
1019#ifdef CONFIG_X86_PAE
1020 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 1021 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 1022 PT_PMD);
5deb30d1 1023#endif
d6182fbf 1024
86bbc2c2 1025 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
f4f97b3e
JF
1026
1027 xen_mc_issue(0);
1028}
3b827c1b 1029
eefb47f6
JF
1030static void xen_pgd_unpin(struct mm_struct *mm)
1031{
1032 __xen_pgd_unpin(mm, mm->pgd);
1033}
1034
0e91398f
JF
1035/*
1036 * On resume, undo any pinning done at save, so that the rest of the
1037 * kernel doesn't see any unexpected pinned pagetables.
1038 */
1039void xen_mm_unpin_all(void)
1040{
0e91398f
JF
1041 struct page *page;
1042
a79e53d8 1043 spin_lock(&pgd_lock);
0e91398f
JF
1044
1045 list_for_each_entry(page, &pgd_list, lru) {
1046 if (PageSavePinned(page)) {
1047 BUG_ON(!PagePinned(page));
eefb47f6 1048 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
1049 ClearPageSavePinned(page);
1050 }
1051 }
1052
a79e53d8 1053 spin_unlock(&pgd_lock);
0e91398f
JF
1054}
1055
4c13629f 1056static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
3b827c1b 1057{
f4f97b3e 1058 spin_lock(&next->page_table_lock);
eefb47f6 1059 xen_pgd_pin(next);
f4f97b3e 1060 spin_unlock(&next->page_table_lock);
3b827c1b
JF
1061}
1062
4c13629f 1063static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
3b827c1b 1064{
f4f97b3e 1065 spin_lock(&mm->page_table_lock);
eefb47f6 1066 xen_pgd_pin(mm);
f4f97b3e 1067 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
1068}
1069
3b827c1b 1070
f87e4cac
JF
1071#ifdef CONFIG_SMP
1072/* Another cpu may still have their %cr3 pointing at the pagetable, so
1073 we need to repoint it somewhere else before we can unpin it. */
1074static void drop_other_mm_ref(void *info)
1075{
1076 struct mm_struct *mm = info;
ce87b3d3 1077 struct mm_struct *active_mm;
3b827c1b 1078
2113f469 1079 active_mm = this_cpu_read(cpu_tlbstate.active_mm);
ce87b3d3 1080
2113f469 1081 if (active_mm == mm && this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
f87e4cac 1082 leave_mm(smp_processor_id());
9f79991d
JF
1083
1084 /* If this cpu still has a stale cr3 reference, then make sure
1085 it has been flushed. */
2113f469 1086 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1087 load_cr3(swapper_pg_dir);
f87e4cac 1088}
3b827c1b 1089
7708ad64 1090static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1091{
e4d98207 1092 cpumask_var_t mask;
9f79991d
JF
1093 unsigned cpu;
1094
f87e4cac
JF
1095 if (current->active_mm == mm) {
1096 if (current->mm == mm)
1097 load_cr3(swapper_pg_dir);
1098 else
1099 leave_mm(smp_processor_id());
9f79991d
JF
1100 }
1101
1102 /* Get the "official" set of cpus referring to our pagetable. */
e4d98207
MT
1103 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1104 for_each_online_cpu(cpu) {
78f1c4d6 1105 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
e4d98207
MT
1106 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1107 continue;
1108 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1109 }
1110 return;
1111 }
78f1c4d6 1112 cpumask_copy(mask, mm_cpumask(mm));
9f79991d
JF
1113
1114 /* It's possible that a vcpu may have a stale reference to our
1115 cr3, because its in lazy mode, and it hasn't yet flushed
1116 its set of pending hypercalls yet. In this case, we can
1117 look at its actual current cr3 value, and force it to flush
1118 if needed. */
1119 for_each_online_cpu(cpu) {
1120 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1121 cpumask_set_cpu(cpu, mask);
3b827c1b
JF
1122 }
1123
e4d98207
MT
1124 if (!cpumask_empty(mask))
1125 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1126 free_cpumask_var(mask);
f87e4cac
JF
1127}
1128#else
7708ad64 1129static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac
JF
1130{
1131 if (current->active_mm == mm)
1132 load_cr3(swapper_pg_dir);
1133}
1134#endif
1135
1136/*
1137 * While a process runs, Xen pins its pagetables, which means that the
1138 * hypervisor forces it to be read-only, and it controls all updates
1139 * to it. This means that all pagetable updates have to go via the
1140 * hypervisor, which is moderately expensive.
1141 *
1142 * Since we're pulling the pagetable down, we switch to use init_mm,
1143 * unpin old process pagetable and mark it all read-write, which
1144 * allows further operations on it to be simple memory accesses.
1145 *
1146 * The only subtle point is that another CPU may be still using the
1147 * pagetable because of lazy tlb flushing. This means we need need to
1148 * switch all CPUs off this pagetable before we can unpin it.
1149 */
4c13629f 1150static void xen_exit_mmap(struct mm_struct *mm)
f87e4cac
JF
1151{
1152 get_cpu(); /* make sure we don't move around */
7708ad64 1153 xen_drop_mm_ref(mm);
f87e4cac 1154 put_cpu();
3b827c1b 1155
f120f13e 1156 spin_lock(&mm->page_table_lock);
df912ea4
JF
1157
1158 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1159 if (xen_page_pinned(mm->pgd))
eefb47f6 1160 xen_pgd_unpin(mm);
74260714 1161
f120f13e 1162 spin_unlock(&mm->page_table_lock);
3b827c1b 1163}
994025ca 1164
3f508953 1165static void __init xen_pagetable_setup_start(pgd_t *base)
319f3ba5
JF
1166{
1167}
1168
279b706b
SS
1169static __init void xen_mapping_pagetable_reserve(u64 start, u64 end)
1170{
1171 /* reserve the range used */
1172 native_pagetable_reserve(start, end);
1173
1174 /* set as RW the rest */
1175 printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end,
1176 PFN_PHYS(pgt_buf_top));
1177 while (end < PFN_PHYS(pgt_buf_top)) {
1178 make_lowmem_page_readwrite(__va(end));
1179 end += PAGE_SIZE;
1180 }
1181}
1182
f1d7062a
TG
1183static void xen_post_allocator_init(void);
1184
3f508953 1185static void __init xen_pagetable_setup_done(pgd_t *base)
319f3ba5
JF
1186{
1187 xen_setup_shared_info();
f1d7062a 1188 xen_post_allocator_init();
319f3ba5
JF
1189}
1190
1191static void xen_write_cr2(unsigned long cr2)
1192{
2113f469 1193 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
319f3ba5
JF
1194}
1195
1196static unsigned long xen_read_cr2(void)
1197{
2113f469 1198 return this_cpu_read(xen_vcpu)->arch.cr2;
319f3ba5
JF
1199}
1200
1201unsigned long xen_read_cr2_direct(void)
1202{
2113f469 1203 return this_cpu_read(xen_vcpu_info.arch.cr2);
319f3ba5
JF
1204}
1205
1206static void xen_flush_tlb(void)
1207{
1208 struct mmuext_op *op;
1209 struct multicall_space mcs;
1210
c8eed171
JF
1211 trace_xen_mmu_flush_tlb(0);
1212
319f3ba5
JF
1213 preempt_disable();
1214
1215 mcs = xen_mc_entry(sizeof(*op));
1216
1217 op = mcs.args;
1218 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1219 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1220
1221 xen_mc_issue(PARAVIRT_LAZY_MMU);
1222
1223 preempt_enable();
1224}
1225
1226static void xen_flush_tlb_single(unsigned long addr)
1227{
1228 struct mmuext_op *op;
1229 struct multicall_space mcs;
1230
c8eed171
JF
1231 trace_xen_mmu_flush_tlb_single(addr);
1232
319f3ba5
JF
1233 preempt_disable();
1234
1235 mcs = xen_mc_entry(sizeof(*op));
1236 op = mcs.args;
1237 op->cmd = MMUEXT_INVLPG_LOCAL;
1238 op->arg1.linear_addr = addr & PAGE_MASK;
1239 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1240
1241 xen_mc_issue(PARAVIRT_LAZY_MMU);
1242
1243 preempt_enable();
1244}
1245
1246static void xen_flush_tlb_others(const struct cpumask *cpus,
1247 struct mm_struct *mm, unsigned long va)
1248{
1249 struct {
1250 struct mmuext_op op;
32dd1194 1251#ifdef CONFIG_SMP
900cba88 1252 DECLARE_BITMAP(mask, num_processors);
32dd1194
KRW
1253#else
1254 DECLARE_BITMAP(mask, NR_CPUS);
1255#endif
319f3ba5
JF
1256 } *args;
1257 struct multicall_space mcs;
1258
c8eed171
JF
1259 trace_xen_mmu_flush_tlb_others(cpus, mm, va);
1260
e3f8a74e
JF
1261 if (cpumask_empty(cpus))
1262 return; /* nothing to do */
319f3ba5
JF
1263
1264 mcs = xen_mc_entry(sizeof(*args));
1265 args = mcs.args;
1266 args->op.arg2.vcpumask = to_cpumask(args->mask);
1267
1268 /* Remove us, and any offline CPUS. */
1269 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1270 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
319f3ba5
JF
1271
1272 if (va == TLB_FLUSH_ALL) {
1273 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1274 } else {
1275 args->op.cmd = MMUEXT_INVLPG_MULTI;
1276 args->op.arg1.linear_addr = va;
1277 }
1278
1279 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1280
319f3ba5
JF
1281 xen_mc_issue(PARAVIRT_LAZY_MMU);
1282}
1283
1284static unsigned long xen_read_cr3(void)
1285{
2113f469 1286 return this_cpu_read(xen_cr3);
319f3ba5
JF
1287}
1288
1289static void set_current_cr3(void *v)
1290{
2113f469 1291 this_cpu_write(xen_current_cr3, (unsigned long)v);
319f3ba5
JF
1292}
1293
1294static void __xen_write_cr3(bool kernel, unsigned long cr3)
1295{
dcf7435c 1296 struct mmuext_op op;
319f3ba5
JF
1297 unsigned long mfn;
1298
c8eed171
JF
1299 trace_xen_mmu_write_cr3(kernel, cr3);
1300
319f3ba5
JF
1301 if (cr3)
1302 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1303 else
1304 mfn = 0;
1305
1306 WARN_ON(mfn == 0 && kernel);
1307
dcf7435c
JF
1308 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1309 op.arg1.mfn = mfn;
319f3ba5 1310
dcf7435c 1311 xen_extend_mmuext_op(&op);
319f3ba5
JF
1312
1313 if (kernel) {
2113f469 1314 this_cpu_write(xen_cr3, cr3);
319f3ba5
JF
1315
1316 /* Update xen_current_cr3 once the batch has actually
1317 been submitted. */
1318 xen_mc_callback(set_current_cr3, (void *)cr3);
1319 }
1320}
1321
1322static void xen_write_cr3(unsigned long cr3)
1323{
1324 BUG_ON(preemptible());
1325
1326 xen_mc_batch(); /* disables interrupts */
1327
1328 /* Update while interrupts are disabled, so its atomic with
1329 respect to ipis */
2113f469 1330 this_cpu_write(xen_cr3, cr3);
319f3ba5
JF
1331
1332 __xen_write_cr3(true, cr3);
1333
1334#ifdef CONFIG_X86_64
1335 {
1336 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1337 if (user_pgd)
1338 __xen_write_cr3(false, __pa(user_pgd));
1339 else
1340 __xen_write_cr3(false, 0);
1341 }
1342#endif
1343
1344 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1345}
1346
1347static int xen_pgd_alloc(struct mm_struct *mm)
1348{
1349 pgd_t *pgd = mm->pgd;
1350 int ret = 0;
1351
1352 BUG_ON(PagePinned(virt_to_page(pgd)));
1353
1354#ifdef CONFIG_X86_64
1355 {
1356 struct page *page = virt_to_page(pgd);
1357 pgd_t *user_pgd;
1358
1359 BUG_ON(page->private != 0);
1360
1361 ret = -ENOMEM;
1362
1363 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1364 page->private = (unsigned long)user_pgd;
1365
1366 if (user_pgd != NULL) {
1367 user_pgd[pgd_index(VSYSCALL_START)] =
1368 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1369 ret = 0;
1370 }
1371
1372 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1373 }
1374#endif
1375
1376 return ret;
1377}
1378
1379static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1380{
1381#ifdef CONFIG_X86_64
1382 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1383
1384 if (user_pgd)
1385 free_page((unsigned long)user_pgd);
1386#endif
1387}
1388
ee176455 1389#ifdef CONFIG_X86_32
3f508953 1390static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1f4f9315
JF
1391{
1392 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1393 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1394 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1395 pte_val_ma(pte));
ee176455
SS
1396
1397 return pte;
1398}
1399#else /* CONFIG_X86_64 */
3f508953 1400static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
ee176455
SS
1401{
1402 unsigned long pfn = pte_pfn(pte);
fef5ba79
JF
1403
1404 /*
1405 * If the new pfn is within the range of the newly allocated
1406 * kernel pagetable, and it isn't being mapped into an
d8aa5ec3
SS
1407 * early_ioremap fixmap slot as a freshly allocated page, make sure
1408 * it is RO.
fef5ba79 1409 */
d8aa5ec3 1410 if (((!is_early_ioremap_ptep(ptep) &&
b9269dc7 1411 pfn >= pgt_buf_start && pfn < pgt_buf_top)) ||
d8aa5ec3 1412 (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1)))
fef5ba79 1413 pte = pte_wrprotect(pte);
1f4f9315
JF
1414
1415 return pte;
1416}
ee176455 1417#endif /* CONFIG_X86_64 */
1f4f9315
JF
1418
1419/* Init-time set_pte while constructing initial pagetables, which
1420 doesn't allow RO pagetable pages to be remapped RW */
3f508953 1421static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1f4f9315
JF
1422{
1423 pte = mask_rw_pte(ptep, pte);
1424
1425 xen_set_pte(ptep, pte);
1426}
319f3ba5 1427
b96229b5
JF
1428static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1429{
1430 struct mmuext_op op;
1431 op.cmd = cmd;
1432 op.arg1.mfn = pfn_to_mfn(pfn);
1433 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1434 BUG();
1435}
1436
319f3ba5
JF
1437/* Early in boot, while setting up the initial pagetable, assume
1438 everything is pinned. */
3f508953 1439static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
319f3ba5 1440{
b96229b5
JF
1441#ifdef CONFIG_FLATMEM
1442 BUG_ON(mem_map); /* should only be used early */
1443#endif
1444 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1445 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1446}
1447
1448/* Used for pmd and pud */
3f508953 1449static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
b96229b5 1450{
319f3ba5
JF
1451#ifdef CONFIG_FLATMEM
1452 BUG_ON(mem_map); /* should only be used early */
1453#endif
1454 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1455}
1456
1457/* Early release_pte assumes that all pts are pinned, since there's
1458 only init_mm and anything attached to that is pinned. */
3f508953 1459static void __init xen_release_pte_init(unsigned long pfn)
319f3ba5 1460{
b96229b5 1461 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
319f3ba5
JF
1462 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1463}
1464
3f508953 1465static void __init xen_release_pmd_init(unsigned long pfn)
319f3ba5 1466{
b96229b5 1467 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
319f3ba5
JF
1468}
1469
bc7fe1d9
JF
1470static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1471{
1472 struct multicall_space mcs;
1473 struct mmuext_op *op;
1474
1475 mcs = __xen_mc_entry(sizeof(*op));
1476 op = mcs.args;
1477 op->cmd = cmd;
1478 op->arg1.mfn = pfn_to_mfn(pfn);
1479
1480 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1481}
1482
1483static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1484{
1485 struct multicall_space mcs;
1486 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1487
1488 mcs = __xen_mc_entry(0);
1489 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1490 pfn_pte(pfn, prot), 0);
1491}
1492
319f3ba5
JF
1493/* This needs to make sure the new pte page is pinned iff its being
1494 attached to a pinned pagetable. */
bc7fe1d9
JF
1495static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1496 unsigned level)
319f3ba5 1497{
bc7fe1d9
JF
1498 bool pinned = PagePinned(virt_to_page(mm->pgd));
1499
c2ba050d 1500 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
319f3ba5 1501
c2ba050d 1502 if (pinned) {
bc7fe1d9 1503 struct page *page = pfn_to_page(pfn);
319f3ba5 1504
319f3ba5
JF
1505 SetPagePinned(page);
1506
319f3ba5 1507 if (!PageHighMem(page)) {
bc7fe1d9
JF
1508 xen_mc_batch();
1509
1510 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1511
319f3ba5 1512 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
bc7fe1d9
JF
1513 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1514
1515 xen_mc_issue(PARAVIRT_LAZY_MMU);
319f3ba5
JF
1516 } else {
1517 /* make sure there are no stray mappings of
1518 this page */
1519 kmap_flush_unused();
1520 }
1521 }
1522}
1523
1524static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1525{
1526 xen_alloc_ptpage(mm, pfn, PT_PTE);
1527}
1528
1529static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1530{
1531 xen_alloc_ptpage(mm, pfn, PT_PMD);
1532}
1533
1534/* This should never happen until we're OK to use struct page */
bc7fe1d9 1535static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
319f3ba5
JF
1536{
1537 struct page *page = pfn_to_page(pfn);
c2ba050d 1538 bool pinned = PagePinned(page);
319f3ba5 1539
c2ba050d 1540 trace_xen_mmu_release_ptpage(pfn, level, pinned);
319f3ba5 1541
c2ba050d 1542 if (pinned) {
319f3ba5 1543 if (!PageHighMem(page)) {
bc7fe1d9
JF
1544 xen_mc_batch();
1545
319f3ba5 1546 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
bc7fe1d9
JF
1547 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1548
1549 __set_pfn_prot(pfn, PAGE_KERNEL);
1550
1551 xen_mc_issue(PARAVIRT_LAZY_MMU);
319f3ba5
JF
1552 }
1553 ClearPagePinned(page);
1554 }
1555}
1556
1557static void xen_release_pte(unsigned long pfn)
1558{
1559 xen_release_ptpage(pfn, PT_PTE);
1560}
1561
1562static void xen_release_pmd(unsigned long pfn)
1563{
1564 xen_release_ptpage(pfn, PT_PMD);
1565}
1566
1567#if PAGETABLE_LEVELS == 4
1568static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1569{
1570 xen_alloc_ptpage(mm, pfn, PT_PUD);
1571}
1572
1573static void xen_release_pud(unsigned long pfn)
1574{
1575 xen_release_ptpage(pfn, PT_PUD);
1576}
1577#endif
1578
1579void __init xen_reserve_top(void)
1580{
1581#ifdef CONFIG_X86_32
1582 unsigned long top = HYPERVISOR_VIRT_START;
1583 struct xen_platform_parameters pp;
1584
1585 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1586 top = pp.virt_start;
1587
1588 reserve_top_address(-top);
1589#endif /* CONFIG_X86_32 */
1590}
1591
1592/*
1593 * Like __va(), but returns address in the kernel mapping (which is
1594 * all we have until the physical memory mapping has been set up.
1595 */
1596static void *__ka(phys_addr_t paddr)
1597{
1598#ifdef CONFIG_X86_64
1599 return (void *)(paddr + __START_KERNEL_map);
1600#else
1601 return __va(paddr);
1602#endif
1603}
1604
1605/* Convert a machine address to physical address */
1606static unsigned long m2p(phys_addr_t maddr)
1607{
1608 phys_addr_t paddr;
1609
1610 maddr &= PTE_PFN_MASK;
1611 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1612
1613 return paddr;
1614}
1615
1616/* Convert a machine address to kernel virtual */
1617static void *m2v(phys_addr_t maddr)
1618{
1619 return __ka(m2p(maddr));
1620}
1621
4ec5387c 1622/* Set the page permissions on an identity-mapped pages */
319f3ba5
JF
1623static void set_page_prot(void *addr, pgprot_t prot)
1624{
1625 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1626 pte_t pte = pfn_pte(pfn, prot);
1627
1628 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1629 BUG();
1630}
1631
3f508953 1632static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
319f3ba5
JF
1633{
1634 unsigned pmdidx, pteidx;
1635 unsigned ident_pte;
1636 unsigned long pfn;
1637
764f0138
JF
1638 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1639 PAGE_SIZE);
1640
319f3ba5
JF
1641 ident_pte = 0;
1642 pfn = 0;
1643 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1644 pte_t *pte_page;
1645
1646 /* Reuse or allocate a page of ptes */
1647 if (pmd_present(pmd[pmdidx]))
1648 pte_page = m2v(pmd[pmdidx].pmd);
1649 else {
1650 /* Check for free pte pages */
764f0138 1651 if (ident_pte == LEVEL1_IDENT_ENTRIES)
319f3ba5
JF
1652 break;
1653
1654 pte_page = &level1_ident_pgt[ident_pte];
1655 ident_pte += PTRS_PER_PTE;
1656
1657 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1658 }
1659
1660 /* Install mappings */
1661 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1662 pte_t pte;
1663
a91d9287
SS
1664#ifdef CONFIG_X86_32
1665 if (pfn > max_pfn_mapped)
1666 max_pfn_mapped = pfn;
1667#endif
1668
319f3ba5
JF
1669 if (!pte_none(pte_page[pteidx]))
1670 continue;
1671
1672 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1673 pte_page[pteidx] = pte;
1674 }
1675 }
1676
1677 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1678 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1679
1680 set_page_prot(pmd, PAGE_KERNEL_RO);
1681}
1682
7e77506a
IC
1683void __init xen_setup_machphys_mapping(void)
1684{
1685 struct xen_machphys_mapping mapping;
7e77506a
IC
1686
1687 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1688 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
ccbcdf7c 1689 machine_to_phys_nr = mapping.max_mfn + 1;
7e77506a 1690 } else {
ccbcdf7c 1691 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
7e77506a 1692 }
ccbcdf7c 1693#ifdef CONFIG_X86_32
61cca2fa
JB
1694 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1695 < machine_to_phys_mapping);
ccbcdf7c 1696#endif
7e77506a
IC
1697}
1698
319f3ba5
JF
1699#ifdef CONFIG_X86_64
1700static void convert_pfn_mfn(void *v)
1701{
1702 pte_t *pte = v;
1703 int i;
1704
1705 /* All levels are converted the same way, so just treat them
1706 as ptes. */
1707 for (i = 0; i < PTRS_PER_PTE; i++)
1708 pte[i] = xen_make_pte(pte[i].pte);
1709}
1710
1711/*
0d2eb44f 1712 * Set up the initial kernel pagetable.
319f3ba5
JF
1713 *
1714 * We can construct this by grafting the Xen provided pagetable into
1715 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1716 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1717 * means that only the kernel has a physical mapping to start with -
1718 * but that's enough to get __va working. We need to fill in the rest
1719 * of the physical mapping once some sort of allocator has been set
1720 * up.
1721 */
3699aad0 1722void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
319f3ba5
JF
1723{
1724 pud_t *l3;
1725 pmd_t *l2;
1726
14988a4d
SS
1727 /* max_pfn_mapped is the last pfn mapped in the initial memory
1728 * mappings. Considering that on Xen after the kernel mappings we
1729 * have the mappings of some pages that don't exist in pfn space, we
1730 * set max_pfn_mapped to the last real pfn mapped. */
1731 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1732
319f3ba5
JF
1733 /* Zap identity mapping */
1734 init_level4_pgt[0] = __pgd(0);
1735
1736 /* Pre-constructed entries are in pfn, so convert to mfn */
4fac153a
KRW
1737 /* L4[272] -> level3_ident_pgt
1738 * L4[511] -> level3_kernel_pgt */
319f3ba5 1739 convert_pfn_mfn(init_level4_pgt);
4fac153a
KRW
1740
1741 /* L3_i[0] -> level2_ident_pgt */
319f3ba5 1742 convert_pfn_mfn(level3_ident_pgt);
4fac153a
KRW
1743 /* L3_k[510] -> level2_kernel_pgt
1744 * L3_i[511] -> level2_fixmap_pgt */
319f3ba5
JF
1745 convert_pfn_mfn(level3_kernel_pgt);
1746
4fac153a 1747 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
319f3ba5
JF
1748 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1749 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1750
4fac153a
KRW
1751 /* Graft it onto L4[272][0]. Note that we creating an aliasing problem:
1752 * Both L4[272][0] and L4[511][511] have entries that point to the same
1753 * L2 (PMD) tables. Meaning that if you modify it in __va space
1754 * it will be also modified in the __ka space! (But if you just
1755 * modify the PMD table to point to other PTE's or none, then you
1756 * are OK - which is what cleanup_highmap does) */
319f3ba5 1757 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
4fac153a 1758 /* Graft it onto L4[511][511] */
319f3ba5
JF
1759 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1760
4fac153a 1761 /* Get [511][510] and graft that in level2_fixmap_pgt */
319f3ba5
JF
1762 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1763 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1764 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
4fac153a
KRW
1765 /* Note that we don't do anything with level1_fixmap_pgt which
1766 * we don't need. */
319f3ba5
JF
1767
1768 /* Set up identity map */
1769 xen_map_identity_early(level2_ident_pgt, max_pfn);
1770
1771 /* Make pagetable pieces RO */
1772 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1773 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1774 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1775 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1776 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1777 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1778
1779 /* Pin down new L4 */
1780 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1781 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1782
1783 /* Unpin Xen-provided one */
1784 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1785
1786 /* Switch over */
1787 pgd = init_level4_pgt;
1788
1789 /*
1790 * At this stage there can be no user pgd, and no page
1791 * structure to attach it to, so make sure we just set kernel
1792 * pgd.
1793 */
1794 xen_mc_batch();
1795 __xen_write_cr3(true, __pa(pgd));
1796 xen_mc_issue(PARAVIRT_LAZY_CPU);
1797
24aa0788
TH
1798 memblock_reserve(__pa(xen_start_info->pt_base),
1799 xen_start_info->nr_pt_frames * PAGE_SIZE);
319f3ba5
JF
1800}
1801#else /* !CONFIG_X86_64 */
5b5c1af1
IC
1802static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1803static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1804
3f508953 1805static void __init xen_write_cr3_init(unsigned long cr3)
5b5c1af1
IC
1806{
1807 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1808
1809 BUG_ON(read_cr3() != __pa(initial_page_table));
1810 BUG_ON(cr3 != __pa(swapper_pg_dir));
1811
1812 /*
1813 * We are switching to swapper_pg_dir for the first time (from
1814 * initial_page_table) and therefore need to mark that page
1815 * read-only and then pin it.
1816 *
1817 * Xen disallows sharing of kernel PMDs for PAE
1818 * guests. Therefore we must copy the kernel PMD from
1819 * initial_page_table into a new kernel PMD to be used in
1820 * swapper_pg_dir.
1821 */
1822 swapper_kernel_pmd =
1823 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1824 memcpy(swapper_kernel_pmd, initial_kernel_pmd,
1825 sizeof(pmd_t) * PTRS_PER_PMD);
1826 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1827 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1828 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1829
1830 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1831 xen_write_cr3(cr3);
1832 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1833
1834 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1835 PFN_DOWN(__pa(initial_page_table)));
1836 set_page_prot(initial_page_table, PAGE_KERNEL);
1837 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1838
1839 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1840}
319f3ba5 1841
3699aad0 1842void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
319f3ba5
JF
1843{
1844 pmd_t *kernel_pmd;
1845
5b5c1af1
IC
1846 initial_kernel_pmd =
1847 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
f0991802 1848
a91d9287
SS
1849 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1850 xen_start_info->nr_pt_frames * PAGE_SIZE +
1851 512*1024);
319f3ba5
JF
1852
1853 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
5b5c1af1 1854 memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
319f3ba5 1855
5b5c1af1 1856 xen_map_identity_early(initial_kernel_pmd, max_pfn);
319f3ba5 1857
5b5c1af1
IC
1858 memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1859 initial_page_table[KERNEL_PGD_BOUNDARY] =
1860 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
319f3ba5 1861
5b5c1af1
IC
1862 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1863 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
319f3ba5
JF
1864 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1865
1866 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1867
5b5c1af1
IC
1868 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1869 PFN_DOWN(__pa(initial_page_table)));
1870 xen_write_cr3(__pa(initial_page_table));
319f3ba5 1871
24aa0788 1872 memblock_reserve(__pa(xen_start_info->pt_base),
dc6821e0 1873 xen_start_info->nr_pt_frames * PAGE_SIZE);
319f3ba5
JF
1874}
1875#endif /* CONFIG_X86_64 */
1876
98511f35
JF
1877static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1878
3b3809ac 1879static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
319f3ba5
JF
1880{
1881 pte_t pte;
1882
1883 phys >>= PAGE_SHIFT;
1884
1885 switch (idx) {
1886 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1887#ifdef CONFIG_X86_F00F_BUG
1888 case FIX_F00F_IDT:
1889#endif
1890#ifdef CONFIG_X86_32
1891 case FIX_WP_TEST:
1892 case FIX_VDSO:
1893# ifdef CONFIG_HIGHMEM
1894 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1895# endif
1896#else
1897 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
5d5791af 1898 case VVAR_PAGE:
319f3ba5 1899#endif
3ecb1b7d
JF
1900 case FIX_TEXT_POKE0:
1901 case FIX_TEXT_POKE1:
1902 /* All local page mappings */
319f3ba5
JF
1903 pte = pfn_pte(phys, prot);
1904 break;
1905
98511f35
JF
1906#ifdef CONFIG_X86_LOCAL_APIC
1907 case FIX_APIC_BASE: /* maps dummy local APIC */
1908 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1909 break;
1910#endif
1911
1912#ifdef CONFIG_X86_IO_APIC
1913 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1914 /*
1915 * We just don't map the IO APIC - all access is via
1916 * hypercalls. Keep the address in the pte for reference.
1917 */
27abd14b 1918 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
98511f35
JF
1919 break;
1920#endif
1921
c0011dbf
JF
1922 case FIX_PARAVIRT_BOOTMAP:
1923 /* This is an MFN, but it isn't an IO mapping from the
1924 IO domain */
319f3ba5
JF
1925 pte = mfn_pte(phys, prot);
1926 break;
c0011dbf
JF
1927
1928 default:
1929 /* By default, set_fixmap is used for hardware mappings */
1930 pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
1931 break;
319f3ba5
JF
1932 }
1933
1934 __native_set_fixmap(idx, pte);
1935
1936#ifdef CONFIG_X86_64
1937 /* Replicate changes to map the vsyscall page into the user
1938 pagetable vsyscall mapping. */
5d5791af
AL
1939 if ((idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) ||
1940 idx == VVAR_PAGE) {
319f3ba5
JF
1941 unsigned long vaddr = __fix_to_virt(idx);
1942 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1943 }
1944#endif
1945}
1946
3f508953 1947static void __init xen_post_allocator_init(void)
319f3ba5
JF
1948{
1949 pv_mmu_ops.set_pte = xen_set_pte;
1950 pv_mmu_ops.set_pmd = xen_set_pmd;
1951 pv_mmu_ops.set_pud = xen_set_pud;
1952#if PAGETABLE_LEVELS == 4
1953 pv_mmu_ops.set_pgd = xen_set_pgd;
1954#endif
1955
1956 /* This will work as long as patching hasn't happened yet
1957 (which it hasn't) */
1958 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1959 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1960 pv_mmu_ops.release_pte = xen_release_pte;
1961 pv_mmu_ops.release_pmd = xen_release_pmd;
1962#if PAGETABLE_LEVELS == 4
1963 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1964 pv_mmu_ops.release_pud = xen_release_pud;
1965#endif
1966
1967#ifdef CONFIG_X86_64
1968 SetPagePinned(virt_to_page(level3_user_vsyscall));
1969#endif
1970 xen_mark_init_mm_pinned();
1971}
1972
b407fc57
JF
1973static void xen_leave_lazy_mmu(void)
1974{
5caecb94 1975 preempt_disable();
b407fc57
JF
1976 xen_mc_flush();
1977 paravirt_leave_lazy_mmu();
5caecb94 1978 preempt_enable();
b407fc57 1979}
319f3ba5 1980
3f508953 1981static const struct pv_mmu_ops xen_mmu_ops __initconst = {
319f3ba5
JF
1982 .read_cr2 = xen_read_cr2,
1983 .write_cr2 = xen_write_cr2,
1984
1985 .read_cr3 = xen_read_cr3,
5b5c1af1
IC
1986#ifdef CONFIG_X86_32
1987 .write_cr3 = xen_write_cr3_init,
1988#else
319f3ba5 1989 .write_cr3 = xen_write_cr3,
5b5c1af1 1990#endif
319f3ba5
JF
1991
1992 .flush_tlb_user = xen_flush_tlb,
1993 .flush_tlb_kernel = xen_flush_tlb,
1994 .flush_tlb_single = xen_flush_tlb_single,
1995 .flush_tlb_others = xen_flush_tlb_others,
1996
1997 .pte_update = paravirt_nop,
1998 .pte_update_defer = paravirt_nop,
1999
2000 .pgd_alloc = xen_pgd_alloc,
2001 .pgd_free = xen_pgd_free,
2002
2003 .alloc_pte = xen_alloc_pte_init,
2004 .release_pte = xen_release_pte_init,
b96229b5 2005 .alloc_pmd = xen_alloc_pmd_init,
b96229b5 2006 .release_pmd = xen_release_pmd_init,
319f3ba5 2007
319f3ba5 2008 .set_pte = xen_set_pte_init,
319f3ba5
JF
2009 .set_pte_at = xen_set_pte_at,
2010 .set_pmd = xen_set_pmd_hyper,
2011
2012 .ptep_modify_prot_start = __ptep_modify_prot_start,
2013 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2014
da5de7c2
JF
2015 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2016 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 2017
da5de7c2
JF
2018 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
2019 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
2020
2021#ifdef CONFIG_X86_PAE
2022 .set_pte_atomic = xen_set_pte_atomic,
319f3ba5
JF
2023 .pte_clear = xen_pte_clear,
2024 .pmd_clear = xen_pmd_clear,
2025#endif /* CONFIG_X86_PAE */
2026 .set_pud = xen_set_pud_hyper,
2027
da5de7c2
JF
2028 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2029 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
319f3ba5
JF
2030
2031#if PAGETABLE_LEVELS == 4
da5de7c2
JF
2032 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2033 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
2034 .set_pgd = xen_set_pgd_hyper,
2035
b96229b5
JF
2036 .alloc_pud = xen_alloc_pmd_init,
2037 .release_pud = xen_release_pmd_init,
319f3ba5
JF
2038#endif /* PAGETABLE_LEVELS == 4 */
2039
2040 .activate_mm = xen_activate_mm,
2041 .dup_mmap = xen_dup_mmap,
2042 .exit_mmap = xen_exit_mmap,
2043
2044 .lazy_mode = {
2045 .enter = paravirt_enter_lazy_mmu,
b407fc57 2046 .leave = xen_leave_lazy_mmu,
319f3ba5
JF
2047 },
2048
2049 .set_fixmap = xen_set_fixmap,
2050};
2051
030cb6c0
TG
2052void __init xen_init_mmu_ops(void)
2053{
279b706b 2054 x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve;
030cb6c0
TG
2055 x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
2056 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2057 pv_mmu_ops = xen_mmu_ops;
d2cb2145 2058
98511f35 2059 memset(dummy_mapping, 0xff, PAGE_SIZE);
030cb6c0 2060}
319f3ba5 2061
08bbc9da
AN
2062/* Protected by xen_reservation_lock. */
2063#define MAX_CONTIG_ORDER 9 /* 2MB */
2064static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2065
2066#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2067static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2068 unsigned long *in_frames,
2069 unsigned long *out_frames)
2070{
2071 int i;
2072 struct multicall_space mcs;
2073
2074 xen_mc_batch();
2075 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2076 mcs = __xen_mc_entry(0);
2077
2078 if (in_frames)
2079 in_frames[i] = virt_to_mfn(vaddr);
2080
2081 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
6eaa412f 2082 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
08bbc9da
AN
2083
2084 if (out_frames)
2085 out_frames[i] = virt_to_pfn(vaddr);
2086 }
2087 xen_mc_issue(0);
2088}
2089
2090/*
2091 * Update the pfn-to-mfn mappings for a virtual address range, either to
2092 * point to an array of mfns, or contiguously from a single starting
2093 * mfn.
2094 */
2095static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2096 unsigned long *mfns,
2097 unsigned long first_mfn)
2098{
2099 unsigned i, limit;
2100 unsigned long mfn;
2101
2102 xen_mc_batch();
2103
2104 limit = 1u << order;
2105 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2106 struct multicall_space mcs;
2107 unsigned flags;
2108
2109 mcs = __xen_mc_entry(0);
2110 if (mfns)
2111 mfn = mfns[i];
2112 else
2113 mfn = first_mfn + i;
2114
2115 if (i < (limit - 1))
2116 flags = 0;
2117 else {
2118 if (order == 0)
2119 flags = UVMF_INVLPG | UVMF_ALL;
2120 else
2121 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2122 }
2123
2124 MULTI_update_va_mapping(mcs.mc, vaddr,
2125 mfn_pte(mfn, PAGE_KERNEL), flags);
2126
2127 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2128 }
2129
2130 xen_mc_issue(0);
2131}
2132
2133/*
2134 * Perform the hypercall to exchange a region of our pfns to point to
2135 * memory with the required contiguous alignment. Takes the pfns as
2136 * input, and populates mfns as output.
2137 *
2138 * Returns a success code indicating whether the hypervisor was able to
2139 * satisfy the request or not.
2140 */
2141static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2142 unsigned long *pfns_in,
2143 unsigned long extents_out,
2144 unsigned int order_out,
2145 unsigned long *mfns_out,
2146 unsigned int address_bits)
2147{
2148 long rc;
2149 int success;
2150
2151 struct xen_memory_exchange exchange = {
2152 .in = {
2153 .nr_extents = extents_in,
2154 .extent_order = order_in,
2155 .extent_start = pfns_in,
2156 .domid = DOMID_SELF
2157 },
2158 .out = {
2159 .nr_extents = extents_out,
2160 .extent_order = order_out,
2161 .extent_start = mfns_out,
2162 .address_bits = address_bits,
2163 .domid = DOMID_SELF
2164 }
2165 };
2166
2167 BUG_ON(extents_in << order_in != extents_out << order_out);
2168
2169 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2170 success = (exchange.nr_exchanged == extents_in);
2171
2172 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2173 BUG_ON(success && (rc != 0));
2174
2175 return success;
2176}
2177
2178int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
2179 unsigned int address_bits)
2180{
2181 unsigned long *in_frames = discontig_frames, out_frame;
2182 unsigned long flags;
2183 int success;
2184
2185 /*
2186 * Currently an auto-translated guest will not perform I/O, nor will
2187 * it require PAE page directories below 4GB. Therefore any calls to
2188 * this function are redundant and can be ignored.
2189 */
2190
2191 if (xen_feature(XENFEAT_auto_translated_physmap))
2192 return 0;
2193
2194 if (unlikely(order > MAX_CONTIG_ORDER))
2195 return -ENOMEM;
2196
2197 memset((void *) vstart, 0, PAGE_SIZE << order);
2198
08bbc9da
AN
2199 spin_lock_irqsave(&xen_reservation_lock, flags);
2200
2201 /* 1. Zap current PTEs, remembering MFNs. */
2202 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2203
2204 /* 2. Get a new contiguous memory extent. */
2205 out_frame = virt_to_pfn(vstart);
2206 success = xen_exchange_memory(1UL << order, 0, in_frames,
2207 1, order, &out_frame,
2208 address_bits);
2209
2210 /* 3. Map the new extent in place of old pages. */
2211 if (success)
2212 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2213 else
2214 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2215
2216 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2217
2218 return success ? 0 : -ENOMEM;
2219}
2220EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2221
2222void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
2223{
2224 unsigned long *out_frames = discontig_frames, in_frame;
2225 unsigned long flags;
2226 int success;
2227
2228 if (xen_feature(XENFEAT_auto_translated_physmap))
2229 return;
2230
2231 if (unlikely(order > MAX_CONTIG_ORDER))
2232 return;
2233
2234 memset((void *) vstart, 0, PAGE_SIZE << order);
2235
08bbc9da
AN
2236 spin_lock_irqsave(&xen_reservation_lock, flags);
2237
2238 /* 1. Find start MFN of contiguous extent. */
2239 in_frame = virt_to_mfn(vstart);
2240
2241 /* 2. Zap current PTEs. */
2242 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2243
2244 /* 3. Do the exchange for non-contiguous MFNs. */
2245 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2246 0, out_frames, 0);
2247
2248 /* 4. Map new pages in place of old pages. */
2249 if (success)
2250 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2251 else
2252 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2253
2254 spin_unlock_irqrestore(&xen_reservation_lock, flags);
030cb6c0 2255}
08bbc9da 2256EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
319f3ba5 2257
ca65f9fc 2258#ifdef CONFIG_XEN_PVHVM
59151001
SS
2259static void xen_hvm_exit_mmap(struct mm_struct *mm)
2260{
2261 struct xen_hvm_pagetable_dying a;
2262 int rc;
2263
2264 a.domid = DOMID_SELF;
2265 a.gpa = __pa(mm->pgd);
2266 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2267 WARN_ON_ONCE(rc < 0);
2268}
2269
2270static int is_pagetable_dying_supported(void)
2271{
2272 struct xen_hvm_pagetable_dying a;
2273 int rc = 0;
2274
2275 a.domid = DOMID_SELF;
2276 a.gpa = 0x00;
2277 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2278 if (rc < 0) {
2279 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2280 return 0;
2281 }
2282 return 1;
2283}
2284
2285void __init xen_hvm_init_mmu_ops(void)
2286{
2287 if (is_pagetable_dying_supported())
2288 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2289}
ca65f9fc 2290#endif
59151001 2291
de1ef206
IC
2292#define REMAP_BATCH_SIZE 16
2293
2294struct remap_data {
2295 unsigned long mfn;
2296 pgprot_t prot;
2297 struct mmu_update *mmu_update;
2298};
2299
2300static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2301 unsigned long addr, void *data)
2302{
2303 struct remap_data *rmd = data;
2304 pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
2305
d5108316 2306 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
de1ef206
IC
2307 rmd->mmu_update->val = pte_val_ma(pte);
2308 rmd->mmu_update++;
2309
2310 return 0;
2311}
2312
2313int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2314 unsigned long addr,
2315 unsigned long mfn, int nr,
2316 pgprot_t prot, unsigned domid)
2317{
2318 struct remap_data rmd;
2319 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2320 int batch;
2321 unsigned long range;
2322 int err = 0;
2323
2324 prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
2325
e060e7af
SS
2326 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
2327 (VM_PFNMAP | VM_RESERVED | VM_IO)));
de1ef206
IC
2328
2329 rmd.mfn = mfn;
2330 rmd.prot = prot;
2331
2332 while (nr) {
2333 batch = min(REMAP_BATCH_SIZE, nr);
2334 range = (unsigned long)batch << PAGE_SHIFT;
2335
2336 rmd.mmu_update = mmu_update;
2337 err = apply_to_page_range(vma->vm_mm, addr, range,
2338 remap_area_mfn_pte_fn, &rmd);
2339 if (err)
2340 goto out;
2341
2342 err = -EFAULT;
2343 if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
2344 goto out;
2345
2346 nr -= batch;
2347 addr += range;
2348 }
2349
2350 err = 0;
2351out:
2352
2353 flush_tlb_all();
2354
2355 return err;
2356}
2357EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);