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3b827c1b
JF
1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
d2cb2145 45#include <linux/vmalloc.h>
44408ad7 46#include <linux/module.h>
5a0e3ad6 47#include <linux/gfp.h>
a9ce6bc1 48#include <linux/memblock.h>
2222e71b 49#include <linux/seq_file.h>
34b6f01a 50#include <linux/crash_dump.h>
3b827c1b 51
84708807
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52#include <trace/events/xen.h>
53
3b827c1b
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54#include <asm/pgtable.h>
55#include <asm/tlbflush.h>
5deb30d1 56#include <asm/fixmap.h>
3b827c1b 57#include <asm/mmu_context.h>
319f3ba5 58#include <asm/setup.h>
f4f97b3e 59#include <asm/paravirt.h>
7347b408 60#include <asm/e820.h>
cbcd79c2 61#include <asm/linkage.h>
08bbc9da 62#include <asm/page.h>
fef5ba79 63#include <asm/init.h>
41f2e477 64#include <asm/pat.h>
900cba88 65#include <asm/smp.h>
3b827c1b
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66
67#include <asm/xen/hypercall.h>
f4f97b3e 68#include <asm/xen/hypervisor.h>
3b827c1b 69
c0011dbf 70#include <xen/xen.h>
3b827c1b
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71#include <xen/page.h>
72#include <xen/interface/xen.h>
59151001 73#include <xen/interface/hvm/hvm_op.h>
319f3ba5 74#include <xen/interface/version.h>
c0011dbf 75#include <xen/interface/memory.h>
319f3ba5 76#include <xen/hvc-console.h>
3b827c1b 77
f4f97b3e 78#include "multicalls.h"
3b827c1b 79#include "mmu.h"
994025ca
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80#include "debugfs.h"
81
19001c8c
AN
82/*
83 * Protects atomic reservation decrease/increase against concurrent increases.
06f521d5 84 * Also protects non-atomic updates of current_pages and balloon lists.
19001c8c
AN
85 */
86DEFINE_SPINLOCK(xen_reservation_lock);
87
caaf9ecf 88#ifdef CONFIG_X86_32
319f3ba5
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89/*
90 * Identity map, in addition to plain kernel map. This needs to be
91 * large enough to allocate page table pages to allocate the rest.
92 * Each page can map 2MB.
93 */
764f0138
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94#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
95static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
caaf9ecf 96#endif
319f3ba5
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97#ifdef CONFIG_X86_64
98/* l3 pud for userspace vsyscall mapping */
99static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
100#endif /* CONFIG_X86_64 */
101
102/*
103 * Note about cr3 (pagetable base) values:
104 *
105 * xen_cr3 contains the current logical cr3 value; it contains the
106 * last set cr3. This may not be the current effective cr3, because
107 * its update may be being lazily deferred. However, a vcpu looking
108 * at its own cr3 can use this value knowing that it everything will
109 * be self-consistent.
110 *
111 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
112 * hypercall to set the vcpu cr3 is complete (so it may be a little
113 * out of date, but it will never be set early). If one vcpu is
114 * looking at another vcpu's cr3 value, it should use this variable.
115 */
116DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
117DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
118
119
d6182fbf
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120/*
121 * Just beyond the highest usermode address. STACK_TOP_MAX has a
122 * redzone above it, so round it up to a PGD boundary.
123 */
124#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
125
9976b39b
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126unsigned long arbitrary_virt_to_mfn(void *vaddr)
127{
128 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
129
130 return PFN_DOWN(maddr.maddr);
131}
132
ce803e70 133xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 134{
ce803e70 135 unsigned long address = (unsigned long)vaddr;
da7bfc50 136 unsigned int level;
9f32d21c
CL
137 pte_t *pte;
138 unsigned offset;
3b827c1b 139
9f32d21c
CL
140 /*
141 * if the PFN is in the linear mapped vaddr range, we can just use
142 * the (quick) virt_to_machine() p2m lookup
143 */
144 if (virt_addr_valid(vaddr))
145 return virt_to_machine(vaddr);
146
147 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 148
9f32d21c
CL
149 pte = lookup_address(address, &level);
150 BUG_ON(pte == NULL);
151 offset = address & ~PAGE_MASK;
ebd879e3 152 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b 153}
de23be5f 154EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
3b827c1b
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155
156void make_lowmem_page_readonly(void *vaddr)
157{
158 pte_t *pte, ptev;
159 unsigned long address = (unsigned long)vaddr;
da7bfc50 160 unsigned int level;
3b827c1b 161
f0646e43 162 pte = lookup_address(address, &level);
fef5ba79
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163 if (pte == NULL)
164 return; /* vaddr missing */
3b827c1b
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165
166 ptev = pte_wrprotect(*pte);
167
168 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
169 BUG();
170}
171
172void make_lowmem_page_readwrite(void *vaddr)
173{
174 pte_t *pte, ptev;
175 unsigned long address = (unsigned long)vaddr;
da7bfc50 176 unsigned int level;
3b827c1b 177
f0646e43 178 pte = lookup_address(address, &level);
fef5ba79
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179 if (pte == NULL)
180 return; /* vaddr missing */
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181
182 ptev = pte_mkwrite(*pte);
183
184 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
185 BUG();
186}
187
188
7708ad64 189static bool xen_page_pinned(void *ptr)
e2426cf8
JF
190{
191 struct page *page = virt_to_page(ptr);
192
193 return PagePinned(page);
194}
195
eba3ff8b 196void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
c0011dbf
JF
197{
198 struct multicall_space mcs;
199 struct mmu_update *u;
200
84708807
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201 trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
202
c0011dbf
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203 mcs = xen_mc_entry(sizeof(*u));
204 u = mcs.args;
205
206 /* ptep might be kmapped when using 32-bit HIGHPTE */
d5108316 207 u->ptr = virt_to_machine(ptep).maddr;
c0011dbf
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208 u->val = pte_val_ma(pteval);
209
eba3ff8b 210 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
c0011dbf
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211
212 xen_mc_issue(PARAVIRT_LAZY_MMU);
213}
eba3ff8b
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214EXPORT_SYMBOL_GPL(xen_set_domain_pte);
215
7708ad64 216static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 217{
d66bf8fc
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218 struct multicall_space mcs;
219 struct mmu_update *u;
3b827c1b 220
400d3494
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221 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
222
994025ca 223 if (mcs.mc != NULL) {
400d3494 224 mcs.mc->args[1]++;
994025ca 225 } else {
400d3494
JF
226 mcs = __xen_mc_entry(sizeof(*u));
227 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
228 }
d66bf8fc 229
d66bf8fc 230 u = mcs.args;
400d3494
JF
231 *u = *update;
232}
233
dcf7435c
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234static void xen_extend_mmuext_op(const struct mmuext_op *op)
235{
236 struct multicall_space mcs;
237 struct mmuext_op *u;
238
239 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
240
241 if (mcs.mc != NULL) {
242 mcs.mc->args[1]++;
243 } else {
244 mcs = __xen_mc_entry(sizeof(*u));
245 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
246 }
247
248 u = mcs.args;
249 *u = *op;
250}
251
4c13629f 252static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
400d3494
JF
253{
254 struct mmu_update u;
255
256 preempt_disable();
257
258 xen_mc_batch();
259
ce803e70
JF
260 /* ptr may be ioremapped for 64-bit pagetable setup */
261 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 262 u.val = pmd_val_ma(val);
7708ad64 263 xen_extend_mmu_update(&u);
d66bf8fc
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264
265 xen_mc_issue(PARAVIRT_LAZY_MMU);
266
267 preempt_enable();
3b827c1b
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268}
269
4c13629f 270static void xen_set_pmd(pmd_t *ptr, pmd_t val)
e2426cf8 271{
84708807
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272 trace_xen_mmu_set_pmd(ptr, val);
273
e2426cf8
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274 /* If page is not pinned, we can just update the entry
275 directly */
7708ad64 276 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
277 *ptr = val;
278 return;
279 }
280
281 xen_set_pmd_hyper(ptr, val);
282}
283
3b827c1b
JF
284/*
285 * Associate a virtual page frame with a given physical page frame
286 * and protection flags for that frame.
287 */
288void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
289{
836fe2f2 290 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
291}
292
4a35c13c 293static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
3b827c1b 294{
4a35c13c 295 struct mmu_update u;
c0011dbf 296
4a35c13c
JF
297 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
298 return false;
994025ca 299
4a35c13c 300 xen_mc_batch();
d66bf8fc 301
4a35c13c
JF
302 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
303 u.val = pte_val_ma(pteval);
304 xen_extend_mmu_update(&u);
a99ac5e8 305
4a35c13c 306 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 307
4a35c13c
JF
308 return true;
309}
310
84708807 311static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
4a35c13c 312{
d095d43e
DV
313 if (!xen_batched_set_pte(ptep, pteval)) {
314 /*
315 * Could call native_set_pte() here and trap and
316 * emulate the PTE write but with 32-bit guests this
317 * needs two traps (one for each of the two 32-bit
318 * words in the PTE) so do one hypercall directly
319 * instead.
320 */
321 struct mmu_update u;
322
323 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
324 u.val = pte_val_ma(pteval);
325 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
326 }
3b827c1b
JF
327}
328
84708807
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329static void xen_set_pte(pte_t *ptep, pte_t pteval)
330{
331 trace_xen_mmu_set_pte(ptep, pteval);
332 __xen_set_pte(ptep, pteval);
333}
334
4c13629f 335static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
4a35c13c
JF
336 pte_t *ptep, pte_t pteval)
337{
84708807
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338 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
339 __xen_set_pte(ptep, pteval);
3b827c1b
JF
340}
341
f63c2f24
T
342pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
343 unsigned long addr, pte_t *ptep)
947a69c9 344{
e57778a1 345 /* Just return the pte as-is. We preserve the bits on commit */
84708807 346 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
e57778a1
JF
347 return *ptep;
348}
349
350void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
351 pte_t *ptep, pte_t pte)
352{
400d3494 353 struct mmu_update u;
e57778a1 354
84708807 355 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
400d3494 356 xen_mc_batch();
947a69c9 357
d5108316 358 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 359 u.val = pte_val_ma(pte);
7708ad64 360 xen_extend_mmu_update(&u);
947a69c9 361
e57778a1 362 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
363}
364
ebb9cfe2
JF
365/* Assume pteval_t is equivalent to all the other *val_t types. */
366static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 367{
5926f87f 368 if (val & _PAGE_PRESENT) {
59438c9f 369 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
b7e5ffe5
KRW
370 unsigned long pfn = mfn_to_pfn(mfn);
371
77be1fab 372 pteval_t flags = val & PTE_FLAGS_MASK;
b7e5ffe5
KRW
373 if (unlikely(pfn == ~0))
374 val = flags & ~_PAGE_PRESENT;
375 else
376 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
ebb9cfe2 377 }
947a69c9 378
ebb9cfe2 379 return val;
947a69c9
JF
380}
381
ebb9cfe2 382static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 383{
5926f87f 384 if (val & _PAGE_PRESENT) {
59438c9f 385 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 386 pteval_t flags = val & PTE_FLAGS_MASK;
fb38923e 387 unsigned long mfn;
cfd8951e 388
fb38923e
KRW
389 if (!xen_feature(XENFEAT_auto_translated_physmap))
390 mfn = get_phys_to_machine(pfn);
391 else
392 mfn = pfn;
cfd8951e
JF
393 /*
394 * If there's no mfn for the pfn, then just create an
395 * empty non-present pte. Unfortunately this loses
396 * information about the original pfn, so
397 * pte_mfn_to_pfn is asymmetric.
398 */
399 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
400 mfn = 0;
401 flags = 0;
7f2f8822
DV
402 } else
403 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
cfd8951e 404 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
947a69c9
JF
405 }
406
ebb9cfe2 407 return val;
947a69c9
JF
408}
409
a2e7f0e3 410__visible pteval_t xen_pte_val(pte_t pte)
947a69c9 411{
41f2e477 412 pteval_t pteval = pte.pte;
47591df5 413
41f2e477 414 return pte_mfn_to_pfn(pteval);
947a69c9 415}
da5de7c2 416PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 417
a2e7f0e3 418__visible pgdval_t xen_pgd_val(pgd_t pgd)
947a69c9 419{
ebb9cfe2 420 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 421}
da5de7c2 422PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9 423
a2e7f0e3 424__visible pte_t xen_make_pte(pteval_t pte)
947a69c9 425{
7f2f8822 426 pte = pte_pfn_to_mfn(pte);
c0011dbf 427
ebb9cfe2 428 return native_make_pte(pte);
947a69c9 429}
da5de7c2 430PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9 431
a2e7f0e3 432__visible pgd_t xen_make_pgd(pgdval_t pgd)
947a69c9 433{
ebb9cfe2
JF
434 pgd = pte_pfn_to_mfn(pgd);
435 return native_make_pgd(pgd);
947a69c9 436}
da5de7c2 437PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9 438
a2e7f0e3 439__visible pmdval_t xen_pmd_val(pmd_t pmd)
947a69c9 440{
ebb9cfe2 441 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 442}
da5de7c2 443PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 444
4c13629f 445static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 446{
400d3494 447 struct mmu_update u;
f4f97b3e 448
d66bf8fc
JF
449 preempt_disable();
450
400d3494
JF
451 xen_mc_batch();
452
ce803e70
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453 /* ptr may be ioremapped for 64-bit pagetable setup */
454 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 455 u.val = pud_val_ma(val);
7708ad64 456 xen_extend_mmu_update(&u);
d66bf8fc
JF
457
458 xen_mc_issue(PARAVIRT_LAZY_MMU);
459
460 preempt_enable();
f4f97b3e
JF
461}
462
4c13629f 463static void xen_set_pud(pud_t *ptr, pud_t val)
e2426cf8 464{
84708807
JF
465 trace_xen_mmu_set_pud(ptr, val);
466
e2426cf8
JF
467 /* If page is not pinned, we can just update the entry
468 directly */
7708ad64 469 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
470 *ptr = val;
471 return;
472 }
473
474 xen_set_pud_hyper(ptr, val);
475}
476
f6e58732 477#ifdef CONFIG_X86_PAE
4c13629f 478static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
3b827c1b 479{
84708807 480 trace_xen_mmu_set_pte_atomic(ptep, pte);
f6e58732 481 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
482}
483
4c13629f 484static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
3b827c1b 485{
84708807 486 trace_xen_mmu_pte_clear(mm, addr, ptep);
4a35c13c
JF
487 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
488 native_pte_clear(mm, addr, ptep);
3b827c1b
JF
489}
490
4c13629f 491static void xen_pmd_clear(pmd_t *pmdp)
3b827c1b 492{
84708807 493 trace_xen_mmu_pmd_clear(pmdp);
e2426cf8 494 set_pmd(pmdp, __pmd(0));
3b827c1b 495}
f6e58732 496#endif /* CONFIG_X86_PAE */
3b827c1b 497
a2e7f0e3 498__visible pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 499{
ebb9cfe2 500 pmd = pte_pfn_to_mfn(pmd);
947a69c9 501 return native_make_pmd(pmd);
3b827c1b 502}
da5de7c2 503PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 504
f6e58732 505#if PAGETABLE_LEVELS == 4
a2e7f0e3 506__visible pudval_t xen_pud_val(pud_t pud)
f6e58732
JF
507{
508 return pte_mfn_to_pfn(pud.pud);
509}
da5de7c2 510PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732 511
a2e7f0e3 512__visible pud_t xen_make_pud(pudval_t pud)
f6e58732
JF
513{
514 pud = pte_pfn_to_mfn(pud);
515
516 return native_make_pud(pud);
517}
da5de7c2 518PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 519
4c13629f 520static pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 521{
d6182fbf
JF
522 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
523 unsigned offset = pgd - pgd_page;
524 pgd_t *user_ptr = NULL;
f6e58732 525
d6182fbf
JF
526 if (offset < pgd_index(USER_LIMIT)) {
527 struct page *page = virt_to_page(pgd_page);
528 user_ptr = (pgd_t *)page->private;
529 if (user_ptr)
530 user_ptr += offset;
531 }
f6e58732 532
d6182fbf
JF
533 return user_ptr;
534}
535
536static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
537{
538 struct mmu_update u;
f6e58732
JF
539
540 u.ptr = virt_to_machine(ptr).maddr;
541 u.val = pgd_val_ma(val);
7708ad64 542 xen_extend_mmu_update(&u);
d6182fbf
JF
543}
544
545/*
546 * Raw hypercall-based set_pgd, intended for in early boot before
547 * there's a page structure. This implies:
548 * 1. The only existing pagetable is the kernel's
549 * 2. It is always pinned
550 * 3. It has no user pagetable attached to it
551 */
4c13629f 552static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
d6182fbf
JF
553{
554 preempt_disable();
555
556 xen_mc_batch();
557
558 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
559
560 xen_mc_issue(PARAVIRT_LAZY_MMU);
561
562 preempt_enable();
563}
564
4c13629f 565static void xen_set_pgd(pgd_t *ptr, pgd_t val)
f6e58732 566{
d6182fbf
JF
567 pgd_t *user_ptr = xen_get_user_pgd(ptr);
568
84708807
JF
569 trace_xen_mmu_set_pgd(ptr, user_ptr, val);
570
f6e58732
JF
571 /* If page is not pinned, we can just update the entry
572 directly */
7708ad64 573 if (!xen_page_pinned(ptr)) {
f6e58732 574 *ptr = val;
d6182fbf 575 if (user_ptr) {
7708ad64 576 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
577 *user_ptr = val;
578 }
f6e58732
JF
579 return;
580 }
581
d6182fbf
JF
582 /* If it's pinned, then we can at least batch the kernel and
583 user updates together. */
584 xen_mc_batch();
585
586 __xen_set_pgd_hyper(ptr, val);
587 if (user_ptr)
588 __xen_set_pgd_hyper(user_ptr, val);
589
590 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
591}
592#endif /* PAGETABLE_LEVELS == 4 */
593
f4f97b3e 594/*
5deb30d1
JF
595 * (Yet another) pagetable walker. This one is intended for pinning a
596 * pagetable. This means that it walks a pagetable and calls the
597 * callback function on each page it finds making up the page table,
598 * at every level. It walks the entire pagetable, but it only bothers
599 * pinning pte pages which are below limit. In the normal case this
600 * will be STACK_TOP_MAX, but at boot we need to pin up to
601 * FIXADDR_TOP.
602 *
603 * For 32-bit the important bit is that we don't pin beyond there,
604 * because then we start getting into Xen's ptes.
605 *
606 * For 64-bit, we must skip the Xen hole in the middle of the address
607 * space, just after the big x86-64 virtual hole.
608 */
86bbc2c2
IC
609static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
610 int (*func)(struct mm_struct *mm, struct page *,
611 enum pt_level),
612 unsigned long limit)
3b827c1b 613{
f4f97b3e 614 int flush = 0;
5deb30d1
JF
615 unsigned hole_low, hole_high;
616 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
617 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 618
5deb30d1
JF
619 /* The limit is the last byte to be touched */
620 limit--;
621 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
622
623 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
624 return 0;
625
5deb30d1
JF
626 /*
627 * 64-bit has a great big hole in the middle of the address
628 * space, which contains the Xen mappings. On 32-bit these
629 * will end up making a zero-sized hole and so is a no-op.
630 */
d6182fbf 631 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
632 hole_high = pgd_index(PAGE_OFFSET);
633
634 pgdidx_limit = pgd_index(limit);
635#if PTRS_PER_PUD > 1
636 pudidx_limit = pud_index(limit);
637#else
638 pudidx_limit = 0;
639#endif
640#if PTRS_PER_PMD > 1
641 pmdidx_limit = pmd_index(limit);
642#else
643 pmdidx_limit = 0;
644#endif
645
5deb30d1 646 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 647 pud_t *pud;
3b827c1b 648
5deb30d1
JF
649 if (pgdidx >= hole_low && pgdidx < hole_high)
650 continue;
f4f97b3e 651
5deb30d1 652 if (!pgd_val(pgd[pgdidx]))
3b827c1b 653 continue;
f4f97b3e 654
5deb30d1 655 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
656
657 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 658 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 659
5deb30d1 660 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 661 pmd_t *pmd;
f4f97b3e 662
5deb30d1
JF
663 if (pgdidx == pgdidx_limit &&
664 pudidx > pudidx_limit)
665 goto out;
3b827c1b 666
5deb30d1 667 if (pud_none(pud[pudidx]))
3b827c1b 668 continue;
f4f97b3e 669
5deb30d1 670 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
671
672 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 673 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 674
5deb30d1
JF
675 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
676 struct page *pte;
677
678 if (pgdidx == pgdidx_limit &&
679 pudidx == pudidx_limit &&
680 pmdidx > pmdidx_limit)
681 goto out;
3b827c1b 682
5deb30d1 683 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
684 continue;
685
5deb30d1 686 pte = pmd_page(pmd[pmdidx]);
eefb47f6 687 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
688 }
689 }
690 }
11ad93e5 691
5deb30d1 692out:
11ad93e5
JF
693 /* Do the top level last, so that the callbacks can use it as
694 a cue to do final things like tlb flushes. */
eefb47f6 695 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
696
697 return flush;
3b827c1b
JF
698}
699
86bbc2c2
IC
700static int xen_pgd_walk(struct mm_struct *mm,
701 int (*func)(struct mm_struct *mm, struct page *,
702 enum pt_level),
703 unsigned long limit)
704{
705 return __xen_pgd_walk(mm, mm->pgd, func, limit);
706}
707
7708ad64
JF
708/* If we're using split pte locks, then take the page's lock and
709 return a pointer to it. Otherwise return NULL. */
eefb47f6 710static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
711{
712 spinlock_t *ptl = NULL;
713
57c1ffce 714#if USE_SPLIT_PTE_PTLOCKS
49076ec2 715 ptl = ptlock_ptr(page);
eefb47f6 716 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
717#endif
718
719 return ptl;
720}
721
7708ad64 722static void xen_pte_unlock(void *v)
74260714
JF
723{
724 spinlock_t *ptl = v;
725 spin_unlock(ptl);
726}
727
728static void xen_do_pin(unsigned level, unsigned long pfn)
729{
dcf7435c 730 struct mmuext_op op;
74260714 731
dcf7435c
JF
732 op.cmd = level;
733 op.arg1.mfn = pfn_to_mfn(pfn);
734
735 xen_extend_mmuext_op(&op);
74260714
JF
736}
737
eefb47f6
JF
738static int xen_pin_page(struct mm_struct *mm, struct page *page,
739 enum pt_level level)
f4f97b3e 740{
d60cd46b 741 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
742 int flush;
743
744 if (pgfl)
745 flush = 0; /* already pinned */
746 else if (PageHighMem(page))
747 /* kmaps need flushing if we found an unpinned
748 highpage */
749 flush = 1;
750 else {
751 void *pt = lowmem_page_address(page);
752 unsigned long pfn = page_to_pfn(page);
753 struct multicall_space mcs = __xen_mc_entry(0);
74260714 754 spinlock_t *ptl;
f4f97b3e
JF
755
756 flush = 0;
757
11ad93e5
JF
758 /*
759 * We need to hold the pagetable lock between the time
760 * we make the pagetable RO and when we actually pin
761 * it. If we don't, then other users may come in and
762 * attempt to update the pagetable by writing it,
763 * which will fail because the memory is RO but not
764 * pinned, so Xen won't do the trap'n'emulate.
765 *
766 * If we're using split pte locks, we can't hold the
767 * entire pagetable's worth of locks during the
768 * traverse, because we may wrap the preempt count (8
769 * bits). The solution is to mark RO and pin each PTE
770 * page while holding the lock. This means the number
771 * of locks we end up holding is never more than a
772 * batch size (~32 entries, at present).
773 *
774 * If we're not using split pte locks, we needn't pin
775 * the PTE pages independently, because we're
776 * protected by the overall pagetable lock.
777 */
74260714
JF
778 ptl = NULL;
779 if (level == PT_PTE)
eefb47f6 780 ptl = xen_pte_lock(page, mm);
74260714 781
f4f97b3e
JF
782 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
783 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
784 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
785
11ad93e5 786 if (ptl) {
74260714
JF
787 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
788
74260714
JF
789 /* Queue a deferred unlock for when this batch
790 is completed. */
7708ad64 791 xen_mc_callback(xen_pte_unlock, ptl);
74260714 792 }
f4f97b3e
JF
793 }
794
795 return flush;
796}
3b827c1b 797
f4f97b3e
JF
798/* This is called just after a mm has been created, but it has not
799 been used yet. We need to make sure that its pagetable is all
800 read-only, and can be pinned. */
eefb47f6 801static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 802{
5f94fb5b
JF
803 trace_xen_mmu_pgd_pin(mm, pgd);
804
f4f97b3e 805 xen_mc_batch();
3b827c1b 806
86bbc2c2 807 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 808 /* re-enable interrupts for flushing */
f87e4cac 809 xen_mc_issue(0);
d05fdf31 810
f4f97b3e 811 kmap_flush_unused();
d05fdf31 812
f87e4cac
JF
813 xen_mc_batch();
814 }
f4f97b3e 815
d6182fbf
JF
816#ifdef CONFIG_X86_64
817 {
818 pgd_t *user_pgd = xen_get_user_pgd(pgd);
819
820 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
821
822 if (user_pgd) {
eefb47f6 823 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
824 xen_do_pin(MMUEXT_PIN_L4_TABLE,
825 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
826 }
827 }
828#else /* CONFIG_X86_32 */
5deb30d1
JF
829#ifdef CONFIG_X86_PAE
830 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 831 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 832 PT_PMD);
5deb30d1 833#endif
28499143 834 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 835#endif /* CONFIG_X86_64 */
f4f97b3e 836 xen_mc_issue(0);
3b827c1b
JF
837}
838
eefb47f6
JF
839static void xen_pgd_pin(struct mm_struct *mm)
840{
841 __xen_pgd_pin(mm, mm->pgd);
842}
843
0e91398f
JF
844/*
845 * On save, we need to pin all pagetables to make sure they get their
846 * mfns turned into pfns. Search the list for any unpinned pgds and pin
847 * them (unpinned pgds are not currently in use, probably because the
848 * process is under construction or destruction).
eefb47f6
JF
849 *
850 * Expected to be called in stop_machine() ("equivalent to taking
851 * every spinlock in the system"), so the locking doesn't really
852 * matter all that much.
0e91398f
JF
853 */
854void xen_mm_pin_all(void)
855{
0e91398f 856 struct page *page;
74260714 857
a79e53d8 858 spin_lock(&pgd_lock);
f4f97b3e 859
0e91398f
JF
860 list_for_each_entry(page, &pgd_list, lru) {
861 if (!PagePinned(page)) {
eefb47f6 862 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
863 SetPageSavePinned(page);
864 }
865 }
866
a79e53d8 867 spin_unlock(&pgd_lock);
3b827c1b
JF
868}
869
c1f2f09e
EH
870/*
871 * The init_mm pagetable is really pinned as soon as its created, but
872 * that's before we have page structures to store the bits. So do all
873 * the book-keeping now.
874 */
3f508953 875static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
eefb47f6 876 enum pt_level level)
3b827c1b 877{
f4f97b3e
JF
878 SetPagePinned(page);
879 return 0;
880}
3b827c1b 881
b96229b5 882static void __init xen_mark_init_mm_pinned(void)
f4f97b3e 883{
eefb47f6 884 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 885}
3b827c1b 886
eefb47f6
JF
887static int xen_unpin_page(struct mm_struct *mm, struct page *page,
888 enum pt_level level)
f4f97b3e 889{
d60cd46b 890 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 891
f4f97b3e
JF
892 if (pgfl && !PageHighMem(page)) {
893 void *pt = lowmem_page_address(page);
894 unsigned long pfn = page_to_pfn(page);
74260714
JF
895 spinlock_t *ptl = NULL;
896 struct multicall_space mcs;
897
11ad93e5
JF
898 /*
899 * Do the converse to pin_page. If we're using split
900 * pte locks, we must be holding the lock for while
901 * the pte page is unpinned but still RO to prevent
902 * concurrent updates from seeing it in this
903 * partially-pinned state.
904 */
74260714 905 if (level == PT_PTE) {
eefb47f6 906 ptl = xen_pte_lock(page, mm);
74260714 907
11ad93e5
JF
908 if (ptl)
909 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
910 }
911
912 mcs = __xen_mc_entry(0);
f4f97b3e
JF
913
914 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
915 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
916 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
917
918 if (ptl) {
919 /* unlock when batch completed */
7708ad64 920 xen_mc_callback(xen_pte_unlock, ptl);
74260714 921 }
f4f97b3e
JF
922 }
923
924 return 0; /* never need to flush on unpin */
3b827c1b
JF
925}
926
f4f97b3e 927/* Release a pagetables pages back as normal RW */
eefb47f6 928static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 929{
5f94fb5b
JF
930 trace_xen_mmu_pgd_unpin(mm, pgd);
931
f4f97b3e
JF
932 xen_mc_batch();
933
74260714 934 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 935
d6182fbf
JF
936#ifdef CONFIG_X86_64
937 {
938 pgd_t *user_pgd = xen_get_user_pgd(pgd);
939
940 if (user_pgd) {
f63c2f24
T
941 xen_do_pin(MMUEXT_UNPIN_TABLE,
942 PFN_DOWN(__pa(user_pgd)));
eefb47f6 943 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
944 }
945 }
946#endif
947
5deb30d1
JF
948#ifdef CONFIG_X86_PAE
949 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 950 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 951 PT_PMD);
5deb30d1 952#endif
d6182fbf 953
86bbc2c2 954 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
f4f97b3e
JF
955
956 xen_mc_issue(0);
957}
3b827c1b 958
eefb47f6
JF
959static void xen_pgd_unpin(struct mm_struct *mm)
960{
961 __xen_pgd_unpin(mm, mm->pgd);
962}
963
0e91398f
JF
964/*
965 * On resume, undo any pinning done at save, so that the rest of the
966 * kernel doesn't see any unexpected pinned pagetables.
967 */
968void xen_mm_unpin_all(void)
969{
0e91398f
JF
970 struct page *page;
971
a79e53d8 972 spin_lock(&pgd_lock);
0e91398f
JF
973
974 list_for_each_entry(page, &pgd_list, lru) {
975 if (PageSavePinned(page)) {
976 BUG_ON(!PagePinned(page));
eefb47f6 977 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
978 ClearPageSavePinned(page);
979 }
980 }
981
a79e53d8 982 spin_unlock(&pgd_lock);
0e91398f
JF
983}
984
4c13629f 985static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
3b827c1b 986{
f4f97b3e 987 spin_lock(&next->page_table_lock);
eefb47f6 988 xen_pgd_pin(next);
f4f97b3e 989 spin_unlock(&next->page_table_lock);
3b827c1b
JF
990}
991
4c13629f 992static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
3b827c1b 993{
f4f97b3e 994 spin_lock(&mm->page_table_lock);
eefb47f6 995 xen_pgd_pin(mm);
f4f97b3e 996 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
997}
998
3b827c1b 999
f87e4cac
JF
1000#ifdef CONFIG_SMP
1001/* Another cpu may still have their %cr3 pointing at the pagetable, so
1002 we need to repoint it somewhere else before we can unpin it. */
1003static void drop_other_mm_ref(void *info)
1004{
1005 struct mm_struct *mm = info;
ce87b3d3 1006 struct mm_struct *active_mm;
3b827c1b 1007
2113f469 1008 active_mm = this_cpu_read(cpu_tlbstate.active_mm);
ce87b3d3 1009
2113f469 1010 if (active_mm == mm && this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
f87e4cac 1011 leave_mm(smp_processor_id());
9f79991d
JF
1012
1013 /* If this cpu still has a stale cr3 reference, then make sure
1014 it has been flushed. */
2113f469 1015 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1016 load_cr3(swapper_pg_dir);
f87e4cac 1017}
3b827c1b 1018
7708ad64 1019static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1020{
e4d98207 1021 cpumask_var_t mask;
9f79991d
JF
1022 unsigned cpu;
1023
f87e4cac
JF
1024 if (current->active_mm == mm) {
1025 if (current->mm == mm)
1026 load_cr3(swapper_pg_dir);
1027 else
1028 leave_mm(smp_processor_id());
9f79991d
JF
1029 }
1030
1031 /* Get the "official" set of cpus referring to our pagetable. */
e4d98207
MT
1032 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1033 for_each_online_cpu(cpu) {
78f1c4d6 1034 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
e4d98207
MT
1035 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1036 continue;
1037 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1038 }
1039 return;
1040 }
78f1c4d6 1041 cpumask_copy(mask, mm_cpumask(mm));
9f79991d
JF
1042
1043 /* It's possible that a vcpu may have a stale reference to our
1044 cr3, because its in lazy mode, and it hasn't yet flushed
1045 its set of pending hypercalls yet. In this case, we can
1046 look at its actual current cr3 value, and force it to flush
1047 if needed. */
1048 for_each_online_cpu(cpu) {
1049 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1050 cpumask_set_cpu(cpu, mask);
3b827c1b
JF
1051 }
1052
e4d98207
MT
1053 if (!cpumask_empty(mask))
1054 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1055 free_cpumask_var(mask);
f87e4cac
JF
1056}
1057#else
7708ad64 1058static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac
JF
1059{
1060 if (current->active_mm == mm)
1061 load_cr3(swapper_pg_dir);
1062}
1063#endif
1064
1065/*
1066 * While a process runs, Xen pins its pagetables, which means that the
1067 * hypervisor forces it to be read-only, and it controls all updates
1068 * to it. This means that all pagetable updates have to go via the
1069 * hypervisor, which is moderately expensive.
1070 *
1071 * Since we're pulling the pagetable down, we switch to use init_mm,
1072 * unpin old process pagetable and mark it all read-write, which
1073 * allows further operations on it to be simple memory accesses.
1074 *
1075 * The only subtle point is that another CPU may be still using the
1076 * pagetable because of lazy tlb flushing. This means we need need to
1077 * switch all CPUs off this pagetable before we can unpin it.
1078 */
4c13629f 1079static void xen_exit_mmap(struct mm_struct *mm)
f87e4cac
JF
1080{
1081 get_cpu(); /* make sure we don't move around */
7708ad64 1082 xen_drop_mm_ref(mm);
f87e4cac 1083 put_cpu();
3b827c1b 1084
f120f13e 1085 spin_lock(&mm->page_table_lock);
df912ea4
JF
1086
1087 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1088 if (xen_page_pinned(mm->pgd))
eefb47f6 1089 xen_pgd_unpin(mm);
74260714 1090
f120f13e 1091 spin_unlock(&mm->page_table_lock);
3b827c1b 1092}
994025ca 1093
c7112887
AR
1094static void xen_post_allocator_init(void);
1095
7f914062
KRW
1096#ifdef CONFIG_X86_64
1097static void __init xen_cleanhighmap(unsigned long vaddr,
1098 unsigned long vaddr_end)
1099{
1100 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1101 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1102
1103 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1104 * We include the PMD passed in on _both_ boundaries. */
1105 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PAGE_SIZE));
1106 pmd++, vaddr += PMD_SIZE) {
1107 if (pmd_none(*pmd))
1108 continue;
1109 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1110 set_pmd(pmd, __pmd(0));
1111 }
1112 /* In case we did something silly, we should crash in this function
1113 * instead of somewhere later and be confusing. */
1114 xen_mc_flush();
1115}
32df75cd 1116static void __init xen_pagetable_p2m_copy(void)
319f3ba5 1117{
7f914062
KRW
1118 unsigned long size;
1119 unsigned long addr;
32df75cd
KRW
1120 unsigned long new_mfn_list;
1121
1122 if (xen_feature(XENFEAT_auto_translated_physmap))
1123 return;
1124
1125 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1126
32df75cd 1127 new_mfn_list = xen_revector_p2m_tree();
b621e157
KRW
1128 /* No memory or already called. */
1129 if (!new_mfn_list || new_mfn_list == xen_start_info->mfn_list)
32df75cd 1130 return;
7f914062 1131
b621e157
KRW
1132 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1133 memset((void *)xen_start_info->mfn_list, 0xff, size);
1134
1135 /* We should be in __ka space. */
1136 BUG_ON(xen_start_info->mfn_list < __START_KERNEL_map);
1137 addr = xen_start_info->mfn_list;
1138 /* We roundup to the PMD, which means that if anybody at this stage is
1139 * using the __ka address of xen_start_info or xen_start_info->shared_info
1140 * they are in going to crash. Fortunatly we have already revectored
1141 * in xen_setup_kernel_pagetable and in xen_setup_shared_info. */
1142 size = roundup(size, PMD_SIZE);
1143 xen_cleanhighmap(addr, addr + size);
1144
1145 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1146 memblock_free(__pa(xen_start_info->mfn_list), size);
1147 /* And revector! Bye bye old array */
1148 xen_start_info->mfn_list = new_mfn_list;
1149
3aca7fbc
KRW
1150 /* At this stage, cleanup_highmap has already cleaned __ka space
1151 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1152 * the ramdisk). We continue on, erasing PMD entries that point to page
1153 * tables - do note that they are accessible at this stage via __va.
1154 * For good measure we also round up to the PMD - which means that if
1155 * anybody is using __ka address to the initial boot-stack - and try
1156 * to use it - they are going to crash. The xen_start_info has been
1157 * taken care of already in xen_setup_kernel_pagetable. */
1158 addr = xen_start_info->pt_base;
1159 size = roundup(xen_start_info->nr_pt_frames * PAGE_SIZE, PMD_SIZE);
1160
1161 xen_cleanhighmap(addr, addr + size);
1162 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1163#ifdef DEBUG
1164 /* This is superflous and is not neccessary, but you know what
1165 * lets do it. The MODULES_VADDR -> MODULES_END should be clear of
1166 * anything at this stage. */
1167 xen_cleanhighmap(MODULES_VADDR, roundup(MODULES_VADDR, PUD_SIZE) - 1);
1168#endif
32df75cd
KRW
1169}
1170#endif
1171
1172static void __init xen_pagetable_init(void)
1173{
1174 paging_init();
32df75cd
KRW
1175#ifdef CONFIG_X86_64
1176 xen_pagetable_p2m_copy();
7f914062 1177#endif
2c185687
JG
1178 /* Allocate and initialize top and mid mfn levels for p2m structure */
1179 xen_build_mfn_list_list();
1180
1181 xen_setup_shared_info();
f1d7062a 1182 xen_post_allocator_init();
319f3ba5 1183}
319f3ba5
JF
1184static void xen_write_cr2(unsigned long cr2)
1185{
2113f469 1186 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
319f3ba5
JF
1187}
1188
1189static unsigned long xen_read_cr2(void)
1190{
2113f469 1191 return this_cpu_read(xen_vcpu)->arch.cr2;
319f3ba5
JF
1192}
1193
1194unsigned long xen_read_cr2_direct(void)
1195{
2113f469 1196 return this_cpu_read(xen_vcpu_info.arch.cr2);
319f3ba5
JF
1197}
1198
95a7d768
KRW
1199void xen_flush_tlb_all(void)
1200{
1201 struct mmuext_op *op;
1202 struct multicall_space mcs;
1203
1204 trace_xen_mmu_flush_tlb_all(0);
1205
1206 preempt_disable();
1207
1208 mcs = xen_mc_entry(sizeof(*op));
1209
1210 op = mcs.args;
1211 op->cmd = MMUEXT_TLB_FLUSH_ALL;
1212 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1213
1214 xen_mc_issue(PARAVIRT_LAZY_MMU);
1215
1216 preempt_enable();
1217}
319f3ba5
JF
1218static void xen_flush_tlb(void)
1219{
1220 struct mmuext_op *op;
1221 struct multicall_space mcs;
1222
c8eed171
JF
1223 trace_xen_mmu_flush_tlb(0);
1224
319f3ba5
JF
1225 preempt_disable();
1226
1227 mcs = xen_mc_entry(sizeof(*op));
1228
1229 op = mcs.args;
1230 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1231 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1232
1233 xen_mc_issue(PARAVIRT_LAZY_MMU);
1234
1235 preempt_enable();
1236}
1237
1238static void xen_flush_tlb_single(unsigned long addr)
1239{
1240 struct mmuext_op *op;
1241 struct multicall_space mcs;
1242
c8eed171
JF
1243 trace_xen_mmu_flush_tlb_single(addr);
1244
319f3ba5
JF
1245 preempt_disable();
1246
1247 mcs = xen_mc_entry(sizeof(*op));
1248 op = mcs.args;
1249 op->cmd = MMUEXT_INVLPG_LOCAL;
1250 op->arg1.linear_addr = addr & PAGE_MASK;
1251 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1252
1253 xen_mc_issue(PARAVIRT_LAZY_MMU);
1254
1255 preempt_enable();
1256}
1257
1258static void xen_flush_tlb_others(const struct cpumask *cpus,
e7b52ffd
AS
1259 struct mm_struct *mm, unsigned long start,
1260 unsigned long end)
319f3ba5
JF
1261{
1262 struct {
1263 struct mmuext_op op;
32dd1194 1264#ifdef CONFIG_SMP
900cba88 1265 DECLARE_BITMAP(mask, num_processors);
32dd1194
KRW
1266#else
1267 DECLARE_BITMAP(mask, NR_CPUS);
1268#endif
319f3ba5
JF
1269 } *args;
1270 struct multicall_space mcs;
1271
e7b52ffd 1272 trace_xen_mmu_flush_tlb_others(cpus, mm, start, end);
c8eed171 1273
e3f8a74e
JF
1274 if (cpumask_empty(cpus))
1275 return; /* nothing to do */
319f3ba5
JF
1276
1277 mcs = xen_mc_entry(sizeof(*args));
1278 args = mcs.args;
1279 args->op.arg2.vcpumask = to_cpumask(args->mask);
1280
1281 /* Remove us, and any offline CPUS. */
1282 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1283 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
319f3ba5 1284
e7b52ffd 1285 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
ce7184bd 1286 if (end != TLB_FLUSH_ALL && (end - start) <= PAGE_SIZE) {
319f3ba5 1287 args->op.cmd = MMUEXT_INVLPG_MULTI;
e7b52ffd 1288 args->op.arg1.linear_addr = start;
319f3ba5
JF
1289 }
1290
1291 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1292
319f3ba5
JF
1293 xen_mc_issue(PARAVIRT_LAZY_MMU);
1294}
1295
1296static unsigned long xen_read_cr3(void)
1297{
2113f469 1298 return this_cpu_read(xen_cr3);
319f3ba5
JF
1299}
1300
1301static void set_current_cr3(void *v)
1302{
2113f469 1303 this_cpu_write(xen_current_cr3, (unsigned long)v);
319f3ba5
JF
1304}
1305
1306static void __xen_write_cr3(bool kernel, unsigned long cr3)
1307{
dcf7435c 1308 struct mmuext_op op;
319f3ba5
JF
1309 unsigned long mfn;
1310
c8eed171
JF
1311 trace_xen_mmu_write_cr3(kernel, cr3);
1312
319f3ba5
JF
1313 if (cr3)
1314 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1315 else
1316 mfn = 0;
1317
1318 WARN_ON(mfn == 0 && kernel);
1319
dcf7435c
JF
1320 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1321 op.arg1.mfn = mfn;
319f3ba5 1322
dcf7435c 1323 xen_extend_mmuext_op(&op);
319f3ba5
JF
1324
1325 if (kernel) {
2113f469 1326 this_cpu_write(xen_cr3, cr3);
319f3ba5
JF
1327
1328 /* Update xen_current_cr3 once the batch has actually
1329 been submitted. */
1330 xen_mc_callback(set_current_cr3, (void *)cr3);
1331 }
1332}
319f3ba5
JF
1333static void xen_write_cr3(unsigned long cr3)
1334{
1335 BUG_ON(preemptible());
1336
1337 xen_mc_batch(); /* disables interrupts */
1338
1339 /* Update while interrupts are disabled, so its atomic with
1340 respect to ipis */
2113f469 1341 this_cpu_write(xen_cr3, cr3);
319f3ba5
JF
1342
1343 __xen_write_cr3(true, cr3);
1344
1345#ifdef CONFIG_X86_64
1346 {
1347 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1348 if (user_pgd)
1349 __xen_write_cr3(false, __pa(user_pgd));
1350 else
1351 __xen_write_cr3(false, 0);
1352 }
1353#endif
1354
1355 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1356}
1357
0cc9129d
KRW
1358#ifdef CONFIG_X86_64
1359/*
1360 * At the start of the day - when Xen launches a guest, it has already
1361 * built pagetables for the guest. We diligently look over them
1362 * in xen_setup_kernel_pagetable and graft as appropiate them in the
1363 * init_level4_pgt and its friends. Then when we are happy we load
1364 * the new init_level4_pgt - and continue on.
1365 *
1366 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1367 * up the rest of the pagetables. When it has completed it loads the cr3.
1368 * N.B. that baremetal would start at 'start_kernel' (and the early
1369 * #PF handler would create bootstrap pagetables) - so we are running
1370 * with the same assumptions as what to do when write_cr3 is executed
1371 * at this point.
1372 *
1373 * Since there are no user-page tables at all, we have two variants
1374 * of xen_write_cr3 - the early bootup (this one), and the late one
1375 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1376 * the Linux kernel and user-space are both in ring 3 while the
1377 * hypervisor is in ring 0.
1378 */
1379static void __init xen_write_cr3_init(unsigned long cr3)
1380{
1381 BUG_ON(preemptible());
1382
1383 xen_mc_batch(); /* disables interrupts */
1384
1385 /* Update while interrupts are disabled, so its atomic with
1386 respect to ipis */
1387 this_cpu_write(xen_cr3, cr3);
1388
1389 __xen_write_cr3(true, cr3);
1390
1391 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
0cc9129d
KRW
1392}
1393#endif
1394
319f3ba5
JF
1395static int xen_pgd_alloc(struct mm_struct *mm)
1396{
1397 pgd_t *pgd = mm->pgd;
1398 int ret = 0;
1399
1400 BUG_ON(PagePinned(virt_to_page(pgd)));
1401
1402#ifdef CONFIG_X86_64
1403 {
1404 struct page *page = virt_to_page(pgd);
1405 pgd_t *user_pgd;
1406
1407 BUG_ON(page->private != 0);
1408
1409 ret = -ENOMEM;
1410
1411 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1412 page->private = (unsigned long)user_pgd;
1413
1414 if (user_pgd != NULL) {
1ad83c85 1415#ifdef CONFIG_X86_VSYSCALL_EMULATION
f40c3300 1416 user_pgd[pgd_index(VSYSCALL_ADDR)] =
319f3ba5 1417 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1ad83c85 1418#endif
319f3ba5
JF
1419 ret = 0;
1420 }
1421
1422 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1423 }
1424#endif
1425
1426 return ret;
1427}
1428
1429static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1430{
1431#ifdef CONFIG_X86_64
1432 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1433
1434 if (user_pgd)
1435 free_page((unsigned long)user_pgd);
1436#endif
1437}
1438
ee176455 1439#ifdef CONFIG_X86_32
3f508953 1440static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1f4f9315
JF
1441{
1442 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1443 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1444 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1445 pte_val_ma(pte));
ee176455
SS
1446
1447 return pte;
1448}
1449#else /* CONFIG_X86_64 */
3f508953 1450static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
ee176455 1451{
1f4f9315
JF
1452 return pte;
1453}
ee176455 1454#endif /* CONFIG_X86_64 */
1f4f9315 1455
d095d43e
DV
1456/*
1457 * Init-time set_pte while constructing initial pagetables, which
1458 * doesn't allow RO page table pages to be remapped RW.
1459 *
66a27dde
DV
1460 * If there is no MFN for this PFN then this page is initially
1461 * ballooned out so clear the PTE (as in decrease_reservation() in
1462 * drivers/xen/balloon.c).
1463 *
d095d43e
DV
1464 * Many of these PTE updates are done on unpinned and writable pages
1465 * and doing a hypercall for these is unnecessary and expensive. At
1466 * this point it is not possible to tell if a page is pinned or not,
1467 * so always write the PTE directly and rely on Xen trapping and
1468 * emulating any updates as necessary.
1469 */
3f508953 1470static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1f4f9315 1471{
66a27dde
DV
1472 if (pte_mfn(pte) != INVALID_P2M_ENTRY)
1473 pte = mask_rw_pte(ptep, pte);
1474 else
1475 pte = __pte_ma(0);
1f4f9315 1476
d095d43e 1477 native_set_pte(ptep, pte);
1f4f9315 1478}
319f3ba5 1479
b96229b5
JF
1480static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1481{
1482 struct mmuext_op op;
1483 op.cmd = cmd;
1484 op.arg1.mfn = pfn_to_mfn(pfn);
1485 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1486 BUG();
1487}
1488
319f3ba5
JF
1489/* Early in boot, while setting up the initial pagetable, assume
1490 everything is pinned. */
3f508953 1491static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
319f3ba5 1492{
b96229b5
JF
1493#ifdef CONFIG_FLATMEM
1494 BUG_ON(mem_map); /* should only be used early */
1495#endif
1496 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1497 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1498}
1499
1500/* Used for pmd and pud */
3f508953 1501static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
b96229b5 1502{
319f3ba5
JF
1503#ifdef CONFIG_FLATMEM
1504 BUG_ON(mem_map); /* should only be used early */
1505#endif
1506 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1507}
1508
1509/* Early release_pte assumes that all pts are pinned, since there's
1510 only init_mm and anything attached to that is pinned. */
3f508953 1511static void __init xen_release_pte_init(unsigned long pfn)
319f3ba5 1512{
b96229b5 1513 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
319f3ba5
JF
1514 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1515}
1516
3f508953 1517static void __init xen_release_pmd_init(unsigned long pfn)
319f3ba5 1518{
b96229b5 1519 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
319f3ba5
JF
1520}
1521
bc7fe1d9
JF
1522static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1523{
1524 struct multicall_space mcs;
1525 struct mmuext_op *op;
1526
1527 mcs = __xen_mc_entry(sizeof(*op));
1528 op = mcs.args;
1529 op->cmd = cmd;
1530 op->arg1.mfn = pfn_to_mfn(pfn);
1531
1532 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1533}
1534
1535static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1536{
1537 struct multicall_space mcs;
1538 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1539
1540 mcs = __xen_mc_entry(0);
1541 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1542 pfn_pte(pfn, prot), 0);
1543}
1544
319f3ba5
JF
1545/* This needs to make sure the new pte page is pinned iff its being
1546 attached to a pinned pagetable. */
bc7fe1d9
JF
1547static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1548 unsigned level)
319f3ba5 1549{
bc7fe1d9
JF
1550 bool pinned = PagePinned(virt_to_page(mm->pgd));
1551
c2ba050d 1552 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
319f3ba5 1553
c2ba050d 1554 if (pinned) {
bc7fe1d9 1555 struct page *page = pfn_to_page(pfn);
319f3ba5 1556
319f3ba5
JF
1557 SetPagePinned(page);
1558
319f3ba5 1559 if (!PageHighMem(page)) {
bc7fe1d9
JF
1560 xen_mc_batch();
1561
1562 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1563
57c1ffce 1564 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
bc7fe1d9
JF
1565 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1566
1567 xen_mc_issue(PARAVIRT_LAZY_MMU);
319f3ba5
JF
1568 } else {
1569 /* make sure there are no stray mappings of
1570 this page */
1571 kmap_flush_unused();
1572 }
1573 }
1574}
1575
1576static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1577{
1578 xen_alloc_ptpage(mm, pfn, PT_PTE);
1579}
1580
1581static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1582{
1583 xen_alloc_ptpage(mm, pfn, PT_PMD);
1584}
1585
1586/* This should never happen until we're OK to use struct page */
bc7fe1d9 1587static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
319f3ba5
JF
1588{
1589 struct page *page = pfn_to_page(pfn);
c2ba050d 1590 bool pinned = PagePinned(page);
319f3ba5 1591
c2ba050d 1592 trace_xen_mmu_release_ptpage(pfn, level, pinned);
319f3ba5 1593
c2ba050d 1594 if (pinned) {
319f3ba5 1595 if (!PageHighMem(page)) {
bc7fe1d9
JF
1596 xen_mc_batch();
1597
57c1ffce 1598 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
bc7fe1d9
JF
1599 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1600
1601 __set_pfn_prot(pfn, PAGE_KERNEL);
1602
1603 xen_mc_issue(PARAVIRT_LAZY_MMU);
319f3ba5
JF
1604 }
1605 ClearPagePinned(page);
1606 }
1607}
1608
1609static void xen_release_pte(unsigned long pfn)
1610{
1611 xen_release_ptpage(pfn, PT_PTE);
1612}
1613
1614static void xen_release_pmd(unsigned long pfn)
1615{
1616 xen_release_ptpage(pfn, PT_PMD);
1617}
1618
1619#if PAGETABLE_LEVELS == 4
1620static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1621{
1622 xen_alloc_ptpage(mm, pfn, PT_PUD);
1623}
1624
1625static void xen_release_pud(unsigned long pfn)
1626{
1627 xen_release_ptpage(pfn, PT_PUD);
1628}
1629#endif
1630
1631void __init xen_reserve_top(void)
1632{
1633#ifdef CONFIG_X86_32
1634 unsigned long top = HYPERVISOR_VIRT_START;
1635 struct xen_platform_parameters pp;
1636
1637 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1638 top = pp.virt_start;
1639
1640 reserve_top_address(-top);
1641#endif /* CONFIG_X86_32 */
1642}
1643
1644/*
1645 * Like __va(), but returns address in the kernel mapping (which is
1646 * all we have until the physical memory mapping has been set up.
1647 */
1648static void *__ka(phys_addr_t paddr)
1649{
1650#ifdef CONFIG_X86_64
1651 return (void *)(paddr + __START_KERNEL_map);
1652#else
1653 return __va(paddr);
1654#endif
1655}
1656
1657/* Convert a machine address to physical address */
1658static unsigned long m2p(phys_addr_t maddr)
1659{
1660 phys_addr_t paddr;
1661
1662 maddr &= PTE_PFN_MASK;
1663 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1664
1665 return paddr;
1666}
1667
1668/* Convert a machine address to kernel virtual */
1669static void *m2v(phys_addr_t maddr)
1670{
1671 return __ka(m2p(maddr));
1672}
1673
4ec5387c 1674/* Set the page permissions on an identity-mapped pages */
b2222794 1675static void set_page_prot_flags(void *addr, pgprot_t prot, unsigned long flags)
319f3ba5
JF
1676{
1677 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1678 pte_t pte = pfn_pte(pfn, prot);
1679
4e44e44b
MR
1680 /* For PVH no need to set R/O or R/W to pin them or unpin them. */
1681 if (xen_feature(XENFEAT_auto_translated_physmap))
1682 return;
1683
b2222794 1684 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
319f3ba5
JF
1685 BUG();
1686}
b2222794
KRW
1687static void set_page_prot(void *addr, pgprot_t prot)
1688{
1689 return set_page_prot_flags(addr, prot, UVMF_NONE);
1690}
caaf9ecf 1691#ifdef CONFIG_X86_32
3f508953 1692static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
319f3ba5
JF
1693{
1694 unsigned pmdidx, pteidx;
1695 unsigned ident_pte;
1696 unsigned long pfn;
1697
764f0138
JF
1698 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1699 PAGE_SIZE);
1700
319f3ba5
JF
1701 ident_pte = 0;
1702 pfn = 0;
1703 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1704 pte_t *pte_page;
1705
1706 /* Reuse or allocate a page of ptes */
1707 if (pmd_present(pmd[pmdidx]))
1708 pte_page = m2v(pmd[pmdidx].pmd);
1709 else {
1710 /* Check for free pte pages */
764f0138 1711 if (ident_pte == LEVEL1_IDENT_ENTRIES)
319f3ba5
JF
1712 break;
1713
1714 pte_page = &level1_ident_pgt[ident_pte];
1715 ident_pte += PTRS_PER_PTE;
1716
1717 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1718 }
1719
1720 /* Install mappings */
1721 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1722 pte_t pte;
1723
a91d9287
SS
1724#ifdef CONFIG_X86_32
1725 if (pfn > max_pfn_mapped)
1726 max_pfn_mapped = pfn;
1727#endif
1728
319f3ba5
JF
1729 if (!pte_none(pte_page[pteidx]))
1730 continue;
1731
1732 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1733 pte_page[pteidx] = pte;
1734 }
1735 }
1736
1737 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1738 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1739
1740 set_page_prot(pmd, PAGE_KERNEL_RO);
1741}
caaf9ecf 1742#endif
7e77506a
IC
1743void __init xen_setup_machphys_mapping(void)
1744{
1745 struct xen_machphys_mapping mapping;
7e77506a
IC
1746
1747 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1748 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
ccbcdf7c 1749 machine_to_phys_nr = mapping.max_mfn + 1;
7e77506a 1750 } else {
ccbcdf7c 1751 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
7e77506a 1752 }
ccbcdf7c 1753#ifdef CONFIG_X86_32
61cca2fa
JB
1754 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1755 < machine_to_phys_mapping);
ccbcdf7c 1756#endif
7e77506a
IC
1757}
1758
319f3ba5
JF
1759#ifdef CONFIG_X86_64
1760static void convert_pfn_mfn(void *v)
1761{
1762 pte_t *pte = v;
1763 int i;
1764
1765 /* All levels are converted the same way, so just treat them
1766 as ptes. */
1767 for (i = 0; i < PTRS_PER_PTE; i++)
1768 pte[i] = xen_make_pte(pte[i].pte);
1769}
488f046d
KRW
1770static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1771 unsigned long addr)
1772{
1773 if (*pt_base == PFN_DOWN(__pa(addr))) {
b2222794 1774 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
488f046d
KRW
1775 clear_page((void *)addr);
1776 (*pt_base)++;
1777 }
1778 if (*pt_end == PFN_DOWN(__pa(addr))) {
b2222794 1779 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
488f046d
KRW
1780 clear_page((void *)addr);
1781 (*pt_end)--;
1782 }
1783}
319f3ba5 1784/*
0d2eb44f 1785 * Set up the initial kernel pagetable.
319f3ba5
JF
1786 *
1787 * We can construct this by grafting the Xen provided pagetable into
1788 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
0b5a5063
SB
1789 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1790 * kernel has a physical mapping to start with - but that's enough to
1791 * get __va working. We need to fill in the rest of the physical
1792 * mapping once some sort of allocator has been set up. NOTE: for
1793 * PVH, the page tables are native.
319f3ba5 1794 */
3699aad0 1795void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
319f3ba5
JF
1796{
1797 pud_t *l3;
1798 pmd_t *l2;
488f046d
KRW
1799 unsigned long addr[3];
1800 unsigned long pt_base, pt_end;
1801 unsigned i;
319f3ba5 1802
14988a4d
SS
1803 /* max_pfn_mapped is the last pfn mapped in the initial memory
1804 * mappings. Considering that on Xen after the kernel mappings we
1805 * have the mappings of some pages that don't exist in pfn space, we
1806 * set max_pfn_mapped to the last real pfn mapped. */
1807 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1808
488f046d
KRW
1809 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1810 pt_end = pt_base + xen_start_info->nr_pt_frames;
1811
319f3ba5
JF
1812 /* Zap identity mapping */
1813 init_level4_pgt[0] = __pgd(0);
1814
4e44e44b
MR
1815 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1816 /* Pre-constructed entries are in pfn, so convert to mfn */
1817 /* L4[272] -> level3_ident_pgt
1818 * L4[511] -> level3_kernel_pgt */
1819 convert_pfn_mfn(init_level4_pgt);
1820
1821 /* L3_i[0] -> level2_ident_pgt */
1822 convert_pfn_mfn(level3_ident_pgt);
1823 /* L3_k[510] -> level2_kernel_pgt
0b5a5063 1824 * L3_k[511] -> level2_fixmap_pgt */
4e44e44b 1825 convert_pfn_mfn(level3_kernel_pgt);
0b5a5063
SB
1826
1827 /* L3_k[511][506] -> level1_fixmap_pgt */
1828 convert_pfn_mfn(level2_fixmap_pgt);
4e44e44b 1829 }
4fac153a 1830 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
319f3ba5
JF
1831 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1832 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1833
488f046d
KRW
1834 addr[0] = (unsigned long)pgd;
1835 addr[1] = (unsigned long)l3;
1836 addr[2] = (unsigned long)l2;
4fac153a 1837 /* Graft it onto L4[272][0]. Note that we creating an aliasing problem:
0b5a5063 1838 * Both L4[272][0] and L4[511][510] have entries that point to the same
4fac153a
KRW
1839 * L2 (PMD) tables. Meaning that if you modify it in __va space
1840 * it will be also modified in the __ka space! (But if you just
1841 * modify the PMD table to point to other PTE's or none, then you
1842 * are OK - which is what cleanup_highmap does) */
ae895ed7 1843 copy_page(level2_ident_pgt, l2);
0b5a5063 1844 /* Graft it onto L4[511][510] */
ae895ed7 1845 copy_page(level2_kernel_pgt, l2);
319f3ba5 1846
4e44e44b
MR
1847 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1848 /* Make pagetable pieces RO */
1849 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1850 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1851 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1852 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1853 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1854 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1855 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
0b5a5063 1856 set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO);
4e44e44b
MR
1857
1858 /* Pin down new L4 */
1859 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1860 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1861
1862 /* Unpin Xen-provided one */
1863 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
319f3ba5 1864
4e44e44b
MR
1865 /*
1866 * At this stage there can be no user pgd, and no page
1867 * structure to attach it to, so make sure we just set kernel
1868 * pgd.
1869 */
1870 xen_mc_batch();
1871 __xen_write_cr3(true, __pa(init_level4_pgt));
1872 xen_mc_issue(PARAVIRT_LAZY_CPU);
1873 } else
1874 native_write_cr3(__pa(init_level4_pgt));
319f3ba5 1875
488f046d
KRW
1876 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1877 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1878 * the initial domain. For guests using the toolstack, they are in:
1879 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1880 * rip out the [L4] (pgd), but for guests we shave off three pages.
1881 */
1882 for (i = 0; i < ARRAY_SIZE(addr); i++)
1883 check_pt_base(&pt_base, &pt_end, addr[i]);
319f3ba5 1884
488f046d
KRW
1885 /* Our (by three pages) smaller Xen pagetable that we are using */
1886 memblock_reserve(PFN_PHYS(pt_base), (pt_end - pt_base) * PAGE_SIZE);
7f914062
KRW
1887 /* Revector the xen_start_info */
1888 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
319f3ba5
JF
1889}
1890#else /* !CONFIG_X86_64 */
5b5c1af1
IC
1891static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1892static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1893
3f508953 1894static void __init xen_write_cr3_init(unsigned long cr3)
5b5c1af1
IC
1895{
1896 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1897
1898 BUG_ON(read_cr3() != __pa(initial_page_table));
1899 BUG_ON(cr3 != __pa(swapper_pg_dir));
1900
1901 /*
1902 * We are switching to swapper_pg_dir for the first time (from
1903 * initial_page_table) and therefore need to mark that page
1904 * read-only and then pin it.
1905 *
1906 * Xen disallows sharing of kernel PMDs for PAE
1907 * guests. Therefore we must copy the kernel PMD from
1908 * initial_page_table into a new kernel PMD to be used in
1909 * swapper_pg_dir.
1910 */
1911 swapper_kernel_pmd =
1912 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
ae895ed7 1913 copy_page(swapper_kernel_pmd, initial_kernel_pmd);
5b5c1af1
IC
1914 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1915 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1916 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1917
1918 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1919 xen_write_cr3(cr3);
1920 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1921
1922 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1923 PFN_DOWN(__pa(initial_page_table)));
1924 set_page_prot(initial_page_table, PAGE_KERNEL);
1925 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1926
1927 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1928}
319f3ba5 1929
3699aad0 1930void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
319f3ba5
JF
1931{
1932 pmd_t *kernel_pmd;
1933
5b5c1af1
IC
1934 initial_kernel_pmd =
1935 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
f0991802 1936
a91d9287
SS
1937 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1938 xen_start_info->nr_pt_frames * PAGE_SIZE +
1939 512*1024);
319f3ba5
JF
1940
1941 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
ae895ed7 1942 copy_page(initial_kernel_pmd, kernel_pmd);
319f3ba5 1943
5b5c1af1 1944 xen_map_identity_early(initial_kernel_pmd, max_pfn);
319f3ba5 1945
ae895ed7 1946 copy_page(initial_page_table, pgd);
5b5c1af1
IC
1947 initial_page_table[KERNEL_PGD_BOUNDARY] =
1948 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
319f3ba5 1949
5b5c1af1
IC
1950 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1951 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
319f3ba5
JF
1952 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1953
1954 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1955
5b5c1af1
IC
1956 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1957 PFN_DOWN(__pa(initial_page_table)));
1958 xen_write_cr3(__pa(initial_page_table));
319f3ba5 1959
24aa0788 1960 memblock_reserve(__pa(xen_start_info->pt_base),
dc6821e0 1961 xen_start_info->nr_pt_frames * PAGE_SIZE);
319f3ba5
JF
1962}
1963#endif /* CONFIG_X86_64 */
1964
98511f35
JF
1965static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1966
3b3809ac 1967static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
319f3ba5
JF
1968{
1969 pte_t pte;
1970
1971 phys >>= PAGE_SHIFT;
1972
1973 switch (idx) {
1974 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
4eefbe79 1975 case FIX_RO_IDT:
319f3ba5
JF
1976#ifdef CONFIG_X86_32
1977 case FIX_WP_TEST:
319f3ba5
JF
1978# ifdef CONFIG_HIGHMEM
1979 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1980# endif
1ad83c85 1981#elif defined(CONFIG_X86_VSYSCALL_EMULATION)
f40c3300 1982 case VSYSCALL_PAGE:
319f3ba5 1983#endif
3ecb1b7d
JF
1984 case FIX_TEXT_POKE0:
1985 case FIX_TEXT_POKE1:
1986 /* All local page mappings */
319f3ba5
JF
1987 pte = pfn_pte(phys, prot);
1988 break;
1989
98511f35
JF
1990#ifdef CONFIG_X86_LOCAL_APIC
1991 case FIX_APIC_BASE: /* maps dummy local APIC */
1992 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1993 break;
1994#endif
1995
1996#ifdef CONFIG_X86_IO_APIC
1997 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1998 /*
1999 * We just don't map the IO APIC - all access is via
2000 * hypercalls. Keep the address in the pte for reference.
2001 */
27abd14b 2002 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
98511f35
JF
2003 break;
2004#endif
2005
c0011dbf
JF
2006 case FIX_PARAVIRT_BOOTMAP:
2007 /* This is an MFN, but it isn't an IO mapping from the
2008 IO domain */
319f3ba5
JF
2009 pte = mfn_pte(phys, prot);
2010 break;
c0011dbf
JF
2011
2012 default:
2013 /* By default, set_fixmap is used for hardware mappings */
7f2f8822 2014 pte = mfn_pte(phys, prot);
c0011dbf 2015 break;
319f3ba5
JF
2016 }
2017
2018 __native_set_fixmap(idx, pte);
2019
1ad83c85 2020#ifdef CONFIG_X86_VSYSCALL_EMULATION
319f3ba5
JF
2021 /* Replicate changes to map the vsyscall page into the user
2022 pagetable vsyscall mapping. */
f40c3300 2023 if (idx == VSYSCALL_PAGE) {
319f3ba5
JF
2024 unsigned long vaddr = __fix_to_virt(idx);
2025 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2026 }
2027#endif
2028}
2029
3f508953 2030static void __init xen_post_allocator_init(void)
319f3ba5 2031{
4e44e44b
MR
2032 if (xen_feature(XENFEAT_auto_translated_physmap))
2033 return;
2034
319f3ba5
JF
2035 pv_mmu_ops.set_pte = xen_set_pte;
2036 pv_mmu_ops.set_pmd = xen_set_pmd;
2037 pv_mmu_ops.set_pud = xen_set_pud;
2038#if PAGETABLE_LEVELS == 4
2039 pv_mmu_ops.set_pgd = xen_set_pgd;
2040#endif
2041
2042 /* This will work as long as patching hasn't happened yet
2043 (which it hasn't) */
2044 pv_mmu_ops.alloc_pte = xen_alloc_pte;
2045 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
2046 pv_mmu_ops.release_pte = xen_release_pte;
2047 pv_mmu_ops.release_pmd = xen_release_pmd;
2048#if PAGETABLE_LEVELS == 4
2049 pv_mmu_ops.alloc_pud = xen_alloc_pud;
2050 pv_mmu_ops.release_pud = xen_release_pud;
2051#endif
2052
2053#ifdef CONFIG_X86_64
d3eb2c89 2054 pv_mmu_ops.write_cr3 = &xen_write_cr3;
319f3ba5
JF
2055 SetPagePinned(virt_to_page(level3_user_vsyscall));
2056#endif
2057 xen_mark_init_mm_pinned();
2058}
2059
b407fc57
JF
2060static void xen_leave_lazy_mmu(void)
2061{
5caecb94 2062 preempt_disable();
b407fc57
JF
2063 xen_mc_flush();
2064 paravirt_leave_lazy_mmu();
5caecb94 2065 preempt_enable();
b407fc57 2066}
319f3ba5 2067
3f508953 2068static const struct pv_mmu_ops xen_mmu_ops __initconst = {
319f3ba5
JF
2069 .read_cr2 = xen_read_cr2,
2070 .write_cr2 = xen_write_cr2,
2071
2072 .read_cr3 = xen_read_cr3,
5b5c1af1 2073 .write_cr3 = xen_write_cr3_init,
319f3ba5
JF
2074
2075 .flush_tlb_user = xen_flush_tlb,
2076 .flush_tlb_kernel = xen_flush_tlb,
2077 .flush_tlb_single = xen_flush_tlb_single,
2078 .flush_tlb_others = xen_flush_tlb_others,
2079
2080 .pte_update = paravirt_nop,
2081 .pte_update_defer = paravirt_nop,
2082
2083 .pgd_alloc = xen_pgd_alloc,
2084 .pgd_free = xen_pgd_free,
2085
2086 .alloc_pte = xen_alloc_pte_init,
2087 .release_pte = xen_release_pte_init,
b96229b5 2088 .alloc_pmd = xen_alloc_pmd_init,
b96229b5 2089 .release_pmd = xen_release_pmd_init,
319f3ba5 2090
319f3ba5 2091 .set_pte = xen_set_pte_init,
319f3ba5
JF
2092 .set_pte_at = xen_set_pte_at,
2093 .set_pmd = xen_set_pmd_hyper,
2094
2095 .ptep_modify_prot_start = __ptep_modify_prot_start,
2096 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2097
da5de7c2
JF
2098 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2099 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 2100
da5de7c2
JF
2101 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
2102 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
2103
2104#ifdef CONFIG_X86_PAE
2105 .set_pte_atomic = xen_set_pte_atomic,
319f3ba5
JF
2106 .pte_clear = xen_pte_clear,
2107 .pmd_clear = xen_pmd_clear,
2108#endif /* CONFIG_X86_PAE */
2109 .set_pud = xen_set_pud_hyper,
2110
da5de7c2
JF
2111 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2112 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
319f3ba5
JF
2113
2114#if PAGETABLE_LEVELS == 4
da5de7c2
JF
2115 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2116 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
2117 .set_pgd = xen_set_pgd_hyper,
2118
b96229b5
JF
2119 .alloc_pud = xen_alloc_pmd_init,
2120 .release_pud = xen_release_pmd_init,
319f3ba5
JF
2121#endif /* PAGETABLE_LEVELS == 4 */
2122
2123 .activate_mm = xen_activate_mm,
2124 .dup_mmap = xen_dup_mmap,
2125 .exit_mmap = xen_exit_mmap,
2126
2127 .lazy_mode = {
2128 .enter = paravirt_enter_lazy_mmu,
b407fc57 2129 .leave = xen_leave_lazy_mmu,
511ba86e 2130 .flush = paravirt_flush_lazy_mmu,
319f3ba5
JF
2131 },
2132
2133 .set_fixmap = xen_set_fixmap,
2134};
2135
030cb6c0
TG
2136void __init xen_init_mmu_ops(void)
2137{
7737b215 2138 x86_init.paging.pagetable_init = xen_pagetable_init;
76bcceff
MR
2139
2140 /* Optimization - we can use the HVM one but it has no idea which
2141 * VCPUs are descheduled - which means that it will needlessly IPI
2142 * them. Xen knows so let it do the job.
2143 */
2144 if (xen_feature(XENFEAT_auto_translated_physmap)) {
2145 pv_mmu_ops.flush_tlb_others = xen_flush_tlb_others;
2146 return;
2147 }
030cb6c0 2148 pv_mmu_ops = xen_mmu_ops;
d2cb2145 2149
98511f35 2150 memset(dummy_mapping, 0xff, PAGE_SIZE);
030cb6c0 2151}
319f3ba5 2152
08bbc9da
AN
2153/* Protected by xen_reservation_lock. */
2154#define MAX_CONTIG_ORDER 9 /* 2MB */
2155static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2156
2157#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2158static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2159 unsigned long *in_frames,
2160 unsigned long *out_frames)
2161{
2162 int i;
2163 struct multicall_space mcs;
2164
2165 xen_mc_batch();
2166 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2167 mcs = __xen_mc_entry(0);
2168
2169 if (in_frames)
2170 in_frames[i] = virt_to_mfn(vaddr);
2171
2172 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
6eaa412f 2173 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
08bbc9da
AN
2174
2175 if (out_frames)
2176 out_frames[i] = virt_to_pfn(vaddr);
2177 }
2178 xen_mc_issue(0);
2179}
2180
2181/*
2182 * Update the pfn-to-mfn mappings for a virtual address range, either to
2183 * point to an array of mfns, or contiguously from a single starting
2184 * mfn.
2185 */
2186static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2187 unsigned long *mfns,
2188 unsigned long first_mfn)
2189{
2190 unsigned i, limit;
2191 unsigned long mfn;
2192
2193 xen_mc_batch();
2194
2195 limit = 1u << order;
2196 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2197 struct multicall_space mcs;
2198 unsigned flags;
2199
2200 mcs = __xen_mc_entry(0);
2201 if (mfns)
2202 mfn = mfns[i];
2203 else
2204 mfn = first_mfn + i;
2205
2206 if (i < (limit - 1))
2207 flags = 0;
2208 else {
2209 if (order == 0)
2210 flags = UVMF_INVLPG | UVMF_ALL;
2211 else
2212 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2213 }
2214
2215 MULTI_update_va_mapping(mcs.mc, vaddr,
2216 mfn_pte(mfn, PAGE_KERNEL), flags);
2217
2218 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2219 }
2220
2221 xen_mc_issue(0);
2222}
2223
2224/*
2225 * Perform the hypercall to exchange a region of our pfns to point to
2226 * memory with the required contiguous alignment. Takes the pfns as
2227 * input, and populates mfns as output.
2228 *
2229 * Returns a success code indicating whether the hypervisor was able to
2230 * satisfy the request or not.
2231 */
2232static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2233 unsigned long *pfns_in,
2234 unsigned long extents_out,
2235 unsigned int order_out,
2236 unsigned long *mfns_out,
2237 unsigned int address_bits)
2238{
2239 long rc;
2240 int success;
2241
2242 struct xen_memory_exchange exchange = {
2243 .in = {
2244 .nr_extents = extents_in,
2245 .extent_order = order_in,
2246 .extent_start = pfns_in,
2247 .domid = DOMID_SELF
2248 },
2249 .out = {
2250 .nr_extents = extents_out,
2251 .extent_order = order_out,
2252 .extent_start = mfns_out,
2253 .address_bits = address_bits,
2254 .domid = DOMID_SELF
2255 }
2256 };
2257
2258 BUG_ON(extents_in << order_in != extents_out << order_out);
2259
2260 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2261 success = (exchange.nr_exchanged == extents_in);
2262
2263 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2264 BUG_ON(success && (rc != 0));
2265
2266 return success;
2267}
2268
1b65c4e5 2269int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
69908907
SS
2270 unsigned int address_bits,
2271 dma_addr_t *dma_handle)
08bbc9da
AN
2272{
2273 unsigned long *in_frames = discontig_frames, out_frame;
2274 unsigned long flags;
2275 int success;
1b65c4e5 2276 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
08bbc9da
AN
2277
2278 /*
2279 * Currently an auto-translated guest will not perform I/O, nor will
2280 * it require PAE page directories below 4GB. Therefore any calls to
2281 * this function are redundant and can be ignored.
2282 */
2283
2284 if (xen_feature(XENFEAT_auto_translated_physmap))
2285 return 0;
2286
2287 if (unlikely(order > MAX_CONTIG_ORDER))
2288 return -ENOMEM;
2289
2290 memset((void *) vstart, 0, PAGE_SIZE << order);
2291
08bbc9da
AN
2292 spin_lock_irqsave(&xen_reservation_lock, flags);
2293
2294 /* 1. Zap current PTEs, remembering MFNs. */
2295 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2296
2297 /* 2. Get a new contiguous memory extent. */
2298 out_frame = virt_to_pfn(vstart);
2299 success = xen_exchange_memory(1UL << order, 0, in_frames,
2300 1, order, &out_frame,
2301 address_bits);
2302
2303 /* 3. Map the new extent in place of old pages. */
2304 if (success)
2305 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2306 else
2307 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2308
2309 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2310
69908907 2311 *dma_handle = virt_to_machine(vstart).maddr;
08bbc9da
AN
2312 return success ? 0 : -ENOMEM;
2313}
2314EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2315
1b65c4e5 2316void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
08bbc9da
AN
2317{
2318 unsigned long *out_frames = discontig_frames, in_frame;
2319 unsigned long flags;
2320 int success;
1b65c4e5 2321 unsigned long vstart;
08bbc9da
AN
2322
2323 if (xen_feature(XENFEAT_auto_translated_physmap))
2324 return;
2325
2326 if (unlikely(order > MAX_CONTIG_ORDER))
2327 return;
2328
1b65c4e5 2329 vstart = (unsigned long)phys_to_virt(pstart);
08bbc9da
AN
2330 memset((void *) vstart, 0, PAGE_SIZE << order);
2331
08bbc9da
AN
2332 spin_lock_irqsave(&xen_reservation_lock, flags);
2333
2334 /* 1. Find start MFN of contiguous extent. */
2335 in_frame = virt_to_mfn(vstart);
2336
2337 /* 2. Zap current PTEs. */
2338 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2339
2340 /* 3. Do the exchange for non-contiguous MFNs. */
2341 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2342 0, out_frames, 0);
2343
2344 /* 4. Map new pages in place of old pages. */
2345 if (success)
2346 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2347 else
2348 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2349
2350 spin_unlock_irqrestore(&xen_reservation_lock, flags);
030cb6c0 2351}
08bbc9da 2352EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
319f3ba5 2353
ca65f9fc 2354#ifdef CONFIG_XEN_PVHVM
34b6f01a
OH
2355#ifdef CONFIG_PROC_VMCORE
2356/*
2357 * This function is used in two contexts:
2358 * - the kdump kernel has to check whether a pfn of the crashed kernel
2359 * was a ballooned page. vmcore is using this function to decide
2360 * whether to access a pfn of the crashed kernel.
2361 * - the kexec kernel has to check whether a pfn was ballooned by the
2362 * previous kernel. If the pfn is ballooned, handle it properly.
2363 * Returns 0 if the pfn is not backed by a RAM page, the caller may
2364 * handle the pfn special in this case.
2365 */
2366static int xen_oldmem_pfn_is_ram(unsigned long pfn)
2367{
2368 struct xen_hvm_get_mem_type a = {
2369 .domid = DOMID_SELF,
2370 .pfn = pfn,
2371 };
2372 int ram;
2373
2374 if (HYPERVISOR_hvm_op(HVMOP_get_mem_type, &a))
2375 return -ENXIO;
2376
2377 switch (a.mem_type) {
2378 case HVMMEM_mmio_dm:
2379 ram = 0;
2380 break;
2381 case HVMMEM_ram_rw:
2382 case HVMMEM_ram_ro:
2383 default:
2384 ram = 1;
2385 break;
2386 }
2387
2388 return ram;
2389}
2390#endif
2391
59151001
SS
2392static void xen_hvm_exit_mmap(struct mm_struct *mm)
2393{
2394 struct xen_hvm_pagetable_dying a;
2395 int rc;
2396
2397 a.domid = DOMID_SELF;
2398 a.gpa = __pa(mm->pgd);
2399 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2400 WARN_ON_ONCE(rc < 0);
2401}
2402
2403static int is_pagetable_dying_supported(void)
2404{
2405 struct xen_hvm_pagetable_dying a;
2406 int rc = 0;
2407
2408 a.domid = DOMID_SELF;
2409 a.gpa = 0x00;
2410 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2411 if (rc < 0) {
2412 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2413 return 0;
2414 }
2415 return 1;
2416}
2417
2418void __init xen_hvm_init_mmu_ops(void)
2419{
2420 if (is_pagetable_dying_supported())
2421 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
34b6f01a
OH
2422#ifdef CONFIG_PROC_VMCORE
2423 register_oldmem_pfn_is_ram(&xen_oldmem_pfn_is_ram);
2424#endif
59151001 2425}
ca65f9fc 2426#endif
59151001 2427
77945ca7
MR
2428#ifdef CONFIG_XEN_PVH
2429/*
2430 * Map foreign gfn (fgfn), to local pfn (lpfn). This for the user
2431 * space creating new guest on pvh dom0 and needing to map domU pages.
2432 */
2433static int xlate_add_to_p2m(unsigned long lpfn, unsigned long fgfn,
2434 unsigned int domid)
2435{
2436 int rc, err = 0;
2437 xen_pfn_t gpfn = lpfn;
2438 xen_ulong_t idx = fgfn;
2439
2440 struct xen_add_to_physmap_range xatp = {
2441 .domid = DOMID_SELF,
2442 .foreign_domid = domid,
2443 .size = 1,
2444 .space = XENMAPSPACE_gmfn_foreign,
2445 };
2446 set_xen_guest_handle(xatp.idxs, &idx);
2447 set_xen_guest_handle(xatp.gpfns, &gpfn);
2448 set_xen_guest_handle(xatp.errs, &err);
2449
2450 rc = HYPERVISOR_memory_op(XENMEM_add_to_physmap_range, &xatp);
2451 if (rc < 0)
2452 return rc;
2453 return err;
2454}
2455
2456static int xlate_remove_from_p2m(unsigned long spfn, int count)
2457{
2458 struct xen_remove_from_physmap xrp;
2459 int i, rc;
2460
2461 for (i = 0; i < count; i++) {
2462 xrp.domid = DOMID_SELF;
2463 xrp.gpfn = spfn+i;
2464 rc = HYPERVISOR_memory_op(XENMEM_remove_from_physmap, &xrp);
2465 if (rc)
2466 break;
2467 }
2468 return rc;
2469}
2470
2471struct xlate_remap_data {
2472 unsigned long fgfn; /* foreign domain's gfn */
2473 pgprot_t prot;
2474 domid_t domid;
2475 int index;
2476 struct page **pages;
2477};
2478
2479static int xlate_map_pte_fn(pte_t *ptep, pgtable_t token, unsigned long addr,
2480 void *data)
2481{
2482 int rc;
2483 struct xlate_remap_data *remap = data;
2484 unsigned long pfn = page_to_pfn(remap->pages[remap->index++]);
2485 pte_t pteval = pte_mkspecial(pfn_pte(pfn, remap->prot));
2486
2487 rc = xlate_add_to_p2m(pfn, remap->fgfn, remap->domid);
2488 if (rc)
2489 return rc;
2490 native_set_pte(ptep, pteval);
2491
2492 return 0;
2493}
2494
2495static int xlate_remap_gfn_range(struct vm_area_struct *vma,
2496 unsigned long addr, unsigned long mfn,
2497 int nr, pgprot_t prot, unsigned domid,
2498 struct page **pages)
2499{
2500 int err;
2501 struct xlate_remap_data pvhdata;
2502
2503 BUG_ON(!pages);
2504
2505 pvhdata.fgfn = mfn;
2506 pvhdata.prot = prot;
2507 pvhdata.domid = domid;
2508 pvhdata.index = 0;
2509 pvhdata.pages = pages;
2510 err = apply_to_page_range(vma->vm_mm, addr, nr << PAGE_SHIFT,
2511 xlate_map_pte_fn, &pvhdata);
2512 flush_tlb_all();
2513 return err;
2514}
2515#endif
2516
de1ef206
IC
2517#define REMAP_BATCH_SIZE 16
2518
2519struct remap_data {
2520 unsigned long mfn;
2521 pgprot_t prot;
2522 struct mmu_update *mmu_update;
2523};
2524
2525static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2526 unsigned long addr, void *data)
2527{
2528 struct remap_data *rmd = data;
f59c5145 2529 pte_t pte = pte_mkspecial(mfn_pte(rmd->mfn++, rmd->prot));
de1ef206 2530
d5108316 2531 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
de1ef206
IC
2532 rmd->mmu_update->val = pte_val_ma(pte);
2533 rmd->mmu_update++;
2534
2535 return 0;
2536}
2537
2538int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2539 unsigned long addr,
7892f692 2540 xen_pfn_t mfn, int nr,
9a032e39
IC
2541 pgprot_t prot, unsigned domid,
2542 struct page **pages)
2543
de1ef206
IC
2544{
2545 struct remap_data rmd;
2546 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2547 int batch;
2548 unsigned long range;
2549 int err = 0;
2550
314e51b9 2551 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
de1ef206 2552
77945ca7
MR
2553 if (xen_feature(XENFEAT_auto_translated_physmap)) {
2554#ifdef CONFIG_XEN_PVH
2555 /* We need to update the local page tables and the xen HAP */
2556 return xlate_remap_gfn_range(vma, addr, mfn, nr, prot,
2557 domid, pages);
2558#else
2559 return -EINVAL;
2560#endif
2561 }
2562
de1ef206
IC
2563 rmd.mfn = mfn;
2564 rmd.prot = prot;
2565
2566 while (nr) {
2567 batch = min(REMAP_BATCH_SIZE, nr);
2568 range = (unsigned long)batch << PAGE_SHIFT;
2569
2570 rmd.mmu_update = mmu_update;
2571 err = apply_to_page_range(vma->vm_mm, addr, range,
2572 remap_area_mfn_pte_fn, &rmd);
2573 if (err)
2574 goto out;
2575
69870a84
DV
2576 err = HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid);
2577 if (err < 0)
de1ef206
IC
2578 goto out;
2579
2580 nr -= batch;
2581 addr += range;
2582 }
2583
2584 err = 0;
2585out:
2586
95a7d768 2587 xen_flush_tlb_all();
de1ef206
IC
2588
2589 return err;
2590}
2591EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
9a032e39
IC
2592
2593/* Returns: 0 success */
2594int xen_unmap_domain_mfn_range(struct vm_area_struct *vma,
2595 int numpgs, struct page **pages)
2596{
2597 if (!pages || !xen_feature(XENFEAT_auto_translated_physmap))
2598 return 0;
2599
77945ca7
MR
2600#ifdef CONFIG_XEN_PVH
2601 while (numpgs--) {
2602 /*
2603 * The mmu has already cleaned up the process mmu
2604 * resources at this point (lookup_address will return
2605 * NULL).
2606 */
2607 unsigned long pfn = page_to_pfn(pages[numpgs]);
2608
2609 xlate_remove_from_p2m(pfn, 1);
2610 }
2611 /*
2612 * We don't need to flush tlbs because as part of
2613 * xlate_remove_from_p2m, the hypervisor will do tlb flushes
2614 * after removing the p2m entries from the EPT/NPT
2615 */
2616 return 0;
2617#else
9a032e39 2618 return -EINVAL;
77945ca7 2619#endif
9a032e39
IC
2620}
2621EXPORT_SYMBOL_GPL(xen_unmap_domain_mfn_range);